aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorThiago Jung Bauermann <bauerman@br.ibm.com>2009-03-25 21:15:04 +0000
committerThiago Jung Bauermann <bauerman@br.ibm.com>2009-03-25 21:15:04 +0000
commitf04c6d38e2d725d7a813af49883eda0b07a91ad7 (patch)
treee21b61325c6faf914f1b0f8dd15cfdbee126d1e8
parent41aacd835d8579739337737ae49209f688a86c8d (diff)
downloadgdb-f04c6d38e2d725d7a813af49883eda0b07a91ad7.zip
gdb-f04c6d38e2d725d7a813af49883eda0b07a91ad7.tar.gz
gdb-f04c6d38e2d725d7a813af49883eda0b07a91ad7.tar.bz2
gdb/
Fix size of FPSCR in Power 7 processors. * ppc-linux-nat.c (PPC_FEATURE_ARCH_2_05): Remove #define. (PPC_FEATURE_HAS_DFP): New #define. (ppc_linux_read_description): Check for DFP feature instead of ISA 2.05 to decide on size of the FPSCR. gdbserver/ Fix size of FPSCR in Power 7 processors. * linux-ppc-low.c (PPC_FEATURE_ARCH_2_05): Remove #define. (PPC_FEATURE_HAS_DFP): New #define. (ppc_arch_setup): Check for DFP feature instead of ISA 2.05 to decide on size of the FPSCR.
-rw-r--r--gdb/ChangeLog8
-rw-r--r--gdb/gdbserver/ChangeLog8
-rw-r--r--gdb/gdbserver/linux-ppc-low.c17
-rw-r--r--gdb/ppc-linux-nat.c12
4 files changed, 37 insertions, 8 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index c3e0482..9086bbe 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,11 @@
+2009-03-25 Thiago Jung Bauermann <bauerman@br.ibm.com>
+
+ Fix size of FPSCR in Power 7 processors.
+ * ppc-linux-nat.c (PPC_FEATURE_ARCH_2_05): Remove #define.
+ (PPC_FEATURE_HAS_DFP): New #define.
+ (ppc_linux_read_description): Check for DFP feature instead of
+ ISA 2.05 to decide on size of the FPSCR.
+
2009-03-25 Kevin Buettner <kevinb@redhat.com>
* mn10300-tdep.c (trad-frame.h): Don't include.
diff --git a/gdb/gdbserver/ChangeLog b/gdb/gdbserver/ChangeLog
index 964ab07..68ad1a5 100644
--- a/gdb/gdbserver/ChangeLog
+++ b/gdb/gdbserver/ChangeLog
@@ -1,3 +1,11 @@
+2009-03-25 Thiago Jung Bauermann <bauerman@br.ibm.com>
+
+ Fix size of FPSCR in Power 7 processors.
+ * linux-ppc-low.c (PPC_FEATURE_ARCH_2_05): Remove #define.
+ (PPC_FEATURE_HAS_DFP): New #define.
+ (ppc_arch_setup): Check for DFP feature instead of ISA 2.05 to decide on
+ size of the FPSCR.
+
2009-03-23 Pedro Alves <pedro@codesourcery.com>
* server.c (handle_query) Whitespace and formatting.
diff --git a/gdb/gdbserver/linux-ppc-low.c b/gdb/gdbserver/linux-ppc-low.c
index b184d5c..06adbd3 100644
--- a/gdb/gdbserver/linux-ppc-low.c
+++ b/gdb/gdbserver/linux-ppc-low.c
@@ -28,7 +28,7 @@
#define PPC_FEATURE_HAS_VSX 0x00000080
#define PPC_FEATURE_HAS_ALTIVEC 0x10000000
#define PPC_FEATURE_HAS_SPE 0x00800000
-#define PPC_FEATURE_ARCH_2_05 0x00001000
+#define PPC_FEATURE_HAS_DFP 0x00000400
static unsigned long ppc_hwcap;
@@ -274,14 +274,21 @@ ppc_arch_setup (void)
ppc_get_hwcap (&ppc_hwcap);
if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
{
- if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+ /* Power ISA 2.05 (implemented by Power 6 and newer processors)
+ increases the FPSCR from 32 bits to 64 bits. Even though Power 7
+ supports this ISA version, it doesn't have PPC_FEATURE_ARCH_2_05
+ set, only PPC_FEATURE_ARCH_2_06. Since for now the only bits
+ used in the higher half of the register are for Decimal Floating
+ Point, we check if that feature is available to decide the size
+ of the FPSCR. */
+ if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
init_registers_powerpc_isa205_vsx64l ();
else
init_registers_powerpc_vsx64l ();
}
else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
{
- if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+ if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
init_registers_powerpc_isa205_altivec64l ();
else
init_registers_powerpc_altivec64l ();
@@ -297,14 +304,14 @@ ppc_arch_setup (void)
ppc_get_hwcap (&ppc_hwcap);
if (ppc_hwcap & PPC_FEATURE_HAS_VSX)
{
- if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+ if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
init_registers_powerpc_isa205_vsx32l ();
else
init_registers_powerpc_vsx32l ();
}
else if (ppc_hwcap & PPC_FEATURE_HAS_ALTIVEC)
{
- if (ppc_hwcap & PPC_FEATURE_ARCH_2_05)
+ if (ppc_hwcap & PPC_FEATURE_HAS_DFP)
init_registers_powerpc_isa205_altivec32l ();
else
init_registers_powerpc_altivec32l ();
diff --git a/gdb/ppc-linux-nat.c b/gdb/ppc-linux-nat.c
index 034201b..b7e70d1 100644
--- a/gdb/ppc-linux-nat.c
+++ b/gdb/ppc-linux-nat.c
@@ -63,8 +63,8 @@
#ifndef PPC_FEATURE_BOOKE
#define PPC_FEATURE_BOOKE 0x00008000
#endif
-#ifndef PPC_FEATURE_ARCH_2_05
-#define PPC_FEATURE_ARCH_2_05 0x00001000 /* ISA 2.05 */
+#ifndef PPC_FEATURE_HAS_DFP
+#define PPC_FEATURE_HAS_DFP 0x00000400 /* Decimal Floating Point. */
#endif
/* Glibc's headers don't define PTRACE_GETVRREGS so we cannot use a
@@ -1290,7 +1290,13 @@ ppc_linux_read_description (struct target_ops *ops)
perror_with_name (_("Unable to fetch AltiVec registers"));
}
- if (ppc_linux_get_hwcap () & PPC_FEATURE_ARCH_2_05)
+ /* Power ISA 2.05 (implemented by Power 6 and newer processors) increases
+ the FPSCR from 32 bits to 64 bits. Even though Power 7 supports this
+ ISA version, it doesn't have PPC_FEATURE_ARCH_2_05 set, only
+ PPC_FEATURE_ARCH_2_06. Since for now the only bits used in the higher
+ half of the register are for Decimal Floating Point, we check if that
+ feature is available to decide the size of the FPSCR. */
+ if (ppc_linux_get_hwcap () & PPC_FEATURE_HAS_DFP)
isa205 = 1;
/* Check for 64-bit inferior process. This is the case when the host is