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author | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-23 12:42:56 +0000 |
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committer | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-23 20:36:12 +0000 |
commit | c1c54a442d69d22fa00c55e17af45247ee03ae8c (patch) | |
tree | 86a2ab417a3ef8ca77a1fce78371b5d96ac3d0e2 | |
parent | 9053e57b9eece4751c8637766ab0b62f83493b1b (diff) | |
download | gdb-c1c54a442d69d22fa00c55e17af45247ee03ae8c.zip gdb-c1c54a442d69d22fa00c55e17af45247ee03ae8c.tar.gz gdb-c1c54a442d69d22fa00c55e17af45247ee03ae8c.tar.bz2 |
MIPS16: Remove "extended" BREAK/SDBBP handling
Remove special casing for the `6' operand code used for the embedded
trap code of the BREAK and the SDBBP instructions to support supposedly
extended forms of these instructions.
According to all versions of the MIPS16 ASE specifications these
instructions are not extensible [1][2][3][4][5][7][8][10][11], and as
from revision 2.50 of the MIPS16e ASE specifications it has been further
clarified what was previously implied, that non-extesiable instructions
when preceded with an EXTEND prefix must cause a Reserved Instruction
exception [5][6][9][10].
Therefore supposedly extended BREAK and SDBBP instructions do not serve
their purpose anymore as they do not cause a Bp and a Debug exception
respectively and supporting these forms in disassembly only causes
confusion.
References:
[1] "Product Description, MIPS16 Application-Specific Extension",
Version 1.3, MIPS Technologies, Inc., 970130, Table 3. "MIPS16
Instruction Set Summary", p. 5
[2] same, Table 5 "RR Minor Opcodes (RR-type instructions)", p.10
[3] same, Table 18. "Extendable MIPS16 Instructions", p. 24
[4] "MIPS32 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS32 Architecture", MIPS
Technologies, Inc., Document Number: MD00076, Revision 2.63, July
16, 2013, Table 3.8 "MIPS16e Special Instructions", p. 38
[5] same, Section 3.11 "MIPS16e Extensible Instructions, p. 41
[6] same, Table 3.15 "MIPS16e Extensible Instructions", p. 41
[7] same, Table 3.24 "MIPS16e RR Encoding of the Funct Field", p. 49
[8] "MIPS64 Architecture for Programmers, Volume IV-a: The MIPS16e
Application-Specific Extension to the MIPS64 Architecture", MIPS
Technologies, Inc., Document Number: MD00077, Revision 2.60, June
25, 2008, Table 1.8 "MIPS16e Special Instructions", p. 39
[9] same, Section 1.11 "MIPS16e Extensible Instructions", p. 42
[10] same, Table 1.15 "MIPS16e Extensible Instructions", pp. 42-43
[11] same, Table 1.24 "MIPS16e RR Encoding of the Funct Field", p. 50
gas/
* config/tc-mips.c (match_mips16_insn): Remove the `6' operand
code special case and its associated comment.
opcodes/
* mips16-opc.c (decode_mips16_operand) <'6'>: Remove extended
encoding support.
(cherry picked from commit b2805ed55456cea2694d31fc8627cca17120267b)
-rw-r--r-- | gas/ChangeLog | 5 | ||||
-rw-r--r-- | gas/config/tc-mips.c | 9 | ||||
-rw-r--r-- | opcodes/ChangeLog | 5 | ||||
-rw-r--r-- | opcodes/mips16-opc.c | 3 |
4 files changed, 12 insertions, 10 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index feac41e..f5dd23d 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,10 @@ 2016-12-23 Maciej W. Rozycki <macro@imgtec.com> + * config/tc-mips.c (match_mips16_insn): Remove the `6' operand + code special case and its associated comment. + +2016-12-23 Maciej W. Rozycki <macro@imgtec.com> + * config/tc-mips.c (mips16_ip): Handle `.e' and `.t' instruction suffixes followed by a null character rather than a space too. * testsuite/gas/mips/mips16-insn-length-noargs.d: New test. diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index 7536a5b..7105604 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -8186,14 +8186,7 @@ match_mips16_insn (struct mips_cl_insn *insn, const struct mips_opcode *opcode, if (!operand) abort (); - /* '6' is a special case. It is used for BREAK and SDBBP, - whose operands are only meaningful to the software that decodes - them. This means that there is no architectural reason why - they cannot be prefixed by EXTEND, but in practice, - exception handlers will only look at the instruction - itself. We therefore allow '6' to be extended when - disassembling but not when assembling. */ - if (operand->type != OP_PCREL && c != '6') + if (operand->type != OP_PCREL) { ext_operand = decode_mips16_operand (c, TRUE); if (operand != ext_operand) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5166be4..cb69f64 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,10 @@ 2016-12-23 Maciej W. Rozycki <macro@imgtec.com> + * mips16-opc.c (decode_mips16_operand) <'6'>: Remove extended + encoding support. + +2016-12-23 Maciej W. Rozycki <macro@imgtec.com> + * mips16-opc.c (mips16_opcodes): Set NODS in `pinfo' for "extend". diff --git a/opcodes/mips16-opc.c b/opcodes/mips16-opc.c index 7d430dd..a6f6ad1 100644 --- a/opcodes/mips16-opc.c +++ b/opcodes/mips16-opc.c @@ -50,6 +50,7 @@ decode_mips16_operand (char type, bfd_boolean extended_p) switch (type) { case '0': MAPPED_REG (0, 0, GP, reg_0_map); + case '6': UINT (6, 5); case 'L': SPECIAL (6, 5, ENTRY_EXIT_LIST); case 'M': SPECIAL (7, 0, SAVE_RESTORE_LIST); @@ -81,7 +82,6 @@ decode_mips16_operand (char type, bfd_boolean extended_p) case '4': SINT (15, 0); case '5': SINT (16, 0); - case '6': SINT (16, 0); case '8': SINT (16, 0); case 'A': PCREL (16, 0, TRUE, 0, 2, FALSE, FALSE); @@ -109,7 +109,6 @@ decode_mips16_operand (char type, bfd_boolean extended_p) case '4': SINT (4, 0); case '5': UINT (5, 0); - case '6': UINT (6, 5); case '8': UINT (8, 0); case 'A': PCREL (8, 0, FALSE, 2, 2, FALSE, FALSE); |