X86: Allow additional ISAs for IAMCU in assembler

Originally only Pentium integer instructions are allowed for IAMCU.
This patch removes such a restriction.  For example, 387 and SSE2
instructions can be enabled by passing "-march=iamcu+sse2+387" to
assembler.

gas/

	* config/tc-i386.c (valid_iamcu_cpu_flags): Removed.
	(set_cpu_arch): Updated.
	(md_parse_option): Likewise.
	* testsuite/gas/i386/i386.exp: Run iamcu-4 and iamcu-5.  Remove
	iamcu-inval-2 and iamcu-inval-3.
	* testsuite/gas/i386/iamcu-4.d: New file.
	* testsuite/gas/i386/iamcu-4.s: Likewise.
	* testsuite/gas/i386/iamcu-5.d: Likewise.
	* testsuite/gas/i386/iamcu-5.s: Likewise.
	* testsuite/gas/i386/iamcu-inval-2.l: Removed.
	* testsuite/gas/i386/iamcu-inval-2.s: Likewise.
	* testsuite/gas/i386/iamcu-inval-3.l: Likewise.
	* testsuite/gas/i386/iamcu-inval-3.s: Likewise.

opcodes/

	* i386-gen.c (cpu_flag_init): Remove CPU_IAMCU_COMPAT_FLAGS.
	* i386-init.h: Regenerated.

14 files changed, 55 insertions, 39 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 085eedd..6fbb693 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,19 @@
+2016-09-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* config/tc-i386.c (valid_iamcu_cpu_flags): Removed.
+	(set_cpu_arch): Updated.
+	(md_parse_option): Likewise.
+	* testsuite/gas/i386/i386.exp: Run iamcu-4 and iamcu-5.  Remove
+	iamcu-inval-2 and iamcu-inval-3.
+	* testsuite/gas/i386/iamcu-4.d: New file.
+	* testsuite/gas/i386/iamcu-4.s: Likewise.
+	* testsuite/gas/i386/iamcu-5.d: Likewise.
+	* testsuite/gas/i386/iamcu-5.s: Likewise.
+	* testsuite/gas/i386/iamcu-inval-2.l: Removed.
+	* testsuite/gas/i386/iamcu-inval-2.s: Likewise.
+	* testsuite/gas/i386/iamcu-inval-3.l: Likewise.
+	* testsuite/gas/i386/iamcu-inval-3.s: Likewise.
+
 2016-09-07  Richard Earnshaw  <rearnsha@arm.com>
 
 	* config/tc-arm.c ((arm_cpus): Use ARM_ARCH_V8A_CRC for all
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index 626f7bf..9da7a4e 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -1520,20 +1520,6 @@ cpu_flags_and_not (i386_cpu_flags x, i386_cpu_flags y)
   return x;
 }
 
-static int
-valid_iamcu_cpu_flags (const i386_cpu_flags *flags)
-{
-  if (cpu_arch_isa == PROCESSOR_IAMCU)
-    {
-      static const i386_cpu_flags iamcu_flags = CPU_IAMCU_COMPAT_FLAGS;
-      i386_cpu_flags compat_flags;
-      compat_flags = cpu_flags_and_not (*flags, iamcu_flags);
-      return cpu_flags_all_zero (&compat_flags);
-    }
-  else
-    return 1;
-}
-
 #define CPU_FLAGS_ARCH_MATCH		0x1
 #define CPU_FLAGS_64BIT_MATCH		0x2
 #define CPU_FLAGS_AES_MATCH		0x4
@@ -2424,10 +2410,7 @@ set_cpu_arch (int dummy ATTRIBUTE_UNUSED)
 	      flags = cpu_flags_or (cpu_arch_flags,
 				    cpu_arch[j].flags);
 
-	      if (!valid_iamcu_cpu_flags (&flags))
-		as_fatal (_("`%s' isn't valid for Intel MCU"),
-			  cpu_arch[j].name);
-	      else if (!cpu_flags_equal (&flags, &cpu_arch_flags))
+	      if (!cpu_flags_equal (&flags, &cpu_arch_flags))
 		{
 		  if (cpu_sub_arch_name)
 		    {
@@ -10021,9 +10004,7 @@ md_parse_option (int c, const char *arg)
 		  flags = cpu_flags_or (cpu_arch_flags,
 					cpu_arch[j].flags);
 
-		  if (!valid_iamcu_cpu_flags (&flags))
-		    as_fatal (_("`%s' isn't valid for Intel MCU"), arch);
-		  else if (!cpu_flags_equal (&flags, &cpu_arch_flags))
+		  if (!cpu_flags_equal (&flags, &cpu_arch_flags))
 		    {
 		      if (cpu_sub_arch_name)
 			{
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index a546c26..c2cdf60 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -441,9 +441,9 @@ if [expr ([istarget "i*86-*-*"] ||  [istarget "x86_64-*-*"]) && [gas_32_check]]
 	    run_dump_test "iamcu-1"
 	    run_dump_test "iamcu-2"
 	    run_dump_test "iamcu-3"
+	    run_dump_test "iamcu-4"
+	    run_dump_test "iamcu-5"
 	    run_list_test "iamcu-inval-1" "-march=iamcu -al"
-	    run_list_test "iamcu-inval-2" "-march=iamcu -al"
-	    run_list_test "iamcu-inval-3" "-march=iamcu+sse4 -al"
 	}
     }
 
diff --git a/gas/testsuite/gas/i386/iamcu-4.d b/gas/testsuite/gas/i386/iamcu-4.d
new file mode 100644
index 0000000..afd8a8e
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-4.d
@@ -0,0 +1,12 @@
+#as: -J -march=iamcu+sse2+387
+#objdump: -dw
+#not-target: *-*-nacl*
+
+.*: +file format elf32-iamcu.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ +[a-f0-9]+:	d9 ff                	fcos   
+ +[a-f0-9]+:	66 0f 58 01          	addpd  \(%ecx\),%xmm0
+#pass
diff --git a/gas/testsuite/gas/i386/iamcu-4.s b/gas/testsuite/gas/i386/iamcu-4.s
new file mode 100644
index 0000000..253763e
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-4.s
@@ -0,0 +1,3 @@
+	.text
+	fcos
+	addpd	(%ecx),%xmm0
diff --git a/gas/testsuite/gas/i386/iamcu-5.d b/gas/testsuite/gas/i386/iamcu-5.d
new file mode 100644
index 0000000..dde6977
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-5.d
@@ -0,0 +1,12 @@
+#as: -J -march=iamcu -I${srcdir}/$subdir
+#objdump: -dw
+#not-target: *-*-nacl*
+
+.*: +file format elf32-iamcu.*
+
+Disassembly of section .text:
+
+0+ <.text>:
+ +[a-f0-9]+:	d9 ff                	fcos   
+ +[a-f0-9]+:	66 0f 58 01          	addpd  \(%ecx\),%xmm0
+#pass
diff --git a/gas/testsuite/gas/i386/iamcu-5.s b/gas/testsuite/gas/i386/iamcu-5.s
new file mode 100644
index 0000000..afc558e
--- /dev/null
+++ b/gas/testsuite/gas/i386/iamcu-5.s
@@ -0,0 +1,3 @@
+	.arch .sse2
+	.arch .387
+.include "iamcu-4.s"
diff --git a/gas/testsuite/gas/i386/iamcu-inval-2.l b/gas/testsuite/gas/i386/iamcu-inval-2.l
deleted file mode 100644
index e62e29d..0000000
--- a/gas/testsuite/gas/i386/iamcu-inval-2.l
+++ /dev/null
@@ -1,2 +0,0 @@
-.*: Assembler messages:
-.*:2: Fatal error: `.sse4.1' isn't valid for Intel MCU
diff --git a/gas/testsuite/gas/i386/iamcu-inval-2.s b/gas/testsuite/gas/i386/iamcu-inval-2.s
deleted file mode 100644
index 46ef3ff..0000000
--- a/gas/testsuite/gas/i386/iamcu-inval-2.s
+++ /dev/null
@@ -1,2 +0,0 @@
-# Invalid .arch for Intel MCU
-	.arch .sse4.1
diff --git a/gas/testsuite/gas/i386/iamcu-inval-3.l b/gas/testsuite/gas/i386/iamcu-inval-3.l
deleted file mode 100644
index a9762a5..0000000
--- a/gas/testsuite/gas/i386/iamcu-inval-3.l
+++ /dev/null
@@ -1,2 +0,0 @@
-Assembler messages:
-Fatal error: `sse4' isn't valid for Intel MCU
diff --git a/gas/testsuite/gas/i386/iamcu-inval-3.s b/gas/testsuite/gas/i386/iamcu-inval-3.s
deleted file mode 100644
index 1c255e2..0000000
--- a/gas/testsuite/gas/i386/iamcu-inval-3.s
+++ /dev/null
@@ -1 +0,0 @@
-.include "iamcu-1.s"
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index fdb78af..593fc06 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2016-09-07  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* i386-gen.c (cpu_flag_init): Remove CPU_IAMCU_COMPAT_FLAGS.
+	* i386-init.h: Regenerated.
+
 2016-08-30  Cupertino Miranda  <cmiranda@synopsys.com>
 
 	* opcodes/arc-dis.c (print_insn_arc): Changed.
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index c819b95..bf4a021 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -223,8 +223,6 @@ static initializer cpu_flag_init[] =
     "unknown" },
   { "CPU_IAMCU_FLAGS",
     "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586" },
-  { "CPU_IAMCU_COMPAT_FLAGS",
-    "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuNo64|CpuNop" },
   { "CPU_ADX_FLAGS",
     "CpuADX" },
   { "CPU_RDSEED_FLAGS",
diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h
index 2c60ce0..c58a4e5 100644
--- a/opcodes/i386-init.h
+++ b/opcodes/i386-init.h
@@ -641,13 +641,6 @@
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } }
 
-#define CPU_IAMCU_COMPAT_FLAGS \
-  { { 1, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
-      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0 } }
-
 #define CPU_ADX_FLAGS \
   { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \