diff options
author | Doug Evans <dje@google.com> | 1998-01-20 06:17:32 +0000 |
---|---|---|
committer | Doug Evans <dje@google.com> | 1998-01-20 06:17:32 +0000 |
commit | 369fba30897458a842d6f599fde08b45804ebef3 (patch) | |
tree | 3e03819f99ab112e500ab9f13501f5b2eb2c85be | |
parent | 5d07b6cf9e5d11596d26b132761e2a4fbac0728f (diff) | |
download | gdb-369fba30897458a842d6f599fde08b45804ebef3.zip gdb-369fba30897458a842d6f599fde08b45804ebef3.tar.gz gdb-369fba30897458a842d6f599fde08b45804ebef3.tar.bz2 |
* arch.c, arch.h, cpuall.h: New files.
* arch-defs.h: Deleted.
* mloop.in: Renamed from mainloop.in.
* sem.c: Renamed from semantics.c.
* Makefile.in: Update.
* sem-ops.h: Deleted.
* mem-ops.h: Deleted.
start-sanitize-cygnus
Add cgen support for generating files.
end-sanitize-cygnus
(arch): Renamed from CPU.
* decode.c: Redone.
* decode.h: Redone.
* extract.c: Redone.
* model.c: Redone.
* sem-switch.c: Redone.
* sem.c: Renamed from semantics.c, and redone.
* m32r-sim.h (PROFILE_COUNT_FILLNOPS): Update.
(GETTWI,SETTWI,BRANCH_NEW_PC): Define.
* m32r.c (WANT_CPU,WANT_CPU_M32R): Define.
(m32r_{fetch,store}_register): New functions.
(model_mark_{get,set}_h_gr): Prefix with m32r_.
(m32r_model_mark_{busy,unbusy}_reg): Prefix with m32r_.
(h_cr_{get,set}): Prefix with m32r_.
(do_trap): Fetch state from current_cpu, not current_state.
Call sim_engine_halt instead of engine_halt.
* sim-if.c (alloc_cpu): New function.
(free_state): New function.
(sim_open): Call sim_state_alloc, and malloc space for selected cpu
type. Call sim_analyze_program.
(sim_create_inferior): Handle selected cpu type when setting PC.
start-sanitize-m32rx
(sim_resume): Handle m32rx.
end-sanitize-m32rx
(sim_stop_reason): Deleted.
(print_m32r_misc_cpu): Update.
start-sanitize-m32rx
(sim_{fetch,store}_register): Handle m32rx.
end-sanitize-m32rx
(sim_{read,write}): Deleted.
(sim_engine_illegal_insn): New function.
* sim-main.h: Don't include arch-defs.h,sim-core.h,sim-events.h.
Include arch.h,cpuall.h. Include cpu.h,decode.h if m32r.
start-sanitize-m32rx
Include cpux.h,decodex.h if m32rx.
end-sanitize-m32rx
(_sim_cpu): Include member appropriate cpu_data member for the cpu.
(M32R_MISC_PROFILE): Renamed from M32R_PROFILE.
(sim_state): Delete members core,events,halt_jmp_buf.
Change `cpu' member to be a pointer to the cpu's struct, rather than
record inside the state struct.
* tconfig.in (WITH_DEVICES): Define here.
(WITH_FAST,WITH_SEM_SWITCH_{FULL,FAST}): Define for the cpu.
-rw-r--r-- | sim/m32r/.Sanitize | 66 | ||||
-rw-r--r-- | sim/m32r/ChangeLog | 55 | ||||
-rw-r--r-- | sim/m32r/Makefile.in | 127 | ||||
-rw-r--r-- | sim/m32r/arch.c | 31 | ||||
-rw-r--r-- | sim/m32r/arch.h | 64 | ||||
-rw-r--r-- | sim/m32r/cpuall.h | 72 | ||||
-rw-r--r-- | sim/m32r/mainloop.in | 321 | ||||
-rw-r--r-- | sim/m32r/mem-ops.h | 503 | ||||
-rw-r--r-- | sim/m32r/sem-ops.h | 978 | ||||
-rw-r--r-- | sim/m32r/sim-main.h | 81 | ||||
-rw-r--r-- | sim/m32r/tconfig.in | 35 |
11 files changed, 496 insertions, 1837 deletions
diff --git a/sim/m32r/.Sanitize b/sim/m32r/.Sanitize index 7ea15d9..0d5aef1 100644 --- a/sim/m32r/.Sanitize +++ b/sim/m32r/.Sanitize @@ -28,21 +28,21 @@ ChangeLog Makefile.in README TODO -arch-defs.h +arch.c +arch.h config.in configure configure.in +cpuall.h decode.c decode.h extract.c m32r-sim.h m32r.c -mainloop.in -mem-ops.h +mloop.in model.c -sem-ops.h sem-switch.c -semantics.c +sem.c sim-if.c sim-main.h tconfig.in @@ -51,4 +51,60 @@ Things-to-lose: Do-last: +cygnus_files="ChangeLog Makefile.in" +if ( echo $* | grep keep\-cygnus > /dev/null ) ; then + for i in $cygnus_files ; do + if test ! -d $i && (grep sanitize-cygnus $i > /dev/null) ; then + if [ -n "${verbose}" ] ; then + echo Keeping cygnus stuff in $i + fi + fi + done +else + for i in $cygnus_files ; do + if test ! -d $i && (grep sanitize-cygnus $i > /dev/null) ; then + if [ -n "${verbose}" ] ; then + echo Removing traces of \"cygnus\" from $i... + fi + cp $i new + sed '/start\-sanitize\-cygnus/,/end-\sanitize\-cygnus/d' < $i > new + if [ -n "${safe}" -a ! -f .Recover/$i ] ; then + if [ -n "${verbose}" ] ; then + echo Caching $i in .Recover... + fi + mv $i .Recover + fi + mv new $i + fi + done +fi + +m32rx_files="ChangeLog Makefile.in sim-if.c sim-main.h" +if ( echo $* | grep keep\-m32rx > /dev/null ) ; then + for i in $m32rx_files ; do + if test ! -d $i && (grep sanitize-m32rx $i > /dev/null) ; then + if [ -n "${verbose}" ] ; then + echo Keeping m32rx stuff in $i + fi + fi + done +else + for i in $m32rx_files ; do + if test ! -d $i && (grep sanitize-m32rx $i > /dev/null) ; then + if [ -n "${verbose}" ] ; then + echo Removing traces of \"m32rx\" from $i... + fi + cp $i new + sed '/start\-sanitize\-m32rx/,/end-\sanitize\-m32rx/d' < $i > new + if [ -n "${safe}" -a ! -f .Recover/$i ] ; then + if [ -n "${verbose}" ] ; then + echo Caching $i in .Recover... + fi + mv $i .Recover + fi + mv new $i + fi + done +fi + # End of file. diff --git a/sim/m32r/ChangeLog b/sim/m32r/ChangeLog index eb0465c..99f96df 100644 --- a/sim/m32r/ChangeLog +++ b/sim/m32r/ChangeLog @@ -1,3 +1,58 @@ +Mon Jan 19 14:13:40 1998 Doug Evans <devans@seba.cygnus.com> + + * arch.c, arch.h, cpuall.h: New files. + * arch-defs.h: Deleted. + * mloop.in: Renamed from mainloop.in. + * Makefile.in: Update. + * sem-ops.h: Deleted. + * mem-ops.h: Deleted. +start-sanitize-cygnus + Add cgen support for generating files. +end-sanitize-cygnus + (arch): Renamed from CPU. + * decode.c: Redone. + * decode.h: Redone. + * extract.c: Redone. + * model.c: Redone. + * sem-switch.c: Redone. + * sem.c: Renamed from semantics.c, and redone. + * m32r-sim.h (PROFILE_COUNT_FILLNOPS): Update. + (GETTWI,SETTWI,BRANCH_NEW_PC): Define. + * m32r.c (WANT_CPU,WANT_CPU_M32R): Define. + (m32r_{fetch,store}_register): New functions. + (model_mark_{get,set}_h_gr): Prefix with m32r_. + (m32r_model_mark_{busy,unbusy}_reg): Prefix with m32r_. + (h_cr_{get,set}): Prefix with m32r_. + (do_trap): Fetch state from current_cpu, not current_state. + Call sim_engine_halt instead of engine_halt. + * sim-if.c (alloc_cpu): New function. + (free_state): New function. + (sim_open): Call sim_state_alloc, and malloc space for selected cpu + type. Call sim_analyze_program. + (sim_create_inferior): Handle selected cpu type when setting PC. +start-sanitize-m32rx + (sim_resume): Handle m32rx. +end-sanitize-m32rx + (sim_stop_reason): Deleted. + (print_m32r_misc_cpu): Update. +start-sanitize-m32rx + (sim_{fetch,store}_register): Handle m32rx. +end-sanitize-m32rx + (sim_{read,write}): Deleted. + (sim_engine_illegal_insn): New function. + * sim-main.h: Don't include arch-defs.h,sim-core.h,sim-events.h. + Include arch.h,cpuall.h. Include cpu.h,decode.h if m32r. +start-sanitize-m32rx + Include cpux.h,decodex.h if m32rx. +end-sanitize-m32rx + (_sim_cpu): Include member appropriate cpu_data member for the cpu. + (M32R_MISC_PROFILE): Renamed from M32R_PROFILE. + (sim_state): Delete members core,events,halt_jmp_buf. + Change `cpu' member to be a pointer to the cpu's struct, rather than + record inside the state struct. + * tconfig.in (WITH_DEVICES): Define here. + (WITH_FAST,WITH_SEM_SWITCH_{FULL,FAST}): Define for the cpu. + Fri Jan 16 12:16:56 1998 Nick Clifton <nickc@cygnus.com> * arch-defs.h (INSN_NAME): Fix typo. diff --git a/sim/m32r/Makefile.in b/sim/m32r/Makefile.in index 3870f19..a848a25 100644 --- a/sim/m32r/Makefile.in +++ b/sim/m32r/Makefile.in @@ -1,5 +1,5 @@ # Makefile template for Configure for the m32r simulator -# Copyright (C) 1996, 1997 Free Software Foundation, Inc. +# Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. # Contributed by Cygnus Support. # # This file is part of GDB, the GNU debugger. @@ -20,35 +20,34 @@ ## COMMON_PRE_CONFIG_FRAG -SIM_OBJS = sim-if.o m32r.o mainloop.o \ - decode.o extract.o semantics.o seman-cache.o model.o \ - sim-io.o sim-utils.o sim-load.o sim-abort.o sim-watch.o \ - sim-module.o sim-options.o sim-trace.o sim-profile.o sim-model.o \ - sim-core.o sim-events.o sim-endian.o sim-bits.o sim-config.o \ - sim-hload.o \ - cgen-utils.o cgen-trace.o cgen-scache.o +M32R_OBJS = m32r.o decode.o extract.o sem.o model.o mloop.o +# start-sanitize-m32rx +M32RX_OBJS = m32rx.o decodex.o modelx.o mloopx.o +# end-sanitize-m32rx + +SIM_OBJS = \ + $(SIM_NEW_COMMON_OBJS) \ + sim-hload.o sim-hrw.o sim-engine.o sim-model.o sim-reason.o \ + cgen-utils.o cgen-trace.o cgen-scache.o \ + sim-if.o arch.o \ + $(M32R_OBJS) # Extra headers included by sim-main.h. SIM_EXTRA_DEPS = \ $(srcdir)/../common/cgen-types.h \ $(srcdir)/../common/cgen-sim.h \ $(srcdir)/../common/cgen-trace.h \ - arch-defs.h + arch.h cpuall.h m32r-sim.h -SIM_ENDIAN = @sim_endian@ -SIM_HOSTENDIAN = @sim_hostendian@ -SIM_SCACHE = @sim_scache@ -SIM_DEFAULT_MODEL = @sim_default_model@ -SIM_EXTRA_CFLAGS = \ - $(SIM_ENDIAN) $(SIM_HOSTENDIAN) \ - $(SIM_SCACHE) $(SIM_DEFAULT_MODEL) +SIM_EXTRA_CFLAGS = SIM_RUN_OBJS = nrun.o SIM_EXTRA_CLEAN = m32r-clean ## COMMON_POST_CONFIG_FRAG -CPU = m32r +arch = m32r + MAIN_INCLUDE_DEPS = \ sim-main.h \ $(srcdir)/../common/sim-config.h \ @@ -59,28 +58,96 @@ MAIN_INCLUDE_DEPS = \ $(srcdir)/../common/sim-profile.h \ tconfig.h INCLUDE_DEPS = $(MAIN_INCLUDE_DEPS) $(SIM_EXTRA_DEPS) cpu-sim.h -OPS_INCLUDE_DEPS = mem-ops.h sem-ops.h +OPS_INCLUDE_DEPS = \ + $(srcdir)/../common/cgen-mem.h \ + $(srcdir)/../common/cgen-ops.h sim-if.o: sim-if.c $(INCLUDE_DEPS) $(srcdir)/../common/sim-core.h m32r.o: m32r.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) +arch.o: arch.c $(INCLUDE_DEPS) cpu-opc.h + +# M32R objs + +# FIXME: Use of `mono' is wip. +mloop.c: $(srcdir)/../common/genmloop.sh mloop.in Makefile + rm -f mloop.c + $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) -mono -scache -fast m32r $(srcdir)/mloop.in | sed -e 's/@cpu@/m32r/' -e 's/@CPU@/M32R/' >mloop.c +mloop.o: mloop.c sem-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h + +decode.o: decode.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu-opc.h cpu.h +extract.o: extract.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h +sem.o: sem.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h +model.o: model.c $(INCLUDE_DEPS) cpu-opc.h cpu.h + +# wip +#extr-cache.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) +# $(CC) -c $(srcdir)/extract.c -o extr-cache.o -DSCACHE_P $(ALL_CFLAGS) +sem-cache.o: sem.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu.h + $(CC) -c $(srcdir)/sem.c -o sem-cache.o -DSCACHE_P $(ALL_CFLAGS) + +# start-sanitize-m32rx +# M32RX objs + # FIXME: Use of `mono' is wip. -mainloop.c: $(srcdir)/../common/genmloop.sh mainloop.in - rm -f mainloop.c - $(SHELL) $(srcdir)/../common/genmloop.sh mono $(CPU) $(srcdir)/mainloop.in >mainloop.c -mainloop.o: mainloop.c sem-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) \ - $(srcdir)/../common/cgen-scache.h +mloopx.c: $(srcdir)/../common/genmloop.sh mloopx.in Makefile + rm -f mloopx.c + $(SHELL) $(srcdir)/../common/genmloop.sh $(SHELL) -mono -no-scache -no-fast -parallel m32r $(srcdir)/mloopx.in | sed -e 's/@cpu@/m32rx/' -e 's/@CPU@/M32RX/' >mloopx.c +mloopx.o: mloopx.c readx.c semx-switch.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h -decode.o: decode.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu-opc.h -extract.o: extract.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) -semantics.o: semantics.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) -model.o: model.c $(INCLUDE_DEPS) cpu-opc.h +decodex.o: decodex.c decodex.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpu-opc.h cpux.h +extractx.o: extractx.c decodex.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h +semx.o: semx.c decodex.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h +modelx.o: modelx.c $(INCLUDE_DEPS) cpu-opc.h cpux.h # wip #extr-cache.o: extract.c $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) # $(CC) -c $(srcdir)/extract.c -o extr-cache.o -DSCACHE_P $(ALL_CFLAGS) -seman-cache.o: semantics.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) - $(CC) -c $(srcdir)/semantics.c -o seman-cache.o -DSCACHE_P $(ALL_CFLAGS) +semx-cache.o: semx.c decode.h $(INCLUDE_DEPS) $(OPS_INCLUDE_DEPS) cpux.h + $(CC) -c $(srcdir)/semx.c -o semx-cache.o -DSCACHE_P $(ALL_CFLAGS) +# end-sanitize-m32rx m32r-clean: - rm -f mainloop.c + rm -f mloop.c stamp-arch stamp-cpu stamp-decode +# start-sanitize-m32rx + rm -f mloopx.c stamp-xcpu stamp-xdecode +# end-sanitize-m32rx + rm -f tmp-* + +# start-sanitize-cygnus +# cgen support +# For now, require developers to configure with --enable-maintainer-mode. +# ??? Do we need to use a different option? + +stamp-arch: $(CGEN_MAIN_SCM) $(srccgen)/m32r.cpu + $(MAKE) cgen-arch + touch stamp-arch +arch.h arch.c cpuall.h: @MAINT@ stamp-arch + @true + +stamp-cpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu + $(MAKE) cgen-cpu cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" EXTRAFILES="$(CGEN_CPU_EXTR) $(CGEN_CPU_SEM) $(CGEN_CPU_SEMSW)" + touch stamp-cpu +cpu.h extract.c sem.c sem-switch.c model.c: @MAINT@ stamp-cpu + @true + +stamp-decode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu + $(MAKE) cgen-decode cpu=m32r mach=m32r SUFFIX= FLAGS="with-scache,with-profile fn" + touch stamp-decode +decode.h decode.c: @MAINT@ stamp-decode + @true +# start-sanitize-cygnus + +# start-sanitize-m32rx +stamp-xcpu: $(CGEN_MAIN_SCM) $(CGEN_CPU_SCM) $(srccgen)/m32r.cpu + $(MAKE) cgen-cpu cpu=m32rx mach=m32rx SUFFIX=x FLAGS="" EXTRAFILES="$(CGEN_CPU_READ) $(CGEN_CPU_SEMSW)" + touch stamp-xcpu +cpux.h readx.c semx-switch.c modelx.c: @MAINT@ stamp-xcpu + @true + +stamp-xdecode: $(CGEN_MAIN_SCM) $(CGEN_DECODE_SCM) $(srccgen)/m32r.cpu + $(MAKE) cgen-decode cpu=m32rx mach=m32rx SUFFIX=x + touch stamp-xdecode +decodex.h decodex.c: @MAINT@ stamp-xdecode + @true +# end-sanitize-m32rx diff --git a/sim/m32r/arch.c b/sim/m32r/arch.c new file mode 100644 index 0000000..431d500 --- /dev/null +++ b/sim/m32r/arch.c @@ -0,0 +1,31 @@ +/* Simulator support for m32r. + +Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. + +This file is part of the GNU Simulators. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License along +with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +*/ + +#include "sim-main.h" +#include "cpu-sim.h" +#include "cpu-opc.h" + +const MACH machs[] = { + { "m32r", 32, 32, & m32r_models[0], & m32r_imp_properties }, + { 0 } +}; + diff --git a/sim/m32r/arch.h b/sim/m32r/arch.h new file mode 100644 index 0000000..562ecaa --- /dev/null +++ b/sim/m32r/arch.h @@ -0,0 +1,64 @@ +/* Simulator header for m32r. + +Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. + +This file is part of the GNU Simulators. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License along +with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +*/ + +#ifndef M32R_ARCH_H +#define M32R_ARCH_H + +#define MAX_INSNS 128 + +#define TARGET_BIG_ENDIAN 1 + +/* Shorthand macro for fetching registers. */ +#define CPU(x) (CPU_CGEN_HW (current_cpu)->x) + +/* Macros to determine which cpus are supported. */ +#define HAVE_CPU_M32R + +/* Enum declaration for mode types. */ +typedef enum mode_type { + MODE_VM, MODE_BI, MODE_QI, MODE_HI, + MODE_SI, MODE_DI, MODE_UBI, MODE_UQI, + MODE_UHI, MODE_USI, MODE_UDI, MODE_SF, + MODE_DF, MODE_XF, MODE_TF, MODE_MAX +} MODE_TYPE; + +#define MAX_MODES ((int) MODE_MAX) + +/* Return name of instruction numbered INSN. */ +#define INSN_NAME(insn) (m32r_cgen_insn_table_entries[insn].name) + +/* Enum declaration for model types. */ +typedef enum model_type { + MODEL_M32R_D, MODEL_TEST, MODEL_MAX +} MODEL_TYPE; + +#define MAX_MODELS ((int) MODEL_MAX) + +/* Enum declaration for unit types. */ +typedef enum unit_type { + UNIT_NONE, UNIT_M32R_D_U_STORE, UNIT_M32R_D_U_LOAD, UNIT_M32R_D_U_EXEC, + UNIT_TEST_U_EXEC, UNIT_MAX +} UNIT_TYPE; + +#define MAX_UNITS (1) + +#endif /* M32R_ARCH_H */ diff --git a/sim/m32r/cpuall.h b/sim/m32r/cpuall.h new file mode 100644 index 0000000..75ee8fa --- /dev/null +++ b/sim/m32r/cpuall.h @@ -0,0 +1,72 @@ +/* Simulator CPU header for m32r. + +Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc. + +This file is part of the GNU Simulators. + +This program is free software; you can redistribute it and/or modify +it under the terms of the GNU General Public License as published by +the Free Software Foundation; either version 2, or (at your option) +any later version. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License along +with this program; if not, write to the Free Software Foundation, Inc., +59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. + +*/ + +#ifndef M32R_CPUALL_H +#define M32R_CPUALL_H + +extern const IMP_PROPERTIES m32r_imp_properties; + +extern const MODEL m32r_models[]; + +#ifndef WANT_CPU +/* The ARGBUF struct. */ +struct argbuf { + /* These are the baseclass definitions. */ + unsigned int length; + PCADDR addr; + const struct cgen_insn *opcode; + /* unsigned long insn; - no longer needed */ + /* cpu specific data follows */ +}; +#endif + +#ifndef WANT_CPU +/* A cached insn. + This is also used in the non-scache case. In this situation we assume + the cache size is 1, and do a few things a little differently. */ + +struct scache { + IADDR next; + union { +#if ! WITH_SEM_SWITCH_FULL + SEMANTIC_FN *sem_fn; +#endif +#if ! WITH_SEM_SWITCH_FAST +#if WITH_SCACHE + SEMANTIC_CACHE_FN *sem_fast_fn; +#else + SEMANTIC_FN *sem_fast_fn; +#endif +#endif +#if WITH_SEM_SWITCH_FULL || WITH_SEM_SWITCH_FAST +#ifdef __GNUC__ + void *sem_case; +#else + int sem_case; +#endif +#endif + } semantic; + struct argbuf argbuf; +}; +#endif + +#endif /* M32R_CPUALL_H */ diff --git a/sim/m32r/mainloop.in b/sim/m32r/mainloop.in deleted file mode 100644 index a7cd751..0000000 --- a/sim/m32r/mainloop.in +++ /dev/null @@ -1,321 +0,0 @@ -# This shell script emits C code. -*- C -*- -# Main loop and support routines for the M32R. -# Copyright (C) 1996, 1997 Free Software Foundation, Inc. -# Contributed by Cygnus Support. -# -# This file is part of GDB, the GNU debugger. -# -# This program is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 2, or (at your option) -# any later version. -# -# This program is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License along -# with this program; if not, write to the Free Software Foundation, Inc., -# 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -# Syntax: -# /bin/sh mainloop.in {init|normal|fast|support} - -# ??? There's lots of conditional compilation here. -# After a few more ports are done, revisit. - -case "x$1" in - -xinit) - -cat <<EOF -#if defined (WITH_SCACHE) && defined (USE_SEM_SWITCH) && defined (__GNUC__) -{ - static decode_init_p = 0; - if (! decode_init_p) - { -/* ??? Later maybe paste sem-switch.c in when building mainloop.c. */ -#define DEFINE_LABELS -#include "sem-switch.c" - decode_init_p = 1; - } -} -#endif -EOF - -;; - -xnormal | xfast) - -cat <<EOF - -#if WITH_SCACHE - -{ - int hash; - SCACHE *sc; - - /* First step: look up current insn in hash table. */ - hash = SCACHE_HASH_PC (sd, PC); - sc = CPU_SCACHE_CACHE (current_cpu) + hash; - - /* If the entry isn't the one we want (cache miss), - fetch and decode the instruction. */ - if (sc->argbuf.addr != PC) - { - PCADDR pc = PC; - insn_t insn; - -#if ! FAST - PROFILE_COUNT_SCACHE_MISS (current_cpu); -#endif - - /* This only occurs when single stepping. - The test is unnecessary otherwise, but the cost is teensy, - compared with decoding/extraction. */ - if (pc & 3) - { - insn = GETMEMUHI (current_cpu, pc); - do_extract_insn16 (current_cpu, pc, insn & 0x7fff, sc, FAST); - } - else - { - insn = GETMEMUSI (current_cpu, pc); - - if (insn & 0x80000000) - { - do_extract_insn32 (current_cpu, pc, insn, sc, FAST); - } - else - { - /* 2 16 bit insns. Ignore parallel case for now - (2nd always nop). Decode both as we know there's room. - ??? Could do a test for an unconditional branch in the - left slot if one wanted to. */ - do_extract_insn16 (current_cpu, pc, insn >> 16, sc, FAST); - do_extract_insn16 (current_cpu, pc + 2, insn & 0x7fff, sc + 1, FAST); - } - } - } -#if ! FAST - else - { - PROFILE_COUNT_SCACHE_HIT (current_cpu); - } -#endif - -#if 0 /*FIXME:wip*/ - - /* Run until we get a cache miss. */ - do - { -#if ! FAST - TRACE_INSN_INIT (current_cpu); - TRACE_INSN (current_cpu, sc->argbuf.opcode, &sc->argbuf, sc->argbuf.addr); -#endif - - sc = (*sc->semantic.sem_fn) (current_cpu, sc); - -#if ! FAST - TRACE_INSN_FINI (current_cpu); -#endif - } - while (sc->argbuf.addr == PC); - -#if ! FAST - PROFILE_COUNT_INSN (current_cpu, pc, CGEN_INSN_INDEX (sc->argbuf.opcode)); -#endif - -#else /* !wip */ - -#if ! FAST - TRACE_INSN_INIT (current_cpu); - TRACE_INSN (current_cpu, sc->argbuf.opcode, &sc->argbuf, sc->argbuf.addr); -#endif - -#if FAST && defined (USE_SEM_SWITCH) -#define DEFINE_SWITCH -#include "sem-switch.c" -#else - PC = (*sc->semantic.sem_fn) (current_cpu, sc); -#endif - -#if ! FAST - TRACE_INSN_FINI (current_cpu); - - PROFILE_COUNT_INSN (current_cpu, pc, CGEN_INSN_INDEX (sc->argbuf.opcode)); -#endif - -#endif /* !wip */ -} - -#else /* ! WITH_SCACHE */ - -{ - insn_t insn; - - if (PC & 3) - { - insn = GETMEMUHI (current_cpu, PC); - PC = do_insn16 (current_cpu, PC, insn & 0x7fff); - } - else - { - insn = GETMEMUSI (current_cpu, PC); - - if (insn & 0x80000000) - { - /* 32 bit insn */ - PC = do_insn32 (current_cpu, PC, insn); - } - else - { - /* 2 16 bit insns. Ignore parallel case for now - (2nd always nop). */ - - PCADDR oldpc = PC; - PC = do_insn16 (current_cpu, PC, insn >> 16); - if (PC == oldpc + 2) - { - PC = do_insn16 (current_cpu, PC, insn & 0x7fff); - } - } - } -} - -#endif /* ! WITH_SCACHE */ - -EOF - -;; - -xsupport) - -cat <<EOF - -#if WITH_SCACHE - -#ifdef __GNUC__ -#define DO_INLINE inline -#else -#define DO_INLINE -#endif - -/* FAST is optimized out by GCC. */ - -static DO_INLINE void -do_extract_insn16 (SIM_CPU *cpu, PCADDR pc, insn_t insn, - SCACHE *sc, int fast) -{ - DECODE *d = decode (insn); - (*d->extract) (cpu, pc, insn, &sc->argbuf); - if (fast) - { -#ifdef USE_SEM_SWITCH -#ifdef __GNUC__ - sc->semantic.sem_case = d->semantic_lab; -#else - sc->semantic.sem_case = d->insn_type; -#endif -#else - sc->semantic.sem_fn = d->semantic_fast; -#endif - } - else - { - sc->semantic.sem_fn = d->semantic_fast; - sc->argbuf.opcode = d->opcode; - } - sc->next = pc + 2; -} - -static DO_INLINE void -do_extract_insn32 (SIM_CPU *cpu, PCADDR pc, insn_t insn, - SCACHE *sc, int fast) -{ - /* 32 bit insn */ - DECODE *d = decode (insn >> 16); - (*d->extract) (cpu, pc, insn, &sc->argbuf); - if (fast) - { -#ifdef USE_SEM_SWITCH -#ifdef __GNUC__ - sc->semantic.sem_case = d->semantic_lab; -#else - sc->semantic.sem_case = d->insn_type; -#endif -#else - sc->semantic.sem_fn = d->semantic_fast; -#endif - } - else - { - sc->semantic.sem_fn = d->semantic_fast; - sc->argbuf.opcode = d->opcode; - } - sc->next = pc + 4; -} - -#endif /* WITH_SCACHE */ - -static PCADDR -do_insn16 (cpu, pc, insn) - SIM_CPU *cpu; - PCADDR pc; - insn_t insn; -{ - DECODE *d; - ARGBUF argbuf; - - d = decode (insn); - (*d->extract) (cpu, pc, insn, &argbuf); - argbuf.opcode = d->opcode; - - TRACE_INSN_INIT (cpu); - TRACE_INSN (cpu, d->opcode, &argbuf, pc); - - pc = (*d->semantic) (cpu, &argbuf); - - TRACE_INSN_FINI (cpu); - - PROFILE_COUNT_INSN (cpu, pc, d->insn_type); - - return pc; -} - -static PCADDR -do_insn32 (cpu, pc, insn) - SIM_CPU *cpu; - PCADDR pc; - insn_t insn; -{ - DECODE *d; - ARGBUF argbuf; - - d = decode (insn >> 16); - (*d->extract) (cpu, pc, insn, &argbuf); - argbuf.opcode = d->opcode; - - TRACE_INSN_INIT (cpu); - TRACE_INSN (cpu, d->opcode, &argbuf, pc); - - pc = (*d->semantic) (cpu, &argbuf); - - TRACE_INSN_FINI (cpu); - - PROFILE_COUNT_INSN (cpu, pc, d->insn_type); - - return pc; -} - -EOF - -;; - -*) - echo "Invalid argument to mainloop.in: $1" >&2 - exit 1 - ;; - -esac diff --git a/sim/m32r/mem-ops.h b/sim/m32r/mem-ops.h deleted file mode 100644 index f14ebcc..0000000 --- a/sim/m32r/mem-ops.h +++ /dev/null @@ -1,503 +0,0 @@ -/* Memory ops header for CGEN-based simlators. - -This file is machine generated. - -Copyright (C) 1996, 1997 Free Software Foundation, Inc. - -This file is part of the GNU Binutils and/or GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef CGEN_MEM_OPS_H -#define CGEN_MEM_OPS_H - -#ifdef MEMOPS_DEFINE_INLINE -#define MEMOPS_INLINE -#else -#define MEMOPS_INLINE extern inline -#endif - -/* Only used in this file. */ -typedef unsigned char *ptr; - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE QI -GETTQI (ptr p) -{ - if (TARGET_BIG_ENDIAN) - return p[0]; - else - return p[0]; -} -#else -extern QI GETTQI (ptr); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE HI -GETTHI (ptr p) -{ - if (TARGET_BIG_ENDIAN) - return ((p[0] << 8) | p[1]); - else - return ((p[1] << 8) | p[0]); -} -#else -extern HI GETTHI (ptr); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE SI -GETTSI (ptr p) -{ - if (TARGET_BIG_ENDIAN) - return ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]); - else - return ((p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]); -} -#else -extern SI GETTSI (ptr); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE DI -GETTDI (ptr p) -{ - if (TARGET_BIG_ENDIAN) - return MAKEDI ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3], (p[4] << 24) | (p[5] << 16) | (p[6] << 8) | p[7]); - else - return MAKEDI ((p[7] << 24) | (p[6] << 16) | (p[5] << 8) | p[4], (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]); -} -#else -extern DI GETTDI (ptr); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE UQI -GETTUQI (ptr p) -{ - if (TARGET_BIG_ENDIAN) - return p[0]; - else - return p[0]; -} -#else -extern UQI GETTUQI (ptr); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE UHI -GETTUHI (ptr p) -{ - if (TARGET_BIG_ENDIAN) - return ((p[0] << 8) | p[1]); - else - return ((p[1] << 8) | p[0]); -} -#else -extern UHI GETTUHI (ptr); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE USI -GETTUSI (ptr p) -{ - if (TARGET_BIG_ENDIAN) - return ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3]); - else - return ((p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]); -} -#else -extern USI GETTUSI (ptr); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE UDI -GETTUDI (ptr p) -{ - if (TARGET_BIG_ENDIAN) - return MAKEDI ((p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3], (p[4] << 24) | (p[5] << 16) | (p[6] << 8) | p[7]); - else - return MAKEDI ((p[7] << 24) | (p[6] << 16) | (p[5] << 8) | p[4], (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0]); -} -#else -extern UDI GETTUDI (ptr); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETTQI (ptr p, QI val) -{ - if (TARGET_BIG_ENDIAN) - do { p[0] = val; } while (0); -else - do { p[0] = val; } while (0); -} -#else -extern void SETTQI (ptr, QI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETTHI (ptr p, HI val) -{ - if (TARGET_BIG_ENDIAN) - do { p[0] = val >> 8; p[1] = val; } while (0); -else - do { p[1] = val >> 8; p[0] = val; } while (0); -} -#else -extern void SETTHI (ptr, HI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETTSI (ptr p, SI val) -{ - if (TARGET_BIG_ENDIAN) - do { p[0] = val >> 24; p[1] = val >> 16; p[2] = val >> 8; p[3] = val; } while (0); -else - do { p[3] = val >> 24; p[2] = val >> 16; p[1] = val >> 8; p[0] = val; } while (0); -} -#else -extern void SETTSI (ptr, SI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETTDI (ptr p, DI val) -{ - if (TARGET_BIG_ENDIAN) - do { SI t = GETHIDI (val); p[0] = t >> 24; p[1] = t >> 16; p[2] = t >> 8; p[3] = t; t = GETLODI (val); p[4] = t >> 24; p[5] = t >> 16; p[6] = t >> 8; p[7] = t; } while (0); -else - do { SI t = GETHIDI (val); p[7] = t >> 24; p[6] = t >> 16; p[5] = t >> 8; p[4] = t; t = GETLODI (val); p[3] = t >> 24; p[2] = t >> 16; p[1] = t >> 8; p[0] = t; } while (0); -} -#else -extern void SETTDI (ptr, DI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETTUQI (ptr p, UQI val) -{ - if (TARGET_BIG_ENDIAN) - do { p[0] = val; } while (0); -else - do { p[0] = val; } while (0); -} -#else -extern void SETTUQI (ptr, UQI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETTUHI (ptr p, UHI val) -{ - if (TARGET_BIG_ENDIAN) - do { p[0] = val >> 8; p[1] = val; } while (0); -else - do { p[1] = val >> 8; p[0] = val; } while (0); -} -#else -extern void SETTUHI (ptr, UHI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETTUSI (ptr p, USI val) -{ - if (TARGET_BIG_ENDIAN) - do { p[0] = val >> 24; p[1] = val >> 16; p[2] = val >> 8; p[3] = val; } while (0); -else - do { p[3] = val >> 24; p[2] = val >> 16; p[1] = val >> 8; p[0] = val; } while (0); -} -#else -extern void SETTUSI (ptr, USI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETTUDI (ptr p, UDI val) -{ - if (TARGET_BIG_ENDIAN) - do { SI t = GETHIDI (val); p[0] = t >> 24; p[1] = t >> 16; p[2] = t >> 8; p[3] = t; t = GETLODI (val); p[4] = t >> 24; p[5] = t >> 16; p[6] = t >> 8; p[7] = t; } while (0); -else - do { SI t = GETHIDI (val); p[7] = t >> 24; p[6] = t >> 16; p[5] = t >> 8; p[4] = t; t = GETLODI (val); p[3] = t >> 24; p[2] = t >> 16; p[1] = t >> 8; p[0] = t; } while (0); -} -#else -extern void SETTUDI (ptr, UDI); -#endif - - -/* FIXME: Need to merge with sim-core. */ -/* FIXME: Don't perform >= 4, text section checks if OEA. */ -#ifndef MEM_CHECK_READ -#define MEM_CHECK_READ(addr, type) \ - ((addr) >= 4 /*&& (addr) < STATE_MEM_SIZE (current_state)*/) -#endif -#ifndef MEM_CHECK_WRITE -#define MEM_CHECK_WRITE(addr, type) \ - ((addr) >= 4 /*&& (addr) < STATE_MEM_SIZE (current_state)*/ \ - && ((addr) >= STATE_TEXT_END (current_state) \ - || (addr) < STATE_TEXT_START (current_state))) -#endif -#ifndef MEM_CHECK_ALIGNMENT -#define MEM_CHECK_ALIGNMENT(addr, type) \ - (((addr) & (sizeof (type) - 1)) == 0) -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE QI -GETMEMQI (SIM_CPU *cpu, ADDR a) -{ - if (! MEM_CHECK_READ (a, QI)) - { engine_signal (cpu, SIM_SIGSEGV); } - if (! MEM_CHECK_ALIGNMENT (a, QI)) - { engine_signal (cpu, SIM_SIGBUS); } - PROFILE_COUNT_READ (cpu, a, MODE_QI); - return sim_core_read_aligned_1 (cpu, NULL_CIA, sim_core_read_map, a); -} -#else -extern QI GETMEMQI (SIM_CPU *, ADDR); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE HI -GETMEMHI (SIM_CPU *cpu, ADDR a) -{ - if (! MEM_CHECK_READ (a, HI)) - { engine_signal (cpu, SIM_SIGSEGV); } - if (! MEM_CHECK_ALIGNMENT (a, HI)) - { engine_signal (cpu, SIM_SIGBUS); } - PROFILE_COUNT_READ (cpu, a, MODE_HI); - return sim_core_read_aligned_2 (cpu, NULL_CIA, sim_core_read_map, a); -} -#else -extern HI GETMEMHI (SIM_CPU *, ADDR); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE SI -GETMEMSI (SIM_CPU *cpu, ADDR a) -{ - if (! MEM_CHECK_READ (a, SI)) - { engine_signal (cpu, SIM_SIGSEGV); } - if (! MEM_CHECK_ALIGNMENT (a, SI)) - { engine_signal (cpu, SIM_SIGBUS); } - PROFILE_COUNT_READ (cpu, a, MODE_SI); - return sim_core_read_aligned_4 (cpu, NULL_CIA, sim_core_read_map, a); -} -#else -extern SI GETMEMSI (SIM_CPU *, ADDR); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE DI -GETMEMDI (SIM_CPU *cpu, ADDR a) -{ - if (! MEM_CHECK_READ (a, DI)) - { engine_signal (cpu, SIM_SIGSEGV); } - if (! MEM_CHECK_ALIGNMENT (a, DI)) - { engine_signal (cpu, SIM_SIGBUS); } - PROFILE_COUNT_READ (cpu, a, MODE_DI); - return sim_core_read_aligned_8 (cpu, NULL_CIA, sim_core_read_map, a); -} -#else -extern DI GETMEMDI (SIM_CPU *, ADDR); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE UQI -GETMEMUQI (SIM_CPU *cpu, ADDR a) -{ - if (! MEM_CHECK_READ (a, UQI)) - { engine_signal (cpu, SIM_SIGSEGV); } - if (! MEM_CHECK_ALIGNMENT (a, UQI)) - { engine_signal (cpu, SIM_SIGBUS); } - PROFILE_COUNT_READ (cpu, a, MODE_UQI); - return sim_core_read_aligned_1 (cpu, NULL_CIA, sim_core_read_map, a); -} -#else -extern UQI GETMEMUQI (SIM_CPU *, ADDR); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE UHI -GETMEMUHI (SIM_CPU *cpu, ADDR a) -{ - if (! MEM_CHECK_READ (a, UHI)) - { engine_signal (cpu, SIM_SIGSEGV); } - if (! MEM_CHECK_ALIGNMENT (a, UHI)) - { engine_signal (cpu, SIM_SIGBUS); } - PROFILE_COUNT_READ (cpu, a, MODE_UHI); - return sim_core_read_aligned_2 (cpu, NULL_CIA, sim_core_read_map, a); -} -#else -extern UHI GETMEMUHI (SIM_CPU *, ADDR); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE USI -GETMEMUSI (SIM_CPU *cpu, ADDR a) -{ - if (! MEM_CHECK_READ (a, USI)) - { engine_signal (cpu, SIM_SIGSEGV); } - if (! MEM_CHECK_ALIGNMENT (a, USI)) - { engine_signal (cpu, SIM_SIGBUS); } - PROFILE_COUNT_READ (cpu, a, MODE_USI); - return sim_core_read_aligned_4 (cpu, NULL_CIA, sim_core_read_map, a); -} -#else -extern USI GETMEMUSI (SIM_CPU *, ADDR); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE UDI -GETMEMUDI (SIM_CPU *cpu, ADDR a) -{ - if (! MEM_CHECK_READ (a, UDI)) - { engine_signal (cpu, SIM_SIGSEGV); } - if (! MEM_CHECK_ALIGNMENT (a, UDI)) - { engine_signal (cpu, SIM_SIGBUS); } - PROFILE_COUNT_READ (cpu, a, MODE_UDI); - return sim_core_read_aligned_8 (cpu, NULL_CIA, sim_core_read_map, a); -} -#else -extern UDI GETMEMUDI (SIM_CPU *, ADDR); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETMEMQI (SIM_CPU *cpu, ADDR a, QI val) -{ - if (! MEM_CHECK_WRITE (a, QI)) - { engine_signal (cpu, SIM_SIGSEGV); return; } - if (! MEM_CHECK_ALIGNMENT (a, QI)) - { engine_signal (cpu, SIM_SIGBUS); return; } - PROFILE_COUNT_WRITE (cpu, a, MODE_QI); - sim_core_write_aligned_1 (cpu, NULL_CIA, sim_core_write_map, a, val); -} -#else -extern void SETMEMQI (SIM_CPU *, ADDR, QI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETMEMHI (SIM_CPU *cpu, ADDR a, HI val) -{ - if (! MEM_CHECK_WRITE (a, HI)) - { engine_signal (cpu, SIM_SIGSEGV); return; } - if (! MEM_CHECK_ALIGNMENT (a, HI)) - { engine_signal (cpu, SIM_SIGBUS); return; } - PROFILE_COUNT_WRITE (cpu, a, MODE_HI); - sim_core_write_aligned_2 (cpu, NULL_CIA, sim_core_write_map, a, val); -} -#else -extern void SETMEMHI (SIM_CPU *, ADDR, HI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETMEMSI (SIM_CPU *cpu, ADDR a, SI val) -{ - if (! MEM_CHECK_WRITE (a, SI)) - { engine_signal (cpu, SIM_SIGSEGV); return; } - if (! MEM_CHECK_ALIGNMENT (a, SI)) - { engine_signal (cpu, SIM_SIGBUS); return; } - PROFILE_COUNT_WRITE (cpu, a, MODE_SI); - sim_core_write_aligned_4 (cpu, NULL_CIA, sim_core_write_map, a, val); -} -#else -extern void SETMEMSI (SIM_CPU *, ADDR, SI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETMEMDI (SIM_CPU *cpu, ADDR a, DI val) -{ - if (! MEM_CHECK_WRITE (a, DI)) - { engine_signal (cpu, SIM_SIGSEGV); return; } - if (! MEM_CHECK_ALIGNMENT (a, DI)) - { engine_signal (cpu, SIM_SIGBUS); return; } - PROFILE_COUNT_WRITE (cpu, a, MODE_DI); - sim_core_write_aligned_8 (cpu, NULL_CIA, sim_core_write_map, a, val); -} -#else -extern void SETMEMDI (SIM_CPU *, ADDR, DI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETMEMUQI (SIM_CPU *cpu, ADDR a, UQI val) -{ - if (! MEM_CHECK_WRITE (a, UQI)) - { engine_signal (cpu, SIM_SIGSEGV); return; } - if (! MEM_CHECK_ALIGNMENT (a, UQI)) - { engine_signal (cpu, SIM_SIGBUS); return; } - PROFILE_COUNT_WRITE (cpu, a, MODE_UQI); - sim_core_write_aligned_1 (cpu, NULL_CIA, sim_core_write_map, a, val); -} -#else -extern void SETMEMUQI (SIM_CPU *, ADDR, UQI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETMEMUHI (SIM_CPU *cpu, ADDR a, UHI val) -{ - if (! MEM_CHECK_WRITE (a, UHI)) - { engine_signal (cpu, SIM_SIGSEGV); return; } - if (! MEM_CHECK_ALIGNMENT (a, UHI)) - { engine_signal (cpu, SIM_SIGBUS); return; } - PROFILE_COUNT_WRITE (cpu, a, MODE_UHI); - sim_core_write_aligned_2 (cpu, NULL_CIA, sim_core_write_map, a, val); -} -#else -extern void SETMEMUHI (SIM_CPU *, ADDR, UHI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETMEMUSI (SIM_CPU *cpu, ADDR a, USI val) -{ - if (! MEM_CHECK_WRITE (a, USI)) - { engine_signal (cpu, SIM_SIGSEGV); return; } - if (! MEM_CHECK_ALIGNMENT (a, USI)) - { engine_signal (cpu, SIM_SIGBUS); return; } - PROFILE_COUNT_WRITE (cpu, a, MODE_USI); - sim_core_write_aligned_4 (cpu, NULL_CIA, sim_core_write_map, a, val); -} -#else -extern void SETMEMUSI (SIM_CPU *, ADDR, USI); -#endif - -#if defined (__GNUC__) || defined (MEMOPS_DEFINE_INLINE) -MEMOPS_INLINE void -SETMEMUDI (SIM_CPU *cpu, ADDR a, UDI val) -{ - if (! MEM_CHECK_WRITE (a, UDI)) - { engine_signal (cpu, SIM_SIGSEGV); return; } - if (! MEM_CHECK_ALIGNMENT (a, UDI)) - { engine_signal (cpu, SIM_SIGBUS); return; } - PROFILE_COUNT_WRITE (cpu, a, MODE_UDI); - sim_core_write_aligned_8 (cpu, NULL_CIA, sim_core_write_map, a, val); -} -#else -extern void SETMEMUDI (SIM_CPU *, ADDR, UDI); -#endif - -#endif /* MEM_OPS_H */ diff --git a/sim/m32r/sem-ops.h b/sim/m32r/sem-ops.h deleted file mode 100644 index 5f101b1..0000000 --- a/sim/m32r/sem-ops.h +++ /dev/null @@ -1,978 +0,0 @@ -/* Semantics ops support for CGEN-based simulators. - -This file is machine generated. - -Copyright (C) 1996, 1997 Free Software Foundation, Inc. - -This file is part of the GNU Binutils and/or GDB, the GNU debugger. - -This program is free software; you can redistribute it and/or modify -it under the terms of the GNU General Public License as published by -the Free Software Foundation; either version 2, or (at your option) -any later version. - -This program is distributed in the hope that it will be useful, -but WITHOUT ANY WARRANTY; without even the implied warranty of -MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -GNU General Public License for more details. - -You should have received a copy of the GNU General Public License along -with this program; if not, write to the Free Software Foundation, Inc., -59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - -*/ - -#ifndef CGEN_SEM_OPS_H -#define CGEN_SEM_OPS_H - -/* Semantic operations. */ - -#define ADDBI(x, y) ((x) + (y)) -#define SUBBI(x, y) ((x) - (y)) -#define MULBI(x, y) ((x) * (y)) -#define DIVBI(x, y) ((BI) (x) / (BI) (y)) -#define UDIVBI(x, y) ((UBI) (x) / (UBI) (y)) -#define MODBI(x, y) ((BI) (x) % (BI) (y)) -#define UMODBI(x, y) ((UBI) (x) % (UBI) (y)) -#define SRABI(x, y) ((BI) (x) >> (y)) -#define SRLBI(x, y) ((UBI) (x) >> (y)) -#define SHLBI(x, y) ((UBI) (x) << (y)) -extern BI RORBI PARAMS ((BI, int)); -extern BI ROLBI PARAMS ((BI, int)); -#define ANDBI(x, y) ((x) & (y)) -#define ORBI(x, y) ((x) | (y)) -#define XORBI(x, y) ((x) ^ (y)) -#define ANDIFBI(x, y) ((BI) (x) && (BI) (y)) -#define ORIFBI(x, y) ((BI) (x) || (BI) (y)) -#define NEGBI(x) (- (x)) -#define NOTBI(x) (! (BI) (x)) -#define INVBI(x) (~ (x)) -#define EQBI(x, y) ((BI) (x) == (BI) (y)) -#define NEBI(x, y) ((BI) (x) != (BI) (y)) -#define LTBI(x, y) ((BI) (x) < (BI) (y)) -#define LEBI(x, y) ((BI) (x) <= (BI) (y)) -#define GTBI(x, y) ((BI) (x) > (BI) (y)) -#define GEBI(x, y) ((BI) (x) >= (BI) (y)) -#define LTUBI(x, y) ((UBI) (x) < (UBI) (y)) -#define LEUBI(x, y) ((UBI) (x) <= (UBI) (y)) -#define GTUBI(x, y) ((UBI) (x) > (UBI) (y)) -#define GEUBI(x, y) ((UBI) (x) >= (UBI) (y)) - -#define ADDQI(x, y) ((x) + (y)) -#define SUBQI(x, y) ((x) - (y)) -#define MULQI(x, y) ((x) * (y)) -#define DIVQI(x, y) ((QI) (x) / (QI) (y)) -#define UDIVQI(x, y) ((UQI) (x) / (UQI) (y)) -#define MODQI(x, y) ((QI) (x) % (QI) (y)) -#define UMODQI(x, y) ((UQI) (x) % (UQI) (y)) -#define SRAQI(x, y) ((QI) (x) >> (y)) -#define SRLQI(x, y) ((UQI) (x) >> (y)) -#define SHLQI(x, y) ((UQI) (x) << (y)) -extern QI RORQI PARAMS ((QI, int)); -extern QI ROLQI PARAMS ((QI, int)); -#define ANDQI(x, y) ((x) & (y)) -#define ORQI(x, y) ((x) | (y)) -#define XORQI(x, y) ((x) ^ (y)) -#define ANDIFQI(x, y) ((QI) (x) && (QI) (y)) -#define ORIFQI(x, y) ((QI) (x) || (QI) (y)) -#define NEGQI(x) (- (x)) -#define NOTQI(x) (! (QI) (x)) -#define INVQI(x) (~ (x)) -#define EQQI(x, y) ((QI) (x) == (QI) (y)) -#define NEQI(x, y) ((QI) (x) != (QI) (y)) -#define LTQI(x, y) ((QI) (x) < (QI) (y)) -#define LEQI(x, y) ((QI) (x) <= (QI) (y)) -#define GTQI(x, y) ((QI) (x) > (QI) (y)) -#define GEQI(x, y) ((QI) (x) >= (QI) (y)) -#define LTUQI(x, y) ((UQI) (x) < (UQI) (y)) -#define LEUQI(x, y) ((UQI) (x) <= (UQI) (y)) -#define GTUQI(x, y) ((UQI) (x) > (UQI) (y)) -#define GEUQI(x, y) ((UQI) (x) >= (UQI) (y)) - -#define ADDHI(x, y) ((x) + (y)) -#define SUBHI(x, y) ((x) - (y)) -#define MULHI(x, y) ((x) * (y)) -#define DIVHI(x, y) ((HI) (x) / (HI) (y)) -#define UDIVHI(x, y) ((UHI) (x) / (UHI) (y)) -#define MODHI(x, y) ((HI) (x) % (HI) (y)) -#define UMODHI(x, y) ((UHI) (x) % (UHI) (y)) -#define SRAHI(x, y) ((HI) (x) >> (y)) -#define SRLHI(x, y) ((UHI) (x) >> (y)) -#define SHLHI(x, y) ((UHI) (x) << (y)) -extern HI RORHI PARAMS ((HI, int)); -extern HI ROLHI PARAMS ((HI, int)); -#define ANDHI(x, y) ((x) & (y)) -#define ORHI(x, y) ((x) | (y)) -#define XORHI(x, y) ((x) ^ (y)) -#define ANDIFHI(x, y) ((HI) (x) && (HI) (y)) -#define ORIFHI(x, y) ((HI) (x) || (HI) (y)) -#define NEGHI(x) (- (x)) -#define NOTHI(x) (! (HI) (x)) -#define INVHI(x) (~ (x)) -#define EQHI(x, y) ((HI) (x) == (HI) (y)) -#define NEHI(x, y) ((HI) (x) != (HI) (y)) -#define LTHI(x, y) ((HI) (x) < (HI) (y)) -#define LEHI(x, y) ((HI) (x) <= (HI) (y)) -#define GTHI(x, y) ((HI) (x) > (HI) (y)) -#define GEHI(x, y) ((HI) (x) >= (HI) (y)) -#define LTUHI(x, y) ((UHI) (x) < (UHI) (y)) -#define LEUHI(x, y) ((UHI) (x) <= (UHI) (y)) -#define GTUHI(x, y) ((UHI) (x) > (UHI) (y)) -#define GEUHI(x, y) ((UHI) (x) >= (UHI) (y)) - -#define ADDSI(x, y) ((x) + (y)) -#define SUBSI(x, y) ((x) - (y)) -#define MULSI(x, y) ((x) * (y)) -#define DIVSI(x, y) ((SI) (x) / (SI) (y)) -#define UDIVSI(x, y) ((USI) (x) / (USI) (y)) -#define MODSI(x, y) ((SI) (x) % (SI) (y)) -#define UMODSI(x, y) ((USI) (x) % (USI) (y)) -#define SRASI(x, y) ((SI) (x) >> (y)) -#define SRLSI(x, y) ((USI) (x) >> (y)) -#define SHLSI(x, y) ((USI) (x) << (y)) -extern SI RORSI PARAMS ((SI, int)); -extern SI ROLSI PARAMS ((SI, int)); -#define ANDSI(x, y) ((x) & (y)) -#define ORSI(x, y) ((x) | (y)) -#define XORSI(x, y) ((x) ^ (y)) -#define ANDIFSI(x, y) ((SI) (x) && (SI) (y)) -#define ORIFSI(x, y) ((SI) (x) || (SI) (y)) -#define NEGSI(x) (- (x)) -#define NOTSI(x) (! (SI) (x)) -#define INVSI(x) (~ (x)) -#define EQSI(x, y) ((SI) (x) == (SI) (y)) -#define NESI(x, y) ((SI) (x) != (SI) (y)) -#define LTSI(x, y) ((SI) (x) < (SI) (y)) -#define LESI(x, y) ((SI) (x) <= (SI) (y)) -#define GTSI(x, y) ((SI) (x) > (SI) (y)) -#define GESI(x, y) ((SI) (x) >= (SI) (y)) -#define LTUSI(x, y) ((USI) (x) < (USI) (y)) -#define LEUSI(x, y) ((USI) (x) <= (USI) (y)) -#define GTUSI(x, y) ((USI) (x) > (USI) (y)) -#define GEUSI(x, y) ((USI) (x) >= (USI) (y)) - -#ifdef DI_FN_SUPPORT -extern DI ADDDI PARAMS ((DI, DI)); -extern DI SUBDI PARAMS ((DI, DI)); -extern DI MULDI PARAMS ((DI, DI)); -extern DI DIVDI PARAMS ((DI, DI)); -extern UDI UDIVDI PARAMS ((UDI, UDI)); -extern DI MODDI PARAMS ((DI, DI)); -extern UDI UMODDI PARAMS ((UDI, UDI)); -extern DI SRADI PARAMS ((DI, int)); -extern UDI SRLDI PARAMS ((UDI, int)); -extern UDI SHLDI PARAMS ((UDI, int)); -extern DI RORDI PARAMS ((DI, int)); -extern DI ROLDI PARAMS ((DI, int)); -extern DI ANDDI PARAMS ((DI, DI)); -extern DI ORDI PARAMS ((DI, DI)); -extern DI XORDI PARAMS ((DI, DI)); -extern int ANDIFDI PARAMS ((DI, DI)); -extern int ORIFDI PARAMS ((DI, DI)); -extern DI NEGDI PARAMS ((DI)); -extern int NOTDI PARAMS ((DI)); -extern DI INVDI PARAMS ((DI)); -extern int EQDI PARAMS ((DI, DI)); -extern int NEDI PARAMS ((DI, DI)); -extern int LTDI PARAMS ((DI, DI)); -extern int LEDI PARAMS ((DI, DI)); -extern int GTDI PARAMS ((DI, DI)); -extern int GEDI PARAMS ((DI, DI)); -extern int LTUDI PARAMS ((UDI, UDI)); -extern int LEUDI PARAMS ((UDI, UDI)); -extern int GTUDI PARAMS ((UDI, UDI)); -extern int GEUDI PARAMS ((UDI, UDI)); -#else /* ! DI_FN_SUPPORT */ -#define ADDDI(x, y) ((x) + (y)) -#define SUBDI(x, y) ((x) - (y)) -#define MULDI(x, y) ((x) * (y)) -#define DIVDI(x, y) ((DI) (x) / (DI) (y)) -#define UDIVDI(x, y) ((UDI) (x) / (UDI) (y)) -#define MODDI(x, y) ((DI) (x) % (DI) (y)) -#define UMODDI(x, y) ((UDI) (x) % (UDI) (y)) -#define SRADI(x, y) ((DI) (x) >> (y)) -#define SRLDI(x, y) ((UDI) (x) >> (y)) -#define SHLDI(x, y) ((UDI) (x) << (y)) -extern DI RORDI PARAMS ((DI, int)); -extern DI ROLDI PARAMS ((DI, int)); -#define ANDDI(x, y) ((x) & (y)) -#define ORDI(x, y) ((x) | (y)) -#define XORDI(x, y) ((x) ^ (y)) -#define ANDIFDI(x, y) ((DI) (x) && (DI) (y)) -#define ORIFDI(x, y) ((DI) (x) || (DI) (y)) -#define NEGDI(x) (- (x)) -#define NOTDI(x) (! (DI) (x)) -#define INVDI(x) (~ (x)) -#define EQDI(x, y) ((DI) (x) == (DI) (y)) -#define NEDI(x, y) ((DI) (x) != (DI) (y)) -#define LTDI(x, y) ((DI) (x) < (DI) (y)) -#define LEDI(x, y) ((DI) (x) <= (DI) (y)) -#define GTDI(x, y) ((DI) (x) > (DI) (y)) -#define GEDI(x, y) ((DI) (x) >= (DI) (y)) -#define LTUDI(x, y) ((UDI) (x) < (UDI) (y)) -#define LEUDI(x, y) ((UDI) (x) <= (UDI) (y)) -#define GTUDI(x, y) ((UDI) (x) > (UDI) (y)) -#define GEUDI(x, y) ((UDI) (x) >= (UDI) (y)) -#endif /* DI_FN_SUPPORT */ - -#ifdef SF_FN_SUPPORT -extern SF ADDSF PARAMS ((SF, SF)); -extern SF SUBSF PARAMS ((SF, SF)); -extern SF NEGSF PARAMS ((SF)); -extern SF MULSF PARAMS ((SF, SF)); -extern SF DIVSF PARAMS ((SF, SF)); -extern int EQSF PARAMS ((SF, SF)); -extern int NESF PARAMS ((SF, SF)); -extern int LTSF PARAMS ((SF, SF)); -extern int LESF PARAMS ((SF, SF)); -extern int GTSF PARAMS ((SF, SF)); -extern int GESF PARAMS ((SF, SF)); -extern SF ABSSF PARAMS ((SF)); -extern SF SQRTSF PARAMS ((SF)); -extern SF COSSF PARAMS ((SF)); -extern SF SINSF PARAMS ((SF)); -#else /* ! SF_FN_SUPPORT */ -#define ADDSF(x, y) ((x) + (y)) -#define SUBSF(x, y) ((x) - (y)) -#define NEGSF(x) (- (x)) -#define MULSF(x, y) ((x) * (y)) -#define DIVSF(x, y) ((x) / (y)) -#define EQSF(x, y) ((SF) (x) == (SF) (y)) -#define NESF(x, y) ((SF) (x) != (SF) (y)) -#define LTSF(x, y) ((SF) (x) < (SF) (y)) -#define LESF(x, y) ((SF) (x) <= (SF) (y)) -#define GTSF(x, y) ((SF) (x) > (SF) (y)) -#define GESF(x, y) ((SF) (x) >= (SF) (y)) -extern SF ABSSF PARAMS ((SF)); -extern SF SQRTSF PARAMS ((SF)); -extern SF COSSF PARAMS ((SF)); -extern SF SINSF PARAMS ((SF)); -#endif /* SF_FN_SUPPORT */ - -#ifdef DF_FN_SUPPORT -extern DF ADDDF PARAMS ((DF, DF)); -extern DF SUBDF PARAMS ((DF, DF)); -extern DF NEGDF PARAMS ((DF)); -extern DF MULDF PARAMS ((DF, DF)); -extern DF DIVDF PARAMS ((DF, DF)); -extern int EQDF PARAMS ((DF, DF)); -extern int NEDF PARAMS ((DF, DF)); -extern int LTDF PARAMS ((DF, DF)); -extern int LEDF PARAMS ((DF, DF)); -extern int GTDF PARAMS ((DF, DF)); -extern int GEDF PARAMS ((DF, DF)); -extern DF ABSDF PARAMS ((DF)); -extern DF SQRTDF PARAMS ((DF)); -extern DF COSDF PARAMS ((DF)); -extern DF SINDF PARAMS ((DF)); -#else /* ! DF_FN_SUPPORT */ -#define ADDDF(x, y) ((x) + (y)) -#define SUBDF(x, y) ((x) - (y)) -#define NEGDF(x) (- (x)) -#define MULDF(x, y) ((x) * (y)) -#define DIVDF(x, y) ((x) / (y)) -#define EQDF(x, y) ((DF) (x) == (DF) (y)) -#define NEDF(x, y) ((DF) (x) != (DF) (y)) -#define LTDF(x, y) ((DF) (x) < (DF) (y)) -#define LEDF(x, y) ((DF) (x) <= (DF) (y)) -#define GTDF(x, y) ((DF) (x) > (DF) (y)) -#define GEDF(x, y) ((DF) (x) >= (DF) (y)) -extern DF ABSDF PARAMS ((DF)); -extern DF SQRTDF PARAMS ((DF)); -extern DF COSDF PARAMS ((DF)); -extern DF SINDF PARAMS ((DF)); -#endif /* DF_FN_SUPPORT */ - -#ifdef XF_FN_SUPPORT -extern XF ADDXF PARAMS ((XF, XF)); -extern XF SUBXF PARAMS ((XF, XF)); -extern XF NEGXF PARAMS ((XF)); -extern XF MULXF PARAMS ((XF, XF)); -extern XF DIVXF PARAMS ((XF, XF)); -extern int EQXF PARAMS ((XF, XF)); -extern int NEXF PARAMS ((XF, XF)); -extern int LTXF PARAMS ((XF, XF)); -extern int LEXF PARAMS ((XF, XF)); -extern int GTXF PARAMS ((XF, XF)); -extern int GEXF PARAMS ((XF, XF)); -extern XF ABSXF PARAMS ((XF)); -extern XF SQRTXF PARAMS ((XF)); -extern XF COSXF PARAMS ((XF)); -extern XF SINXF PARAMS ((XF)); -#else /* ! XF_FN_SUPPORT */ -#define ADDXF(x, y) ((x) + (y)) -#define SUBXF(x, y) ((x) - (y)) -#define NEGXF(x) (- (x)) -#define MULXF(x, y) ((x) * (y)) -#define DIVXF(x, y) ((x) / (y)) -#define EQXF(x, y) ((XF) (x) == (XF) (y)) -#define NEXF(x, y) ((XF) (x) != (XF) (y)) -#define LTXF(x, y) ((XF) (x) < (XF) (y)) -#define LEXF(x, y) ((XF) (x) <= (XF) (y)) -#define GTXF(x, y) ((XF) (x) > (XF) (y)) -#define GEXF(x, y) ((XF) (x) >= (XF) (y)) -extern XF ABSXF PARAMS ((XF)); -extern XF SQRTXF PARAMS ((XF)); -extern XF COSXF PARAMS ((XF)); -extern XF SINXF PARAMS ((XF)); -#endif /* XF_FN_SUPPORT */ - -#ifdef TF_FN_SUPPORT -extern TF ADDTF PARAMS ((TF, TF)); -extern TF SUBTF PARAMS ((TF, TF)); -extern TF NEGTF PARAMS ((TF)); -extern TF MULTF PARAMS ((TF, TF)); -extern TF DIVTF PARAMS ((TF, TF)); -extern int EQTF PARAMS ((TF, TF)); -extern int NETF PARAMS ((TF, TF)); -extern int LTTF PARAMS ((TF, TF)); -extern int LETF PARAMS ((TF, TF)); -extern int GTTF PARAMS ((TF, TF)); -extern int GETF PARAMS ((TF, TF)); -extern TF ABSTF PARAMS ((TF)); -extern TF SQRTTF PARAMS ((TF)); -extern TF COSTF PARAMS ((TF)); -extern TF SINTF PARAMS ((TF)); -#else /* ! TF_FN_SUPPORT */ -#define ADDTF(x, y) ((x) + (y)) -#define SUBTF(x, y) ((x) - (y)) -#define NEGTF(x) (- (x)) -#define MULTF(x, y) ((x) * (y)) -#define DIVTF(x, y) ((x) / (y)) -#define EQTF(x, y) ((TF) (x) == (TF) (y)) -#define NETF(x, y) ((TF) (x) != (TF) (y)) -#define LTTF(x, y) ((TF) (x) < (TF) (y)) -#define LETF(x, y) ((TF) (x) <= (TF) (y)) -#define GTTF(x, y) ((TF) (x) > (TF) (y)) -#define GETF(x, y) ((TF) (x) >= (TF) (y)) -extern TF ABSTF PARAMS ((TF)); -extern TF SQRTTF PARAMS ((TF)); -extern TF COSTF PARAMS ((TF)); -extern TF SINTF PARAMS ((TF)); -#endif /* TF_FN_SUPPORT */ - - -#define EXTBIQI(x) ((QI) (BI) (x)) -#define EXTBIHI(x) ((HI) (BI) (x)) -#define EXTBISI(x) ((SI) (BI) (x)) -#if defined (DI_FN_SUPPORT) -extern DI EXTBIDI PARAMS ((BI)); -#else -#define EXTBIDI(x) ((DI) (BI) (x)) -#endif -#define EXTQIHI(x) ((HI) (QI) (x)) -#define EXTQISI(x) ((SI) (QI) (x)) -#if defined (DI_FN_SUPPORT) -extern DI EXTQIDI PARAMS ((QI)); -#else -#define EXTQIDI(x) ((DI) (QI) (x)) -#endif -#define EXTHISI(x) ((SI) (HI) (x)) -#if defined (DI_FN_SUPPORT) -extern DI EXTHIDI PARAMS ((HI)); -#else -#define EXTHIDI(x) ((DI) (HI) (x)) -#endif -#if defined (DI_FN_SUPPORT) -extern DI EXTSIDI PARAMS ((SI)); -#else -#define EXTSIDI(x) ((DI) (SI) (x)) -#endif -#if defined (SF_FN_SUPPORT) || defined (DF_FN_SUPPORT) -extern DF EXTSFDF PARAMS ((SF)); -#else -#define EXTSFDF(x) ((DF) (SF) (x)) -#endif -#if defined (SF_FN_SUPPORT) || defined (XF_FN_SUPPORT) -extern XF EXTSFXF PARAMS ((SF)); -#else -#define EXTSFXF(x) ((XF) (SF) (x)) -#endif -#if defined (SF_FN_SUPPORT) || defined (TF_FN_SUPPORT) -extern TF EXTSFTF PARAMS ((SF)); -#else -#define EXTSFTF(x) ((TF) (SF) (x)) -#endif -#if defined (DF_FN_SUPPORT) || defined (XF_FN_SUPPORT) -extern XF EXTDFXF PARAMS ((DF)); -#else -#define EXTDFXF(x) ((XF) (DF) (x)) -#endif -#if defined (DF_FN_SUPPORT) || defined (TF_FN_SUPPORT) -extern TF EXTDFTF PARAMS ((DF)); -#else -#define EXTDFTF(x) ((TF) (DF) (x)) -#endif -#if defined (XF_FN_SUPPORT) || defined (TF_FN_SUPPORT) -extern TF EXTXFTF PARAMS ((XF)); -#else -#define EXTXFTF(x) ((TF) (XF) (x)) -#endif -#define ZEXTBIQI(x) ((QI) (UBI) (x)) -#define ZEXTBIHI(x) ((HI) (UBI) (x)) -#define ZEXTBISI(x) ((SI) (UBI) (x)) -#if defined (DI_FN_SUPPORT) -extern DI ZEXTBIDI PARAMS ((BI)); -#else -#define ZEXTBIDI(x) ((DI) (UBI) (x)) -#endif -#define ZEXTQIHI(x) ((HI) (UQI) (x)) -#define ZEXTQISI(x) ((SI) (UQI) (x)) -#if defined (DI_FN_SUPPORT) -extern DI ZEXTQIDI PARAMS ((QI)); -#else -#define ZEXTQIDI(x) ((DI) (UQI) (x)) -#endif -#define ZEXTHISI(x) ((SI) (UHI) (x)) -#if defined (DI_FN_SUPPORT) -extern DI ZEXTHIDI PARAMS ((HI)); -#else -#define ZEXTHIDI(x) ((DI) (UHI) (x)) -#endif -#if defined (DI_FN_SUPPORT) -extern DI ZEXTSIDI PARAMS ((SI)); -#else -#define ZEXTSIDI(x) ((DI) (USI) (x)) -#endif -#define TRUNCQIBI(x) ((BI) (QI) (x)) -#define TRUNCHIBI(x) ((BI) (HI) (x)) -#define TRUNCHIQI(x) ((QI) (HI) (x)) -#define TRUNCSIBI(x) ((BI) (SI) (x)) -#define TRUNCSIQI(x) ((QI) (SI) (x)) -#define TRUNCSIHI(x) ((HI) (SI) (x)) -#if defined (DI_FN_SUPPORT) -extern BI TRUNCDIBI PARAMS ((DI)); -#else -#define TRUNCDIBI(x) ((BI) (DI) (x)) -#endif -#if defined (DI_FN_SUPPORT) -extern QI TRUNCDIQI PARAMS ((DI)); -#else -#define TRUNCDIQI(x) ((QI) (DI) (x)) -#endif -#if defined (DI_FN_SUPPORT) -extern HI TRUNCDIHI PARAMS ((DI)); -#else -#define TRUNCDIHI(x) ((HI) (DI) (x)) -#endif -#if defined (DI_FN_SUPPORT) -extern SI TRUNCDISI PARAMS ((DI)); -#else -#define TRUNCDISI(x) ((SI) (DI) (x)) -#endif -#if defined (DF_FN_SUPPORT) || defined (SF_FN_SUPPORT) -extern SF TRUNCDFSF PARAMS ((DF)); -#else -#define TRUNCDFSF(x) ((SF) (DF) (x)) -#endif -#if defined (XF_FN_SUPPORT) || defined (SF_FN_SUPPORT) -extern SF TRUNCXFSF PARAMS ((XF)); -#else -#define TRUNCXFSF(x) ((SF) (XF) (x)) -#endif -#if defined (XF_FN_SUPPORT) || defined (DF_FN_SUPPORT) -extern DF TRUNCXFDF PARAMS ((XF)); -#else -#define TRUNCXFDF(x) ((DF) (XF) (x)) -#endif -#if defined (TF_FN_SUPPORT) || defined (SF_FN_SUPPORT) -extern SF TRUNCTFSF PARAMS ((TF)); -#else -#define TRUNCTFSF(x) ((SF) (TF) (x)) -#endif -#if defined (TF_FN_SUPPORT) || defined (DF_FN_SUPPORT) -extern DF TRUNCTFDF PARAMS ((TF)); -#else -#define TRUNCTFDF(x) ((DF) (TF) (x)) -#endif -#if defined (TF_FN_SUPPORT) || defined (XF_FN_SUPPORT) -extern XF TRUNCTFXF PARAMS ((TF)); -#else -#define TRUNCTFXF(x) ((XF) (TF) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern SF FLOATBISF PARAMS ((BI)); -#else -#define FLOATBISF(x) ((SF) (BI) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern DF FLOATBIDF PARAMS ((BI)); -#else -#define FLOATBIDF(x) ((DF) (BI) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern XF FLOATBIXF PARAMS ((BI)); -#else -#define FLOATBIXF(x) ((XF) (BI) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern TF FLOATBITF PARAMS ((BI)); -#else -#define FLOATBITF(x) ((TF) (BI) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern SF FLOATQISF PARAMS ((QI)); -#else -#define FLOATQISF(x) ((SF) (QI) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern DF FLOATQIDF PARAMS ((QI)); -#else -#define FLOATQIDF(x) ((DF) (QI) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern XF FLOATQIXF PARAMS ((QI)); -#else -#define FLOATQIXF(x) ((XF) (QI) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern TF FLOATQITF PARAMS ((QI)); -#else -#define FLOATQITF(x) ((TF) (QI) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern SF FLOATHISF PARAMS ((HI)); -#else -#define FLOATHISF(x) ((SF) (HI) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern DF FLOATHIDF PARAMS ((HI)); -#else -#define FLOATHIDF(x) ((DF) (HI) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern XF FLOATHIXF PARAMS ((HI)); -#else -#define FLOATHIXF(x) ((XF) (HI) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern TF FLOATHITF PARAMS ((HI)); -#else -#define FLOATHITF(x) ((TF) (HI) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern SF FLOATSISF PARAMS ((SI)); -#else -#define FLOATSISF(x) ((SF) (SI) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern DF FLOATSIDF PARAMS ((SI)); -#else -#define FLOATSIDF(x) ((DF) (SI) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern XF FLOATSIXF PARAMS ((SI)); -#else -#define FLOATSIXF(x) ((XF) (SI) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern TF FLOATSITF PARAMS ((SI)); -#else -#define FLOATSITF(x) ((TF) (SI) (x)) -#endif -#if defined (DI_FN_SUPPORT) || defined (SF_FN_SUPPORT) -extern SF FLOATDISF PARAMS ((DI)); -#else -#define FLOATDISF(x) ((SF) (DI) (x)) -#endif -#if defined (DI_FN_SUPPORT) || defined (DF_FN_SUPPORT) -extern DF FLOATDIDF PARAMS ((DI)); -#else -#define FLOATDIDF(x) ((DF) (DI) (x)) -#endif -#if defined (DI_FN_SUPPORT) || defined (XF_FN_SUPPORT) -extern XF FLOATDIXF PARAMS ((DI)); -#else -#define FLOATDIXF(x) ((XF) (DI) (x)) -#endif -#if defined (DI_FN_SUPPORT) || defined (TF_FN_SUPPORT) -extern TF FLOATDITF PARAMS ((DI)); -#else -#define FLOATDITF(x) ((TF) (DI) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern SF UFLOATBISF PARAMS ((BI)); -#else -#define UFLOATBISF(x) ((SF) (UBI) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern DF UFLOATBIDF PARAMS ((BI)); -#else -#define UFLOATBIDF(x) ((DF) (UBI) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern XF UFLOATBIXF PARAMS ((BI)); -#else -#define UFLOATBIXF(x) ((XF) (UBI) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern TF UFLOATBITF PARAMS ((BI)); -#else -#define UFLOATBITF(x) ((TF) (UBI) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern SF UFLOATQISF PARAMS ((QI)); -#else -#define UFLOATQISF(x) ((SF) (UQI) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern DF UFLOATQIDF PARAMS ((QI)); -#else -#define UFLOATQIDF(x) ((DF) (UQI) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern XF UFLOATQIXF PARAMS ((QI)); -#else -#define UFLOATQIXF(x) ((XF) (UQI) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern TF UFLOATQITF PARAMS ((QI)); -#else -#define UFLOATQITF(x) ((TF) (UQI) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern SF UFLOATHISF PARAMS ((HI)); -#else -#define UFLOATHISF(x) ((SF) (UHI) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern DF UFLOATHIDF PARAMS ((HI)); -#else -#define UFLOATHIDF(x) ((DF) (UHI) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern XF UFLOATHIXF PARAMS ((HI)); -#else -#define UFLOATHIXF(x) ((XF) (UHI) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern TF UFLOATHITF PARAMS ((HI)); -#else -#define UFLOATHITF(x) ((TF) (UHI) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern SF UFLOATSISF PARAMS ((SI)); -#else -#define UFLOATSISF(x) ((SF) (USI) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern DF UFLOATSIDF PARAMS ((SI)); -#else -#define UFLOATSIDF(x) ((DF) (USI) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern XF UFLOATSIXF PARAMS ((SI)); -#else -#define UFLOATSIXF(x) ((XF) (USI) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern TF UFLOATSITF PARAMS ((SI)); -#else -#define UFLOATSITF(x) ((TF) (USI) (x)) -#endif -#if defined (DI_FN_SUPPORT) || defined (SF_FN_SUPPORT) -extern SF UFLOATDISF PARAMS ((DI)); -#else -#define UFLOATDISF(x) ((SF) (UDI) (x)) -#endif -#if defined (DI_FN_SUPPORT) || defined (DF_FN_SUPPORT) -extern DF UFLOATDIDF PARAMS ((DI)); -#else -#define UFLOATDIDF(x) ((DF) (UDI) (x)) -#endif -#if defined (DI_FN_SUPPORT) || defined (XF_FN_SUPPORT) -extern XF UFLOATDIXF PARAMS ((DI)); -#else -#define UFLOATDIXF(x) ((XF) (UDI) (x)) -#endif -#if defined (DI_FN_SUPPORT) || defined (TF_FN_SUPPORT) -extern TF UFLOATDITF PARAMS ((DI)); -#else -#define UFLOATDITF(x) ((TF) (UDI) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern BI FIXSFBI PARAMS ((SF)); -#else -#define FIXSFBI(x) ((BI) (SF) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern QI FIXSFQI PARAMS ((SF)); -#else -#define FIXSFQI(x) ((QI) (SF) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern HI FIXSFHI PARAMS ((SF)); -#else -#define FIXSFHI(x) ((HI) (SF) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern SI FIXSFSI PARAMS ((SF)); -#else -#define FIXSFSI(x) ((SI) (SF) (x)) -#endif -#if defined (SF_FN_SUPPORT) || defined (DI_FN_SUPPORT) -extern DI FIXSFDI PARAMS ((SF)); -#else -#define FIXSFDI(x) ((DI) (SF) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern BI FIXDFBI PARAMS ((DF)); -#else -#define FIXDFBI(x) ((BI) (DF) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern QI FIXDFQI PARAMS ((DF)); -#else -#define FIXDFQI(x) ((QI) (DF) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern HI FIXDFHI PARAMS ((DF)); -#else -#define FIXDFHI(x) ((HI) (DF) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern SI FIXDFSI PARAMS ((DF)); -#else -#define FIXDFSI(x) ((SI) (DF) (x)) -#endif -#if defined (DF_FN_SUPPORT) || defined (DI_FN_SUPPORT) -extern DI FIXDFDI PARAMS ((DF)); -#else -#define FIXDFDI(x) ((DI) (DF) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern BI FIXXFBI PARAMS ((XF)); -#else -#define FIXXFBI(x) ((BI) (XF) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern QI FIXXFQI PARAMS ((XF)); -#else -#define FIXXFQI(x) ((QI) (XF) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern HI FIXXFHI PARAMS ((XF)); -#else -#define FIXXFHI(x) ((HI) (XF) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern SI FIXXFSI PARAMS ((XF)); -#else -#define FIXXFSI(x) ((SI) (XF) (x)) -#endif -#if defined (XF_FN_SUPPORT) || defined (DI_FN_SUPPORT) -extern DI FIXXFDI PARAMS ((XF)); -#else -#define FIXXFDI(x) ((DI) (XF) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern BI FIXTFBI PARAMS ((TF)); -#else -#define FIXTFBI(x) ((BI) (TF) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern QI FIXTFQI PARAMS ((TF)); -#else -#define FIXTFQI(x) ((QI) (TF) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern HI FIXTFHI PARAMS ((TF)); -#else -#define FIXTFHI(x) ((HI) (TF) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern SI FIXTFSI PARAMS ((TF)); -#else -#define FIXTFSI(x) ((SI) (TF) (x)) -#endif -#if defined (TF_FN_SUPPORT) || defined (DI_FN_SUPPORT) -extern DI FIXTFDI PARAMS ((TF)); -#else -#define FIXTFDI(x) ((DI) (TF) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern BI UFIXSFBI PARAMS ((SF)); -#else -#define UFIXSFBI(x) ((UBI) (SF) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern QI UFIXSFQI PARAMS ((SF)); -#else -#define UFIXSFQI(x) ((UQI) (SF) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern HI UFIXSFHI PARAMS ((SF)); -#else -#define UFIXSFHI(x) ((UHI) (SF) (x)) -#endif -#if defined (SF_FN_SUPPORT) -extern SI UFIXSFSI PARAMS ((SF)); -#else -#define UFIXSFSI(x) ((USI) (SF) (x)) -#endif -#if defined (SF_FN_SUPPORT) || defined (DI_FN_SUPPORT) -extern DI UFIXSFDI PARAMS ((SF)); -#else -#define UFIXSFDI(x) ((UDI) (SF) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern BI UFIXDFBI PARAMS ((DF)); -#else -#define UFIXDFBI(x) ((UBI) (DF) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern QI UFIXDFQI PARAMS ((DF)); -#else -#define UFIXDFQI(x) ((UQI) (DF) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern HI UFIXDFHI PARAMS ((DF)); -#else -#define UFIXDFHI(x) ((UHI) (DF) (x)) -#endif -#if defined (DF_FN_SUPPORT) -extern SI UFIXDFSI PARAMS ((DF)); -#else -#define UFIXDFSI(x) ((USI) (DF) (x)) -#endif -#if defined (DF_FN_SUPPORT) || defined (DI_FN_SUPPORT) -extern DI UFIXDFDI PARAMS ((DF)); -#else -#define UFIXDFDI(x) ((UDI) (DF) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern BI UFIXXFBI PARAMS ((XF)); -#else -#define UFIXXFBI(x) ((UBI) (XF) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern QI UFIXXFQI PARAMS ((XF)); -#else -#define UFIXXFQI(x) ((UQI) (XF) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern HI UFIXXFHI PARAMS ((XF)); -#else -#define UFIXXFHI(x) ((UHI) (XF) (x)) -#endif -#if defined (XF_FN_SUPPORT) -extern SI UFIXXFSI PARAMS ((XF)); -#else -#define UFIXXFSI(x) ((USI) (XF) (x)) -#endif -#if defined (XF_FN_SUPPORT) || defined (DI_FN_SUPPORT) -extern DI UFIXXFDI PARAMS ((XF)); -#else -#define UFIXXFDI(x) ((UDI) (XF) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern BI UFIXTFBI PARAMS ((TF)); -#else -#define UFIXTFBI(x) ((UBI) (TF) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern QI UFIXTFQI PARAMS ((TF)); -#else -#define UFIXTFQI(x) ((UQI) (TF) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern HI UFIXTFHI PARAMS ((TF)); -#else -#define UFIXTFHI(x) ((UHI) (TF) (x)) -#endif -#if defined (TF_FN_SUPPORT) -extern SI UFIXTFSI PARAMS ((TF)); -#else -#define UFIXTFSI(x) ((USI) (TF) (x)) -#endif -#if defined (TF_FN_SUPPORT) || defined (DI_FN_SUPPORT) -extern DI UFIXTFDI PARAMS ((TF)); -#else -#define UFIXTFDI(x) ((UDI) (TF) (x)) -#endif - -/* Semantic support utilities. */ - -#ifdef __GNUC__ - -#ifdef SEMOPS_DEFINE_INLINE -#define SEMOPS_INLINE -#else -#define SEMOPS_INLINE extern inline -#endif - -SEMOPS_INLINE SI -ADDCSI (SI a, SI b, UBI c) -{ - SI res = ADDSI (a, ADDSI (b, c)); - return res; -} - -SEMOPS_INLINE UBI -ADDCFSI (SI a, SI b, UBI c) -{ - SI tmp = ADDSI (a, ADDSI (b, c)); - BI res = (USI) tmp < (USI) a || (USI) tmp < (USI) b; - return res; -} - -SEMOPS_INLINE UBI -ADDOFSI (SI a, SI b, UBI c) -{ - SI tmp = ADDSI (a, ADDSI (b, c)); - BI res = (((a < 0) == (b < 0)) - && ((a < 0) != (tmp < 0))); - return res; -} - -SEMOPS_INLINE SI -SUBCSI (SI a, SI b, UBI c) -{ - SI res = SUBSI (a, ADDSI (b, c)); - return res; -} - -SEMOPS_INLINE UBI -SUBCFSI (SI a, SI b, UBI c) -{ - BI res = ((USI) a < (USI) b) || ((a == b) && c); - return res; -} - -SEMOPS_INLINE UBI -SUBOFSI (SI a, SI b, UBI c) -{ - SI tmp = SUBSI (a, ADDSI (b, c)); - BI res = (((a < 0) != (b < 0)) - && ((a < 0) != (tmp < 0))); - return res; -} - -#else - -SI ADDCSI (SI, SI, UBI); -UBI ADDCFSI (SI, SI, UBI); -UBI ADDOFSI (SI, SI, UBI); -SI SUBCSI (SI, SI, UBI); -UBI SUBCFSI (SI, SI, UBI); -UBI SUBOFSI (SI, SI, UBI); - -#endif - -/* DI mode support if "long long" doesn't exist. - At one point CGEN supported K&R C compilers, and ANSI C compilers without - "long long". One can argue the various merits of keeping this in or - throwing it out. I went to the trouble of adding it so for the time being - I'm leaving it in. */ - -#ifdef DI_FN_SUPPORT - -DI make_struct_di (SI, SI); -/* FIXME: needed? */ -DI CONVHIDI (HI); -DI CONVSIDI (SI); -SI CONVDISI (DI); - -#endif /* DI_FN_SUPPORT */ - -#endif /* CGEN_SEM_OPS_H */ diff --git a/sim/m32r/sim-main.h b/sim/m32r/sim-main.h new file mode 100644 index 0000000..fdb159c --- /dev/null +++ b/sim/m32r/sim-main.h @@ -0,0 +1,81 @@ +/* Main header for the m32r. */ + +#define USING_SIM_BASE_H /* FIXME: quick hack */ + +struct _sim_cpu; /* FIXME: should be in sim-basics.h */ +typedef struct _sim_cpu SIM_CPU; + +/* sim-basics.h includes config.h but cgen-types.h must be included before + sim-basics.h and cgen-types.h needs config.h. */ +#include "config.h" + +#include "cgen-types.h" +#include "arch.h" /* machine generated */ +#include "sim-basics.h" + +/* These must be defined before sim-base.h. */ +typedef SI sim_cia; + +/* FIXME: Shouldn't be required to define these this early. */ +#define SIM_ENGINE_HALT_HOOK(SD, LAST_CPU, CIA) +#define SIM_ENGINE_RESTART_HOOK(SD, LAST_CPU, CIA) + +#include "sim-base.h" +#include "cgen-sim.h" +/*#include "cgen-mem.h"*/ +#include "cgen-trace.h" +#include "cpu-opc.h" /* Needed for INSN_NAME. */ +#include "cpu-sim.h" + +#ifdef WANT_CPU_M32R +#include "cpu.h" /* machine generated */ +#include "decode.h" /* machine generated */ +#endif +/* start-sanitize-m32rx */ +#ifdef WANT_CPU_M32RX +#include "cpux.h" /* machine generated */ +#include "decodex.h" /* machine generated */ +#endif +/* end-sanitize-m32rx */ +#include "cpuall.h" /* machine generated */ + +/* Misc. profile data. */ +typedef struct { + /* nop insn slot filler count */ + unsigned int fillnop_count; +} M32R_MISC_PROFILE; + +struct _sim_cpu { + sim_cpu_base base; + + /* Non-machine generated parts of cgen. */ + CGEN_CPU cgen_cpu; + + /* Machine generated and cpu specific parts go here. + Note that in files that don't need to access these pieces WANT_CPU_FOO + won't be defined and thus these parts won't appear. This is ok. + One has to of course be careful to not take the size of this + struct, etc. */ +#if defined (WANT_CPU_M32R) + M32R_CPU_DATA cpu_data; +#elif defined (WANT_CPU_M32RX) + M32RX_CPU_DATA cpu_data; + PARALLEL_EXEC par_exec; +#define CPU_PAR_EXEC(cpu) (& (cpu)->par_exec) +#endif + + M32R_MISC_PROFILE m32r_misc_profile; +#define CPU_M32R_MISC_PROFILE(cpu) ((cpu)->m32r_misc_profile) +}; + +struct sim_state { + sim_cpu *cpu; +#define STATE_CPU(sd, n) (/*&*/ (sd)->cpu) + + CGEN_STATE cgen_state; + + sim_state_base base; +}; + +/* Default memory size. */ +#define M32R_DEFAULT_MEM_SIZE 0x800000 /* 8M */ diff --git a/sim/m32r/tconfig.in b/sim/m32r/tconfig.in new file mode 100644 index 0000000..b6f03d7 --- /dev/null +++ b/sim/m32r/tconfig.in @@ -0,0 +1,35 @@ +/* M32R target configuration file. -*- C -*- */ + +/* Define this if the simulator can vary the size of memory. + See the xxx simulator for an example. + This enables the `-m size' option. + The memory size is stored in STATE_MEM_SIZE. */ +/* Not used for M32R since we use the memory module. */ +/* #define SIM_HAVE_MEM_SIZE */ + +/* For MSPR support. FIXME: revisit. */ +#define WITH_DEVICES 1 + +/* The semantic code should probably always use a switch(). + However, in case that's not possible in some circumstance, we allow + the target to choose. Perhaps this can be autoconf'd on whether the + switch is too big? I can't (yet) think of a reason for allowing the + user to choose, though the developer may certainly wish to. */ +#ifdef WANT_CPU_M32R +#define WITH_FAST 1 +#define WITH_SEM_SWITCH_FULL 0 +#define WITH_SEM_SWITCH_FAST 1 +#endif + +#ifdef WANT_CPU_M32RX +#define HAVE_PARALLEL_EXEC +#define WITH_FAST 0 +#define WITH_SEM_SWITCH_FULL 1 +#define WITH_SEM_SWITCH_FAST 0 +/* The m32rx currently never uses the scache. So hardcode this off. */ +#undef WITH_SCACHE +#define WITH_SCACHE 0 +#endif + +/* ??? Temporary hack until model support unified. */ +#define SIM_HAVE_MODEL |