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authorAlexandre Oliva <aoliva@redhat.com>2000-06-20 09:36:12 +0000
committerAlexandre Oliva <aoliva@redhat.com>2000-06-20 09:36:12 +0000
commitfe47e8dfd322a49e77444d51c1b82294e7093341 (patch)
treeeed38f54edbe7ffef82bc64b663e6892d6d48eb1
parentf6dd1e7029438862d587e1fca38f701e775736c1 (diff)
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* armemu.h (NEGBRANCH): Do not overwrite the two most significant
bits of the offset.
-rw-r--r--sim/arm/ChangeLog5
-rw-r--r--sim/arm/armemu.h2
2 files changed, 6 insertions, 1 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog
index f7b7895..a2329be 100644
--- a/sim/arm/ChangeLog
+++ b/sim/arm/ChangeLog
@@ -1,3 +1,8 @@
+2000-06-20 Alexandre Oliva <aoliva@cygnus.com>
+
+ * armemu.h (NEGBRANCH): Do not overwrite the two most significant
+ bits of the offset.
+
2000-05-25 Nick Clifton <nickc@cygnus.com>
* armcopro.c (MMUMCR): Only indicate mode change if a singal has
diff --git a/sim/arm/armemu.h b/sim/arm/armemu.h
index b80c4ef..a51c67e 100644
--- a/sim/arm/armemu.h
+++ b/sim/arm/armemu.h
@@ -342,7 +342,7 @@ extern ARMword isize;
#define STORESMULT(instr,address,wb) StoreSMult(state,instr,address,wb)
#define POSBRANCH ((instr & 0x7fffff) << 2)
-#define NEGBRANCH (0xff000000 | ((instr & 0xffffff) << 2))
+#define NEGBRANCH (0xfc000000 | ((instr & 0xffffff) << 2))
/***************************************************************************\
* Values for Emulate *