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author | Ulrich Weigand <uweigand@de.ibm.com> | 2007-06-15 22:32:02 +0000 |
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committer | Ulrich Weigand <uweigand@de.ibm.com> | 2007-06-15 22:32:02 +0000 |
commit | d2ca4222d5a14ae1a0bcc28fc7ce667baec76ff0 (patch) | |
tree | 1dc319c102d8e7d7f026d2a4ee22ae7006d10c06 | |
parent | c458d6db4beec11df86f11c63e69cb0e28cb1d40 (diff) | |
download | gdb-d2ca4222d5a14ae1a0bcc28fc7ce667baec76ff0.zip gdb-d2ca4222d5a14ae1a0bcc28fc7ce667baec76ff0.tar.gz gdb-d2ca4222d5a14ae1a0bcc28fc7ce667baec76ff0.tar.bz2 |
* mips-tdep.c (mips16_scan_prologue): Replace read_next_frame_reg
by frame_unwind_register_signed calls.
(mips32_scan_prologue): Likewise. Skip analysis of alloca stack
frame allocations when called with NULL NEXT_FRAME parameter.
(read_next_frame_reg): Remove.
* sh-tdep.c (sh_analyze_prologue): Add FPSCR parameter. Use it
instead of reading the FPSCR register.
(sh_frame_cache): Pass unwound FPSCR register value to
sh_analyze_prologue.
(sh_skip_prologue): Pass dummy FPSCR value to sh_analyze_prologue.
* v850-tdep.c (v850_analyze_prologue): Add CTBP parameter. Use it
instead of reading the CTBP register.
(v850_frame_cache): Pass unwound CTBP register value to
v850_analyze_prologue.
-rw-r--r-- | gdb/ChangeLog | 19 | ||||
-rw-r--r-- | gdb/mips-tdep.c | 46 | ||||
-rw-r--r-- | gdb/sh-tdep.c | 12 | ||||
-rw-r--r-- | gdb/v850-tdep.c | 9 |
4 files changed, 49 insertions, 37 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index a9583a0..ee766e3 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,24 @@ 2007-06-15 Ulrich Weigand <uweigand@de.ibm.com> + * mips-tdep.c (mips16_scan_prologue): Replace read_next_frame_reg + by frame_unwind_register_signed calls. + (mips32_scan_prologue): Likewise. Skip analysis of alloca stack + frame allocations when called with NULL NEXT_FRAME parameter. + (read_next_frame_reg): Remove. + + * sh-tdep.c (sh_analyze_prologue): Add FPSCR parameter. Use it + instead of reading the FPSCR register. + (sh_frame_cache): Pass unwound FPSCR register value to + sh_analyze_prologue. + (sh_skip_prologue): Pass dummy FPSCR value to sh_analyze_prologue. + + * v850-tdep.c (v850_analyze_prologue): Add CTBP parameter. Use it + instead of reading the CTBP register. + (v850_frame_cache): Pass unwound CTBP register value to + v850_analyze_prologue. + +2007-06-15 Ulrich Weigand <uweigand@de.ibm.com> + * sh-tdep.h (sh_show_regs): Add FRAME parameter. * sh-tdep.c (sh_show_regs): Likewise. (sh_show_regs_command): Pass current frame to sh_show_regs routine. diff --git a/gdb/mips-tdep.c b/gdb/mips-tdep.c index 89e91c0..493f011 100644 --- a/gdb/mips-tdep.c +++ b/gdb/mips-tdep.c @@ -452,8 +452,6 @@ mips2_fp_compat (void) static CORE_ADDR heuristic_proc_start (CORE_ADDR); -static CORE_ADDR read_next_frame_reg (struct frame_info *, int); - static void reinit_frame_cache_sfunc (char *, int, struct cmd_list_element *); static struct type *mips_float_register_type (void); @@ -1571,8 +1569,9 @@ mips16_scan_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc, /* Can be called when there's no process, and hence when there's no NEXT_FRAME. */ if (next_frame != NULL) - sp = read_next_frame_reg (next_frame, gdbarch_num_regs (current_gdbarch) - + MIPS_SP_REGNUM); + sp = frame_unwind_register_signed (next_frame, + gdbarch_num_regs (current_gdbarch) + + MIPS_SP_REGNUM); else sp = 0; @@ -1892,8 +1891,9 @@ mips32_scan_prologue (CORE_ADDR start_pc, CORE_ADDR limit_pc, /* Can be called when there's no process, and hence when there's no NEXT_FRAME. */ if (next_frame != NULL) - sp = read_next_frame_reg (next_frame, gdbarch_num_regs (current_gdbarch) - + MIPS_SP_REGNUM); + sp = frame_unwind_register_signed (next_frame, + gdbarch_num_regs (current_gdbarch) + + MIPS_SP_REGNUM); else sp = 0; @@ -1943,14 +1943,15 @@ restart: /* Old gcc frame, r30 is virtual frame pointer. */ if ((long) low_word != frame_offset) frame_addr = sp + low_word; - else if (frame_reg == MIPS_SP_REGNUM) + else if (next_frame && frame_reg == MIPS_SP_REGNUM) { unsigned alloca_adjust; frame_reg = 30; - frame_addr = read_next_frame_reg (next_frame, - gdbarch_num_regs - (current_gdbarch) + 30); + frame_addr = frame_unwind_register_signed + (next_frame, + gdbarch_num_regs (current_gdbarch) + 30); + alloca_adjust = (unsigned) (frame_addr - (sp + low_word)); if (alloca_adjust > 0) { @@ -1973,14 +1974,15 @@ restart: else if (inst == 0x03A0F021 || inst == 0x03a0f025 || inst == 0x03a0f02d) { /* New gcc frame, virtual frame pointer is at r30 + frame_size. */ - if (frame_reg == MIPS_SP_REGNUM) + if (next_frame && frame_reg == MIPS_SP_REGNUM) { unsigned alloca_adjust; frame_reg = 30; - frame_addr = read_next_frame_reg (next_frame, - gdbarch_num_regs - (current_gdbarch) + 30); + frame_addr = frame_unwind_register_signed + (next_frame, + gdbarch_num_regs (current_gdbarch) + 30); + alloca_adjust = (unsigned) (frame_addr - sp); if (alloca_adjust > 0) { @@ -2288,22 +2290,6 @@ mips_stub_frame_base_sniffer (struct frame_info *next_frame) return NULL; } -static CORE_ADDR -read_next_frame_reg (struct frame_info *fi, int regno) -{ - /* Always a pseudo. */ - gdb_assert (regno >= gdbarch_num_regs (current_gdbarch)); - if (fi == NULL) - { - LONGEST val; - regcache_cooked_read_signed (current_regcache, regno, &val); - return val; - } - else - return frame_unwind_register_signed (fi, regno); - -} - /* mips_addr_bits_remove - remove useless address bits */ static CORE_ADDR diff --git a/gdb/sh-tdep.c b/gdb/sh-tdep.c index 19f5a40..3e17c27 100644 --- a/gdb/sh-tdep.c +++ b/gdb/sh-tdep.c @@ -508,7 +508,7 @@ gdb_print_insn_sh (bfd_vma memaddr, disassemble_info * info) static CORE_ADDR sh_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc, - struct sh_frame_cache *cache) + struct sh_frame_cache *cache, ULONGEST fpscr) { ULONGEST inst; CORE_ADDR opc; @@ -615,7 +615,7 @@ sh_analyze_prologue (CORE_ADDR pc, CORE_ADDR current_pc, } else if (IS_FPUSH (inst)) { - if (read_register (FPSCR_REGNUM) & FPSCR_SZ) + if (fpscr & FPSCR_SZ) { cache->sp_offset += 8; } @@ -728,7 +728,7 @@ sh_skip_prologue (CORE_ADDR start_pc) return max (pc, start_pc); cache.sp_offset = -4; - pc = sh_analyze_prologue (start_pc, (CORE_ADDR) -1, &cache); + pc = sh_analyze_prologue (start_pc, (CORE_ADDR) -1, &cache, 0); if (!cache.uses_fp) return start_pc; @@ -2360,7 +2360,11 @@ sh_frame_cache (struct frame_info *next_frame, void **this_cache) cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME); current_pc = frame_pc_unwind (next_frame); if (cache->pc != 0) - sh_analyze_prologue (cache->pc, current_pc, cache); + { + ULONGEST fpscr; + fpscr = frame_unwind_register_unsigned (next_frame, FPSCR_REGNUM); + sh_analyze_prologue (cache->pc, current_pc, cache, fpscr); + } if (!cache->uses_fp) { diff --git a/gdb/v850-tdep.c b/gdb/v850-tdep.c index 752223c..7aa7dc3 100644 --- a/gdb/v850-tdep.c +++ b/gdb/v850-tdep.c @@ -456,7 +456,7 @@ v850_is_save_register (int reg) static CORE_ADDR v850_analyze_prologue (CORE_ADDR func_addr, CORE_ADDR pc, - struct v850_frame_cache *pi) + struct v850_frame_cache *pi, ULONGEST ctbp) { CORE_ADDR prologue_end, current_pc; struct pifsr pifsrs[E_NUM_REGS + 1]; @@ -517,7 +517,6 @@ v850_analyze_prologue (CORE_ADDR func_addr, CORE_ADDR pc, } else if ((insn & 0xffc0) == 0x0200 && !regsave_func_p) { /* callt <imm6> */ - long ctbp = read_register (E_CTBP_REGNUM); long adr = ctbp + ((insn & 0x3f) << 1); save_pc = current_pc; @@ -859,7 +858,11 @@ v850_frame_cache (struct frame_info *next_frame, void **this_cache) cache->pc = frame_func_unwind (next_frame, NORMAL_FRAME); current_pc = frame_pc_unwind (next_frame); if (cache->pc != 0) - v850_analyze_prologue (cache->pc, current_pc, cache); + { + ULONGEST ctbp; + ctbp = frame_unwind_register_unsigned (next_frame, E_CTBP_REGNUM); + v850_analyze_prologue (cache->pc, current_pc, cache, ctbp); + } if (!cache->uses_fp) { |