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| author | Jiong Wang <jiong.wang@arm.com> | 2015-04-29 11:04:17 +0100 |
|---|---|---|
| committer | Jiong Wang <jiong.wang@arm.com> | 2015-04-29 11:04:17 +0100 |
| commit | 9081b64dc1b85a63466962adbc92d1c3e560a659 (patch) | |
| tree | ca0d73f65abcc5fe09c8a61535c64bcddf1746a9 | |
| parent | 34f5f757b389e8fb3eab64f816e484c2cc434292 (diff) | |
| download | gdb-9081b64dc1b85a63466962adbc92d1c3e560a659.zip gdb-9081b64dc1b85a63466962adbc92d1c3e560a659.tar.gz gdb-9081b64dc1b85a63466962adbc92d1c3e560a659.tar.bz2 | |
[ARM] Update ld testcases
2015-04-29 Renlin Li <renlin.li@arm.com>
ld/testsuite/
* ld-arm/ifunc-10.dd: Adjust expected output.
* ld-arm/ifunc-2.dd: Likewise.
| -rw-r--r-- | ld/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/ifunc-10.dd | 2 | ||||
| -rw-r--r-- | ld/testsuite/ld-arm/ifunc-2.dd | 4 |
3 files changed, 8 insertions, 3 deletions
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog index a6704f8..5ea8432 100644 --- a/ld/testsuite/ChangeLog +++ b/ld/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2015-04-27 Renlin Li <renlin.li@arm.com> + + * ld-arm/ifunc-10.dd: Adjust expected output. + * ld-arm/ifunc-2.dd: Likewise. + 2015-04-27 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * ld-s390/gotreloc_31-1.dd: Use instruction mnemonics. diff --git a/ld/testsuite/ld-arm/ifunc-10.dd b/ld/testsuite/ld-arm/ifunc-10.dd index 88bae50..d96c086 100644 --- a/ld/testsuite/ld-arm/ifunc-10.dd +++ b/ld/testsuite/ld-arm/ifunc-10.dd @@ -267,7 +267,7 @@ Disassembly of section \.text: 0000a010 <tbf1>: a010: 46f7 mov pc, lr - a012: 0000 movs r0, r0 + a012: 0000 .short 0x0000 a014: e1a0f00e mov pc, lr a018: e1a0f00e mov pc, lr a01c: e1a0f00e mov pc, lr diff --git a/ld/testsuite/ld-arm/ifunc-2.dd b/ld/testsuite/ld-arm/ifunc-2.dd index f6d57fa..91eab54 100644 --- a/ld/testsuite/ld-arm/ifunc-2.dd +++ b/ld/testsuite/ld-arm/ifunc-2.dd @@ -84,10 +84,10 @@ Disassembly of section \.text: 0000a00c <f4>: a00c: 46f7 mov pc, lr - a00e: 0000 movs r0, r0 + a00e: 0000 .short 0x0000 a010: e1a0f00e mov pc, lr a014: 46f7 mov pc, lr - a016: 0000 movs r0, r0 + a016: 0000 .short 0x0000 a018: e1a0f00e mov pc, lr a01c: 46f7 mov pc, lr \.\.\. |