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| author | Jeff Law <law@redhat.com> | 1996-10-09 17:20:59 +0000 |
|---|---|---|
| committer | Jeff Law <law@redhat.com> | 1996-10-09 17:20:59 +0000 |
| commit | 344d6417bb5c54886b9b6f5f771cfc0255ac3e1f (patch) | |
| tree | 58a8b2369aaa41413a1cc1c632d1dd81d53ccdad | |
| parent | 5faa6e1e4f24dfdede379d837647a6b8e8edd98b (diff) | |
| download | gdb-344d6417bb5c54886b9b6f5f771cfc0255ac3e1f.zip gdb-344d6417bb5c54886b9b6f5f771cfc0255ac3e1f.tar.gz gdb-344d6417bb5c54886b9b6f5f771cfc0255ac3e1f.tar.bz2 | |
* mn10300-opc.c (mn10300_opcodes): Add "extended" instructions,
"putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch".
Matsushita.
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/mn10300-opc.c | 14 |
2 files changed, 19 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 0b43e4d..a3293dd 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +Wed Oct 9 11:19:26 1996 Jeffrey A Law (law@cygnus.com) + + * mn10300-opc.c (mn10300_opcodes): Add "extended" instructions, + "putx", "getx", "mulq", "mulqu", "sat16", "sat24", "bsch". + Tue Oct 8 11:55:35 1996 Jeffrey A Law (law@cygnus.com) * mn10300-opc.c (mn10300_operands): Remove "REGS" operand. diff --git a/opcodes/mn10300-opc.c b/opcodes/mn10300-opc.c index 11d13b0..7d5d833 100644 --- a/opcodes/mn10300-opc.c +++ b/opcodes/mn10300-opc.c @@ -366,6 +366,20 @@ const struct mn10300_opcode mn10300_opcodes[] = { { "rtm", 0xf0ff, 0xffff, FMT_D0, {UNUSED}}, { "nop", 0xcb, 0xff, FMT_S0, {UNUSED}}, /* { "udf", 0, 0, {0}}, */ + +{ "putx", 0xf500, 0xfff0, FMT_D0, {DM}}, +{ "getx", 0xf6f0, 0xfff0, FMT_D0, {DN}}, +{ "mulq", 0xf600, 0xfff0, FMT_D0, {DM, DN}}, +{ "mulq", 0xf90000, 0xfffc00, FMT_D1, {SIMM8, DN}}, +{ "mulq", 0xfb000000, 0xfffc0000, FMT_D2, {SIMM16, DN}}, +{ "mulq", 0xfd000000, 0xfffc0000, FMT_D4, {IMM32, DN}}, +{ "mulqu", 0xf610, 0xfff0, FMT_D0, {DM, DN}}, +{ "mulqu", 0xf90400, 0xfffc00, FMT_D1, {SIMM8, DN}}, +{ "mulqu", 0xfb040000, 0xfffc0000, FMT_D2, {SIMM16, DN}}, +{ "mulqu", 0xfd040000, 0xfffc0000, FMT_D4, {IMM32, DN}}, +{ "sat16", 0xf640, 0xfff0, FMT_D0, {DM, DN}}, +{ "sat24", 0xf650, 0xfff0, FMT_D0, {DM, DN}}, +{ "bsch", 0xf670, 0xfff0, FMT_D0, {DM, DN}}, { 0, 0, 0, 0, {0}}, } ; |