diff options
author | Nick Clifton <nickc@redhat.com> | 2011-04-12 16:01:48 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2011-04-12 16:01:48 +0000 |
commit | 32a946987b2c683c06d55efc2d4d7e682f164e4e (patch) | |
tree | 9d168f3d9677d090beb73f9b7632197590f97a8d | |
parent | 1bbabca54eb49016bad07ddc68ede0a8346214cc (diff) | |
download | gdb-32a946987b2c683c06d55efc2d4d7e682f164e4e.zip gdb-32a946987b2c683c06d55efc2d4d7e682f164e4e.tar.gz gdb-32a946987b2c683c06d55efc2d4d7e682f164e4e.tar.bz2 |
PR binutils/12534
* arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn
patterns.
(print_insn_thumb32): Handle %L.
* gas/arm/thumb32.s: Add PC relative LDRD and STRD insns.
* gas/arm/thumb32.l: Update expected output.
* gas/arm/thumb32.d: Update expected disassembly.
-rw-r--r-- | gas/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/thumb32.d | 43 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/thumb32.l | 24 | ||||
-rw-r--r-- | gas/testsuite/gas/arm/thumb32.s | 7 | ||||
-rw-r--r-- | opcodes/ChangeLog | 7 | ||||
-rw-r--r-- | opcodes/arm-dis.c | 24 |
6 files changed, 72 insertions, 38 deletions
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog index 6e3a05a..3f9b878 100644 --- a/gas/testsuite/ChangeLog +++ b/gas/testsuite/ChangeLog @@ -1,5 +1,10 @@ 2011-04-12 Nick Clifton <nickc@redhat.com> + PR binutils/12534 + * gas/arm/thumb32.s: Add PC relative LDRD and STRD insns. + * gas/arm/thumb32.l: Update expected output. + * gas/arm/thumb32.d: Update expected disassembly. + PR gas/12532 * gas/arm/plt-1.d: Update expected disassembly. * gas/arm/thumb2_bcond.d: Likewise. diff --git a/gas/testsuite/gas/arm/thumb32.d b/gas/testsuite/gas/arm/thumb32.d index f51c13a..262973d 100644 --- a/gas/testsuite/gas/arm/thumb32.d +++ b/gas/testsuite/gas/arm/thumb32.d @@ -531,12 +531,15 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> f819 f00c pld \[r9, ip\] 0[0-9a-f]+ <[^>]+> f89f f006 pld \[pc, #6\] ; 0+5ee <[^>]+> 0[0-9a-f]+ <[^>]+> f81f f02a pld \[pc, #-42\] ; 0+5c2 <[^>]+> +0[0-9a-f]+ <[^>]+> bf00 nop 0[0-9a-f]+ <[^>]+> e9d5 2300 ldrd r2, r3, \[r5\] 0[0-9a-f]+ <[^>]+> e9d5 230c ldrd r2, r3, \[r5, #48\].* 0[0-9a-f]+ <[^>]+> e955 230c ldrd r2, r3, \[r5, #-48\].* +0[0-9a-f]+ <[^>]+> e95f 4505 ldrd r4, r5, \[pc, #-16\] ; 0+5f0 <^>]+> 0[0-9a-f]+ <[^>]+> e9c5 2300 strd r2, r3, \[r5\] 0[0-9a-f]+ <[^>]+> e9c5 230c strd r2, r3, \[r5, #48\].* 0[0-9a-f]+ <[^>]+> e945 230c strd r2, r3, \[r5, #-48\].* +0[0-9a-f]+ <[^>]+> e94f 2308 strd r2, r3, \[pc, #-32\] ; 0+5f0 <^>]+> 0[0-9a-f]+ <[^>]+> f815 1e00 ldrbt r1, \[r5\] 0[0-9a-f]+ <[^>]+> f815 1e30 ldrbt r1, \[r5, #48\].* 0[0-9a-f]+ <[^>]+> f915 1e00 ldrsbt r1, \[r5\] @@ -945,26 +948,26 @@ Disassembly of section .text: 0[0-9a-f]+ <[^>]+> fa52 f183 uxtab r1, r2, r3 0[0-9a-f]+ <[^>]+> fa32 f183 uxtab16 r1, r2, r3 0[0-9a-f]+ <[^>]+> fa12 f183 uxtah r1, r2, r3 -0[0-9a-f]+ <[^>]+> f89f 12aa ldrb\.w r1, \[pc, #682\] ; 0+e82 <[^>]+> -0[0-9a-f]+ <[^>]+> f89f 1155 ldrb\.w r1, \[pc, #341\] ; 0+d31 <[^>]+> -0[0-9a-f]+ <[^>]+> f81f 12aa ldrb\.w r1, \[pc, #-682\] ; 0+936 <[^>]+> -0[0-9a-f]+ <[^>]+> f81f 1155 ldrb\.w r1, \[pc, #-341\] ; 0+a8f <[^>]+> -0[0-9a-f]+ <[^>]+> f99f 12aa ldrsb\.w r1, \[pc, #682\] ; 0+e92 <[^>]+> -0[0-9a-f]+ <[^>]+> f99f 1155 ldrsb\.w r1, \[pc, #341\] ; 0+d41 <[^>]+> -0[0-9a-f]+ <[^>]+> f91f 12aa ldrsb\.w r1, \[pc, #-682\] ; 0+946 <[^>]+> -0[0-9a-f]+ <[^>]+> f91f 1155 ldrsb\.w r1, \[pc, #-341\] ; 0+a9f <[^>]+> -0[0-9a-f]+ <[^>]+> f8bf 12aa ldrh\.w r1, \[pc, #682\] ; 0+ea2 <[^>]+> -0[0-9a-f]+ <[^>]+> f8bf 1155 ldrh\.w r1, \[pc, #341\] ; 0+d51 <[^>]+> -0[0-9a-f]+ <[^>]+> f83f 12aa ldrh\.w r1, \[pc, #-682\] ; 0+956 <[^>]+> -0[0-9a-f]+ <[^>]+> f83f 1155 ldrh\.w r1, \[pc, #-341\] ; 0+aaf <[^>]+> -0[0-9a-f]+ <[^>]+> f9bf 12aa ldrsh\.w r1, \[pc, #682\] ; 0+eb2 <[^>]+> -0[0-9a-f]+ <[^>]+> f9bf 1155 ldrsh\.w r1, \[pc, #341\] ; 0+d61 <[^>]+> -0[0-9a-f]+ <[^>]+> f93f 12aa ldrsh\.w r1, \[pc, #-682\] ; 0+966 <[^>]+> -0[0-9a-f]+ <[^>]+> f93f 1155 ldrsh\.w r1, \[pc, #-341\] ; 0+abf <[^>]+> -0[0-9a-f]+ <[^>]+> f8df 12aa ldr\.w r1, \[pc, #682\] ; 0+ec2 <[^>]+> -0[0-9a-f]+ <[^>]+> f8df 1155 ldr\.w r1, \[pc, #341\] ; 0+d71 <[^>]+> -0[0-9a-f]+ <[^>]+> f85f 12aa ldr\.w r1, \[pc, #-682\] ; 0+976 <[^>]+> -0[0-9a-f]+ <[^>]+> f85f 1155 ldr\.w r1, \[pc, #-341\] ; 0+acf <[^>]+> +0[0-9a-f]+ <[^>]+> f89f 12aa ldrb\.w r1, \[pc, #682\] ; 0+e8a <[^>]+> +0[0-9a-f]+ <[^>]+> f89f 1155 ldrb\.w r1, \[pc, #341\] ; 0+d39 <[^>]+> +0[0-9a-f]+ <[^>]+> f81f 12aa ldrb\.w r1, \[pc, #-682\] ; 0+93e <[^>]+> +0[0-9a-f]+ <[^>]+> f81f 1155 ldrb\.w r1, \[pc, #-341\] ; 0+a97 <[^>]+> +0[0-9a-f]+ <[^>]+> f99f 12aa ldrsb\.w r1, \[pc, #682\] ; 0+e9a <[^>]+> +0[0-9a-f]+ <[^>]+> f99f 1155 ldrsb\.w r1, \[pc, #341\] ; 0+d49 <[^>]+> +0[0-9a-f]+ <[^>]+> f91f 12aa ldrsb\.w r1, \[pc, #-682\] ; 0+94e <[^>]+> +0[0-9a-f]+ <[^>]+> f91f 1155 ldrsb\.w r1, \[pc, #-341\] ; 0+aa7 <[^>]+> +0[0-9a-f]+ <[^>]+> f8bf 12aa ldrh\.w r1, \[pc, #682\] ; 0+eaa <[^>]+> +0[0-9a-f]+ <[^>]+> f8bf 1155 ldrh\.w r1, \[pc, #341\] ; 0+d59 <[^>]+> +0[0-9a-f]+ <[^>]+> f83f 12aa ldrh\.w r1, \[pc, #-682\] ; 0+95e <[^>]+> +0[0-9a-f]+ <[^>]+> f83f 1155 ldrh\.w r1, \[pc, #-341\] ; 0+ab7 <[^>]+> +0[0-9a-f]+ <[^>]+> f9bf 12aa ldrsh\.w r1, \[pc, #682\] ; 0+eba <[^>]+> +0[0-9a-f]+ <[^>]+> f9bf 1155 ldrsh\.w r1, \[pc, #341\] ; 0+d69 <[^>]+> +0[0-9a-f]+ <[^>]+> f93f 12aa ldrsh\.w r1, \[pc, #-682\] ; 0+96e <[^>]+> +0[0-9a-f]+ <[^>]+> f93f 1155 ldrsh\.w r1, \[pc, #-341\] ; 0+ac7 <[^>]+> +0[0-9a-f]+ <[^>]+> f8df 12aa ldr\.w r1, \[pc, #682\] ; 0+eca <[^>]+> +0[0-9a-f]+ <[^>]+> f8df 1155 ldr\.w r1, \[pc, #341\] ; 0+d79 <[^>]+> +0[0-9a-f]+ <[^>]+> f85f 12aa ldr\.w r1, \[pc, #-682\] ; 0+97e <[^>]+> +0[0-9a-f]+ <[^>]+> f85f 1155 ldr\.w r1, \[pc, #-341\] ; 0+ad7 <[^>]+> 0[0-9a-f]+ <[^>]+> f200 0900 addw r9, r0, #0 0[0-9a-f]+ <[^>]+> f60f 76ff addw r6, pc, #4095 ; 0xfff 0[0-9a-f]+ <[^>]+> f6a9 2685 subw r6, r9, #2693 ; 0xa85 diff --git a/gas/testsuite/gas/arm/thumb32.l b/gas/testsuite/gas/arm/thumb32.l index 71f4610..a439484 100644 --- a/gas/testsuite/gas/arm/thumb32.l +++ b/gas/testsuite/gas/arm/thumb32.l @@ -1,17 +1,17 @@ [^;]*: Assembler messages: -[^;]*:448: Warning: s suffix on comparison instruction is deprecated -[^;]*:448: Warning: s suffix on comparison instruction is deprecated -[^;]*:448: Warning: s suffix on comparison instruction is deprecated -[^;]*:448: Warning: s suffix on comparison instruction is deprecated -[^;]*:449: Warning: s suffix on comparison instruction is deprecated -[^;]*:449: Warning: s suffix on comparison instruction is deprecated -[^;]*:449: Warning: s suffix on comparison instruction is deprecated -[^;]*:449: Warning: s suffix on comparison instruction is deprecated -[^;]*:450: Warning: s suffix on comparison instruction is deprecated -[^;]*:450: Warning: s suffix on comparison instruction is deprecated -[^;]*:450: Warning: s suffix on comparison instruction is deprecated -[^;]*:450: Warning: s suffix on comparison instruction is deprecated [^;]*:451: Warning: s suffix on comparison instruction is deprecated [^;]*:451: Warning: s suffix on comparison instruction is deprecated [^;]*:451: Warning: s suffix on comparison instruction is deprecated [^;]*:451: Warning: s suffix on comparison instruction is deprecated +[^;]*:452: Warning: s suffix on comparison instruction is deprecated +[^;]*:452: Warning: s suffix on comparison instruction is deprecated +[^;]*:452: Warning: s suffix on comparison instruction is deprecated +[^;]*:452: Warning: s suffix on comparison instruction is deprecated +[^;]*:453: Warning: s suffix on comparison instruction is deprecated +[^;]*:453: Warning: s suffix on comparison instruction is deprecated +[^;]*:453: Warning: s suffix on comparison instruction is deprecated +[^;]*:453: Warning: s suffix on comparison instruction is deprecated +[^;]*:454: Warning: s suffix on comparison instruction is deprecated +[^;]*:454: Warning: s suffix on comparison instruction is deprecated +[^;]*:454: Warning: s suffix on comparison instruction is deprecated +[^;]*:454: Warning: s suffix on comparison instruction is deprecated diff --git a/gas/testsuite/gas/arm/thumb32.s b/gas/testsuite/gas/arm/thumb32.s index 8312351..baae71f 100644 --- a/gas/testsuite/gas/arm/thumb32.s +++ b/gas/testsuite/gas/arm/thumb32.s @@ -371,14 +371,17 @@ ldst: pld 1f pld 1b 1: - + nop +here: ldrd r2, r3, [r5] ldrd r2, [r5, #0x30] ldrd r2, [r5, #-0x30] + ldrd r4, r5, here strd r2, r3, [r5] strd r2, [r5, #0x30] strd r2, [r5, #-0x30] - + strd r2, r3, here + ldrbt r1, [r5] ldrbt r1, [r5, #0x30] ldrsbt r1, [r5] diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index b41a624..37151f9 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2011-04-12 Nick Clifton <nickc@redhat.com> + + PR binutils/12534 + * arm-dis.c (thumb32_opcodes): Add %L suffix to LDRD and STRD insn + patterns. + (print_insn_thumb32): Handle %L. + 2011-04-11 Julian Brown <julian@codesourcery.com> * arm-dis.c (psr_name): Fix typo for BASEPRI_MAX. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index b624ac5..c8b090b 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -1336,6 +1336,7 @@ static const struct opcode16 thumb_opcodes[] = %H print a 16-bit immediate from hw2[3:0],hw1[11:0] %S print a possibly-shifted Rm + %L print address for a ldrd/strd instruction %a print the address of a plain load/store %w print the width and signedness of a core load/store %m print register mask for ldm/stm @@ -1564,10 +1565,10 @@ static const struct opcode32 thumb32_opcodes[] = {ARM_EXT_V6T2, 0xe9100000, 0xffd00000, "ldmdb%c\t%16-19r%21'!, %m"}, {ARM_EXT_V6T2, 0xe9c00000, 0xffd000ff, "strd%c\t%12-15r, %8-11r, [%16-19r]"}, {ARM_EXT_V6T2, 0xe9d00000, 0xffd000ff, "ldrd%c\t%12-15r, %8-11r, [%16-19r]"}, - {ARM_EXT_V6T2, 0xe9400000, 0xff500000, "strd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!"}, - {ARM_EXT_V6T2, 0xe9500000, 0xff500000, "ldrd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!"}, - {ARM_EXT_V6T2, 0xe8600000, 0xff700000, "strd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W"}, - {ARM_EXT_V6T2, 0xe8700000, 0xff700000, "ldrd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W"}, + {ARM_EXT_V6T2, 0xe9400000, 0xff500000, "strd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!%L"}, + {ARM_EXT_V6T2, 0xe9500000, 0xff500000, "ldrd%c\t%12-15r, %8-11r, [%16-19r, #%23`-%0-7W]%21'!%L"}, + {ARM_EXT_V6T2, 0xe8600000, 0xff700000, "strd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W%L"}, + {ARM_EXT_V6T2, 0xe8700000, 0xff700000, "ldrd%c\t%12-15r, %8-11r, [%16-19r], #%23`-%0-7W%L"}, {ARM_EXT_V6T2, 0xf8000000, 0xff100000, "str%w%c.w\t%12-15r, %a"}, {ARM_EXT_V6T2, 0xf8100000, 0xfe100000, "ldr%w%c.w\t%12-15r, %a"}, @@ -4285,6 +4286,21 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) } break; + case 'L': + /* PR binutils/12534 + If we have a PC relative offset in an LDRD or STRD + instructions then display the decoded address. */ + if (((given >> 16) & 0xf) == 0xf) + { + bfd_vma offset = (given & 0xff) * 4; + + if ((given & (1 << 23)) == 0) + offset = - offset; + func (stream, "\t; "); + info->print_address_func ((pc & ~3) + 4 + offset, info); + } + break; + default: abort (); } |