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| author | Ian Carmichael <iancarm@cygnus> | 1998-01-22 20:48:22 +0000 |
|---|---|---|
| committer | Ian Carmichael <iancarm@cygnus> | 1998-01-22 20:48:22 +0000 |
| commit | 34cf4e9aa6216b34ccdc2c0319557555f5743f23 (patch) | |
| tree | 5aa59883011e06f0483788ba343fbec5cd40c88d | |
| parent | 6720fa27e37ed0f3d6901e169362c1de1d07340b (diff) | |
| download | gdb-34cf4e9aa6216b34ccdc2c0319557555f5743f23.zip gdb-34cf4e9aa6216b34ccdc2c0319557555f5743f23.tar.gz gdb-34cf4e9aa6216b34ccdc2c0319557555f5743f23.tar.bz2 | |
* Incorporate GPR_SET() macro from mips/sim-main.h
| -rw-r--r-- | sim/txvu/sim-main.h | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/sim/txvu/sim-main.h b/sim/txvu/sim-main.h index aa0928a..b41af56 100644 --- a/sim/txvu/sim-main.h +++ b/sim/txvu/sim-main.h @@ -376,6 +376,7 @@ struct _sim_cpu { #define REGISTERS ((STATE_CPU (sd,0))->registers) #define GPR (®ISTERS[0]) +#define GPR_SET(N,VAL) (REGISTERS[(N)] = (VAL)) #define FGRIDX (38) #define FGR (®ISTERS[FGRIDX]) #define LO (REGISTERS[33]) @@ -431,8 +432,6 @@ struct _sim_cpu { #define PENDING_SLOT_REG ((STATE_CPU (sd, 0))->pending_slot_reg) #define PENDING_SLOT_VALUE ((STATE_CPU (sd, 0))->pending_slot_value) -#if 0 - /* The following are not used for MIPS IV onwards: */ #define PENDING_FILL(r,v) {\ /* printf("DBG: FILL BEFORE pending_in = %d, pending_out = %d, pending_total = %d\n",PENDING_IN,PENDING_OUT,PENDING_TOTAL); */\ @@ -448,7 +447,6 @@ struct _sim_cpu { PENDING_IN = 0;\ /*printf("DBG: FILL AFTER pending_in = %d, pending_out = %d, pending_total = %d\n",PENDING_IN,PENDING_OUT,PENDING_TOTAL);*/\ } -#endif /* LLBIT = Load-Linked bit. A bit of "virtual" state used by atomic |