include/opcode/

	* ppc.h (ppc_parse_cpu): Update prototype.
opcodes/
	* ppc-dis.c (ppc_parse_cpu): Add "sticky" param.  Track bits
	set from ppc_opts.sticky in it.  Delete "retain_mask".
	(powerpc_init_dialect): Choose default dialect from info->mach
	before parsing -M options.  Handle more bfd_mach_ppc variants.
	Update common default to power7.
gas/
	* config/tc-ppc.c (sticky): New var.
	(md_parse_option, ppc_machine): Update ppc_parse_cpu calls.
gas/testsuite/
	* gas/ppc/astest2.d: Pass -Mppc to objdump.
ld/testsuite/
	* ld-powerpc/plt1.d: Update for default "at" branch hints.
	* ld-powerpc/tlsexe.d: Likewise.
	* ld-powerpc/tlsexetoc.d: Likewise.
	* ld-powerpc/tlsopt1.d: Likewise.
	* ld-powerpc/tlsopt1_32.d: Likewise.
	* ld-powerpc/tlsopt2.d: Likewise.
	* ld-powerpc/tlsopt2_32.d: Likewise.
	* ld-powerpc/tlsopt4.d: Likewise.
	* ld-powerpc/tlsopt4_32.d: Likewise.
	* ld-powerpc/tlsso.d: Likewise.
	* ld-powerpc/tlstocso.d: Likewise.

20 files changed, 121 insertions, 41 deletions

diff --git a/gas/ChangeLog b/gas/ChangeLog
index 184d306..a56c7d6 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,8 @@
+2012-11-23  Alan Modra  <amodra@gmail.com>
+
+	* config/tc-ppc.c (sticky): New var.
+	(md_parse_option, ppc_machine): Update ppc_parse_cpu calls.
+
 2012-11-21  Edgar E. Iglesias <edgar.iglesias@gmail.com>
 
 	* config/tc-microblaze.c (parse_reg): Parse REG_SLR, REG_SHR
diff --git a/gas/config/tc-ppc.c b/gas/config/tc-ppc.c
index de13ab1..e9df056 100644
--- a/gas/config/tc-ppc.c
+++ b/gas/config/tc-ppc.c
@@ -223,6 +223,7 @@ unsigned long nop_limit = 4;
 /* The type of processor we are assembling for.  This is one or more
    of the PPC_OPCODE flags defined in opcode/ppc.h.  */
 ppc_cpu_t ppc_cpu = 0;
+ppc_cpu_t sticky = 0;
 
 /* Flags set on encountering toc relocs.  */
 enum {
@@ -1160,7 +1161,7 @@ md_parse_option (int c, char *arg)
       break;
 
     case 'm':
-      new_cpu = ppc_parse_cpu (ppc_cpu, arg);
+      new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
       if (new_cpu != 0)
 	{
 	  ppc_cpu = new_cpu;
@@ -4863,7 +4864,7 @@ ppc_machine (int ignore ATTRIBUTE_UNUSED)
 	  else
 	    ppc_cpu = cpu_history[--curr_hist];
 	}
-      else if ((new_cpu = ppc_parse_cpu (ppc_cpu, cpu_string)) != 0)
+      else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
 	ppc_cpu = new_cpu;
       else
 	as_bad (_("invalid machine `%s'"), cpu_string);
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 2661ff4..963ed8f 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2012-11-23  Alan Modra  <amodra@gmail.com>
+
+	* gas/ppc/astest2.d: Pass -Mppc to objdump.
+
 2012-11-21  David Holsgrove  <david.holsgrove@xilinx.com>
 
 	* gas/microblaze/allinsn.s: Add swapb, swaph
diff --git a/gas/testsuite/gas/ppc/astest2.d b/gas/testsuite/gas/ppc/astest2.d
index ddbd952..972b9a5 100644
--- a/gas/testsuite/gas/ppc/astest2.d
+++ b/gas/testsuite/gas/ppc/astest2.d
@@ -1,4 +1,4 @@
-#objdump: -Dr
+#objdump: -Dr -Mppc
 #name: PowerPC test 2
 
 .*
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 5e77fbd..22b5c63 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,7 @@
+2012-11-23  Alan Modra  <amodra@gmail.com>
+
+	* ppc.h (ppc_parse_cpu): Update prototype.
+
 2012-10-14  John David Anglin  <dave.anglin@nrc-cnrc.gc.ca>
 
 	* hppa.h (pa_opcodes): Use "cX" completer instead of "cx" in fstqx
diff --git a/include/opcode/ppc.h b/include/opcode/ppc.h
index 2e789d6..e57b118 100644
--- a/include/opcode/ppc.h
+++ b/include/opcode/ppc.h
@@ -400,6 +400,6 @@ struct powerpc_macro
 extern const struct powerpc_macro powerpc_macros[];
 extern const int powerpc_num_macros;
 
-extern ppc_cpu_t ppc_parse_cpu (ppc_cpu_t, const char *);
+extern ppc_cpu_t ppc_parse_cpu (ppc_cpu_t, ppc_cpu_t *, const char *);
 
 #endif /* PPC_H */
diff --git a/ld/testsuite/ChangeLog b/ld/testsuite/ChangeLog
index 72d8445..c7ea4d7 100644
--- a/ld/testsuite/ChangeLog
+++ b/ld/testsuite/ChangeLog
@@ -1,3 +1,17 @@
+2012-11-23  Alan Modra  <amodra@gmail.com>
+
+	* ld-powerpc/plt1.d: Update for default "at" branch hints.
+	* ld-powerpc/tlsexe.d: Likewise.
+	* ld-powerpc/tlsexetoc.d: Likewise.
+	* ld-powerpc/tlsopt1.d: Likewise.
+	* ld-powerpc/tlsopt1_32.d: Likewise.
+	* ld-powerpc/tlsopt2.d: Likewise.
+	* ld-powerpc/tlsopt2_32.d: Likewise.
+	* ld-powerpc/tlsopt4.d: Likewise.
+	* ld-powerpc/tlsopt4_32.d: Likewise.
+	* ld-powerpc/tlsso.d: Likewise.
+	* ld-powerpc/tlstocso.d: Likewise.
+
 2012-11-21  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR binutils/14493
diff --git a/ld/testsuite/ld-powerpc/plt1.d b/ld/testsuite/ld-powerpc/plt1.d
index 98851a2..7361702 100644
--- a/ld/testsuite/ld-powerpc/plt1.d
+++ b/ld/testsuite/ld-powerpc/plt1.d
@@ -8,7 +8,7 @@
 Disassembly of section .text:
 
 0+ <_start>:
-   0:	(42 9f 00 05|05 00 9f 42) 	bcl-    20,4\*cr7\+so,4 .*
+   0:	(42 9f 00 05|05 00 9f 42) 	bcl     20,4\*cr7\+so,4 .*
    4:	(7f c8 02 a6|a6 02 c8 7f) 	mflr    r30
    8:	(3f de 00 00|00 00 de 3f) 	addis   r30,r30,0
 			(a|8): R_PPC_REL16_HA	_GLOBAL_OFFSET_TABLE_\+0x(6|4)
diff --git a/ld/testsuite/ld-powerpc/tlsexe.d b/ld/testsuite/ld-powerpc/tlsexe.d
index 7b374c0..01796df 100644
--- a/ld/testsuite/ld-powerpc/tlsexe.d
+++ b/ld/testsuite/ld-powerpc/tlsexe.d
@@ -71,7 +71,7 @@ Disassembly of section \.text:
 .*	(00 01 02 00|00 00 00 00) .*
 .* <__glink_PLTresolve>:
 .*	(7d 88 02 a6|a6 02 88 7d) 	mflr    r12
-.*	(42 9f 00 05|05 00 9f 42) 	bcl-    20,4\*cr7\+so,.*
+.*	(42 9f 00 05|05 00 9f 42) 	bcl     20,4\*cr7\+so,.*
 .*	(7d 68 02 a6|a6 02 68 7d) 	mflr    r11
 .*	(e8 4b ff f0|f0 ff 4b e8) 	ld      r2,-16\(r11\)
 .*	(7d 88 03 a6|a6 03 88 7d) 	mtlr    r12
diff --git a/ld/testsuite/ld-powerpc/tlsexetoc.d b/ld/testsuite/ld-powerpc/tlsexetoc.d
index cdfeaa6..48bde59 100644
--- a/ld/testsuite/ld-powerpc/tlsexetoc.d
+++ b/ld/testsuite/ld-powerpc/tlsexetoc.d
@@ -55,7 +55,7 @@ Disassembly of section \.text:
 .*	(00 01 02 28|00 00 00 00) .*
 .* <__glink_PLTresolve>:
 .*	(7d 88 02 a6|a6 02 88 7d) 	mflr    r12
-.*	(42 9f 00 05|05 00 9f 42) 	bcl-    20,4\*cr7\+so,.*
+.*	(42 9f 00 05|05 00 9f 42) 	bcl     20,4\*cr7\+so,.*
 .*	(7d 68 02 a6|a6 02 68 7d) 	mflr    r11
 .*	(e8 4b ff f0|f0 ff 4b e8) 	ld      r2,-16\(r11\)
 .*	(7d 88 03 a6|a6 03 88 7d) 	mtlr    r12
diff --git a/ld/testsuite/ld-powerpc/tlsopt1.d b/ld/testsuite/ld-powerpc/tlsopt1.d
index 4d57c35..df50d77 100644
--- a/ld/testsuite/ld-powerpc/tlsopt1.d
+++ b/ld/testsuite/ld-powerpc/tlsopt1.d
@@ -17,7 +17,7 @@ Disassembly of section \.no_opt1:
 0+100000ec <\.no_opt1>:
 .*:	(38 62 80 08|08 80 62 38) 	addi    r3,r2,-32760
 .*:	(2c 24 00 00|00 00 24 2c) 	cmpdi   r4,0
-.*:	(41 82 00 10|10 00 82 41) 	beq-    .*
+.*:	(41 82 00 10|10 00 82 41) 	beq     .*
 .*:	(4b ff ff f1|f1 ff ff 4b) 	bl      100000e8 <\.__tls_get_addr>
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(48 00 00 0c|0c 00 00 48) 	b       .*
diff --git a/ld/testsuite/ld-powerpc/tlsopt1_32.d b/ld/testsuite/ld-powerpc/tlsopt1_32.d
index 07a559e..ec9c7ca 100644
--- a/ld/testsuite/ld-powerpc/tlsopt1_32.d
+++ b/ld/testsuite/ld-powerpc/tlsopt1_32.d
@@ -17,7 +17,7 @@ Disassembly of section \.no_opt1:
 0+1800098 <\.no_opt1>:
 .*:	(38 6d ff f4|f4 ff 6d 38) 	addi    r3,r13,-12
 .*:	(2c 04 00 00|00 00 04 2c) 	cmpwi   r4,0
-.*:	(41 82 00 0c|0c 00 82 41) 	beq-    .*
+.*:	(41 82 00 0c|0c 00 82 41) 	beq     .*
 .*:	(4b ff ff f1|f1 ff ff 4b) 	bl      1800094 <__tls_get_addr>
 .*:	(48 00 00 08|08 00 00 48) 	b       .*
 .*:	(4b ff ff e9|e9 ff ff 4b) 	bl      1800094 <__tls_get_addr>
diff --git a/ld/testsuite/ld-powerpc/tlsopt2.d b/ld/testsuite/ld-powerpc/tlsopt2.d
index af6464c..73a9b87 100644
--- a/ld/testsuite/ld-powerpc/tlsopt2.d
+++ b/ld/testsuite/ld-powerpc/tlsopt2.d
@@ -17,7 +17,7 @@ Disassembly of section \.no_opt2:
 0+100000ec <\.no_opt2>:
 .*:	(38 62 80 08|08 80 62 38) 	addi    r3,r2,-32760
 .*:	(2c 24 00 00|00 00 24 2c) 	cmpdi   r4,0
-.*:	(41 82 00 08|08 00 82 41) 	beq-    .*
+.*:	(41 82 00 08|08 00 82 41) 	beq     .*
 .*:	(38 62 80 08|08 80 62 38) 	addi    r3,r2,-32760
 .*:	(4b ff ff ed|ed ff ff 4b) 	bl      100000e8 <\.__tls_get_addr>
 .*:	(60 00 00 00|00 00 00 60) 	nop
diff --git a/ld/testsuite/ld-powerpc/tlsopt2_32.d b/ld/testsuite/ld-powerpc/tlsopt2_32.d
index 9bde3c5..baffe91 100644
--- a/ld/testsuite/ld-powerpc/tlsopt2_32.d
+++ b/ld/testsuite/ld-powerpc/tlsopt2_32.d
@@ -17,7 +17,7 @@ Disassembly of section \.no_opt2:
 0+1800098 <\.no_opt2>:
 .*:	(38 6d ff f4|f4 ff 6d 38) 	addi    r3,r13,-12
 .*:	(2c 04 00 00|00 00 04 2c) 	cmpwi   r4,0
-.*:	(41 82 00 08|08 00 82 41) 	beq-    .*
+.*:	(41 82 00 08|08 00 82 41) 	beq     .*
 .*:	(38 6d ff f4|f4 ff 6d 38) 	addi    r3,r13,-12
 .*:	(4b ff ff ed|ed ff ff 4b) 	bl      1800094 <__tls_get_addr>
 #pass
diff --git a/ld/testsuite/ld-powerpc/tlsopt4.d b/ld/testsuite/ld-powerpc/tlsopt4.d
index e27c8ca..944e97f 100644
--- a/ld/testsuite/ld-powerpc/tlsopt4.d
+++ b/ld/testsuite/ld-powerpc/tlsopt4.d
@@ -17,7 +17,7 @@ Disassembly of section \.opt1:
 0+100000ec <\.opt1>:
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(2c 24 00 00|00 00 24 2c) 	cmpdi   r4,0
-.*:	(41 82 00 10|10 00 82 41) 	beq-    .*
+.*:	(41 82 00 10|10 00 82 41) 	beq     .*
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
 .*:	(48 00 00 0c|0c 00 00 48) 	b       .*
@@ -29,7 +29,7 @@ Disassembly of section \.opt2:
 0+1000010c <\.opt2>:
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(2c 24 00 00|00 00 24 2c) 	cmpdi   r4,0
-.*:	(41 82 00 08|08 00 82 41) 	beq-    .*
+.*:	(41 82 00 08|08 00 82 41) 	beq     .*
 .*:	(3c 6d 00 00|00 00 6d 3c) 	addis   r3,r13,0
 .*:	(60 00 00 00|00 00 00 60) 	nop
 .*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
diff --git a/ld/testsuite/ld-powerpc/tlsopt4_32.d b/ld/testsuite/ld-powerpc/tlsopt4_32.d
index f62a0ea..59c0a6a 100644
--- a/ld/testsuite/ld-powerpc/tlsopt4_32.d
+++ b/ld/testsuite/ld-powerpc/tlsopt4_32.d
@@ -17,7 +17,7 @@ Disassembly of section \.opt1:
 0+1800098 <\.opt1>:
 .*:	(3c 62 00 00|00 00 62 3c) 	addis   r3,r2,0
 .*:	(2c 04 00 00|00 00 04 2c) 	cmpwi   r4,0
-.*:	(41 82 00 0c|0c 00 82 41) 	beq-    .*
+.*:	(41 82 00 0c|0c 00 82 41) 	beq     .*
 .*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
 .*:	(48 00 00 08|08 00 00 48) 	b       .*
 .*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
@@ -27,7 +27,7 @@ Disassembly of section \.opt2:
 0+18000b0 <\.opt2>:
 .*:	(3c 62 00 00|00 00 62 3c) 	addis   r3,r2,0
 .*:	(2c 04 00 00|00 00 04 2c) 	cmpwi   r4,0
-.*:	(41 82 00 08|08 00 82 41) 	beq-    .*
+.*:	(41 82 00 08|08 00 82 41) 	beq     .*
 .*:	(3c 62 00 00|00 00 62 3c) 	addis   r3,r2,0
 .*:	(38 63 90 10|10 90 63 38) 	addi    r3,r3,-28656
 
diff --git a/ld/testsuite/ld-powerpc/tlsso.d b/ld/testsuite/ld-powerpc/tlsso.d
index 21449a7..38c7d95 100644
--- a/ld/testsuite/ld-powerpc/tlsso.d
+++ b/ld/testsuite/ld-powerpc/tlsso.d
@@ -59,7 +59,7 @@ Disassembly of section \.text:
 .*	(00 01 02 20|00 00 00 00) .*
 .* <__glink_PLTresolve>:
 .*	(7d 88 02 a6|a6 02 88 7d) 	mflr    r12
-.*	(42 9f 00 05|05 00 9f 42) 	bcl-    20,4\*cr7\+so,.*
+.*	(42 9f 00 05|05 00 9f 42) 	bcl     20,4\*cr7\+so,.*
 .*	(7d 68 02 a6|a6 02 68 7d) 	mflr    r11
 .*	(e8 4b ff f0|f0 ff 4b e8) 	ld      r2,-16\(r11\)
 .*	(7d 88 03 a6|a6 03 88 7d) 	mtlr    r12
diff --git a/ld/testsuite/ld-powerpc/tlstocso.d b/ld/testsuite/ld-powerpc/tlstocso.d
index 5163266..32c1682 100644
--- a/ld/testsuite/ld-powerpc/tlstocso.d
+++ b/ld/testsuite/ld-powerpc/tlstocso.d
@@ -43,7 +43,7 @@ Disassembly of section \.text:
 .*	(00 01 02 18|00 00 00 00) .*
 .* <__glink_PLTresolve>:
 .*	(7d 88 02 a6|a6 02 88 7d) 	mflr    r12
-.*	(42 9f 00 05|05 00 9f 42) 	bcl-    20,4\*cr7\+so,.*
+.*	(42 9f 00 05|05 00 9f 42) 	bcl     20,4\*cr7\+so,.*
 .*	(7d 68 02 a6|a6 02 68 7d) 	mflr    r11
 .*	(e8 4b ff f0|f0 ff 4b e8) 	ld      r2,-16\(r11\)
 .*	(7d 88 03 a6|a6 03 88 7d) 	mtlr    r12
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ed74935..8a4634d 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,11 @@
+2012-11-23  Alan Modra  <amodra@gmail.com>
+
+	* ppc-dis.c (ppc_parse_cpu): Add "sticky" param.  Track bits
+	set from ppc_opts.sticky in it.  Delete "retain_mask".
+	(powerpc_init_dialect): Choose default dialect from info->mach
+	before parsing -M options.  Handle more bfd_mach_ppc variants.
+	Update common default to power7.
+
 2012-11-21  David Holsgrove  <david.holsgrove@xilinx.com>
 
 	* microblaze-opc.h (op_code_struct): Add swapb, swaph Increase MAX_OPCODES.
diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c
index 03b3160..41dce27 100644
--- a/opcodes/ppc-dis.c
+++ b/opcodes/ppc-dis.c
@@ -211,13 +211,8 @@ get_powerpc_dialect (struct disassemble_info *info)
 /* Handle -m and -M options that set cpu type, and .machine arg.  */
 
 ppc_cpu_t
-ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)
+ppc_parse_cpu (ppc_cpu_t ppc_cpu, ppc_cpu_t *sticky, const char *arg)
 {
-  const ppc_cpu_t retain_mask = (PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
-				 | PPC_OPCODE_SPE | PPC_OPCODE_ANY
-				 | PPC_OPCODE_VLE | PPC_OPCODE_PMR);
-  /* Sticky bits.  */
-  ppc_cpu_t retain_flags = ppc_cpu & retain_mask;
   unsigned int i;
 
   for (i = 0; i < sizeof (ppc_opts) / sizeof (ppc_opts[0]); i++)
@@ -225,8 +220,8 @@ ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)
       {
 	if (ppc_opts[i].sticky)
 	  {
-	    retain_flags |= ppc_opts[i].sticky;
-	    if ((ppc_cpu & ~retain_mask) != 0)
+	    *sticky |= ppc_opts[i].sticky;
+	    if ((ppc_cpu & ~*sticky) != 0)
 	      break;
 	  }
 	ppc_cpu = ppc_opts[i].cpu;
@@ -235,7 +230,7 @@ ppc_parse_cpu (ppc_cpu_t ppc_cpu, const char *arg)
   if (i >= sizeof (ppc_opts) / sizeof (ppc_opts[0]))
     return 0;
 
-  ppc_cpu |= retain_flags;
+  ppc_cpu |= *sticky;
   return ppc_cpu;
 }
 
@@ -245,12 +240,75 @@ static void
 powerpc_init_dialect (struct disassemble_info *info)
 {
   ppc_cpu_t dialect = 0;
+  ppc_cpu_t sticky = 0;
   char *arg;
   struct dis_private *priv = calloc (sizeof (*priv), 1);
 
   if (priv == NULL)
     priv = &private;
 
+  switch (info->mach)
+    {
+    case bfd_mach_ppc_403:
+    case bfd_mach_ppc_403gc:
+      dialect = (PPC_OPCODE_PPC | PPC_OPCODE_403);
+      break;
+    case bfd_mach_ppc_405:
+      dialect = (PPC_OPCODE_PPC | PPC_OPCODE_403 | PPC_OPCODE_405);
+      break;
+    case bfd_mach_ppc_601:
+      dialect = (PPC_OPCODE_PPC | PPC_OPCODE_601);
+      break;
+    case bfd_mach_ppc_a35:
+    case bfd_mach_ppc_rs64ii:
+    case bfd_mach_ppc_rs64iii:
+      dialect = (PPC_OPCODE_POWER | PPC_OPCODE_POWER2 | PPC_OPCODE_64);
+      break;
+    case bfd_mach_ppc_e500:
+      dialect = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_SPE
+		 | PPC_OPCODE_ISEL | PPC_OPCODE_EFS | PPC_OPCODE_BRLOCK
+		 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+		 | PPC_OPCODE_E500);
+      break;
+    case bfd_mach_ppc_e500mc:
+      dialect = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
+		 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+		 | PPC_OPCODE_E500MC);
+      break;
+    case bfd_mach_ppc_e500mc64:
+      dialect = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
+		 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+		 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER5
+		 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7);
+      break;
+    case bfd_mach_ppc_e5500:
+      dialect = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
+		 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+		 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_POWER4
+		 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+		 | PPC_OPCODE_POWER7);
+      break;
+    case bfd_mach_ppc_e6500:
+      dialect = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_ISEL
+		 | PPC_OPCODE_PMR | PPC_OPCODE_CACHELCK | PPC_OPCODE_RFMCI
+		 | PPC_OPCODE_E500MC | PPC_OPCODE_64 | PPC_OPCODE_ALTIVEC
+		 | PPC_OPCODE_ALTIVEC2 | PPC_OPCODE_E6500 | PPC_OPCODE_POWER4
+		 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_POWER7);
+      break;
+    case bfd_mach_ppc_titan:
+      dialect = (PPC_OPCODE_PPC | PPC_OPCODE_BOOKE | PPC_OPCODE_PMR
+		 | PPC_OPCODE_RFMCI | PPC_OPCODE_TITAN);
+      break;
+    case bfd_mach_ppc_vle:
+      dialect = (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_VLE);
+      break;
+    default:
+      dialect = (PPC_OPCODE_PPC | PPC_OPCODE_ISEL | PPC_OPCODE_64
+		 | PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+		 | PPC_OPCODE_POWER7 | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX
+		 | PPC_OPCODE_ANY);
+    }
+
   arg = info->disassembler_options;
   while (arg != NULL)
     {
@@ -260,7 +318,7 @@ powerpc_init_dialect (struct disassemble_info *info)
       if (end != NULL)
 	*end = 0;
 
-      if ((new_cpu = ppc_parse_cpu (dialect, arg)) != 0)
+      if ((new_cpu = ppc_parse_cpu (dialect, &sticky, arg)) != 0)
 	dialect = new_cpu;
       else if (strcmp (arg, "32") == 0)
 	dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
@@ -274,20 +332,6 @@ powerpc_init_dialect (struct disassemble_info *info)
       arg = end;
     }
 
-  if ((dialect & ~(ppc_cpu_t) PPC_OPCODE_64) == 0)
-    {
-      if (info->mach == bfd_mach_ppc64)
-	dialect |= PPC_OPCODE_64;
-      else
-	dialect &= ~(ppc_cpu_t) PPC_OPCODE_64;
-      if (info->mach == bfd_mach_ppc_vle)
-        dialect |= PPC_OPCODE_PPC | PPC_OPCODE_VLE;
-      else
-        /* Choose a reasonable default.  */
-        dialect |= (PPC_OPCODE_PPC | PPC_OPCODE_COMMON | PPC_OPCODE_601
-		    | PPC_OPCODE_ALTIVEC);
-    }
-
   info->private_data = priv;
   POWERPC_DIALECT(info) = dialect;
 }