diff options
author | Richard Sandiford <rdsandiford@googlemail.com> | 2013-06-23 20:08:23 +0000 |
---|---|---|
committer | Richard Sandiford <rdsandiford@googlemail.com> | 2013-06-23 20:08:23 +0000 |
commit | 42429eacb42f0cc6dfe7fbd6d74a59e652945794 (patch) | |
tree | ef4905253809dfc1021442e57c5f8b49f837b51a | |
parent | 88924e5fa2eb37b464c88f9527ad9bfc63672e9d (diff) | |
download | gdb-42429eacb42f0cc6dfe7fbd6d74a59e652945794.zip gdb-42429eacb42f0cc6dfe7fbd6d74a59e652945794.tar.gz gdb-42429eacb42f0cc6dfe7fbd6d74a59e652945794.tar.bz2 |
bfd/
* Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Move MIPS ELF
files to...
(BFD64_BACKENDS, BFD64_BACKENDS_CFILES): ...here.
* Makefile.in: Regenerate.
* config.bfd: Enclose all MIPS ELF targets in #ifdef BFD64.
Set want64 to true for them at the end.
* targets.c (_bfd_target_vector): Protect MIPS ELF targets with
#ifdef BFD64.
gas/
* config/tc-mips.c: Assert that offsetT and valueT are at least
8 bytes in size.
(GPR_SMIN, GPR_SMAX): New macros.
(macro, mips_ip): Remove code for 4-byte valueT and offsetT.
ld/
* Makefile.am (ALL_EMULATION_SOURCES): Move MIPS ELF emulations to...
(ALL_64_EMULATION_SOURCES): ...here.
* Makefile.in: Regenerate.
-rw-r--r-- | bfd/ChangeLog | 11 | ||||
-rw-r--r-- | bfd/Makefile.am | 8 | ||||
-rw-r--r-- | bfd/Makefile.in | 8 | ||||
-rw-r--r-- | bfd/config.bfd | 34 | ||||
-rw-r--r-- | bfd/targets.c | 6 | ||||
-rw-r--r-- | gas/ChangeLog | 7 | ||||
-rw-r--r-- | gas/config/tc-mips.c | 79 | ||||
-rw-r--r-- | ld/ChangeLog | 6 | ||||
-rw-r--r-- | ld/Makefile.am | 44 | ||||
-rw-r--r-- | ld/Makefile.in | 44 |
10 files changed, 106 insertions, 141 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog index 8dd7dd1..f80ccef 100644 --- a/bfd/ChangeLog +++ b/bfd/ChangeLog @@ -1,3 +1,14 @@ +2013-06-23 Richard Sandiford <rdsandiford@googlemail.com> + + * Makefile.am (BFD32_BACKENDS, BFD32_BACKENDS_CFILES): Move MIPS ELF + files to... + (BFD64_BACKENDS, BFD64_BACKENDS_CFILES): ...here. + * Makefile.in: Regenerate. + * config.bfd: Enclose all MIPS ELF targets in #ifdef BFD64. + Set want64 to true for them at the end. + * targets.c (_bfd_target_vector): Protect MIPS ELF targets with + #ifdef BFD64. + 2013-06-22 Sandra Loosemore <sandra@codesourcery.com> * elf32-nios2.c (nios2_elf32_finish_dynamic_sections): Don't diff --git a/bfd/Makefile.am b/bfd/Makefile.am index 6efe20f..cacf7a3 100644 --- a/bfd/Makefile.am +++ b/bfd/Makefile.am @@ -346,7 +346,6 @@ BFD32_BACKENDS = \ elf32-mep.lo \ elf32-metag.lo \ elf32-microblaze.lo \ - elf32-mips.lo \ elf32-moxie.lo \ elf32-msp430.lo \ elf32-mt.lo \ @@ -375,7 +374,6 @@ BFD32_BACKENDS = \ elf32-xtensa.lo \ elf32.lo \ elflink.lo \ - elfxx-mips.lo \ elfxx-sparc.lo \ elfxx-tilegx.lo \ epoc-pe-arm.lo \ @@ -536,7 +534,6 @@ BFD32_BACKENDS_CFILES = \ elf32-mep.c \ elf32-metag.c \ elf32-microblaze.c \ - elf32-mips.c \ elf32-moxie.c \ elf32-msp430.c \ elf32-mt.c \ @@ -565,7 +562,6 @@ BFD32_BACKENDS_CFILES = \ elf32-xtensa.c \ elf32.c \ elflink.c \ - elfxx-mips.c \ elfxx-sparc.c \ elfxx-tilegx.c \ epoc-pe-arm.c \ @@ -650,6 +646,7 @@ BFD64_BACKENDS = \ coff64-rs6000.lo \ demo64.lo \ elf32-ia64.lo \ + elf32-mips.lo \ elf32-score.lo \ elf32-score7.lo \ elf64-alpha.lo \ @@ -668,6 +665,7 @@ BFD64_BACKENDS = \ elf64.lo \ elfn32-mips.lo \ elfxx-ia64.lo \ + elfxx-mips.lo \ mach-o-x86-64.lo \ mmo.lo \ nlm32-alpha.lo \ @@ -687,6 +685,7 @@ BFD64_BACKENDS_CFILES = \ coff-x86_64.c \ coff64-rs6000.c \ demo64.c \ + elf32-mips.c \ elf32-score.c \ elf32-score7.c \ elf64-alpha.c \ @@ -704,6 +703,7 @@ BFD64_BACKENDS_CFILES = \ elf64.c \ elfn32-mips.c \ elfxx-ia64.c \ + elfxx-mips.c \ mach-o-x86-64.c \ mmo.c \ nlm32-alpha.c \ diff --git a/bfd/Makefile.in b/bfd/Makefile.in index e54cf57..0463db6 100644 --- a/bfd/Makefile.in +++ b/bfd/Makefile.in @@ -648,7 +648,6 @@ BFD32_BACKENDS = \ elf32-mep.lo \ elf32-metag.lo \ elf32-microblaze.lo \ - elf32-mips.lo \ elf32-moxie.lo \ elf32-msp430.lo \ elf32-mt.lo \ @@ -677,7 +676,6 @@ BFD32_BACKENDS = \ elf32-xtensa.lo \ elf32.lo \ elflink.lo \ - elfxx-mips.lo \ elfxx-sparc.lo \ elfxx-tilegx.lo \ epoc-pe-arm.lo \ @@ -838,7 +836,6 @@ BFD32_BACKENDS_CFILES = \ elf32-mep.c \ elf32-metag.c \ elf32-microblaze.c \ - elf32-mips.c \ elf32-moxie.c \ elf32-msp430.c \ elf32-mt.c \ @@ -867,7 +864,6 @@ BFD32_BACKENDS_CFILES = \ elf32-xtensa.c \ elf32.c \ elflink.c \ - elfxx-mips.c \ elfxx-sparc.c \ elfxx-tilegx.c \ epoc-pe-arm.c \ @@ -953,6 +949,7 @@ BFD64_BACKENDS = \ coff64-rs6000.lo \ demo64.lo \ elf32-ia64.lo \ + elf32-mips.lo \ elf32-score.lo \ elf32-score7.lo \ elf64-alpha.lo \ @@ -971,6 +968,7 @@ BFD64_BACKENDS = \ elf64.lo \ elfn32-mips.lo \ elfxx-ia64.lo \ + elfxx-mips.lo \ mach-o-x86-64.lo \ mmo.lo \ nlm32-alpha.lo \ @@ -990,6 +988,7 @@ BFD64_BACKENDS_CFILES = \ coff-x86_64.c \ coff64-rs6000.c \ demo64.c \ + elf32-mips.c \ elf32-score.c \ elf32-score7.c \ elf64-alpha.c \ @@ -1007,6 +1006,7 @@ BFD64_BACKENDS_CFILES = \ elf64.c \ elfn32-mips.c \ elfxx-ia64.c \ + elfxx-mips.c \ mach-o-x86-64.c \ mmo.c \ nlm32-alpha.c \ diff --git a/bfd/config.bfd b/bfd/config.bfd index ebc9d40..8fb1bb8 100644 --- a/bfd/config.bfd +++ b/bfd/config.bfd @@ -957,6 +957,7 @@ case "${targ}" in targ_defvec=ecoff_big_vec targ_selvecs=ecoff_little_vec ;; +#ifdef BFD64 mips*el-*-netbsd*) targ_defvec=bfd_elf32_tradlittlemips_vec targ_selvecs="bfd_elf32_tradbigmips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec ecoff_little_vec ecoff_big_vec" @@ -965,6 +966,7 @@ case "${targ}" in targ_defvec=bfd_elf32_tradbigmips_vec targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec ecoff_big_vec ecoff_little_vec" ;; +#endif mips*-dec-* | mips*el-*-ecoff*) targ_defvec=ecoff_little_vec targ_selvecs=ecoff_big_vec @@ -977,14 +979,11 @@ case "${targ}" in mips*-*-irix6*) targ_defvec=bfd_elf32_nbigmips_vec targ_selvecs="bfd_elf32_nlittlemips_vec bfd_elf32_bigmips_vec bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec" - want64=true ;; mips64*-ps2-elf*) targ_defvec=bfd_elf32_nlittlemips_vec targ_selvecs="bfd_elf32_nlittlemips_vec bfd_elf32_nbigmips_vec bfd_elf32_bigmips_vec bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec" - want64=true ;; -#endif mips*-ps2-elf*) targ_defvec=bfd_elf32_littlemips_vec targ_selvecs="bfd_elf32_bigmips_vec bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec" @@ -993,6 +992,7 @@ case "${targ}" in targ_defvec=bfd_elf32_bigmips_vec targ_selvecs="bfd_elf32_littlemips_vec ecoff_big_vec ecoff_little_vec" ;; +#endif mips*-sgi-* | mips*-*-bsd*) targ_defvec=ecoff_big_vec targ_selvecs=ecoff_little_vec @@ -1001,10 +1001,12 @@ case "${targ}" in targ_defvec=ecoff_biglittle_vec targ_selvecs="ecoff_little_vec ecoff_big_vec" ;; +#ifdef BFD64 mips*-*-sysv4*) targ_defvec=bfd_elf32_tradbigmips_vec targ_selvecs="bfd_elf32_tradlittlemips_vec ecoff_big_vec ecoff_little_vec" ;; +#endif mips*-*-sysv* | mips*-*-riscos*) targ_defvec=ecoff_big_vec targ_selvecs=ecoff_little_vec @@ -1013,23 +1015,18 @@ case "${targ}" in mips*el-*-vxworks*) targ_defvec=bfd_elf32_littlemips_vxworks_vec targ_selvecs="bfd_elf32_littlemips_vec bfd_elf32_bigmips_vxworks_vec bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec" - want64=true ;; mips*-*-vxworks*) targ_defvec=bfd_elf32_bigmips_vxworks_vec targ_selvecs="bfd_elf32_bigmips_vec bfd_elf32_littlemips_vxworks_vec bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec" - want64=true ;; -#endif mips*el-sde-elf*) targ_defvec=bfd_elf32_tradlittlemips_vec targ_selvecs="bfd_elf32_tradbigmips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec" - want64=true ;; mips*-sde-elf* | mips*-mti-elf*) targ_defvec=bfd_elf32_tradbigmips_vec targ_selvecs="bfd_elf32_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec" - want64=true ;; mips*el-*-elf* | mips*el-*-vxworks* | mips*-*-chorus*) targ_defvec=bfd_elf32_littlemips_vec @@ -1043,13 +1040,10 @@ case "${targ}" in targ_defvec=bfd_elf32_bigmips_vec targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec" ;; -#ifdef BFD64 mips64*-*-openbsd*) targ_defvec=bfd_elf64_tradbigmips_vec targ_selvecs="bfd_elf32_ntradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf64_tradlittlemips_vec" - want64=true ;; -#endif mips*el-*-openbsd*) targ_defvec=bfd_elf32_littlemips_vec targ_selvecs="bfd_elf32_bigmips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec ecoff_little_vec ecoff_big_vec" @@ -1058,26 +1052,21 @@ case "${targ}" in targ_defvec=bfd_elf32_bigmips_vec targ_selvecs="bfd_elf32_littlemips_vec bfd_elf64_bigmips_vec bfd_elf64_littlemips_vec ecoff_big_vec ecoff_little_vec" ;; -#ifdef BFD64 mips64*el-*-linux*) targ_defvec=bfd_elf32_ntradlittlemips_vec targ_selvecs="bfd_elf32_ntradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf64_tradlittlemips_vec bfd_elf64_tradbigmips_vec" - want64=true ;; mips64*-*-linux*) targ_defvec=bfd_elf32_ntradbigmips_vec targ_selvecs="bfd_elf32_ntradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec" - want64=true ;; mips*el-*-linux*) targ_defvec=bfd_elf32_tradlittlemips_vec targ_selvecs="bfd_elf32_tradbigmips_vec ecoff_little_vec ecoff_big_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec" - want64=true ;; mips*-*-linux*) targ_defvec=bfd_elf32_tradbigmips_vec targ_selvecs="bfd_elf32_tradlittlemips_vec ecoff_big_vec ecoff_little_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec" - want64=true ;; mips64*el-*-freebsd* | mips64*el-*-kfreebsd*-gnu) # FreeBSD vectors @@ -1085,7 +1074,6 @@ case "${targ}" in targ_selvecs="bfd_elf32_ntradbigmips_freebsd_vec bfd_elf32_tradlittlemips_freebsd_vec bfd_elf32_tradbigmips_freebsd_vec bfd_elf64_tradlittlemips_freebsd_vec bfd_elf64_tradbigmips_freebsd_vec" # Generic vectors targ_selvecs="${targ_selvecs} bfd_elf32_ntradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf64_tradlittlemips_vec bfd_elf64_tradbigmips_vec" - want64=true ;; mips64*-*-freebsd* | mips64*-*-kfreebsd*-gnu) # FreeBSD vectors @@ -1093,16 +1081,13 @@ case "${targ}" in targ_selvecs="bfd_elf32_ntradlittlemips_freebsd_vec bfd_elf32_tradbigmips_freebsd_vec bfd_elf32_tradlittlemips_freebsd_vec bfd_elf64_tradbigmips_freebsd_vec bfd_elf64_tradlittlemips_freebsd_vec" # Generic vectors targ_selvecs="${targ_selvecs} bfd_elf32_ntradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf64_tradbigmips_vec bfd_elf64_tradlittlemips_vec" - want64=true ;; -#endif mips*el-*-freebsd* | mips*el-*-kfreebsd*-gnu) # FreeBSD vectors targ_defvec=bfd_elf32_tradlittlemips_freebsd_vec targ_selvecs="bfd_elf32_tradbigmips_freebsd_vec bfd_elf32_ntradlittlemips_freebsd_vec bfd_elf64_tradlittlemips_freebsd_vec bfd_elf32_ntradbigmips_freebsd_vec bfd_elf64_tradbigmips_freebsd_vec" # Generic vectors targ_selvecs="${targ_selvecs} bfd_elf32_tradlittlemips_vec bfd_elf32_tradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec" - want64=true ;; mips*-*-freebsd* | mips*-*-kfreebsd*-gnu) # FreeBSD vectors @@ -1110,9 +1095,7 @@ case "${targ}" in targ_selvecs="bfd_elf32_tradlittlemips_freebsd_vec bfd_elf32_ntradbigmips_freebsd_vec bfd_elf64_tradbigmips_freebsd_vec bfd_elf32_ntradlittlemips_freebsd_vec bfd_elf64_tradlittlemips_freebsd_vec" # Generic vectors targ_selvecs="${targ_selvecs} bfd_elf32_tradbigmips_vec bfd_elf32_tradlittlemips_vec bfd_elf32_ntradbigmips_vec bfd_elf64_tradbigmips_vec bfd_elf32_ntradlittlemips_vec bfd_elf64_tradlittlemips_vec" - want64=true ;; -#ifdef BFD64 mmix-*-*) targ_defvec=bfd_elf64_mmix_vec targ_selvecs=bfd_mmo_vec @@ -1711,6 +1694,13 @@ case "${targ}" in ;; esac +# All MIPS ELF targets need a 64-bit bfd_vma. +case "${targ_defvec} ${targ_selvecs}" in + *elf*mips*) + want64=true + ;; +esac + case "${host64}${want64}" in *true*) targ_selvecs="${targ_selvecs} ${targ64_selvecs}" diff --git a/bfd/targets.c b/bfd/targets.c index c6794ee..e716c3b 100644 --- a/bfd/targets.c +++ b/bfd/targets.c @@ -982,8 +982,10 @@ static const bfd_target * const _bfd_target_vector[] = &bfd_elf32_bigarm_vec, &bfd_elf32_bigarm_symbian_vec, &bfd_elf32_bigarm_vxworks_vec, +#ifdef BFD64 &bfd_elf32_bigmips_vec, &bfd_elf32_bigmips_vxworks_vec, +#endif &bfd_elf32_bigmoxie_vec, &bfd_elf32_bignios2_vec, &bfd_elf32_cr16_vec, @@ -1024,8 +1026,10 @@ static const bfd_target * const _bfd_target_vector[] = &bfd_elf32_littlearm_vec, &bfd_elf32_littlearm_symbian_vec, &bfd_elf32_littlearm_vxworks_vec, +#ifdef BFD64 &bfd_elf32_littlemips_vec, &bfd_elf32_littlemips_vxworks_vec, +#endif &bfd_elf32_littlemoxie_vec, &bfd_elf32_littlenios2_vec, &bfd_elf32_m32c_vec, @@ -1100,10 +1104,12 @@ static const bfd_target * const _bfd_target_vector[] = &bfd_elf32_tilegx_be_vec, &bfd_elf32_tilegx_le_vec, &bfd_elf32_tilepro_vec, +#ifdef BFD64 &bfd_elf32_tradbigmips_vec, &bfd_elf32_tradlittlemips_vec, &bfd_elf32_tradbigmips_freebsd_vec, &bfd_elf32_tradlittlemips_freebsd_vec, +#endif &bfd_elf32_us_cris_vec, &bfd_elf32_v850_vec, &bfd_elf32_v850_rh850_vec, diff --git a/gas/ChangeLog b/gas/ChangeLog index f843414..26b13ed 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2013-06-23 Richard Sandiford <rdsandiford@googlemail.com> + + * config/tc-mips.c: Assert that offsetT and valueT are at least + 8 bytes in size. + (GPR_SMIN, GPR_SMAX): New macros. + (macro, mips_ip): Remove code for 4-byte valueT and offsetT. + 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c index f2d46c4..e259071 100644 --- a/gas/config/tc-mips.c +++ b/gas/config/tc-mips.c @@ -34,6 +34,10 @@ #include "dwarf2dbg.h" #include "dw2gencfi.h" +/* Check assumptions made in this file. */ +typedef char static_assert1[sizeof (offsetT) < 8 ? -1 : 1]; +typedef char static_assert2[sizeof (valueT) < 8 ? -1 : 1]; + #ifdef DEBUG #define DBG(x) printf x #else @@ -524,6 +528,10 @@ static int mips_32bitmode = 0; #define HAVE_CODE_COMPRESSION \ ((mips_opts.mips16 | mips_opts.micromips) != 0) +/* The minimum and maximum signed values that can be stored in a GPR. */ +#define GPR_SMAX ((offsetT) (((valueT) 1 << (HAVE_64BIT_GPRS ? 63 : 31)) - 1)) +#define GPR_SMIN (-GPR_SMAX - 1) + /* MIPS PIC level. */ enum mips_pic_level mips_pic; @@ -6742,7 +6750,6 @@ macro (struct mips_cl_insn *ip) int lp = 0; int ab = 0; int off; - offsetT maxnum; bfd_reloc_code_real_type r; int hold_mips_optimize; @@ -6945,17 +6952,7 @@ macro (struct mips_cl_insn *ip) likely = 1; case M_BGT_I: /* Check for > max integer. */ - maxnum = 0x7fffffff; - if (HAVE_64BIT_GPRS && sizeof (maxnum) > 4) - { - maxnum <<= 16; - maxnum |= 0xffff; - maxnum <<= 16; - maxnum |= 0xffff; - } - if (imm_expr.X_op == O_constant - && imm_expr.X_add_number >= maxnum - && (HAVE_32BIT_GPRS || sizeof (maxnum) > 4)) + if (imm_expr.X_op == O_constant && imm_expr.X_add_number >= GPR_SMAX) { do_false: /* Result is always false. */ @@ -6985,18 +6982,7 @@ macro (struct mips_cl_insn *ip) &offset_expr, sreg); break; } - maxnum = 0x7fffffff; - if (HAVE_64BIT_GPRS && sizeof (maxnum) > 4) - { - maxnum <<= 16; - maxnum |= 0xffff; - maxnum <<= 16; - maxnum |= 0xffff; - } - maxnum = - maxnum - 1; - if (imm_expr.X_op == O_constant - && imm_expr.X_add_number <= maxnum - && (HAVE_32BIT_GPRS || sizeof (maxnum) > 4)) + if (imm_expr.X_op == O_constant && imm_expr.X_add_number <= GPR_SMIN) { do_true: /* result is always true */ @@ -7109,17 +7095,7 @@ macro (struct mips_cl_insn *ip) case M_BLEL_I: likely = 1; case M_BLE_I: - maxnum = 0x7fffffff; - if (HAVE_64BIT_GPRS && sizeof (maxnum) > 4) - { - maxnum <<= 16; - maxnum |= 0xffff; - maxnum <<= 16; - maxnum |= 0xffff; - } - if (imm_expr.X_op == O_constant - && imm_expr.X_add_number >= maxnum - && (HAVE_32BIT_GPRS || sizeof (maxnum) > 4)) + if (imm_expr.X_op == O_constant && imm_expr.X_add_number >= GPR_SMAX) goto do_true; if (imm_expr.X_op != O_constant) as_bad (_("Unsupported large constant")); @@ -12854,7 +12830,7 @@ mips_ip (char *str, struct mips_cl_insn *ip) if (offset_expr.X_add_number == 0) offset_expr.X_op = O_absent; } - else if (sizeof (imm_expr.X_add_number) > 4) + else { imm_expr.X_op = O_constant; if (!target_big_endian) @@ -12862,25 +12838,6 @@ mips_ip (char *str, struct mips_cl_insn *ip) else imm_expr.X_add_number = bfd_getb64 (temp); } - else - { - imm_expr.X_op = O_big; - imm_expr.X_add_number = 4; - if (!target_big_endian) - { - generic_bignum[0] = bfd_getl16 (temp); - generic_bignum[1] = bfd_getl16 (temp + 2); - generic_bignum[2] = bfd_getl16 (temp + 4); - generic_bignum[3] = bfd_getl16 (temp + 6); - } - else - { - generic_bignum[0] = bfd_getb16 (temp + 6); - generic_bignum[1] = bfd_getb16 (temp + 4); - generic_bignum[2] = bfd_getb16 (temp + 2); - generic_bignum[3] = bfd_getb16 (temp); - } - } } else { @@ -12947,18 +12904,6 @@ mips_ip (char *str, struct mips_cl_insn *ip) more = (insn + 1 < past && strcmp (insn->name, insn[1].name) == 0); - /* If the expression was written as an unsigned number, - only treat it as signed if there are no more - alternatives. */ - if (more - && *args == 'j' - && sizeof (imm_expr.X_add_number) <= 4 - && imm_expr.X_op == O_constant - && imm_expr.X_add_number < 0 - && imm_expr.X_unsigned - && HAVE_64BIT_GPRS) - break; - /* For compatibility with older assemblers, we accept 0x8000-0xffff as signed 16-bit numbers when only signed numbers are allowed. */ diff --git a/ld/ChangeLog b/ld/ChangeLog index 1fa836c..e701fff 100644 --- a/ld/ChangeLog +++ b/ld/ChangeLog @@ -1,3 +1,9 @@ +2013-06-23 Richard Sandiford <rdsandiford@googlemail.com> + + * Makefile.am (ALL_EMULATION_SOURCES): Move MIPS ELF emulations to... + (ALL_64_EMULATION_SOURCES): ...here. + * Makefile.in: Regenerate. + 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com> * NEWS: Document the removal of MIPS ECOFF targets. diff --git a/ld/Makefile.am b/ld/Makefile.am index 4766510..e85c42a 100644 --- a/ld/Makefile.am +++ b/ld/Makefile.am @@ -214,25 +214,11 @@ ALL_EMULATION_SOURCES = \ eelf32_tic6x_elf_be.c \ eelf32_tic6x_elf_le.c \ eelf32am33lin.c \ - eelf32b4300.c \ eelf32bfin.c \ eelf32bfinfd.c \ - eelf32bmip.c \ - eelf32bmipn32.c \ - eelf32bsmip.c \ - eelf32btsmip.c \ - eelf32btsmip_fbsd.c \ - eelf32btsmipn32.c \ - eelf32btsmipn32_fbsd.c \ eelf32cr16.c \ eelf32cr16c.c \ eelf32crx.c \ - eelf32ebmip.c \ - eelf32ebmipvxworks.c \ - eelf32elmip.c \ - eelf32elmipvxworks.c \ - eelf32lr5900.c \ - eelf32lr5900n32.c \ eelf32epiphany.c \ eelf32epiphany_4x4.c \ eelf32fr30.c \ @@ -242,19 +228,12 @@ ALL_EMULATION_SOURCES = \ eelf32ip2k.c \ eelf32iq10.c \ eelf32iq2000.c \ - eelf32l4300.c \ eelf32lm32.c \ eelf32lm32fd.c \ - eelf32lmip.c \ eelf32lppc.c \ eelf32lppclinux.c \ eelf32lppcnto.c \ eelf32lppcsim.c \ - eelf32lsmip.c \ - eelf32ltsmip.c \ - eelf32ltsmip_fbsd.c \ - eelf32ltsmipn32.c \ - eelf32ltsmipn32_fbsd.c \ eelf32m32c.c \ eelf32mb_linux.c \ eelf32mcore.c \ @@ -262,7 +241,6 @@ ALL_EMULATION_SOURCES = \ eelf32metag.c \ eelf32microblazeel.c \ eelf32microblaze.c \ - eelf32mipswindiss.c \ eelf32moxie.c \ eelf32mt.c \ eelf32openrisc.c \ @@ -490,6 +468,28 @@ ALL_64_EMULATION_SOURCES = \ eaarch64linuxb.c \ eelf32_x86_64.c \ eelf32_x86_64_nacl.c \ + eelf32b4300.c \ + eelf32bmip.c \ + eelf32bmipn32.c \ + eelf32bsmip.c \ + eelf32btsmip.c \ + eelf32btsmip_fbsd.c \ + eelf32btsmipn32.c \ + eelf32btsmipn32_fbsd.c \ + eelf32ebmip.c \ + eelf32ebmipvxworks.c \ + eelf32elmip.c \ + eelf32elmipvxworks.c \ + eelf32l4300.c \ + eelf32lmip.c \ + eelf32lr5900.c \ + eelf32lr5900n32.c \ + eelf32lsmip.c \ + eelf32ltsmip.c \ + eelf32ltsmip_fbsd.c \ + eelf32ltsmipn32.c \ + eelf32ltsmipn32_fbsd.c \ + eelf32mipswindiss.c \ eelf64_aix.c \ eelf64_ia64.c \ eelf64_ia64_fbsd.c \ diff --git a/ld/Makefile.in b/ld/Makefile.in index c53df13..6a7849a 100644 --- a/ld/Makefile.in +++ b/ld/Makefile.in @@ -522,25 +522,11 @@ ALL_EMULATION_SOURCES = \ eelf32_tic6x_elf_be.c \ eelf32_tic6x_elf_le.c \ eelf32am33lin.c \ - eelf32b4300.c \ eelf32bfin.c \ eelf32bfinfd.c \ - eelf32bmip.c \ - eelf32bmipn32.c \ - eelf32bsmip.c \ - eelf32btsmip.c \ - eelf32btsmip_fbsd.c \ - eelf32btsmipn32.c \ - eelf32btsmipn32_fbsd.c \ eelf32cr16.c \ eelf32cr16c.c \ eelf32crx.c \ - eelf32ebmip.c \ - eelf32ebmipvxworks.c \ - eelf32elmip.c \ - eelf32elmipvxworks.c \ - eelf32lr5900.c \ - eelf32lr5900n32.c \ eelf32epiphany.c \ eelf32epiphany_4x4.c \ eelf32fr30.c \ @@ -550,19 +536,12 @@ ALL_EMULATION_SOURCES = \ eelf32ip2k.c \ eelf32iq10.c \ eelf32iq2000.c \ - eelf32l4300.c \ eelf32lm32.c \ eelf32lm32fd.c \ - eelf32lmip.c \ eelf32lppc.c \ eelf32lppclinux.c \ eelf32lppcnto.c \ eelf32lppcsim.c \ - eelf32lsmip.c \ - eelf32ltsmip.c \ - eelf32ltsmip_fbsd.c \ - eelf32ltsmipn32.c \ - eelf32ltsmipn32_fbsd.c \ eelf32m32c.c \ eelf32mb_linux.c \ eelf32mcore.c \ @@ -570,7 +549,6 @@ ALL_EMULATION_SOURCES = \ eelf32metag.c \ eelf32microblazeel.c \ eelf32microblaze.c \ - eelf32mipswindiss.c \ eelf32moxie.c \ eelf32mt.c \ eelf32openrisc.c \ @@ -797,6 +775,28 @@ ALL_64_EMULATION_SOURCES = \ eaarch64linuxb.c \ eelf32_x86_64.c \ eelf32_x86_64_nacl.c \ + eelf32b4300.c \ + eelf32bmip.c \ + eelf32bmipn32.c \ + eelf32bsmip.c \ + eelf32btsmip.c \ + eelf32btsmip_fbsd.c \ + eelf32btsmipn32.c \ + eelf32btsmipn32_fbsd.c \ + eelf32ebmip.c \ + eelf32ebmipvxworks.c \ + eelf32elmip.c \ + eelf32elmipvxworks.c \ + eelf32l4300.c \ + eelf32lmip.c \ + eelf32lr5900.c \ + eelf32lr5900n32.c \ + eelf32lsmip.c \ + eelf32ltsmip.c \ + eelf32ltsmip_fbsd.c \ + eelf32ltsmipn32.c \ + eelf32ltsmipn32_fbsd.c \ + eelf32mipswindiss.c \ eelf64_aix.c \ eelf64_ia64.c \ eelf64_ia64_fbsd.c \ |