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| author | Frank Ch. Eigler <fche@redhat.com> | 1998-10-27 21:49:15 +0000 |
|---|---|---|
| committer | Frank Ch. Eigler <fche@redhat.com> | 1998-10-27 21:49:15 +0000 |
| commit | fe146542dda13513ecbee28a0138e5307c528acf (patch) | |
| tree | dd07d1e2b8dbeaac1c826c7c395661465f076bc8 | |
| parent | 2321a68bf8d71967d686fb681c49e5829b635db2 (diff) | |
| download | gdb-fe146542dda13513ecbee28a0138e5307c528acf.zip gdb-fe146542dda13513ecbee28a0138e5307c528acf.tar.gz gdb-fe146542dda13513ecbee28a0138e5307c528acf.tar.bz2 | |
* Fix for testcase for checking PR 17362.
Tue Oct 27 15:20:16 EST 1998 Frank Ch. Eigler <fche@cygnus.com>
* t-prot3w.s: Test changed spec of prot3w insn.
| -rw-r--r-- | sim/testsuite/mips64r5900-elf/ChangeLog | 16 | ||||
| -rw-r--r-- | sim/testsuite/mips64r5900-elf/t-prot3w.s | 14 |
2 files changed, 30 insertions, 0 deletions
diff --git a/sim/testsuite/mips64r5900-elf/ChangeLog b/sim/testsuite/mips64r5900-elf/ChangeLog index d1ad04e..7b1600f 100644 --- a/sim/testsuite/mips64r5900-elf/ChangeLog +++ b/sim/testsuite/mips64r5900-elf/ChangeLog @@ -1,3 +1,19 @@ +Tue Oct 27 15:20:16 EST 1998 Frank Ch. Eigler <fche@cygnus.com> + + * t-prot3w.s: Test changed spec of prot3w insn. + +Wed Jul 15 14:57:26 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * f-div.s: Add tests of more edge conditions. + * f-rsqrt.s: Add third argument to RSQRT. + * f-cond.s: Replace C.LE.S with C.OLE.S and C.LT.S with C.OLT.S. + +Mon May 25 15:46:32 1998 Andrew Cagney <cagney@b1.cygnus.com> + + * t-ldl.s, t-ldr.s, t-lwl.s, t-lwr.s, t-sdl.s, t-sdr.s, t-swl.s, + t-swr.s: New files. + * Makefile.in (TESTS): Update. + Thu May 21 19:04:52 1998 Andrew Cagney <cagney@b1.cygnus.com> * Makefile.in (TESTS): Add t-sub.ok. diff --git a/sim/testsuite/mips64r5900-elf/t-prot3w.s b/sim/testsuite/mips64r5900-elf/t-prot3w.s new file mode 100644 index 0000000..1c9f018 --- /dev/null +++ b/sim/testsuite/mips64r5900-elf/t-prot3w.s @@ -0,0 +1,14 @@ +.include "t-macros.i" + + start + +test_prot3w: + load $8 0x3333333311111111 0x2222222244444444 + prot3w $10,$8 #Expectation: + + # Prior to PR 17362, this was: + # check10 0x1111111122222222 0x3333333344444444 + + check10 0x1111111144444444 0x2222222233333333 + + exit0 |