diff options
author | Alan Modra <amodra@gmail.com> | 2004-11-19 12:28:03 +0000 |
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committer | Alan Modra <amodra@gmail.com> | 2004-11-19 12:28:03 +0000 |
commit | f5c7edf4d6920c105f2201c6a7f864c3f85392dc (patch) | |
tree | 3354d1f0248fb844a7d563590ea2282a9ced23ab | |
parent | a4528eebc0703a5ad999b0bf37d8e111fff94e46 (diff) | |
download | gdb-f5c7edf4d6920c105f2201c6a7f864c3f85392dc.zip gdb-f5c7edf4d6920c105f2201c6a7f864c3f85392dc.tar.gz gdb-f5c7edf4d6920c105f2201c6a7f864c3f85392dc.tar.bz2 |
include/opcode/
* msp430.h (struct rcodes_s, MSP430_RLC, msp430_rcodes,
struct hcodes_s, msp430_hcodes): Move to gas/config/tc-msp430.c.
gas/
* config/tc-msp430.c (struct rcodes_s, MSP430_RLC, msp430_rcodes,
struct hcodes_s, msp430_hcodes): From include/opcode/msp430.h.
-rw-r--r-- | gas/ChangeLog | 5 | ||||
-rw-r--r-- | gas/config/tc-msp430.c | 91 | ||||
-rw-r--r-- | include/opcode/ChangeLog | 5 | ||||
-rw-r--r-- | include/opcode/msp430.h | 91 |
4 files changed, 101 insertions, 91 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 2ec3462..82d9fb5 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,10 @@ 2004-11-19 Alan Modra <amodra@bigpond.net.au> + * config/tc-msp430.c (struct rcodes_s, MSP430_RLC, msp430_rcodes, + struct hcodes_s, msp430_hcodes): From include/opcode/msp430.h. + +2004-11-19 Alan Modra <amodra@bigpond.net.au> + * config/obj-coff.c (c_dot_file_symbol): Add "app" param. (coff_adjust_symtab): Adjust call. (crawl_symbols): Likewise. diff --git a/gas/config/tc-msp430.c b/gas/config/tc-msp430.c index 03346f6..d836578 100644 --- a/gas/config/tc-msp430.c +++ b/gas/config/tc-msp430.c @@ -31,6 +31,97 @@ #include "opcode/msp430.h" #include "safe-ctype.h" +/* GCC uses the some condition codes which we'll + implement as new polymorph instructions. + + COND EXPL SHORT JUMP LONG JUMP + =============================================== + eq == jeq jne +4; br lab + ne != jne jeq +4; br lab + + ltn honours no-overflow flag + ltn < jn jn +2; jmp +4; br lab + + lt < jl jge +4; br lab + ltu < jlo lhs +4; br lab + le <= see below + leu <= see below + + gt > see below + gtu > see below + ge >= jge jl +4; br lab + geu >= jhs jlo +4; br lab + =============================================== + + Therefore, new opcodes are (BranchEQ -> beq; and so on...) + beq,bne,blt,bltn,bltu,bge,bgeu + 'u' means unsigned compares + + Also, we add 'jump' instruction: + jump UNCOND -> jmp br lab + + They will have fmt == 4, and insn_opnumb == number of instruction. */ + +struct rcodes_s +{ + char * name; + int index; /* Corresponding insn_opnumb. */ + int sop; /* Opcode if jump length is short. */ + long lpos; /* Label position. */ + long lop0; /* Opcode 1 _word_ (16 bits). */ + long lop1; /* Opcode second word. */ + long lop2; /* Opcode third word. */ +}; + +#define MSP430_RLC(n,i,sop,o1) \ + {#n, i, sop, 2, (o1 + 2), 0x4010, 0} + +static struct rcodes_s msp430_rcodes[] = +{ + MSP430_RLC (beq, 0, 0x2400, 0x2000), + MSP430_RLC (bne, 1, 0x2000, 0x2400), + MSP430_RLC (blt, 2, 0x3800, 0x3400), + MSP430_RLC (bltu, 3, 0x2800, 0x2c00), + MSP430_RLC (bge, 4, 0x3400, 0x3800), + MSP430_RLC (bgeu, 5, 0x2c00, 0x2800), + {"bltn", 6, 0x3000, 3, 0x3000 + 1, 0x3c00 + 2,0x4010}, + {"jump", 7, 0x3c00, 1, 0x4010, 0, 0}, + {0,0,0,0,0,0,0} +}; +#undef MSP430_RLC + + +/* More difficult than above and they have format 5. + + COND EXPL SHORT LONG + ================================================================= + gt > jeq +2; jge label jeq +6; jl +4; br label + gtu > jeq +2; jhs label jeq +6; jlo +4; br label + leu <= jeq label; jlo label jeq +2; jhs +4; br label + le <= jeq label; jl label jeq +2; jge +4; br label + ================================================================= */ + +struct hcodes_s +{ + char * name; + int index; /* Corresponding insn_opnumb. */ + int tlab; /* Number of labels in short mode. */ + int op0; /* Opcode for first word of short jump. */ + int op1; /* Opcode for second word of short jump. */ + int lop0; /* Opcodes for long jump mode. */ + int lop1; + int lop2; +}; + +static struct hcodes_s msp430_hcodes[] = +{ + {"bgt", 0, 1, 0x2401, 0x3400, 0x2403, 0x3802, 0x4010 }, + {"bgtu", 1, 1, 0x2401, 0x2c00, 0x2403, 0x2802, 0x4010 }, + {"bleu", 2, 2, 0x2400, 0x2800, 0x2401, 0x2c02, 0x4010 }, + {"ble", 3, 2, 0x2400, 0x3800, 0x2401, 0x3402, 0x4010 }, + {0,0,0,0,0,0,0,0} +}; + const char comment_chars[] = ";"; const char line_comment_chars[] = "#"; const char line_separator_chars[] = ""; diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 9e6a656..3429c73 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,8 @@ +2004-11-19 Alan Modra <amodra@bigpond.net.au> + + * msp430.h (struct rcodes_s, MSP430_RLC, msp430_rcodes, + struct hcodes_s, msp430_hcodes): Move to gas/config/tc-msp430.c. + 2004-11-08 Inderpreet Singh <inderpreetb@nioda.hcltech.com> Vineet Sharma <vineets@noida.hcltech.com> diff --git a/include/opcode/msp430.h b/include/opcode/msp430.h index a59ede2..dc3604c 100644 --- a/include/opcode/msp430.h +++ b/include/opcode/msp430.h @@ -122,95 +122,4 @@ static struct msp430_opcode_s msp430_opcodes[] = { NULL, 0, 0, 0, 0 } }; -/* GCC uses the some condition codes which we'll - implement as new polymorph instructions. - - COND EXPL SHORT JUMP LONG JUMP - =============================================== - eq == jeq jne +4; br lab - ne != jne jeq +4; br lab - - ltn honours no-overflow flag - ltn < jn jn +2; jmp +4; br lab - - lt < jl jge +4; br lab - ltu < jlo lhs +4; br lab - le <= see below - leu <= see below - - gt > see below - gtu > see below - ge >= jge jl +4; br lab - geu >= jhs jlo +4; br lab - =============================================== - - Therefore, new opcodes are (BranchEQ -> beq; and so on...) - beq,bne,blt,bltn,bltu,bge,bgeu - 'u' means unsigned compares - - Also, we add 'jump' instruction: - jump UNCOND -> jmp br lab - - They will have fmt == 4, and insn_opnumb == number of instruction. */ - -struct rcodes_s -{ - char * name; - int index; /* Corresponding insn_opnumb. */ - int sop; /* Opcode if jump length is short. */ - long lpos; /* Label position. */ - long lop0; /* Opcode 1 _word_ (16 bits). */ - long lop1; /* Opcode second word. */ - long lop2; /* Opcode third word. */ -}; - -#define MSP430_RLC(n,i,sop,o1) \ - {#n, i, sop, 2, (o1 + 2), 0x4010, 0} - -static struct rcodes_s msp430_rcodes[] = -{ - MSP430_RLC (beq, 0, 0x2400, 0x2000), - MSP430_RLC (bne, 1, 0x2000, 0x2400), - MSP430_RLC (blt, 2, 0x3800, 0x3400), - MSP430_RLC (bltu, 3, 0x2800, 0x2c00), - MSP430_RLC (bge, 4, 0x3400, 0x3800), - MSP430_RLC (bgeu, 5, 0x2c00, 0x2800), - {"bltn", 6, 0x3000, 3, 0x3000 + 1, 0x3c00 + 2,0x4010}, - {"jump", 7, 0x3c00, 1, 0x4010, 0, 0}, - {0,0,0,0,0,0,0} -}; -#undef MSP430_RLC - - -/* More difficult than above and they have format 5. - - COND EXPL SHORT LONG - ================================================================= - gt > jeq +2; jge label jeq +6; jl +4; br label - gtu > jeq +2; jhs label jeq +6; jlo +4; br label - leu <= jeq label; jlo label jeq +2; jhs +4; br label - le <= jeq label; jl label jeq +2; jge +4; br label - ================================================================= */ - -struct hcodes_s -{ - char * name; - int index; /* Corresponding insn_opnumb. */ - int tlab; /* Number of labels in short mode. */ - int op0; /* Opcode for first word of short jump. */ - int op1; /* Opcode for second word of short jump. */ - int lop0; /* Opcodes for long jump mode. */ - int lop1; - int lop2; -}; - -static struct hcodes_s msp430_hcodes[] = -{ - {"bgt", 0, 1, 0x2401, 0x3400, 0x2403, 0x3802, 0x4010 }, - {"bgtu", 1, 1, 0x2401, 0x2c00, 0x2403, 0x2802, 0x4010 }, - {"bleu", 2, 2, 0x2400, 0x2800, 0x2401, 0x2c02, 0x4010 }, - {"ble", 3, 2, 0x2400, 0x3800, 0x2401, 0x3402, 0x4010 }, - {0,0,0,0,0,0,0,0} -}; - #endif |