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| author | Michael Meissner <gnu@the-meissners.org> | 1995-11-16 19:02:52 +0000 |
|---|---|---|
| committer | Michael Meissner <gnu@the-meissners.org> | 1995-11-16 19:02:52 +0000 |
| commit | 845ff5a45fcabb14dbb4648561a27aab221ed50b (patch) | |
| tree | 943b81f8ca0741b2c9132c7c1319c50a29e22fa7 | |
| parent | aa8a6656ee214ab9b32d60d5e3874b8fcb86f6f2 (diff) | |
| download | gdb-845ff5a45fcabb14dbb4648561a27aab221ed50b.zip gdb-845ff5a45fcabb14dbb4648561a27aab221ed50b.tar.gz gdb-845ff5a45fcabb14dbb4648561a27aab221ed50b.tar.bz2 | |
more functional unit changes
| -rw-r--r-- | sim/ppc/ChangeLog | 20 | ||||
| -rw-r--r-- | sim/ppc/debug.c | 2 | ||||
| -rw-r--r-- | sim/ppc/igen.c | 74 | ||||
| -rw-r--r-- | sim/ppc/ppc-instructions | 944 | ||||
| -rw-r--r-- | sim/ppc/table.c | 57 |
5 files changed, 945 insertions, 152 deletions
diff --git a/sim/ppc/ChangeLog b/sim/ppc/ChangeLog index ec5b7c8..bc32620 100644 --- a/sim/ppc/ChangeLog +++ b/sim/ppc/ChangeLog @@ -1,3 +1,23 @@ +Thu Nov 16 09:52:26 1995 Michael Meissner <meissner@tiktok.cygnus.com> + + * table.c (table_entry_read): Allow the annex to have blank lines. + + * ppc-instructions: Change lines in model stuff that just have a + tab to just newline. Add 601 support. Document most instructions + in terms of model specific timing information. Drop 'FUNCTION' + from PPC_FUNCTION_UNIT_xxx enums. Change PPC_UNIT_UNKNOWN -> + PPC_UNIT_BAD. Add TRACE(trace_tbd) for all data cache + instruction.s. Signal illegal instruciton if data cache block + invalidate is issued from problem state. + + * igen.c (max_model_fields_len): New static to keep track of the + max size for the model specific fields. + (model_c_insn): Use max_model_fields_len to size fields. + (insn_table_insert_insn): Set max_model_fields_len. + (model_table_insert): Ditto. + + * debug.c (trace_description): Add support for trace_tbd. + Wed Nov 15 17:32:13 1995 Michael Meissner <meissner@tiktok.cygnus.com> * cpu.h (cpu_model): Add declaration. diff --git a/sim/ppc/debug.c b/sim/ppc/debug.c index c77b51f..140c2ca 100644 --- a/sim/ppc/debug.c +++ b/sim/ppc/debug.c @@ -63,6 +63,8 @@ static trace_option_descriptor trace_description[] = { { trace_core_device, "core-device" }, { trace_stack_device, "stack-device" }, /* misc */ + { trace_opts, "options", "Print options simulator was compiled with" }, + { trace_tbd, "tbd", "Trace any missing features" }, /* sentinal */ { nr_trace_options, NULL }, }; diff --git a/sim/ppc/igen.c b/sim/ppc/igen.c index 2765d46..e28f800 100644 --- a/sim/ppc/igen.c +++ b/sim/ppc/igen.c @@ -637,6 +637,8 @@ static insn *last_model_internal; static insn *model_data; static insn *last_model_data; +static int max_model_fields_len; + static void insn_table_insert_function(insn_table *table, table_entry *file_entry) @@ -672,6 +674,15 @@ insn_table_insert_insn(insn_table *table, is correct. */ for(insn_model_ptr = file_entry->model_first; insn_model_ptr; insn_model_ptr = insn_model_ptr->next) { char *name = insn_model_ptr->fields[insn_model_name]; + int len = strlen (insn_model_ptr->fields[insn_model_fields]); + + while (len > 0 && isspace(*insn_model_ptr->fields[insn_model_fields])) { + len--; + insn_model_ptr->fields[insn_model_fields]++; + } + + if (max_model_fields_len < len) + max_model_fields_len = len; for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) { if (strcmp(name, model_ptr->printable_name) == 0) { @@ -956,6 +967,8 @@ static void model_table_insert(insn_table *table, table_entry *file_entry) { + int len; + /* create a new model */ model *new_model = ZALLOC(model); @@ -963,6 +976,13 @@ model_table_insert(insn_table *table, new_model->printable_name = file_entry->fields[model_name]; new_model->insn_default = file_entry->fields[model_default]; + while (*new_model->insn_default && isspace(*new_model->insn_default)) + new_model->insn_default++; + + len = strlen(new_model->insn_default); + if (max_model_fields_len < len) + max_model_fields_len = len; + /* append it to the end of the model list */ if (last_model) last_model->next = new_model; @@ -3079,7 +3099,8 @@ model_c_insn(insn_table *entry, while (model_ptr) { if (model_ptr->fields[insn_model_name] == current_name) { - lf_printf(file, " { %-48s },\t/* %s */\n", + lf_printf(file, " { %-*s }, /* %s */\n", + max_model_fields_len, model_ptr->fields[insn_model_fields], instruction->file_entry->fields[insn_name]); return; @@ -3088,7 +3109,8 @@ model_c_insn(insn_table *entry, model_ptr = model_ptr->next; } - lf_printf(file, " { %-48s },\t/* %s */\n", + lf_printf(file, " { %-*s }, /* %s */\n", + max_model_fields_len, data_ptr->model_ptr->insn_default, instruction->file_entry->fields[insn_name]); } @@ -3157,30 +3179,6 @@ gen_model_c(insn_table *table, lf *file) model_c_or_h_function(table, file, insn_ptr->file_entry, "STATIC_INLINE_MODEL"); } - lf_printf(file, "/* Insn functional unit info */\n"); - for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) { - model_c_passed_data data; - - lf_printf(file, "static const model_time model_time_%s[] = {\n", model_ptr->name); - data.file = file; - data.model_ptr = model_ptr; - insn_table_traverse_insn(table, - (void *)&data, - model_c_insn); - - lf_printf(file, "};\n"); - lf_printf(file, "\n"); - lf_printf(file, "\f\n"); - } - - lf_printf(file, "STATIC_MODEL const model_time *const model_time_mapping[ (int)nr_models ] = {\n"); - lf_printf(file, " (const model_time *const)0,\n"); - for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) { - lf_printf(file, " model_time_%s,\n", model_ptr->name); - } - lf_printf(file, "};\n"); - lf_printf(file, "\n"); - for(insn_ptr = model_internal; insn_ptr; insn_ptr = insn_ptr->next) { model_c_function(table, file, insn_ptr->file_entry, "STATIC_INLINE_MODEL"); } @@ -3251,6 +3249,30 @@ gen_model_c(insn_table *table, lf *file) lf_printf(file, "\n"); } + lf_printf(file, "/* Insn functional unit info */\n"); + for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) { + model_c_passed_data data; + + lf_printf(file, "static const model_time model_time_%s[] = {\n", model_ptr->name); + data.file = file; + data.model_ptr = model_ptr; + insn_table_traverse_insn(table, + (void *)&data, + model_c_insn); + + lf_printf(file, "};\n"); + lf_printf(file, "\n"); + lf_printf(file, "\f\n"); + } + + lf_printf(file, "STATIC_MODEL const model_time *const model_time_mapping[ (int)nr_models ] = {\n"); + lf_printf(file, " (const model_time *const)0,\n"); + for(model_ptr = models; model_ptr; model_ptr = model_ptr->next) { + lf_printf(file, " model_time_%s,\n", model_ptr->name); + } + lf_printf(file, "};\n"); + lf_printf(file, "\n"); + lf_printf(file, "\f\n"); lf_printf(file, "/* map model enumeration into printable string */\n"); lf_printf(file, "STATIC_MODEL const char *model_name[ (int)nr_models ] = {\n"); diff --git a/sim/ppc/ppc-instructions b/sim/ppc/ppc-instructions index 2d7b5be..ca34a0e 100644 --- a/sim/ppc/ppc-instructions +++ b/sim/ppc/ppc-instructions @@ -64,27 +64,28 @@ # 5 Specific CPU model, must be an identifier # # 6 Comma separated list of functional units - + # PowerPC models -::model:604:ppc604:PPC_FUNCTION_UNIT_UNKNOWN, PPC_FUNCTION_UNIT_UNKNOWN, 1, 1, 0 -::model:603e:ppc603e:PPC_FUNCTION_UNIT_UNKNOWN, PPC_FUNCTION_UNIT_UNKNOWN, 1, 1, 0 -::model:603:ppc603:PPC_FUNCTION_UNIT_UNKNOWN, PPC_FUNCTION_UNIT_UNKNOWN, 1, 1, 0 +::model:604:ppc604: PPC_UNIT_BAD, PPC_UNIT_BAD, 1, 1, 0 +::model:603e:ppc603e:PPC_UNIT_BAD, PPC_UNIT_BAD, 1, 1, 0 +::model:603:ppc603: PPC_UNIT_BAD, PPC_UNIT_BAD, 1, 1, 0 +::model:601:ppc601: PPC_UNIT_BAD, PPC_UNIT_BAD, 1, 1, 0 # Flags for model.h ::model-data::: typedef enum _ppc_function_unit { - PPC_FUNCTION_UNIT_UNKNOWN, /* unknown function unit */ - PPC_FUNCTION_UNIT_IU, /* integer unit (603 style) */ - PPC_FUNCTION_UNIT_SRU, /* system register unit (603 style) */ - PPC_FUNCTION_UNIT_SCIU1, /* 1st single cycle integer unit (604 style) */ - PPC_FUNCTION_UNIT_SCIU2, /* 2nd single cycle integer unit (604 style) */ - PPC_FUNCTION_UNIT_MCIU, /* multiple cycle integer unit (604 style) */ - PPC_FUNCTION_UNIT_FPU, /* floating point unit */ - PPC_FUNCTION_UNIT_LSU, /* load/store unit */ - PPC_FUNCTION_UNIT_BPU, /* branch unit */ + PPC_UNIT_BAD, /* unknown function unit */ + PPC_UNIT_IU, /* integer unit (601/603 style) */ + PPC_UNIT_SRU, /* system register unit (601/603 style) */ + PPC_UNIT_SCIU1, /* 1st single cycle integer unit (604 style) */ + PPC_UNIT_SCIU2, /* 2nd single cycle integer unit (604 style) */ + PPC_UNIT_MCIU, /* multiple cycle integer unit (604 style) */ + PPC_UNIT_FPU, /* floating point unit */ + PPC_UNIT_LSU, /* load/store unit */ + PPC_UNIT_BPU, /* branch unit */ nr_ppc_function_units } ppc_function_unit; - + /* Structure to hold timing information on a per instruction basis */ struct _model_time { ppc_function_unit first_unit; /* first functional unit this insn could use */ @@ -93,12 +94,12 @@ unsigned16 done; /* # cycles before insn is done */ unsigned32 flags; /* flag bits */ }; - + /* Flags */ #define PPC_LOAD 0x00000001 /* insn is a load */ #define PPC_STORE 0x00000002 /* insn is a store */ #define PPC_SERIALIZE 0x00000004 /* insn forces serialization */ - + /* Structure to hold the current state information for the simulated CPU model */ struct _model_data { const char *name; /* model name */ @@ -108,22 +109,24 @@ unsigned nr_units[nr_ppc_function_units]; /* function unit counts */ unsigned16 busy[nr_ppc_function_units]; /* how long until free */ }; - + STATIC_MODEL const char *const ppc_function_unit_name[ (int)nr_ppc_function_units ] = { - "unknown functional unit", - "integer functional unit", - "system register functional unit", - "1st single cycle integer functional unit", - "2nd single cycle integer functional unit", - "multiple cycle integer functional unit", - "floating point functional unit", - "load/store functional unit", - "branch functional unit", + "unknown functional unit instruction", + "integer functional unit instruction", + "system register functional unit instruction", + "1st single cycle integer functional unit instruction", + "2nd single cycle integer functional unit instruction", + "multiple cycle integer functional unit instruction", + "floating point functional unit instruction", + "load/store functional unit instruction", + "branch functional unit instruction", }; model_data *::model-function::model_create:cpu *processor - if (CURRENT_MODEL == MODEL_NONE) + if (CURRENT_MODEL == MODEL_NONE) { + error("Must define a CPU model"); return (model_data *)0; + } else { model_data *model_ptr = ZALLOC(model_data); model_ptr->name = model_name[CURRENT_MODEL]; @@ -132,27 +135,34 @@ model_data *::model-function::model_create:cpu *processor } void::model-function::model_init:cpu *processor, model_data *model_ptr + void::model-function::model_halt:cpu *processor, model_data *model_ptr void::model-function::model_issue:itable_index index, model_data *model_ptr, unsigned_word cia if (model_ptr->old_program_counter+4 != cia) model_ptr->nr_branches++; - + model_ptr->old_program_counter = cia; model_ptr->nr_units[ (int)model_ptr->timing[ (int)index ].first_unit ]++; + /* Assume that any instruction we don't know about is illegal for this + cpu model */ + if (model_ptr->timing[(int)index].first_unit == PPC_UNIT_BAD) + program_interrupt(processor, cia, + illegal_instruction_program_interrupt); + model_print *::model-function::model_mon_info:model_data *model_ptr model_print *head; model_print *tail; ppc_function_unit i; - + head = tail = ZALLOC(model_print); tail->count = model_ptr->nr_branches; tail->name = "branch"; tail->suffix_plural = "es"; tail->suffix_singular = ""; - - for (i = PPC_FUNCTION_UNIT_UNKNOWN; i < nr_ppc_function_units; i++) { + + for (i = PPC_UNIT_BAD; i < nr_ppc_function_units; i++) { if (model_ptr->nr_units[i]) { tail->next = ZALLOC(model_print); tail = tail->next; @@ -162,13 +172,13 @@ model_print *::model-function::model_mon_info:model_data *model_ptr tail->suffix_singular = ""; } } - + tail->next = (model_print *)0; return head; void::model-function::model_mon_info_free:model_data *model_ptr, model_print *ptr model_print *next; - + while (ptr) { next = ptr->next; free((void *)ptr); @@ -329,7 +339,7 @@ void::function::Round_Integer:cpu *processor, int sign, unsigned64 *frac, int *f *frac64 = (*frac64 + inc) & 0x1; FPSCR_SET_FR(inc); FPSCR_SET_FI(gbit | rbit | xbit); - + void::function::Round_Float:cpu *processor, int sign, int *exp, unsigned64 *frac, fpscreg round_mode int carry_out; @@ -540,7 +550,7 @@ int::function::is_greater_than:unsigned64 *fra, unsigned64 *frb return *(double*)fra > *(double*)frb; int::function::is_equan_to:unsigned64 *fra, unsigned64 *frb return *(double*)fra == *(double*)frb; - + # which quiet nan should become the result unsigned64::function::select_qnan:unsigned64 fra, unsigned64 frb, unsigned64 frc, int instruction_is_frsp, int generate_qnan, int single @@ -559,7 +569,7 @@ unsigned64::function::select_qnan:unsigned64 fra, unsigned64 frb, unsigned64 frc else error("select_qnan - default reached\n"); return frt; - + # detect invalid operation int::function::is_invalid_operation:cpu *processor, unsigned_word cia, unsigned64 fra, unsigned64 frb, fpscreg check, int single, int negate @@ -615,7 +625,7 @@ int::function::is_invalid_operation:cpu *processor, unsigned_word cia, unsigned6 return fail; - + # handle case of invalid operation @@ -651,16 +661,18 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # I.2.4.1 Branch Instructions # 0.18,6.LI,30.AA,31.LK:I:t::Branch -*603:PPC_FUNCTION_UNIT_BPU, PPC_FUNCTION_UNIT_BPU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_BPU, PPC_FUNCTION_UNIT_BPU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_BPU, PPC_FUNCTION_UNIT_BPU, 1, 1, 0 +*601: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 +*603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 +*603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 if (AA) NIA = IEA(EXTS(LI_0b00)); else NIA = IEA(CIA + EXTS(LI_0b00)); if (LK) LR = (spreg)CIA+4; 0.16,6.BO,11.BI,16.BD,30.AA,31.LK:B:t::Branch Conditional -*603:PPC_FUNCTION_UNIT_BPU, PPC_FUNCTION_UNIT_BPU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_BPU, PPC_FUNCTION_UNIT_BPU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_BPU, PPC_FUNCTION_UNIT_BPU, 1, 1, 0 +*601: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 +*603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 +*603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 int M, ctr_ok, cond_ok; if (is_64bit_implementation && is_64bit_mode) M = 0; else M = 32; @@ -672,9 +684,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, else NIA = IEA(CIA + EXTS(BD_0b00)); if (LK) LR = (spreg)IEA(CIA + 4); 0.19,6.BO,11.BI,16./,21.16,31.LK:XL:t::Branch Conditional to Link Register -*603:PPC_FUNCTION_UNIT_BPU, PPC_FUNCTION_UNIT_BPU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_BPU, PPC_FUNCTION_UNIT_BPU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_BPU, PPC_FUNCTION_UNIT_BPU, 1, 1, 0 +*601: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 +*603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 +*603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 int M, ctr_ok, cond_ok; if (is_64bit_implementation && is_64bit_mode) M = 0; else M = 32; @@ -684,9 +697,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, if (ctr_ok && cond_ok) NIA = IEA(LR_0b00); if (LK) LR = (spreg)IEA(CIA + 4); 0.19,6.BO,11.BI,16./,21.528,31.LK:XL:t::Branch Conditional to Count Register -*603:PPC_FUNCTION_UNIT_BPU, PPC_FUNCTION_UNIT_BPU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_BPU, PPC_FUNCTION_UNIT_BPU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_BPU, PPC_FUNCTION_UNIT_BPU, 1, 1, 0 +*601: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 +*603: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 +*603e:PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 int cond_ok; cond_ok = BO{0} || (CR{BI} == BO{1}); if (cond_ok) NIA = IEA(CTR_0b00); @@ -696,32 +710,79 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # I.2.4.2 System Call Instruction # 0.17,6./,11./,16./,30.1,31./:SC:t::System Call +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, PPC_SERIALIZE +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, PPC_SERIALIZE +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, PPC_SERIALIZE system_call_interrupt(processor, cia); # # I.2.4.3 Condition Register Logical Instructions # 0.19,6.BT,11.BA,16.BB,21.257,31./:XL::crand:Condition Register AND +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 BLIT32(CR, BT, CR{BA} && CR{BB}); + 0.19,6.BT,11.BA,16.BB,21.449,31./:XL::cror:Condition Register OR +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 BLIT32(CR, BT, CR{BA} || CR{BB}); + 0.19,6.BT,11.BA,16.BB,21.193,31./:XL::crxor:Condition Register XOR +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 BLIT32(CR, BT, CR{BA} != CR{BB}); + 0.19,6.BT,11.BA,16.BB,21.225,31./:XL::crnand:Condition Register NAND +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 BLIT32(CR, BT, !(CR{BA} && CR{BB})); + 0.19,6.BT,11.BA,16.BB,21.33,31./:XL::crnor:Condition Register NOR +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 BLIT32(CR, BT, !(CR{BA} || CR{BB})); + 0.19,6.BT,11.BA,16.BB,21.289,31./:XL::creqv:Condition Register Equivalent +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 BLIT32(CR, BT, CR{BA} == CR{BB}); + 0.19,6.BT,11.BA,16.BB,21.129,31./:XL::crandc:Condition Register AND with Complement +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 BLIT32(CR, BT, CR{BA} && !CR{BB}); + 0.19,6.BT,11.BA,16.BB,21.417,31./:XL::crorc:Condition Register OR with Complement +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 BLIT32(CR, BT, CR{BA} || !CR{BB}); # # I.2.4.4 Condition Register Field Instruction # 0.19,6.BF,9./,11.BFA,14./,16./,21.0,31./:XL:::Move Condition Register Field +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 1, 0 MBLIT32(CR, 4*BF, 4*BF+3, EXTRACTED32(CR, 4*BFA, 4*BFA+3)); @@ -730,20 +791,34 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.34,6.RT,11.RA,16.D:D:::Load Byte and Zero +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + EXTS(D); *rT = MEM(unsigned, EA, 1); + 0.31,6.RT,11.RA,16.RB,21.87,31./:X:::Load Byte and Zero Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + *rB; *rT = MEM(unsigned, EA, 1); + 0.35,6.RT,11.RA,16.D:D:::Load Byte and Zero with Update +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; if (RA == 0 || RA == RT) program_interrupt(processor, cia, @@ -751,7 +826,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, EA = *rA + EXTS(D); *rT = MEM(unsigned, EA, 1); *rA = EA; + 0.31,6.RT,11.RA,16.RB,21.119,31./:X:::Load Byte and Zero with Update Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; if (RA == 0 || RA == RT) program_interrupt(processor, cia, @@ -761,13 +841,22 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *rA = EA; 0.40,6.RT,11.RA,16.D:D:::Load Halfword and Zero +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + EXTS(D); *rT = MEM(unsigned, EA, 2); + 0.31,6.RT,11.RA,16.RB,21.279,31./:X:::Load Halfword and Zero Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; @@ -775,6 +864,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, EA = b + *rB; *rT = MEM(unsigned, EA, 2); 0.41,6.RT,11.RA,16.D:D:::Load Halfword and Zero with Update +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; if (RA == 0 || RA == RT) program_interrupt(processor, cia, @@ -782,7 +875,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, EA = *rA + EXTS(D); *rT = MEM(unsigned, EA, 2); *rA = EA; + 0.31,6.RT,11.RA,16.RB,21.311,31./:X:::Load Halfword and Zero with Update Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; if (RA == 0 || RA == RT) program_interrupt(processor, cia, @@ -792,27 +890,46 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *rA = EA; 0.42,6.RT,11.RA,16.D:D:::Load Halfword Algebraic +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + EXTS(D); *rT = MEM(signed, EA, 2); + 0.31,6.RT,11.RA,16.RB,21.343,31./:X:::Load Halfword Algebraic Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + *rB; *rT = MEM(signed, EA, 2); + 0.43,6.RT,11.RA,16.D:D:::Load Halfword Algebraic with Update +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; if (RA == 0 || RA == RT) program_interrupt(processor, cia, illegal_instruction_program_interrupt); EA = *rA + EXTS(D); *rT = MEM(signed, EA, 2); + 0.31,6.RT,11.RA,16.RB,21.375,31./:X:::Load Halfword Algebraic with Update Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; if (RA == 0 || RA == RT) program_interrupt(processor, cia, @@ -822,20 +939,34 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *rA = EA; 0.32,6.RT,11.RA,16.D:D:::Load Word and Zero +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + EXTS(D); *rT = MEM(unsigned, EA, 4); + 0.31,6.RT,11.RA,16.RB,21.23,31./:X:::Load Word and Zero Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + *rB; *rT = MEM(unsigned, EA, 4); + 0.33,6.RT,11.RA,16.D:D:::Load Word and Zero with Update +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; if (RA == 0 || RA == RT) program_interrupt(processor, cia, @@ -843,7 +974,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, EA = *rA + EXTS(D); *rT = MEM(unsigned, EA, 4); *rA = EA; + 0.31,6.RT,11.RA,16.RB,21.55,31./:X:::Load Word and Zero with Update Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 unsigned_word EA; if (RA == 0 || RA == RT) program_interrupt(processor, cia, @@ -859,6 +995,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # else b = *rA; # EA = b + EXTS(DS_0b00); # *rT = MEM(signed, EA, 4); + 0.31,6.RT,11.RA,16.RB,21.341,31./:X:64::Load Word Algebraic Indexed # unsigned_word b; # unsigned_word EA; @@ -866,6 +1003,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # else b = *rA; # EA = b + *rB;; # *rT = MEM(signed, EA, 4); + 0.31,6.RT,11.RA,16.RB,21.373,31./:X:64::Load Word Algebraic with Update Indexed # unsigned_word EA; # if (RA == 0 || RA == RT) @@ -882,6 +1020,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # else b = *rA; # EA = b + EXTS(DS_0b00); # *rT = MEM(unsigned, EA, 8); + 0.31,6.RT,11.RA,16.RB,21.21,31./:X:64::Load Doubleword Indexed # unsigned_word b; # unsigned_word EA; @@ -889,6 +1028,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # else b = *rA; # EA = b + *rB; # *rT = MEM(unsigned, EA, 8); + 0.58,6.RT,11.RA,16.DS,30.1:DS:64::Load Doubleword with Update # unsigned_word EA; # if (RA == 0 || RA == RT) @@ -897,6 +1037,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # EA = *rA + EXTS(DS_0b00); # *rT = MEM(unsigned, EA, 8); # *rA = EA; + 0.31,6.RT,11.RA,16.RB,21.53,31./:DS:64::Load Doubleword with Update Indexed # unsigned_word EA; # if (RA == 0 || RA == RT) @@ -913,20 +1054,34 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.38,6.RS,11.RA,16.D:D:::Store Byte +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + EXTS(D); STORE(EA, 1, *rS); + 0.31,6.RS,11.RA,16.RB,21.215,31./:X:::Store Byte Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 1, *rS); + 0.39,6.RS,11.RA,16.D:D:::Store Byte with Update +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -934,7 +1089,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, EA = *rA + EXTS(D); STORE(EA, 1, *rS); *rA = EA; + 0.31,6.RS,11.RA,16.RB,21.247,31./:X:::Store Byte with Update Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -944,20 +1104,34 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *rA = EA; 0.44,6.RS,11.RA,16.D:D:::Store Half Word +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + EXTS(D); STORE(EA, 2, *rS); + 0.31,6.RS,11.RA,16.RB,21.407,31./:X:::Store Half Word Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 2, *rS); + 0.45,6.RS,11.RA,16.D:D:::Store Half Word with Update +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -965,7 +1139,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, EA = *rA + EXTS(D); STORE(EA, 2, *rS); *rA = EA; + 0.31,6.RS,11.RA,16.RB,21.439,31./:X:::Store Half Word with Update Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -975,20 +1154,34 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *rA = EA; 0.36,6.RS,11.RA,16.D:D:::Store Word +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + EXTS(D); STORE(EA, 4, *rS); + 0.31,6.RS,11.RA,16.RB,21.151,31./:X:::Store Word Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 4, *rS); + 0.37,6.RS,11.RA,16.D:D:::Store Word with Update +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -996,7 +1189,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, EA = *rA + EXTS(D); STORE(EA, 4, *rS); *rA = EA; + 0.31,6.RS,11.RA,16.RB,21.183,31./:X:::Store Word with Update Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -1042,13 +1240,22 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.31,6.RT,11.RA,16.RB,21.790,31./:X:::Load Halfword Byte-Reverse Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + *rB; *rT = SWAP_2(MEM(unsigned, EA, 2)); + 0.31,6.RT,11.RA,16.RB,21.534,31./:X:::Load Word Byte-Reverse Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; @@ -1057,13 +1264,22 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *rT = SWAP_4(MEM(unsigned, EA, 4)); 0.31,6.RS,11.RA,16.RB,21.918,31./:X:::Store Half Word Byte-Reversed Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 2, SWAP_2(*rS)); + 0.31,6.RS,11.RA,16.RB,21.662,31./:X:::Store Word Byte-Reversed Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; @@ -1077,6 +1293,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.46,6.RT,11.RA,16.D:D:be::Load Multiple Word + 0.47,6.RS,11.RA,16.D:D:be::Store Multiple Word @@ -1085,9 +1302,11 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.31,6.RT,11.RA,16.NB,21.597,31./:X:be::Load String Word Immediate + 0.31,6.RT,11.RA,16.RB,21.533,31./:X:be::Load String Word Indexed 0.31,6.RS,11.RA,16.NB,21.725,31./:X:be::Store String Word Immedate + 0.31,6.RS,11.RA,16.RB,21.661,31./:X:be::Store String Word Indexed @@ -1100,6 +1319,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # a store, the memory area is checked to see if it has # been changed. 0.31,6.RT,11.RA,16.RB,21.20,31./:X:::Load Word And Reserve Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_IU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_IU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, PPC_SERIALIZE unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; @@ -1109,6 +1332,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, RESERVE_ADDR = real_addr(EA, 1/*is-read?*/); RESERVE_DATA = MEM(unsigned, EA, 4); *rT = RESERVE_DATA; + 0.31,6.RT,11.RA,16.RB,21.84,31./:X:64::Load Doubleword And Reserve Indexed unsigned_word b; unsigned_word EA; @@ -1121,6 +1345,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *rT = RESERVE_DATA; 0.31,6.RS,11.RA,16.RB,21.150,31.1:X:::Store Word Conditional Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 8, 8, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 8, 8, 0 +*604: PPC_UNIT_BPU, PPC_UNIT_BPU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; @@ -1164,6 +1392,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, } 0.31,6./,11./,16./,21.598,31./:X::sync:Synchronize +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, PPC_SERIALIZE +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, PPC_SERIALIZE +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, 0 /* do nothing */ @@ -1172,31 +1404,35 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.14,6.RT,11.RA,16.SI:D:T::Add Immediate -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_SRU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 if (RA_is_0) *rT = EXTS(SI); else *rT = *rA + EXTS(SI); 0.15,6.RT,11.RA,16.SI:D:::Add Immediate Shifted -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_SRU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 if (RA_is_0) *rT = EXTS(SI) << 16; else *rT = *rA + (EXTS(SI) << 16); 0.31,6.RT,11.RA,16.RB,21.OE,22.266,31.Rc:XO:::Add -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_SRU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 ALU_BEGIN(*rA); ALU_ADD(*rB); ALU_END(*rT, 0/*CA*/, OE, Rc); 0.31,6.RT,11.RA,16.RB,21.OE,22.40,31.Rc:XO:::Subtract From -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 ALU_BEGIN(*rA); ALU_NOT; ALU_ADD(*rB); @@ -1204,25 +1440,28 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, ALU_END(*rT, 0/*CA*/, OE, Rc); 0.12,6.RT,11.RA,16.SI:D:::Add Immediate Carrying -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 ALU_BEGIN(*rA); ALU_ADD(EXTS(SI)); ALU_END(*rT, 1/*CA*/, 0/*OE*/, 0/*Rc*/); 0.13,6.RT,11.RA,16.SI:D:::Add Immediate Carrying and Record -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 ALU_BEGIN(*rA); ALU_ADD(EXTS(SI)); ALU_END(*rT, 1/*CA*/, 0/*OE*/, 1/*Rc*/); 0.8,6.RT,11.RA,16.SI:D:::Subtract From Immediate Carrying -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 ALU_BEGIN(*rA); ALU_NOT; ALU_ADD(EXTS(SI)); @@ -1230,17 +1469,19 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, ALU_END(*rT, 1/*CA*/, 0/*OE*/, 0/*Rc*/); 0.31,6.RT,11.RA,16.RB,21.OE,22.10,31.Rc:XO:::Add Carrying -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 ALU_BEGIN(*rA); ALU_ADD(*rB); ALU_END(*rT, 1/*CA*/, OE, Rc); 0.31,6.RT,11.RA,16.RB,21.OE,22.8,31.Rc:XO:::Subtract From Carrying -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 /* RT <- ~RA + RB + 1 === RT <- RB - RA */ ALU_BEGIN(*rA); ALU_NOT; @@ -1249,18 +1490,20 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, ALU_END(*rT, 1/*CA*/, OE, Rc); 0.31,6.RT,11.RA,16.RB,21.OE,22.138,31.Rc:XO:::Add Extended -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 ALU_BEGIN(*rA); ALU_ADD(*rB); ALU_ADD_CA; ALU_END(*rT, 1/*CA*/, OE, Rc); 0.31,6.RT,11.RA,16.RB,21.OE,22.136,31.Rc:XO:::Subtract From Extended -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 ALU_BEGIN(*rA); ALU_NOT; ALU_ADD(*rB); @@ -1268,18 +1511,20 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, ALU_END(*rT, 1/*CA*/, OE, Rc); 0.31,6.RT,11.RA,16./,21.OE,22.234,31.Rc:XO:::Add to Minus One Extended -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 # ALU_BEGIN(*rA); # ALU_ADD_CA; # ALU_SUB(1); # ALU_END(*rT, 1/*CA*/, OE, Rc); 0.31,6.RT,11.RA,16./,21.OE,22.232,31.Rc:XO:::Subtract From Minus One Extended -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 # ALU_BEGIN(*rA); # ALU_NOT; # ALU_ADD_CA; @@ -1287,44 +1532,49 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # ALU_END(*rT, 1/*CA*/, OE, Rc); 0.31,6.RT,11.RA,16./,21.OE,22.202,31.Rc:XO::addze:Add to Zero Extended -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 ALU_BEGIN(*rA); ALU_ADD_CA; ALU_END(*rT, 1/*CA*/, OE, Rc); 0.31,6.RT,11.RA,16./,21.OE,22.200,31.Rc:XO:::Subtract from Zero Extended -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 ALU_BEGIN(*rA); ALU_NOT; ALU_ADD_CA; ALU_END(*rT, 1/*CA*/, OE, Rc); 0.31,6.RT,11.RA,16./,21.OE,22.104,31.Rc:XO:::Negate -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 1, 1, 0 -*604:PPC_FUNCTION_UNIT_SCIU1, PPC_FUNCTION_UNIT_SCIU2, 1, 1, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 ALU_BEGIN(*rA); ALU_NOT; ALU_ADD(1); ALU_END(*rT,0/*CA*/,OE,Rc); 0.7,6.RT,11.RA,16.SI:D::mulli:Multiply Low Immediate -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 3, 3, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 3, 3, 0 -*604:PPC_FUNCTION_UNIT_MCIU, PPC_FUNCTION_UNIT_MCIU, 3, 3, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0 +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 3, 3, 0 signed_word prod = *rA * EXTS(SI); *rT = prod; 0.31,6.RT,11.RA,16.RB,21.OE,22.233,31.Rc:D:64::Multiply Low Doubleword 0.31,6.RT,11.RA,16.RB,21.OE,22.235,31.Rc:XO::mullw:Multiply Low Word -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 5, 5, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 5, 5, 0 -*604:PPC_FUNCTION_UNIT_MCIU, PPC_FUNCTION_UNIT_MCIU, 4, 4, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0 +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 4, 4, 0 signed64 a = (signed32)(*rA); signed64 b = (signed32)(*rB); signed64 prod = a * b; @@ -1337,9 +1587,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6.RT,11.RA,16.RB,21./,22.73,31.Rc:XO:64::Multiply High Doubleword 0.31,6.RT,11.RA,16.RB,21./,22.75,31.Rc:XO::mulhw:Multiply High Word -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 5, 5, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 5, 5, 0 -*604:PPC_FUNCTION_UNIT_MCIU, PPC_FUNCTION_UNIT_MCIU, 4, 4, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 5, 5, 0 +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 4, 4, 0 signed64 a = (signed32)(*rA); signed64 b = (signed32)(*rB); signed64 prod = a * b; @@ -1350,9 +1601,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6.RT,11.RA,16.RB,21./,22.9,31.Rc:XO:64::Multiply High Doubleword Unsigned 0.31,6.RT,11.RA,16.RB,21./,22.11,31.Rc:XO::milhwu:Multiply High Word Unsigned -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 6, 6, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 6, 6, 0 -*604:PPC_FUNCTION_UNIT_MCIU, PPC_FUNCTION_UNIT_MCIU, 4, 4, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 10, 10, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 6, 6, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 6, 6, 0 +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 4, 4, 0 unsigned64 a = (unsigned32)(*rA); unsigned64 b = (unsigned32)(*rB); unsigned64 prod = a * b; @@ -1363,9 +1615,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6.RT,11.RA,16.RB,21.OE,22.489,31.Rc:XO:64::Divide Doubleword 0.31,6.RT,11.RA,16.RB,21.OE,22.491,31.Rc:XO::divw:Divide Word -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 37, 37, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 37, 37, 0 -*604:PPC_FUNCTION_UNIT_MCIU, PPC_FUNCTION_UNIT_MCIU, 20, 20, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 36, 36, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 37, 37, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 37, 37, 0 +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 20, 20, 0 signed64 dividend = (signed32)(*rA); signed64 divisor = (signed32)(*rB); if (divisor == 0 /* nb 0x8000..0 is sign extended */ @@ -1382,9 +1635,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6.RT,11.RA,16.RB,21.OE,22.457,31.Rc:XO:64::Divide Doubleword Unsigned 0.31,6.RT,11.RA,16.RB,21.OE,22.459,31.Rc:XO::divwu:Divide Word Unsigned -*603:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 37, 37, 0 -*603e:PPC_FUNCTION_UNIT_IU, PPC_FUNCTION_UNIT_IU, 37, 37, 0 -*604:PPC_FUNCTION_UNIT_MCIU, PPC_FUNCTION_UNIT_MCIU, 20, 20, 0 +*601: PPC_UNIT_IU, PPC_UNIT_IU, 36, 36, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 37, 37, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 37, 37, 0 +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 20, 20, 0 unsigned64 dividend = (unsigned32)(*rA); unsigned64 divisor = (unsigned32)(*rB); if (divisor == 0) { @@ -1404,6 +1658,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.11,6.BF,9./,10.L,11.RA,16.SI:D:::Compare Immediate +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 if (!is_64bit_mode && L) program_interrupt(processor, cia, illegal_instruction_program_interrupt); @@ -1416,7 +1674,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, a = *rA; CR_COMPARE(BF, a, b); } + 0.31,6.BF,9./,10.L,11.RA,16.RB,21.0,31./:X:::Compare +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 if (!is_64bit_mode && L) program_interrupt(processor, cia, illegal_instruction_program_interrupt); @@ -1433,7 +1696,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, } CR_COMPARE(BF, a, b); } + 0.10,6.BF,9./,10.L,11.RA,16.UI:D:::Compare Logical Immediate +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 if (!is_64bit_mode && L) program_interrupt(processor, cia, illegal_instruction_program_interrupt); @@ -1446,7 +1714,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, a = *rA; CR_COMPARE(BF, a, b); } + 0.31,6.BF,9./,10.L,11.RA,16.RB,21.32,31./:X:::Compare Logical +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 if (!is_64bit_mode && L) program_interrupt(processor, cia, illegal_instruction_program_interrupt); @@ -1485,7 +1758,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, program_interrupt(processor, cia, trap_program_interrupt); } + 0.3,6.TO,11.RA,16.SI:D:::Trap Word Immediate +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 signed_word a = EXTENDED(*rA); signed_word b = EXTS(SI); if ((a < b && TO{0}) @@ -1496,6 +1774,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, ) program_interrupt(processor, cia, trap_program_interrupt); + 0.31,6.TO,11.RA,16.RB,21.68,31./:X:64::Trap Doubleword if (!is_64bit_mode) program_interrupt(processor, cia, @@ -1512,7 +1791,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, program_interrupt(processor, cia, trap_program_interrupt); } + 0.31,6.TO,11.RA,16.RB,21.4,31./:X:::Trap Word +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 signed_word a = EXTENDED(*rA); signed_word b = EXTENDED(*rB); if (TO == 12 && rA == rB) { @@ -1533,52 +1817,136 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.28,6.RS,11.RA,16.UI:D:::AND Immediate +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS & UI; CR0_COMPARE(*rA, 0, 1/*Rc*/); + 0.29,6.RS,11.RA,16.UI:D:::AND Immediate Shifted +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS & (UI << 16); CR0_COMPARE(*rA, 0, 1/*Rc*/); + 0.24,6.RS,11.RA,16.UI:D:::OR Immediate +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS | UI; + 0.25,6.RS,11.RA,16.UI:D:::OR Immediate Shifted +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS | (UI << 16); + 0.26,6.RS,11.RA,16.UI:D:::XOR Immediate +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS ^ UI; + 0.27,6.RS,11.RA,16.UI:D:::XOR Immediate Shifted +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS ^ (UI << 16); + 0.31,6.RS,11.RA,16.RB,21.28,31.Rc:X:::AND +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS & *rB; CR0_COMPARE(*rA, 0, Rc); + 0.31,6.RS,11.RA,16.RB,21.444,31.Rc:X:::OR +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS | *rB; CR0_COMPARE(*rA, 0, Rc); + 0.31,6.RS,11.RA,16.RB,21.316,31.Rc:X:::XOR +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS ^ *rB; CR0_COMPARE(*rA, 0, Rc); + 0.31,6.RS,11.RA,16.RB,21.476,31.Rc:X:::NAND +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = ~(*rS & *rB); CR0_COMPARE(*rA, 0, Rc); + 0.31,6.RS,11.RA,16.RB,21.124,31.Rc:X:::NOR +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = ~(*rS | *rB); CR0_COMPARE(*rA, 0, Rc); + 0.31,6.RS,11.RA,16.RB,21.284,31.Rc:X:::Equivalent +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 # *rA = ~(*rS ^ *rB); /* A === B */ # CR0_COMPARE(*rA, 0, Rc); + 0.31,6.RS,11.RA,16.RB,21.60,31.Rc:X:::AND with Complement +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS & ~*rB; CR0_COMPARE(*rA, 0, Rc); 0.31,6.RS,11.RA,16.RB,21.412,31.Rc:X:::OR with Complement +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = *rS | ~*rB; CR0_COMPARE(*rA, 0, Rc); + 0.31,6.RS,11.RA,16./,21.954,31.Rc:X::extsb:Extend Sign Byte +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = (signed_word)(signed8)*rS; CR0_COMPARE(*rA, 0, Rc); + 0.31,6.RS,11.RA,16./,21.922,31.Rc:X::extsh:Extend Sign Half Word +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 *rA = (signed_word)(signed16)*rS; CR0_COMPARE(*rA, 0, Rc); + 0.31,6.RS,11.RA,16./,21.986,31.Rc:X:64::Extend Sign Word +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 # *rA = (signed_word)(signed32)*rS; # CR0_COMPARE(*rA, 0, Rc); + 0.31,6.RS,11.RA,16./,21.58,31.Rc:X:64::Count Leading Zeros Doubleword # int count = 0; # unsigned64 mask = BIT64(0); @@ -1589,7 +1957,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # } # *rA = count; # CR0_COMPARE(count, 0, Rc); /* FIXME - is this correct */ + 0.31,6.RS,11.RA,16./,21.26,31.Rc:X:::Count Leading Zeros Word +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 int count = 0; unsigned32 mask = BIT32(0); unsigned32 source = *rS; @@ -1613,6 +1986,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # signed_word result = r & m; # *rA = result; # CR0_COMPARE(result, 0, Rc); /* FIXME - is this correct */ + 0.30,6.RS,11.RA,16.sh_0_4,21.me,27.1,30.sh_5,31.Rc:MD:64::Rotate Left Doubleword Immediate then Clear Right # long n = (sh_5 << 4) | sh_0_4; # unsigned_word r = ROTL64(*rS, n); @@ -1621,6 +1995,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # signed_word result = r & m; # *rA = result; # CR0_COMPARE(result, 0, Rc); /* FIXME - is this correct */ + 0.30,6.RS,11.RA,16.sh_0_4,21.mb,27.2,30.sh_5,31.Rc:MD:64::Rotate Left Doubleword Immediate then Clear # long n = (sh_5 << 4) | sh_0_4; # unsigned_word r = ROTL64(*rS, n); @@ -1631,6 +2006,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # CR0_COMPARE(result, 0, Rc); /* FIXME - is this correct */ 0.21,6.RS,11.RA,16.SH,21.MB,26.ME,31.Rc:M:::Rotate Left Word Immediate then AND with Mask +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 long n = SH; unsigned32 s = *rS; unsigned32 r = ROTL32(s, n); @@ -1650,6 +2029,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # signed_word result = r & m; # *rA = result; # CR0_COMPARE(result, 0, Rc); + 0.30,6.RS,11.RA,16.RB,21.me,27.9,31.Rc:MDS:64::Rotate Left Doubleword then Clear Right # long n = MASKED(*rB, 58, 63); # unsigned_word r = ROTL64(*rS, n); @@ -1666,6 +2046,7 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # signed_word result = r & m; # *rA = result; # CR0_COMPARE(result, 0, Rc); + 0.30,6.RS,11.RA,16.sh_0_4,21.mb,27.3,30.sh_5,31.Rc:MD:64::Rotate Left Doubleword Immediate then Mask Insert # long n = (sh_5 << 4) | sh_0_4; # unsigned_word r = ROTL64(*rS, n); @@ -1674,7 +2055,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # signed_word result = (r & m) | (*rA & ~m) # *rA = result; # CR0_COMPARE(result, 0, Rc); + 0.20,6.RS,11.RA,16.SH,21.MB,26.ME,31.Rc:M::rlwimi:Rotate Left Word Immediate then Mask Insert +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 long n = SH; unsigned32 r = ROTL32(*rS, n); unsigned32 m = MASK(MB+32, ME+32); @@ -1686,7 +2072,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, 0.31,6.RS,11.RA,16.RB,21.27,31.Rc:X:64::Shift Left Doubleword + 0.31,6.RS,11.RA,16.RB,21.24,31.Rc:X:::Shift Left Word +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 int n = MASKED(*rB, 59, 63); unsigned32 source = *rS; signed_word shifted; @@ -1699,8 +2090,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, ITRACE(trace_alu, ("n=%d, source=0x%x, shifted=0x%x\n", n, source, shifted)); + 0.31,6.RS,11.RA,16.RB,21.539,31.Rc:X:64::Shift Right Doubleword + 0.31,6.RS,11.RA,16.RB,21.536,31.Rc:X:::Shift Right Word +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 int n = MASKED(*rB, 59, 63); unsigned32 source = *rS; signed_word shifted; @@ -1715,7 +2112,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, n, source, shifted)); 0.31,6.RS,11.RA,16.sh_0_4,21.413,30.sh_5,31.Rc:XS:64::Shift Right Algebraic Doubleword Immediate + 0.31,6.RS,11.RA,16.SH,21.824,31.Rc:X:::Shift Right Algebraic Word Immediate +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 int n = SH; signed_word r = ROTL32(*rS, /*64*/32-n); signed_word m = MASK(n+32, 63); @@ -1727,8 +2129,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, else XER &= ~xer_carry; CR0_COMPARE(shifted, 0, Rc); + 0.31,6.RS,11.RA,16.RB,21.794,31.Rc:X:64::Shift Right Algebraic Doubleword + 0.31,6.RS,11.RA,16.RB,21.792,31.Rc:X:::Shift Right Algebraic Word +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603e:PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*604: PPC_UNIT_SCIU1, PPC_UNIT_SCIU2, 1, 1, 0 int n = MASKED(*rB, 58, 63); int shift = (n >= 31 ? 31 : n); signed32 source = (signed32)*rS; /* signed to keep sign bit */ @@ -1747,6 +2155,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.31,6.RS,11.spr,21.467,31./:XFX::mtspr %SPR, %RS:Move to Special Purpose Register +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, 0 +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, 0 int n = (spr{5:9} << 5) | spr{0:4}; if (spr{0} && IS_PROBLEM_STATE(processor)) program_interrupt(processor, cia, @@ -1785,7 +2197,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, SPREG(n) = new_val; } } + 0.31,6.RT,11.spr,21.339,31./:XFX::mfspr %RT, %SPR:Move from Special Purpose Register +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 3, 3, 0 int n = (spr{5:9} << 5) | spr{0:4}; if (spr{0} && IS_PROBLEM_STATE(processor)) program_interrupt(processor, cia, @@ -1797,7 +2214,13 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, /* HACK - some SPR's need to get their value extracted specially */ *rT = SPREG(n); } + +# FIXME: 604 uses SCIU{1,2} if only one bit is being set 0.31,6.RS,11./,12.FXM,20./,21.144,31./:XFX::mtfcr:Move to Condition Register Fields +*601: PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, 0 if (FXM == 0xff) { CR = *rS; } @@ -1810,8 +2233,14 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, } CR = (MASKED(*rS, 32, 63) & mask) | (CR & ~mask); } + 0.31,6.BF,9./,11./,16./,21.512,31./:X:::Move to Condition Register from XER + 0.31,6.RT,11./,16./,21.19,31./:X:::Move From Condition Register +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 3, 3, 0 *rT = (unsigned32)CR; # @@ -1819,20 +2248,34 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.48,6.FRT,11.RA,16.D:D:f:lfs:Load Floating-Point Single +*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + EXTS(D); *frT = DOUBLE(MEM(unsigned, EA, 4)); + 0.31,6.FRT,11.RA,16.RB,21.535,31./:X:f::Load Floating-Point Single Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + *rB; *frT = DOUBLE(MEM(unsigned, EA, 4)); + 0.49,6.FRT,11.RA,16.D:D:f::Load Floating-Point Single with Update +*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -1840,7 +2283,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, EA = *rA + EXTS(D); *frT = DOUBLE(MEM(unsigned, EA, 4)); *rA = EA; + 0.31,6.FRT,11.RA,16.RB,21.576,31./:X:f::Load Floating-Point Single with Update Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -1850,20 +2298,34 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *rA = EA; 0.50,6.FRT,11.RA,16.D:D:f::Load Floating-Point Double +*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + EXTS(D); *frT = MEM(unsigned, EA, 8); + 0.31,6.FRT,11.RA,16.RB,21.599,31./:X:f::Load Floating-Point Double Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + *rB; *frT = MEM(unsigned, EA, 8); + 0.51,6.FRT,11.RA,16.D:D:f::Load Floating-Point Double with Update +*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -1871,7 +2333,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, EA = *rA + EXTS(D); *frT = MEM(unsigned, EA, 8); *rA = EA; + 0.31,6.FRT,11.RA,16.RB,21.631,31./:X:f::Load Floating-Point Double with Update Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 3, 3, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -1886,20 +2353,34 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.52,6.FRS,11.RA,16.D:D:f::Store Floating-Point Single +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + EXTS(D); STORE(EA, 4, SINGLE(*frS)); + 0.31,6.FRS,11.RA,16.RB,21.663,31./:X:f::Store Floating-Point Single Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 4, SINGLE(*frS)); + 0.53,6.FRS,11.RA,16.D:D:f::Store Floating-Point Single with Update +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -1907,7 +2388,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, EA = *rA + EXTS(D); STORE(EA, 4, SINGLE(*frS)); *rA = EA; + 0.31,6.FRS,11.RA,16.RB,21.695,31./:X:f::Store Floating-Point Single with Update Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -1917,20 +2403,34 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *rA = EA; 0.54,6.FRS,11.RA,16.D:D:f::Store Floating-Point Double +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + EXTS(D); STORE(EA, 8, *frS); + 0.31,6.FRS,11.RA,16.RB,21.727,31./:X:f::Store Floating-Point Double Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word b; unsigned_word EA; if (RA == 0) b = 0; else b = *rA; EA = b + *rB; STORE(EA, 8, *frS); + 0.55,6.FRS,11.RA,16.D:D:f::Store Floating-Point Double with Update +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -1938,7 +2438,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, EA = *rA + EXTS(D); STORE(EA, 8, *frS); *rA = EA; + 0.31,6.FRS,11.RA,16.RB,21.759,31./:X:f::Store Floating-Point Double with Update Indexed +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, 0 unsigned_word EA; if (RA == 0) program_interrupt(processor, cia, @@ -1953,15 +2458,34 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.63,6.FRT,11./,16.FRB,21.72,31.Rc:X:f::Floating Move Register +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 *frT = *frB; CR1_UPDATE(Rc); + 0.63,6.FRT,11./,16.FRB,21.40,31.Rc:X:f::Floating Negate +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 *frT = *frB ^ BIT64(0); CR1_UPDATE(Rc); + 0.63,6.FRT,11./,16.FRB,21.264,31.Rc:X:f::Floating Absolute Value +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 *frT = *frB & ~BIT64(0); CR1_UPDATE(Rc); + 0.63,6.FRT,11./,16.FRB,21.136,31.Rc:X:f::Floating Negative Absolute Value +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 *frT = *frB | BIT64(0); CR1_UPDATE(Rc); @@ -1972,6 +2496,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.63,6.FRT,11.FRA,16.FRB,21./,26.21,31.Rc:A:f:fadd:Floating Add +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 FPSCR_BEGIN; if (is_invalid_operation(processor, cia, *frA, *frB, @@ -1991,7 +2519,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *(double*)frT = s; } FPSCR_END(Rc); + 0.59,6.FRT,11.FRA,16.FRB,21./,26.21,31.Rc:A:f:fadds:Floating Add Single +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 FPSCR_BEGIN; if (is_invalid_operation(processor, cia, *frA, *frB, @@ -2013,6 +2546,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, FPSCR_END(Rc); 0.63,6.FRT,11.FRA,16.FRB,21./,26.20,31.Rc:A:f:fsub:Floating Subtract +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 FPSCR_BEGIN; if (is_invalid_operation(processor, cia, *frA, *frB, @@ -2032,7 +2569,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *(double*)frT = s; } FPSCR_END(Rc); + 0.59,6.FRT,11.FRA,16.FRB,21./,26.20,31.Rc:A:f:fsubs:Floating Subtract Single +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 FPSCR_BEGIN; if (is_invalid_operation(processor, cia, *frA, *frB, @@ -2054,6 +2596,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, FPSCR_END(Rc); 0.63,6.FRT,11.FRA,16./,21.FRC,26.25,31.Rc:A:f:fmul:Floating Multiply +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 5, 5, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 FPSCR_BEGIN; if (is_invalid_operation(processor, cia, *frA, *frC, @@ -2073,7 +2619,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *(double*)frT = s; } FPSCR_END(Rc); + 0.59,6.FRT,11.FRA,16./,21.FRC,26.25,31.Rc:A:f:fmuls:Floating Multiply Single +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 FPSCR_BEGIN; if (is_invalid_operation(processor, cia, *frA, *frC, @@ -2095,6 +2646,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, FPSCR_END(Rc); 0.63,6.FRT,11.FRA,16.FRB,21./,26.18,31.Rc:A:f:fdiv:Floating Divide +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 31, 31, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 33, 33, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 33, 33, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 32, 32, 0 FPSCR_BEGIN; if (is_invalid_operation(processor, cia, *frA, *frB, @@ -2114,7 +2669,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *(double*)frT = s; } FPSCR_END(Rc); + 0.59,6.FRT,11.FRA,16.FRB,21./,26.18,31.Rc:A:f:fdivs:Floating Divide Single +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 17, 17, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 18, 18, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 18, 18, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 18, 18, 0 FPSCR_BEGIN; if (is_invalid_operation(processor, cia, *frA, *frB, @@ -2136,6 +2696,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, FPSCR_END(Rc); 0.63,6.FRT,11.FRA,16.FRB,21.FRC,26.29,31.Rc:A:f:fmadd:Floating Multiply-Add +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 5, 5, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 FPSCR_BEGIN; double product; /*HACK! - incorrectly loosing precision ... */ /* compute the multiply */ @@ -2174,16 +2738,48 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, *(double*)frT = s; } FPSCR_END(Rc); + 0.59,6.FRT,11.FRA,16.FRB,21.FRC,26.29,31.Rc:A:f::Floating Multiply-Add Single +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 0.63,6.FRT,11.FRA,16.FRB,21.FRC,26.28,31.Rc:A:f::Floating Multiply-Subtract +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 5, 5, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 + 0.59,6.FRT,11.FRA,16.FRB,21.FRC,26.28,31.Rc:A:f::Floating Multiply-Subtract Single +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 0.63,6.FRT,11.FRA,16.FRB,21.FRC,26.31,31.Rc:A:f::Floating Negative Multiply-Add +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 5, 5, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 + 0.59,6.FRT,11.FRA,16.FRB,21.FRC,26.31,31.Rc:A:f::Floating Negative Multiply-Add Single +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 0.63,6.FRT,11.FRA,16.FRB,21.FRC,26.30,31.Rc:A:f::Floating Negative Multiply-Subtract +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 5, 5, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 2, 4, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 + 0.59,6.FRT,11.FRA,16.FRB,21.FRC,26.30,31.Rc:A:f::Floating Negative Multiply-Subtract Single +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 # @@ -2191,6 +2787,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.63,6.FRT,11./,16.FRB,21.12,31.Rc:X:f::Floating Round to Single-Precision +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 int sign; int exp; unsigned64 frac_grx; @@ -2392,15 +2992,24 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, if (sign == 1) FPSCR_SET_FPRF(fpscr_rf_neg_normal_number); goto Done; Done: + 0.63,6.FRT,11./,16.FRB,21.814,31.Rc:X:64,f::Floating Convert To Integer Doubleword + 0.63,6.FRT,11./,16.FRB,21.815,31.Rc:X:64,f::Floating Convert To Integer Doubleword with round towards Zero + 0.63,6.FRT,11./,16.FRB,21.14,31.Rc:X:f::Floating Convert To Integer Word + 0.63,6.FRT,11./,16.FRB,21.15,31.Rc:X:f:fctiwz:Floating Convert To Integer Word with round towards Zero +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 FPSCR_BEGIN; convert_to_integer(processor, cia, frT, *frB, fpscr_rn_round_towards_zero, 32); FPSCR_END(Rc); + 0.63,6.FRT,11./,16.FRB,21.846,31.Rc:X:64,f::Floating Convert from Integer Doubleword int sign = EXTRACTED64(*frB, 0, 0); int exp = 63; @@ -2434,6 +3043,10 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.63,6.BF,9./,11.FRA,16.FRB,21.0,31./:X:f:fcmpu:Floating Compare Unordered +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 FPSCR_BEGIN; unsigned c; if (is_NaN(*frA, 0) || is_NaN(*frB, 0)) @@ -2449,7 +3062,12 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, if (is_SNaN(*frA, 0) || is_SNaN(*frB, 0)) FPSCR_OR_VX(fpscr_vxsnan); FPSCR_END(0); + 0.63,6.BF,9./,11.FRA,16.FRB,21.32,31./:X:f:fcmpo:Floating Compare Ordered +*601: PPC_UNIT_FPU, PPC_UNIT_FPU, 4, 4, 0 +*603: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*603e:PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 +*604: PPC_UNIT_FPU, PPC_UNIT_FPU, 1, 3, 0 FPSCR_BEGIN; unsigned c; if (is_NaN(*frA, 0) || is_NaN(*frB, 0)) @@ -2478,10 +3096,15 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.63,6.FRT,11./,16./,21.583,31.Rc:X:f::Move From FPSCR + 0.63,6.BF,9./,11.BFA,14./,16./,21.64,31./:X:f::Move to Condition Register from FPSCR + 0.64,6.BF,9./,11./,16.U,20./,21.134,31.Rc:X:f::Move To FPSCR Field Immediate + 0.63,6./,7.FLM,15./,16.FRB,21.711,31.Rc:XFL:f::Move To FPSCR Fields + 0.63,6.BT,11./,16./,21.70,31.Rc:X:f::Move To FPSCR Bit 0 + 0.63,6.BT,11./,16./,21.38,31.Rc:X:f::Move To FPSCR Bit 1 @@ -2495,9 +3118,11 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.63,6.FRT,11./,16.FRB,21./,26.22,31.Rc:A:f::Floating Square Root + 0.59,6.FRT,11./,16.FRB,21./,26.22,31.Rc:A:f::Floating Square Root Single 0.59,6.FRT,11./,16.FRB,21./,26.24,31.Rc:A:f::Floating Reciprocal Estimate Single + 0.63,6.FRT,11./,16.FRB,21./,26.26,31.Rc:A:f::Floating Reciprocal Square Root Estimate # @@ -2512,12 +3137,20 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.31,6./,11.RA,16.RB,21.982,31./:X::icbi:Instruction Cache Block Invalidate +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, PPC_SERIALIZE +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, PPC_SERIALIZE +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, PPC_SERIALIZE /* blindly flush all instruction cache entries */ #if WITH_IDECODE_CACHE_SIZE cpu_flush_icache(processor); #endif 0.19,6./,11./,16./,21.150,31./:XL::isync:Instruction Synchronize +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, PPC_SERIALIZE +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, PPC_SERIALIZE +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, PPC_SERIALIZE cpu_synchronize_context(processor); @@ -2526,22 +3159,42 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.31,6./,11.RA,16.RB,21.278,31./:X:::Data Cache Block Touch - ; /* nop for now */ +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 2, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 2, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, PPC_SERIALIZE + TRACE(trace_tbd,("Data Cache Block Touch\n")); 0.31,6./,11.RA,16.RB,21.246,31./:X:::Data Cache Block Touch for Store - ; /* nop for now */ +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 2, 2, 0 +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 2, 2, 0 +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, PPC_SERIALIZE + TRACE(trace_tbd,("Data Cache Block Touch for Store\n")); 0.31,6./,11.RA,16.RB,21.1014,31./:X:::Data Cache Block set to Zero - ; /* nop for now */ +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 10, 10, PPC_SERIALIZE +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 10, 10, PPC_SERIALIZE +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, PPC_SERIALIZE + TRACE(trace_tbd,("Data Cache Block set to Zero\n")); 0.31,6./,11.RA,16.RB,21.54,31./:X:::Data Cache Block Store - ; /* nop for now */ +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 5, 5, PPC_SERIALIZE +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 5, 5, PPC_SERIALIZE +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, PPC_SERIALIZE + TRACE(trace_tbd,("Data Cache Block Store\n")); 0.31,6./,11.RA,16.RB,21.86,31./:X:::Data Cache Block Flush - ; /* nop for now */ +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 5, 5, PPC_SERIALIZE +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 5, 5, PPC_SERIALIZE +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 1, PPC_SERIALIZE + TRACE(trace_tbd,("Data Cache Block Flush\n")); # -# II.3.3 Envorce In-order Execution of I/O Instruction +# II.3.3 Enforce In-order Execution of I/O Instruction # 0.31,6./,11./,16./,21.854,31./:X::eieio:Enforce In-order Execution of I/O @@ -2553,6 +3206,9 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.31,6.RT,11.tbr,21.371,31./:XFX::mftb:Move From Time Base +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0 +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 3, 3, 0 int n = (tbr{5:9} << 5) | tbr{0:4}; if (n == 268) { if (is_64bit_implementation) *rT = TB; @@ -2571,8 +3227,11 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # III.2.3.1 System Linkage Instructions # -#0.17,6./,11./,16./,30.1,31./:SC::sc:System Call 0.19,6./,11./,16./,21.50,31./:XL::rfi:Return From Interrupt +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, PPC_SERIALIZE +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, PPC_SERIALIZE +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 3, 3, PPC_SERIALIZE if (IS_PROBLEM_STATE(processor)) { program_interrupt(processor, cia, privileged_instruction_program_interrupt); @@ -2592,12 +3251,21 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, #0.31,6.RS,11.spr,21.467,31./:XFX:::Move To Special Purpose Register #0.31,6.RT,11.spr,21.339,31./:XFX:::Move From Special Purpose Register 0.31,6.RS,11./,16./,21.146,31./:X:::Move To Machine State Register +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, PPC_SERIALIZE +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, PPC_SERIALIZE +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, PPC_SERIALIZE if (IS_PROBLEM_STATE(processor)) program_interrupt(processor, cia, privileged_instruction_program_interrupt); else MSR = *rS; + 0.31,6.RT,11./,16./,21.83,31./:X:::Move From Machine State Register +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, PPC_SERIALIZE +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, PPC_SERIALIZE +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 3, 3, PPC_SERIALIZE if (IS_PROBLEM_STATE(processor)) program_interrupt(processor, cia, privileged_instruction_program_interrupt); @@ -2610,31 +3278,58 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.31,6./,11.RA,16.RB,21.470,31./:X::dcbi:Data Cache Block Invalidate - ; /* nop for now */ +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, PPC_SERIALIZE +*603: PPC_UNIT_LSU, PPC_UNIT_LSU, 2, 2, PPC_SERIALIZE +*603e:PPC_UNIT_LSU, PPC_UNIT_LSU, 2, 2, PPC_SERIALIZE +*604: PPC_UNIT_LSU, PPC_UNIT_LSU, 1, 3, PPC_SERIALIZE + if (IS_PROBLEM_STATE(processor)) + program_interrupt(processor, cia, + privileged_instruction_program_interrupt); + else + TRACE(trace_tbd,("Data Cache Block Invalidate\n")); # # III.4.11.2 Segment Register Manipulation Instructions # 0.31,6.RS,11./,12.SR,16./,21.210,31./:X:32:mtsr %SR,%RS:Move To Segment Register +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, PPC_SERIALIZE +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, PPC_SERIALIZE +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, PPC_SERIALIZE if (IS_PROBLEM_STATE(processor)) program_interrupt(processor, cia, privileged_instruction_program_interrupt); else SEGREG(SR) = *rS; + 0.31,6.RS,11./,16.RB,21.242,31./:X:32:mtsrin %RS,%RB:Move To Segment Register Indirect +*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, PPC_SERIALIZE +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 2, 2, PPC_SERIALIZE +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, PPC_SERIALIZE if (IS_PROBLEM_STATE(processor)) program_interrupt(processor, cia, privileged_instruction_program_interrupt); else SEGREG(EXTRACTED32(*rB, 0, 3)) = *rS; + 0.31,6.RT,11./,12.SR,16./,21.595,31./:X:32:mfsr %RT,%RS:Move From Segment Register +*601: PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, PPC_SERIALIZE +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, PPC_SERIALIZE +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, PPC_SERIALIZE if (IS_PROBLEM_STATE(processor)) program_interrupt(processor, cia, privileged_instruction_program_interrupt); else *rT = SEGREG(SR); + 0.31,6.RT,11./,16.RB,21.659,31./:X:32:mfsrin %RT,%RB:Move From Segment Register Indirect +*601: PPC_UNIT_IU, PPC_UNIT_IU, 2, 2, 0 +*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, PPC_SERIALIZE +*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 3, 3, PPC_SERIALIZE +*604: PPC_UNIT_MCIU, PPC_UNIT_MCIU, 1, 1, PPC_SERIALIZE if (IS_PROBLEM_STATE(processor)) program_interrupt(processor, cia, privileged_instruction_program_interrupt); @@ -2647,9 +3342,11 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.31,6./,11./,16.RB,21.434,31./:X:64::SLB Invalidate Entry + 0.31,6./,11./,16./,21.498,31./:X:64::SLB Invalidate All 0.31,6./,11./,16.RB,21.306,31./:X:::TLB Invalidate Entry + 0.31,6./,11./,16./,21.370,31./:X:::TLB Invalidate All 0.31,6./,11./,16./,21.566,31./:X:::TLB Sychronize @@ -2660,4 +3357,5 @@ void::function::invalid_arithemetic_operation:cpu *processor, unsigned_word cia, # 0.31,6.RT,11.RA,16.RB,21.310,31./:X:earwax::External Control In Word Indexed + 0.31,6.RS,11.RA,16.RB,21.438,31./:X:earwax::External Control Out Word Indexed diff --git a/sim/ppc/table.c b/sim/ppc/table.c index 6bc01d8..c331bc8 100644 --- a/sim/ppc/table.c +++ b/sim/ppc/table.c @@ -44,12 +44,14 @@ struct _table { char *pos; int line_nr; int nr_fields; + int nr_model_fields; char *file_name; }; extern table * table_open(char *file_name, - int nr_fields) + int nr_fields, + int nr_model_fields) { int fd; struct stat stat_buf; @@ -59,6 +61,7 @@ table_open(char *file_name, file = ZALLOC(table); ASSERT(file != NULL); file->nr_fields = nr_fields; + file->nr_model_fields = nr_model_fields; /* save the file name */ file->file_name = (char*)zalloc(strlen(file_name) + 1); @@ -158,7 +161,45 @@ table_entry_read(table *file) file->line_nr++; entry->line_nr = file->line_nr; - /* if following lines tab indented, put in the annex */ + /* if following lines begin with a star, add them to the model + section. */ + while ((file->nr_model_fields > 0) && (*file->pos == '*')) { + table_model_entry *model = (table_model_entry*)zalloc(sizeof(table_model_entry) + + (file->nr_model_fields + 1) * sizeof(char*)); + if (entry->model_last) + entry->model_last->next = model; + else + entry->model_first = model; + entry->model_last = model; + + /* break the line into its colon delimitered fields */ + file->pos++; + for (field = 0; field < file->nr_model_fields-1; field++) { + model->fields[field] = file->pos; + while(*file->pos && *file->pos != ':' && *file->pos != '\n') + file->pos++; + if (*file->pos == ':') { + *file->pos = '\0'; + file->pos++; + } + } + + /* any trailing stuff not the last field */ + ASSERT(field == file->nr_model_fields-1); + model->fields[field] = file->pos; + while (*file->pos && *file->pos != '\n') { + file->pos++; + } + if (*file->pos == '\n') { + *file->pos = '\0'; + file->pos++; + } + + file->line_nr++; + model->line_nr = file->line_nr; + } + + /* if following lines are tab indented, put in the annex */ if (*file->pos == '\t') { entry->annex = file->pos; do { @@ -166,8 +207,18 @@ table_entry_read(table *file) file->pos++; } while (*file->pos != '\0' && *file->pos != '\n'); if (*file->pos == '\n') { - file->pos++; + char *save_pos = ++file->pos; + int extra_lines = 0; file->line_nr++; + /* Allow tab indented to have blank lines */ + while (*save_pos == '\n') { + save_pos++; + extra_lines++; + } + if (*save_pos == '\t') { + file->pos = save_pos; + file->line_nr += extra_lines; + } } } while (*file->pos != '\0' && *file->pos == '\t'); if (file->pos[-1] == '\n') |