diff options
| author | Nick Clifton <nickc@redhat.com> | 1998-02-25 02:05:09 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 1998-02-25 02:05:09 +0000 |
| commit | 39149be2246d4c375faf6c357e370f12cb66016d (patch) | |
| tree | d2cd7e12d713364518a67f22a33a0c965fcac76b | |
| parent | 89154e47a39fb4c6c0026996ea0854b5583fc99b (diff) | |
| download | gdb-39149be2246d4c375faf6c357e370f12cb66016d.zip gdb-39149be2246d4c375faf6c357e370f12cb66016d.tar.gz gdb-39149be2246d4c375faf6c357e370f12cb66016d.tar.bz2 | |
Fix bug detected by Michael snyder.
| -rw-r--r-- | gas/ChangeLog | 6 | ||||
| -rw-r--r-- | gas/config/tc-m32r.c | 5 |
2 files changed, 9 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 0730323..2f41707 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,9 @@ +start-sanitize-m32rx +Tue Feb 24 18:03:25 1998 Nick Clifton <nickc@cygnus.com> + + * config/tc-m32r.c (first_writes_to_seconds_operands): + Reinitialise b_operands for each pass of the inner loop. +end-sanitize-m32rx start-sanitize-sky Tue Feb 24 11:01:25 1998 Doug Evans <devans@canuck.cygnus.com> diff --git a/gas/config/tc-m32r.c b/gas/config/tc-m32r.c index c1fd99c..b47d9e4 100644 --- a/gas/config/tc-m32r.c +++ b/gas/config/tc-m32r.c @@ -410,13 +410,13 @@ first_writes_to_seconds_operands (a, b, check_outputs) const int check_outputs; { const CGEN_OPERAND_INSTANCE * a_operands = CGEN_INSN_OPERANDS (a->insn); - const CGEN_OPERAND_INSTANCE * b_operands = CGEN_INSN_OPERANDS (b->insn); + const CGEN_OPERAND_INSTANCE * b_ops = CGEN_INSN_OPERANDS (b->insn); int a_index; /* If at least one of the instructions takes no operands, then there is nothing to check. There really are instructions without operands, eg 'nop'. */ - if (a_operands == NULL || b_operands == NULL) + if (a_operands == NULL || b_ops == NULL) return 0; /* Scan the operand list of 'a' looking for an output operand. */ @@ -427,6 +427,7 @@ first_writes_to_seconds_operands (a, b, check_outputs) if (CGEN_OPERAND_INSTANCE_TYPE (a_operands) == CGEN_OPERAND_INSTANCE_OUTPUT) { int b_index; + const CGEN_OPERAND_INSTANCE * b_operands = b_ops; /* Special Case: The Condition bit 'C' is a shadow of the CBR register (control |