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authorAlan Modra <amodra@gmail.com>2019-12-16 10:00:07 +1030
committerAlan Modra <amodra@gmail.com>2019-12-16 17:35:13 +1030
commite6ced26afd50b0d74b8ea14ca1cd62cdc5d11ae8 (patch)
treeac662714d50d455e71e8f2f73101b06c284cb7d3
parent84e098cdea4eb6a5ddc525a2145ffe66475fa2af (diff)
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ubsan: xstormy16: left shift of negative value
cpu/ * xstormy16.cpu (f-rel12a): Avoid signed overflow. opcodes/ * xstormy16-ibld.c: Regenerate.
-rw-r--r--cpu/ChangeLog4
-rw-r--r--cpu/xstormy16.cpu2
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/xstormy16-ibld.c2
4 files changed, 10 insertions, 2 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index c5a44ab..688c596 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,7 @@
+2019-12-16 Alan Modra <amodra@gmail.com>
+
+ * xstormy16.cpu (f-rel12a): Avoid signed overflow.
+
2019-12-11 Alan Modra <amodra@gmail.com>
* epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
diff --git a/cpu/xstormy16.cpu b/cpu/xstormy16.cpu
index ae7e042..aa5a464 100644
--- a/cpu/xstormy16.cpu
+++ b/cpu/xstormy16.cpu
@@ -393,7 +393,7 @@
(length 11)
(mode INT)
(encode (value pc) (sra SI (sub SI value (add SI pc 2)) 1))
- (decode (value pc) (add SI (sll value 1) (add SI pc 2)))
+ (decode (value pc) (add SI (mul value 2) (add SI pc 2)))
)
(dnop rel12a "12 bit relative address" () h-uint f-rel12a)
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ce56ec0..1e13b1f 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,9 @@
2019-12-16 Alan Modra <amodra@gmail.com>
+ * xstormy16-ibld.c: Regenerate.
+
+2019-12-16 Alan Modra <amodra@gmail.com>
+
* score-dis.c (print_insn_score16): Move rpush/rpop imm field
value adjustment so that it doesn't affect reg field too.
diff --git a/opcodes/xstormy16-ibld.c b/opcodes/xstormy16-ibld.c
index babdd46..69da986 100644
--- a/opcodes/xstormy16-ibld.c
+++ b/opcodes/xstormy16-ibld.c
@@ -800,7 +800,7 @@ xstormy16_cgen_extract_operand (CGEN_CPU_DESC cd,
{
long value;
length = extract_normal (cd, ex_info, insn_value, 0|(1<<CGEN_IFLD_SIGNED)|(1<<CGEN_IFLD_PCREL_ADDR), 0, 4, 11, 32, total_length, pc, & value);
- value = ((((value) << (1))) + (((pc) + (2))));
+ value = ((((value) * (2))) + (((pc) + (2))));
fields->f_rel12a = value;
}
break;