aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorMark Alexander <marka@cygnus>1997-10-03 16:58:31 +0000
committerMark Alexander <marka@cygnus>1997-10-03 16:58:31 +0000
commit9388a6f2be06c69c47f0645179495cbc3e4ebe5a (patch)
tree1c3779c0a0d6baf2c3789dafbab8f4eb4cde7eea
parentd9eff006a5a83f6c59f6011a744d9e339668a3c8 (diff)
downloadgdb-9388a6f2be06c69c47f0645179495cbc3e4ebe5a.zip
gdb-9388a6f2be06c69c47f0645179495cbc3e4ebe5a.tar.gz
gdb-9388a6f2be06c69c47f0645179495cbc3e4ebe5a.tar.bz2
* config/mips/tm-mips.h (MAKE_MSYMBOL_SPECIAL): Force MIPS16
addresses to be odd. (MIPS_FPU_SINGLE_REGSIZE, MIPS_FPU_DOUBLE_REGSIZE): Define. * mips-tdep.c (mips_extract_return_value): Doubles aren't returned in FP0 if FP registers are single-precision only. start-sanitize-r5900 * config/mips/tm-r5900.h (MIPS_LAST_FP_ARG_REGNUM): Redefine to disable use of FP registers for function arguments. end-sanitize-r5900
-rw-r--r--gdb/ChangeLog12
-rw-r--r--gdb/config/mips/tm-mips.h11
2 files changed, 22 insertions, 1 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index bb5323f..0660c4c 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,3 +1,15 @@
+Fri Oct 3 09:52:26 1997 Mark Alexander <marka@cygnus.com>
+
+ * config/mips/tm-mips.h (MAKE_MSYMBOL_SPECIAL): Force MIPS16
+ addresses to be odd.
+ (MIPS_FPU_SINGLE_REGSIZE, MIPS_FPU_DOUBLE_REGSIZE): Define.
+ * mips-tdep.c (mips_extract_return_value): Doubles aren't
+ returned in FP0 if FP registers are single-precision only.
+start-sanitize-r5900
+ * config/mips/tm-r5900.h (MIPS_LAST_FP_ARG_REGNUM): Redefine
+ to disable use of FP registers for function arguments.
+end-sanitize-r5900
+
Mon Sep 29 23:03:03 1997 Mark Alexander <marka@cygnus.com>
* mips-tdep.c (set_reg_offset): New function.
diff --git a/gdb/config/mips/tm-mips.h b/gdb/config/mips/tm-mips.h
index ea1f4b0..867859f 100644
--- a/gdb/config/mips/tm-mips.h
+++ b/gdb/config/mips/tm-mips.h
@@ -163,6 +163,11 @@ int mips_about_to_return PARAMS ((CORE_ADDR pc));
#define MIPS_REGSIZE 4
#endif
+/* The sizes of floating point registers. */
+
+#define MIPS_FPU_SINGLE_REGSIZE 4
+#define MIPS_FPU_DOUBLE_REGSIZE 8
+
/* Number of machine registers */
#ifndef NUM_REGS
@@ -567,7 +572,11 @@ typedef unsigned long t_inst; /* Integer big enough to hold an instruction */
#define SYMBOL_IS_SPECIAL(sym) \
(((elf_symbol_type *) sym) -> internal_elf_sym.st_other == STO_MIPS16)
#define MAKE_MSYMBOL_SPECIAL(msym) \
- MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) | 0x80000000)
+ { \
+ MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) | 0x80000000); \
+ SYMBOL_VALUE_ADDRESS (msym) |= 1; \
+ }
+
#define MSYMBOL_IS_SPECIAL(msym) \
(((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
#define MSYMBOL_SIZE(msym) \