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authorNick Clifton <nickc@redhat.com>2013-01-07 15:09:07 +0000
committerNick Clifton <nickc@redhat.com>2013-01-07 15:09:07 +0000
commit73335eaedfb1e1129d76e7b2a6ecea6984ac6aa9 (patch)
tree595c27da1a0a853d5cb7b4b4b1adda60ab656b53
parent8ab8155f362b0826eb19b0e22e6c3be854d414ee (diff)
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(make_instruction): Rename to cr16_make_instruction.
(match_opcode): Rename to cr16_match_opcode.
-rw-r--r--include/opcode/ChangeLog5
-rw-r--r--include/opcode/cr16.h4
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/cr16-dis.c8
4 files changed, 16 insertions, 6 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog
index 90c313a..64c931a 100644
--- a/include/opcode/ChangeLog
+++ b/include/opcode/ChangeLog
@@ -1,3 +1,8 @@
+2013-01-07 Kaushik Phatak <kaushik.phatak@kpitcummins.com>
+
+ * cr16.h (make_instruction): Rename to cr16_make_instruction.
+ (match_opcode): Rename to cr16_match_opcode.
+
2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
* mips.h: Add support for r5900 instructions including lq and sq.
diff --git a/include/opcode/cr16.h b/include/opcode/cr16.h
index 76ac3a6..1f1191d 100644
--- a/include/opcode/cr16.h
+++ b/include/opcode/cr16.h
@@ -445,7 +445,7 @@ extern ULONGLONG cr16_allWords;
extern ins cr16_currInsn;
/* Prototypes for function in cr16-dis.c. */
-extern void make_instruction (void);
-extern int match_opcode (void);
+extern void cr16_make_instruction (void);
+extern int cr16_match_opcode (void);
#endif /* _CR16_H_ */
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ed0f903..b8c2246 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2013-01-07 Kaushik Phatak <kaushik.phatak@kpitcummins.com>
+
+ * cr16-dis.c (make_instruction): Rename to cr16_make_instruction.
+ (match_opcode): Rename to cr16_match_opcode.
+
2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
* mips-dis.c: Add names for CP0 registers of r5900.
diff --git a/opcodes/cr16-dis.c b/opcodes/cr16-dis.c
index 9fbdf00..c8cf3a3 100644
--- a/opcodes/cr16-dis.c
+++ b/opcodes/cr16-dis.c
@@ -315,7 +315,7 @@ build_mask (void)
/* Search for a matching opcode. Return 1 for success, 0 for failure. */
int
-match_opcode (void)
+cr16_match_opcode (void)
{
unsigned long mask;
/* The instruction 'constant' opcode doewsn't exceed 32 bits. */
@@ -743,7 +743,7 @@ print_arguments (ins *currentInsn, bfd_vma memaddr, struct disassemble_info *inf
/* Build the instruction's arguments. */
void
-make_instruction (void)
+cr16_make_instruction (void)
{
int i;
unsigned int shift;
@@ -813,7 +813,7 @@ print_insn_cr16 (bfd_vma memaddr, struct disassemble_info *info)
/* Retrieve the encoding from current memory location. */
get_words_at_PC (memaddr, info);
/* Find a matching opcode in table. */
- is_decoded = match_opcode ();
+ is_decoded = cr16_match_opcode ();
/* If found, print the instruction's mnemonic and arguments. */
if (is_decoded > 0 && (cr16_words[0] << 16 || cr16_words[1]) != 0)
{
@@ -825,7 +825,7 @@ print_insn_cr16 (bfd_vma memaddr, struct disassemble_info *info)
if (((cr16_currInsn.nargs = get_number_of_operands ()) != 0)
&& ! (IS_INSN_MNEMONIC ("b")))
info->fprintf_func (info->stream, "\t");
- make_instruction ();
+ cr16_make_instruction ();
/* For push/pop/pushrtn with RA instructions. */
if ((INST_HAS_REG_LIST) && ((cr16_words[0] >> 7) & 0x1))
cr16_currInsn.nargs +=1;