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authorYoshinori Sato <ysato@users.sourceforge.jp>2015-12-17 01:42:34 +0900
committerYoshinori Sato <ysato@users.sourceforge.jp>2015-12-22 23:26:39 +0900
commit239efab16429cad466591ccd1c57bba786171765 (patch)
treedf924eed859d84b34708f24512cf6fa9f4438beb
parentac4c9b0459fe89f2b84bf8b18a3bf86bf569b7d1 (diff)
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RXv2 support update
2015-12-22 Yoshinori Sato <ysato@users.sourceforge.jp> opcodes/ * rx-decode.opc (movco): Use uniqe id. (movli): Likewise. (stnz): Condition fix. (mvtacgu): Destination fix. * rx-decode.c: Regenerate. bfd/ * archures.c: Add bfd_mach_rx_v2. * bfd-in2.h: Regenerate. * cpu-rx.c (arch_info_struct): Add v2 information. * elf32-rx.c (elf32_rx_machine): Add v2 support.
-rw-r--r--bfd/ChangeLog7
-rw-r--r--opcodes/ChangeLog9
-rw-r--r--opcodes/rx-decode.c8
-rw-r--r--opcodes/rx-decode.opc8
4 files changed, 24 insertions, 8 deletions
diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index 03fbb34..49baaa1 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,3 +1,10 @@
+2015-12-22 Yoshinori Sato <ysato@users.sourceforge.jp>
+
+ * archures.c: Add bfd_mach_rx_v2.
+ * bfd-in2.h: Regenerate.
+ * cpu-rx.c (arch_info_struct): Add v2 information.
+ * elf32-rx.c (elf32_rx_machine): Add v2 support.
+
2015-12-22 Mickael Guene <mickael.guene@st.com>
* bfd-in2.h: Regenerate.
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 6145343..034d410 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,12 @@
+2015-12-22 Yoshinori Sato <ysato@users.sourceforge.jp>
+
+opcodes/
+ * rx-decode.opc (movco): Use uniqe id.
+ (movli): Likewise.
+ (stnz): Condition fix.
+ (mvtacgu): Destination fix.
+ * rx-decode.c: Regenerate.
+
2015-12-14 Yoshinori Sato <ysato@users.sourceforge.jp>
* rx-deocde.opc: Add new instructions pattern.
diff --git a/opcodes/rx-decode.c b/opcodes/rx-decode.c
index e298bed..7294c9c 100644
--- a/opcodes/rx-decode.c
+++ b/opcodes/rx-decode.c
@@ -8039,7 +8039,7 @@ rx_decode_opcode (unsigned long pc AU,
}
SYNTAX("stnz %1, %0");
#line 1055 "rx-decode.opc"
- ID(stcc); SR(rsrc); DR(rdst); S2cc(RXC_z);
+ ID(stcc); SR(rsrc); DR(rdst); S2cc(RXC_nz);
}
break;
@@ -10270,7 +10270,7 @@ rx_decode_opcode (unsigned long pc AU,
}
SYNTAX("mvtacgu %0, %1");
#line 1085 "rx-decode.opc"
- ID(mvtacgu); SR(a+32); DR(rdst); F_____;
+ ID(mvtacgu); DR(a+32); SR(rdst); F_____;
}
break;
@@ -10615,7 +10615,7 @@ rx_decode_opcode (unsigned long pc AU,
}
SYNTAX("movco %1, [%0]");
#line 1046 "rx-decode.opc"
- ID(mov); SR(rsrc); DR(rdst); F_____;
+ ID(movco); SR(rsrc); DR(rdst); F_____;
}
break;
@@ -10722,7 +10722,7 @@ rx_decode_opcode (unsigned long pc AU,
}
SYNTAX("movli [%1], %0");
#line 1049 "rx-decode.opc"
- ID(mov); SR(rsrc); DR(rdst); F_____;
+ ID(movli); SR(rsrc); DR(rdst); F_____;
}
break;
diff --git a/opcodes/rx-decode.opc b/opcodes/rx-decode.opc
index a3cc751..f95ff45 100644
--- a/opcodes/rx-decode.opc
+++ b/opcodes/rx-decode.opc
@@ -1043,16 +1043,16 @@ rx_decode_opcode (unsigned long pc AU,
/* RXv2 enhanced */
/** 1111 1101 0010 0111 rdst rsrc movco %1, [%0] */
- ID(mov); SR(rsrc); DR(rdst); F_____;
+ ID(movco); SR(rsrc); DR(rdst); F_____;
/** 1111 1101 0010 1111 rsrc rdst movli [%1], %0 */
- ID(mov); SR(rsrc); DR(rdst); F_____;
+ ID(movli); SR(rsrc); DR(rdst); F_____;
/** 1111 1100 0100 1011 rsrc rdst stz %1, %0 */
ID(stcc); SR(rsrc); DR(rdst); S2cc(RXC_z);
/** 1111 1100 0100 1111 rsrc rdst stnz %1, %0 */
- ID(stcc); SR(rsrc); DR(rdst); S2cc(RXC_z);
+ ID(stcc); SR(rsrc); DR(rdst); S2cc(RXC_nz);
/** 1111 1101 0000 a111 srca srcb emaca %1, %2, %0 */
ID(emaca); DR(a+32); SR(srca); S2R(srcb); F_____;
@@ -1082,7 +1082,7 @@ rx_decode_opcode (unsigned long pc AU,
ID(mvfacgu); S2C(((i^1)<<1)|m); SR(a+32); DR(rdst); F_____;
/** 1111 1101 0001 0111 a011 rdst mvtacgu %0, %1 */
- ID(mvtacgu); SR(a+32); DR(rdst); F_____;
+ ID(mvtacgu); DR(a+32); SR(rdst); F_____;
/** 1111 1101 0001 1001 a00i 0000 racl #%1, %0 */
ID(racl); SC(i+1); DR(a+32); F_____;