diff options
author | Jose E. Marchesi <jose.marchesi@oracle.com> | 2020-09-03 16:24:51 +0200 |
---|---|---|
committer | Jose E. Marchesi <jose.marchesi@oracle.com> | 2020-09-03 18:22:08 +0200 |
commit | 0316fb52d6eaca5f2398843f57ba08f8d3746056 (patch) | |
tree | df544c67ceacb4fcf00168b98bd20b6694076a02 | |
parent | 1d01693f555be09f78cea4e2454c24457777f057 (diff) | |
download | gdb-0316fb52d6eaca5f2398843f57ba08f8d3746056.zip gdb-0316fb52d6eaca5f2398843f57ba08f8d3746056.tar.gz gdb-0316fb52d6eaca5f2398843f57ba08f8d3746056.tar.bz2 |
bpf: several small fixes in the simulator
This patch fixes the following problems:
- Missing includes in several files leading to implicit function
declarations.
- Missing prototype for bpf_trace_printk in bpf-helpers.h
- The simulator bitsize was set to 32 bits, causing truncation of
the program counter.
Tested in bpf-unknown-none.
sim/ChangeLog:
2020-09-03 Jose E. Marchesi <jose.marchesi@oracle.com>
* bpf/bpf.c: Include bpf-helpers.h.
* bpf/bpf-helpers.h: Provide a prototype for bpf_trace_printk.
* bpf/configure.ac: Set simulator bitsize to 64.
* bpf/configure (includedir): Regenerate.
* bpf/sim-if.c: Include stdlib.h.
* bpf/traps.c: Likewise.
-rw-r--r-- | sim/ChangeLog | 9 | ||||
-rw-r--r-- | sim/bpf/bpf-helpers.h | 2 | ||||
-rw-r--r-- | sim/bpf/bpf.c | 1 | ||||
-rwxr-xr-x | sim/bpf/configure | 65 | ||||
-rw-r--r-- | sim/bpf/configure.ac | 1 | ||||
-rw-r--r-- | sim/bpf/sim-if.c | 2 | ||||
-rw-r--r-- | sim/bpf/traps.c | 2 |
7 files changed, 79 insertions, 3 deletions
diff --git a/sim/ChangeLog b/sim/ChangeLog index 5f5f5b8..28d78a3 100644 --- a/sim/ChangeLog +++ b/sim/ChangeLog @@ -1,5 +1,14 @@ 2020-09-03 Jose E. Marchesi <jose.marchesi@oracle.com> + * bpf/bpf.c: Include bpf-helpers.h. + * bpf/bpf-helpers.h: Provide a prototype for bpf_trace_printk. + * bpf/configure.ac: Set simulator bitsize to 64. + * bpf/configure (includedir): Regenerate. + * bpf/sim-if.c: Include stdlib.h. + * bpf/traps.c: Likewise. + +2020-09-03 Jose E. Marchesi <jose.marchesi@oracle.com> + * configure.ac: Do not configure sim/testsuite nor sim/igen if the primary target doesn't have a simulator. * configure: Regenerate. diff --git a/sim/bpf/bpf-helpers.h b/sim/bpf/bpf-helpers.h index fe9413f..021649c 100644 --- a/sim/bpf/bpf-helpers.h +++ b/sim/bpf/bpf-helpers.h @@ -26,6 +26,6 @@ enum bpf_kernel_helper #undef DEF_HELPER }; -/* void bpf_trace_printk (const char *fmt); */ +void bpf_trace_printk (SIM_CPU *current_cpu); #endif /* ! BPF_HELPERS_H */ diff --git a/sim/bpf/bpf.c b/sim/bpf/bpf.c index 0fb8d81..f413b36 100644 --- a/sim/bpf/bpf.c +++ b/sim/bpf/bpf.c @@ -27,6 +27,7 @@ #include "decode.h" #include "defs-le.h" /* For SCACHE */ +#include "bpf-helpers.h" /* It is not possible to include both defs-le.h and defs-be.h due to duplicated definitions, so we need a bunch of forward declarations diff --git a/sim/bpf/configure b/sim/bpf/configure index 7125c50..34e7069 100755 --- a/sim/bpf/configure +++ b/sim/bpf/configure @@ -782,6 +782,7 @@ enable_sim_environment enable_sim_inline with_pkgversion with_bugurl +enable_sim_bitsize enable_sim_endian enable_sim_alignment enable_sim_scache @@ -1436,6 +1437,7 @@ Optional Features: environment --enable-sim-inline=inlines Specify which functions should be inlined + --enable-sim-bitsize=N Specify target bitsize (32 or 64) --enable-sim-endian=endian Specify target byte endian orientation --enable-sim-alignment=align @@ -12882,7 +12884,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 12885 "configure" +#line 12899 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -12988,7 +12990,7 @@ else lt_dlunknown=0; lt_dlno_uscore=1; lt_dlneed_uscore=2 lt_status=$lt_dlunknown cat > conftest.$ac_ext <<_LT_EOF -#line 12991 "configure" +#line 13005 "configure" #include "confdefs.h" #if HAVE_DLFCN_H @@ -13539,6 +13541,65 @@ _ACEOF +wire_word_bitsize="64" +wire_word_msb="" +wire_address_bitsize="" +wire_cell_bitsize="" +# Check whether --enable-sim-bitsize was given. +if test "${enable_sim_bitsize+set}" = set; then : + enableval=$enable_sim_bitsize; sim_bitsize= +case "${enableval}" in + 64,63 | 64,63,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63";; + 32,31 | 32,31,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31";; + 64,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";; + 32,0 | 64,0,* ) sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0";; + 32) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then + sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=31" + else + sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=32 -DWITH_TARGET_WORD_MSB=0" + fi ;; + 64) if test x"$wire_word_msb" != x -a x"$wire_word_msb" != x0; then + sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=63" + else + sim_bitsize="-DWITH_TARGET_WORD_BITSIZE=64 -DWITH_TARGET_WORD_MSB=0" + fi ;; + *) as_fn_error $? "\"--enable-sim-bitsize was given $enableval. Expected 32 or 64\"" "$LINENO" 5 ;; +esac +# address bitsize +tmp=`echo "${enableval}" | sed -e "s/^[0-9]*,*[0-9]*,*//"` +case x"${tmp}" in + x ) ;; + x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=32" ;; + x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_ADDRESS_BITSIZE=64" ;; + * ) as_fn_error $? "\"--enable-sim-bitsize was given address size $enableval. Expected 32 or 64\"" "$LINENO" 5 ;; +esac +# cell bitsize +tmp=`echo "${enableval}" | sed -e "s/^[0-9]*,*[0-9*]*,*[0-9]*,*//"` +case x"${tmp}" in + x ) ;; + x32 | x32,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=32" ;; + x64 | x64,* ) sim_bitsize="${sim_bitsize} -DWITH_TARGET_CELL_BITSIZE=64" ;; + * ) as_fn_error $? "\"--enable-sim-bitsize was given cell size $enableval. Expected 32 or 64\"" "$LINENO" 5 ;; +esac +if test x"$silent" != x"yes" && test x"$sim_bitsize" != x""; then + echo "Setting bitsize flags = $sim_bitsize" 6>&1 +fi +else + sim_bitsize="" +if test x"$wire_word_bitsize" != x; then + sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_BITSIZE=$wire_word_bitsize" +fi +if test x"$wire_word_msb" != x; then + sim_bitsize="$sim_bitsize -DWITH_TARGET_WORD_MSB=$wire_word_msb" +fi +if test x"$wire_address_bitsize" != x; then + sim_bitsize="$sim_bitsize -DWITH_TARGET_ADDRESS_BITSIZE=$wire_address_bitsize" +fi +if test x"$wire_cell_bitsize" != x; then + sim_bitsize="$sim_bitsize -DWITH_TARGET_CELL_BITSIZE=$wire_cell_bitsize" +fi +fi + wire_endian="" default_endian="LITTLE" diff --git a/sim/bpf/configure.ac b/sim/bpf/configure.ac index 16ca54e..e7cd72a 100644 --- a/sim/bpf/configure.ac +++ b/sim/bpf/configure.ac @@ -4,6 +4,7 @@ sinclude(../common/acinclude.m4) SIM_AC_COMMON +SIM_AC_OPTION_BITSIZE([64]) SIM_AC_OPTION_ENDIAN([], [LITTLE]) SIM_AC_OPTION_ALIGNMENT(NONSTRICT_ALIGNMENT) SIM_AC_OPTION_SCACHE(16384) diff --git a/sim/bpf/sim-if.c b/sim/bpf/sim-if.c index fbb122b..e7e5de6 100644 --- a/sim/bpf/sim-if.c +++ b/sim/bpf/sim-if.c @@ -16,6 +16,8 @@ You should have received a copy of the GNU General Public License along with this program. If not, see <http://www.gnu.org/licenses/>. */ +#include <stdlib.h> + #include "sim-main.h" #include "sim-options.h" #include "libiberty.h" diff --git a/sim/bpf/traps.c b/sim/bpf/traps.c index e7ac0c2..646db4a 100644 --- a/sim/bpf/traps.c +++ b/sim/bpf/traps.c @@ -19,6 +19,8 @@ #define WANT_CPU bpfbf #define WANT_CPU_BPFBF +#include <stdlib.h> + #include "sim-main.h" SEM_PC |