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| author | David Edelsohn <dje.gcc@gmail.com> | 1995-08-02 15:18:52 +0000 |
|---|---|---|
| committer | David Edelsohn <dje.gcc@gmail.com> | 1995-08-02 15:18:52 +0000 |
| commit | 97eab8a17c45c3f00a82f6a01c76af5e70f675cf (patch) | |
| tree | bd6f52c3e44649a5ea71a30f9478c3f5a0310764 | |
| parent | 7613212c9782c320fa179adb8fa5e6880b070822 (diff) | |
| download | gdb-97eab8a17c45c3f00a82f6a01c76af5e70f675cf.zip gdb-97eab8a17c45c3f00a82f6a01c76af5e70f675cf.tar.gz gdb-97eab8a17c45c3f00a82f6a01c76af5e70f675cf.tar.bz2 | |
* sparc.h (F_NOTV9): Define.
| -rw-r--r-- | include/opcode/ChangeLog | 38 | ||||
| -rw-r--r-- | include/opcode/sparc.h | 8 |
2 files changed, 43 insertions, 3 deletions
diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 5762287..1e7d216 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,4 +1,42 @@ +Wed Aug 2 08:16:46 1995 Doug Evans <dje@canuck.cygnus.com> + + * sparc.h (F_NOTV9): Define. + +Tue Jul 11 14:20:42 1995 Jeff Spiegel <jeffs@lsil.com> + + * mips.h (INSN_4010): Define. + +Wed Jun 21 18:49:51 1995 Ken Raeburn <raeburn@cujo.cygnus.com> + + * m68k.h (TBL1): Reverse sense of "round" argument in result. + + Changes from Andreas Schwab <schwab@issan.informatik.uni-dortmund.de>: + * m68k.h: Fix argument descriptions of coprocessor + instructions to allow only alterable operands where appropriate. + [!NO_DEFAULT_SIZES]: An omitted size defaults to `w'. + (m68k_opcode_aliases): Add more aliases. + start-sanitize-arc +Sat Apr 29 23:17:03 1995 Doug Evans <dje@chestnut.cygnus.com> + + * arc.h (struct arc_opcode): New flag value ARC_OPCODE_COND_BRANCH. + (ARC_DELAY_{NONE,NORMAL,JUMP): Define delay slot types. +end-sanitize-arc + +Fri Apr 14 22:15:34 1995 Ken Raeburn <raeburn@cujo.cygnus.com> + + * m68k.h: Added explcitly short-sized conditional branches, and a + bunch of aliases (fmov*, ftest*, tdivul) to support gcc's + svr4-based configurations. + +start-sanitize-arc +Wed Apr 12 08:54:32 1995 Doug Evans <dje@canuck.cygnus.com> + + * arc.h (struct arc_opcode): New members next_asm, next_dis. + (ARC_HASH_OPCODE, ARC_HASH_ICODE): Define. + (ARC_OPCODE_NEXT_ASM, ARC_OPCODE_NEXT_DIS): Define. + (arc_opcode_lookup_asm, arc_opcode_lookup_dis): Add prototypes. + Thu Apr 6 20:36:55 1995 Doug Evans <dje@chestnut.cygnus.com> * arc.h (arc_get_opcode_mach): Define prototype. diff --git a/include/opcode/sparc.h b/include/opcode/sparc.h index c8be2fe..b872de1 100644 --- a/include/opcode/sparc.h +++ b/include/opcode/sparc.h @@ -17,7 +17,7 @@ GNU General Public License for more details. You should have received a copy of the GNU General Public License along with GAS or GDB; see the file COPYING. If not, write to -the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ +the Free Software Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ /* The SPARC opcode table (and other related data) is defined in the opcodes library in sparc-opc.c. If you change anything here, make @@ -66,8 +66,10 @@ struct sparc_opcode { #define F_UNBR 4 /* Unconditional branch */ #define F_CONDBR 8 /* Conditional branch */ #define F_JSR 16 /* Subroutine call */ +/* ??? One can argue this shouldn't be here and the architecture + field should be used instead. */ +#define F_NOTV9 32 /* Doesn't exist in v9 */ /* FIXME: Add F_ANACHRONISTIC flag for v9. */ -/* FIXME: Add F_OBSOLETE flag for v9, for instructions that no longer exist? */ /* @@ -140,7 +142,7 @@ Kinds of operands: x OPF field (v9 impdep). The following chars are unused: (note: ,[] are used as punctuation) -[uxOUXY3450] +[uOUXY3450] */ |