aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorJan Beulich <jbeulich@suse.com>2020-06-09 08:47:31 +0200
committerJan Beulich <jbeulich@suse.com>2020-06-09 08:47:31 +0200
commit828c2a2580aa0a505e72cb8307905dd03c55d2a1 (patch)
treee97ad7044c6f53f92233b1cc0d143c160e1f9650
parentda4977e00b73835180ccbce8a2046705fd8ade62 (diff)
downloadgdb-828c2a2580aa0a505e72cb8307905dd03c55d2a1.zip
gdb-828c2a2580aa0a505e72cb8307905dd03c55d2a1.tar.gz
gdb-828c2a2580aa0a505e72cb8307905dd03c55d2a1.tar.bz2
x86-64: adjust far indirect branch handling
An unwanted side effect of 5990e377e5a3 ("x86-64: Intel64 adjustments for insns dealing with far pointers") was that with -mintel64 LCALL and LJMP would now default to 64-bit operand size. Since 64-bit far branches aren't portable, the default operand size should still be 32-bit. However, since the 64-bit variant is permitted, an ambiguous operand warning should be issued. As to the actual code change, please note that the conditional surrounding the switch() that gets adjusted covers several cases which are of no interest to or benign in 64-bit mode, hence the new conditional added can be quite a bit less involved.
-rw-r--r--gas/ChangeLog11
-rw-r--r--gas/config/tc-i386.c4
-rw-r--r--gas/testsuite/gas/i386/i386.exp2
-rw-r--r--gas/testsuite/gas/i386/noreg-intel64.d5
-rw-r--r--gas/testsuite/gas/i386/noreg-intel64.l134
-rw-r--r--gas/testsuite/gas/i386/noreg-intel64.s1
-rw-r--r--gas/testsuite/gas/i386/noreg64.d2
-rw-r--r--gas/testsuite/gas/i386/noreg64.s2
8 files changed, 160 insertions, 1 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 176b07a..b4476bf 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,16 @@
2020-06-09 Jan Beulich <jbeulich@suse.com>
+ * config/tc-i386.c (process_suffix): Restrict defaulting to 'q'
+ suffix.
+ * testsuite/gas/i386/noreg64.s: Add lcall/ljmp cases.
+ * testsuite/gas/i386/noreg64.d: Adjust expectations.
+ * testsuite/gas/i386/noreg-intel64.d,
+ testsuite/gas/i386/noreg-intel64.l,
+ testsuite/gas/i386/noreg-intel64.s: New.
+ * testsuite/gas/i386/i386.exp: Run new tests.
+
+2020-06-09 Jan Beulich <jbeulich@suse.com>
+
* config/tc-i386.c (vex_encoding_error): New enumerator.
(VEX_check_operands): Rename to VEX_check_encoding. Check
for vex_encoding_error. Move Imm4 handling ...
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c
index c5fff6f..a5b9061 100644
--- a/gas/config/tc-i386.c
+++ b/gas/config/tc-i386.c
@@ -6836,7 +6836,9 @@ process_suffix (void)
case CODE_64BIT:
if (!i.tm.opcode_modifier.no_qsuf)
{
- i.suffix = QWORD_MNEM_SUFFIX;
+ if (i.tm.opcode_modifier.jump == JUMP_BYTE
+ || i.tm.opcode_modifier.no_lsuf)
+ i.suffix = QWORD_MNEM_SUFFIX;
break;
}
/* Fall through. */
diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp
index 7494afd..a610a9e 100644
--- a/gas/testsuite/gas/i386/i386.exp
+++ b/gas/testsuite/gas/i386/i386.exp
@@ -759,6 +759,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t
run_list_test "x86-64-sysenter-amd" "-mamd64"
run_dump_test "noreg64"
run_list_test "noreg64"
+ run_dump_test "noreg-intel64"
+ run_list_test "noreg-intel64" "-I${srcdir}/$subdir -mintel64"
run_list_test "movx64" "-al"
run_list_test "cvtsi2sX"
run_dump_test "x86-64-sse4_1"
diff --git a/gas/testsuite/gas/i386/noreg-intel64.d b/gas/testsuite/gas/i386/noreg-intel64.d
new file mode 100644
index 0000000..33d9c54
--- /dev/null
+++ b/gas/testsuite/gas/i386/noreg-intel64.d
@@ -0,0 +1,5 @@
+#as: -mintel64 -moperand-check=none
+#objdump: -dw
+#name: 64-bit insns not sizeable through register operands
+#source: noreg64.s
+#dump: noreg64.d
diff --git a/gas/testsuite/gas/i386/noreg-intel64.l b/gas/testsuite/gas/i386/noreg-intel64.l
new file mode 100644
index 0000000..4bcec14
--- /dev/null
+++ b/gas/testsuite/gas/i386/noreg-intel64.l
@@ -0,0 +1,134 @@
+.*: Assembler messages:
+.*:[1-9][0-9]*: Warning: .* `adc'
+.*:[1-9][0-9]*: Warning: .* `adc'
+.*:[1-9][0-9]*: Warning: .* `adc'
+.*:[1-9][0-9]*: Warning: .* `adc'
+.*:[1-9][0-9]*: Warning: .* `add'
+.*:[1-9][0-9]*: Warning: .* `add'
+.*:[1-9][0-9]*: Warning: .* `add'
+.*:[1-9][0-9]*: Warning: .* `add'
+.*:[1-9][0-9]*: Warning: .* `and'
+.*:[1-9][0-9]*: Warning: .* `and'
+.*:[1-9][0-9]*: Warning: .* `and'
+.*:[1-9][0-9]*: Warning: .* `and'
+.*:[1-9][0-9]*: Warning: .* `bt'
+.*:[1-9][0-9]*: Warning: .* `btc'
+.*:[1-9][0-9]*: Warning: .* `btr'
+.*:[1-9][0-9]*: Warning: .* `bts'
+.*:[1-9][0-9]*: Warning: .* `cmp'
+.*:[1-9][0-9]*: Warning: .* `cmp'
+.*:[1-9][0-9]*: Warning: .* `cmp'
+.*:[1-9][0-9]*: Warning: .* `cmp'
+.*:[1-9][0-9]*: Warning: .* `cmps'
+.*:[1-9][0-9]*: Warning: .* `cmps'
+.*:[1-9][0-9]*: Warning: .* `crc32'
+.*:[1-9][0-9]*: Warning: .* `crc32'
+.*:[1-9][0-9]*: Warning: .* `dec'
+.*:[1-9][0-9]*: Warning: .* `div'
+.*:[1-9][0-9]*: Warning: .* `fadd'
+.*:[1-9][0-9]*: Warning: .* `fcom'
+.*:[1-9][0-9]*: Warning: .* `fcomp'
+.*:[1-9][0-9]*: Warning: .* `fdiv'
+.*:[1-9][0-9]*: Warning: .* `fdivr'
+.*:[1-9][0-9]*: Warning: .* `fiadd'
+.*:[1-9][0-9]*: Warning: .* `ficom'
+.*:[1-9][0-9]*: Warning: .* `ficomp'
+.*:[1-9][0-9]*: Warning: .* `fidiv'
+.*:[1-9][0-9]*: Warning: .* `fidivr'
+.*:[1-9][0-9]*: Warning: .* `fild'
+.*:[1-9][0-9]*: Warning: .* `fimul'
+.*:[1-9][0-9]*: Warning: .* `fist'
+.*:[1-9][0-9]*: Warning: .* `fistp'
+.*:[1-9][0-9]*: Warning: .* `fisttp'
+.*:[1-9][0-9]*: Warning: .* `fisub'
+.*:[1-9][0-9]*: Warning: .* `fisubr'
+.*:[1-9][0-9]*: Warning: .* `fld'
+.*:[1-9][0-9]*: Warning: .* `fmul'
+.*:[1-9][0-9]*: Warning: .* `fst'
+.*:[1-9][0-9]*: Warning: .* `fstp'
+.*:[1-9][0-9]*: Warning: .* `fsub'
+.*:[1-9][0-9]*: Warning: .* `fsubr'
+.*:[1-9][0-9]*: Warning: .* `idiv'
+.*:[1-9][0-9]*: Warning: .* `imul'
+.*:[1-9][0-9]*: Warning: .* `in'
+.*:[1-9][0-9]*: Warning: .* `in'
+.*:[1-9][0-9]*: Warning: .* `inc'
+.*:[1-9][0-9]*: Warning: .* `ins'
+.*:[1-9][0-9]*: Warning: .* `ins'
+.*:[1-9][0-9]*: Warning: .* `iret'
+.*:[1-9][0-9]*: Warning: .* `lcall'
+.*:[1-9][0-9]*: Warning: .* `ljmp'
+.*:[1-9][0-9]*: Warning: .* `lods'
+.*:[1-9][0-9]*: Warning: .* `lods'
+.*:[1-9][0-9]*: Warning: .* `lret'
+.*:[1-9][0-9]*: Warning: .* `lret'
+.*:[1-9][0-9]*: Warning: .* `mov'
+.*:[1-9][0-9]*: Warning: .* `mov'
+.*:[1-9][0-9]*: Warning: .* `mov'
+.*:[1-9][0-9]*: Warning: .* `movs'
+.*:[1-9][0-9]*: Warning: .* `movs'
+.*:[1-9][0-9]*: Warning: .* `mul'
+.*:[1-9][0-9]*: Warning: .* `neg'
+.*:[1-9][0-9]*: Warning: .* `nop'
+.*:[1-9][0-9]*: Warning: .* `not'
+.*:[1-9][0-9]*: Warning: .* `or'
+.*:[1-9][0-9]*: Warning: .* `or'
+.*:[1-9][0-9]*: Warning: .* `or'
+.*:[1-9][0-9]*: Warning: .* `or'
+.*:[1-9][0-9]*: Warning: .* `out'
+.*:[1-9][0-9]*: Warning: .* `out'
+.*:[1-9][0-9]*: Warning: .* `outs'
+.*:[1-9][0-9]*: Warning: .* `outs'
+.*:[1-9][0-9]*: Warning: .* `ptwrite'
+.*:[1-9][0-9]*: Warning: .* `rcl'
+.*:[1-9][0-9]*: Warning: .* `rcl'
+.*:[1-9][0-9]*: Warning: .* `rcl'
+.*:[1-9][0-9]*: Warning: .* `rcl'
+.*:[1-9][0-9]*: Warning: .* `rcr'
+.*:[1-9][0-9]*: Warning: .* `rcr'
+.*:[1-9][0-9]*: Warning: .* `rcr'
+.*:[1-9][0-9]*: Warning: .* `rcr'
+.*:[1-9][0-9]*: Warning: .* `rol'
+.*:[1-9][0-9]*: Warning: .* `rol'
+.*:[1-9][0-9]*: Warning: .* `rol'
+.*:[1-9][0-9]*: Warning: .* `rol'
+.*:[1-9][0-9]*: Warning: .* `ror'
+.*:[1-9][0-9]*: Warning: .* `ror'
+.*:[1-9][0-9]*: Warning: .* `ror'
+.*:[1-9][0-9]*: Warning: .* `ror'
+.*:[1-9][0-9]*: Warning: .* `sbb'
+.*:[1-9][0-9]*: Warning: .* `sbb'
+.*:[1-9][0-9]*: Warning: .* `sbb'
+.*:[1-9][0-9]*: Warning: .* `sbb'
+.*:[1-9][0-9]*: Warning: .* `scas'
+.*:[1-9][0-9]*: Warning: .* `scas'
+.*:[1-9][0-9]*: Warning: .* `sal'
+.*:[1-9][0-9]*: Warning: .* `sal'
+.*:[1-9][0-9]*: Warning: .* `sal'
+.*:[1-9][0-9]*: Warning: .* `sal'
+.*:[1-9][0-9]*: Warning: .* `sar'
+.*:[1-9][0-9]*: Warning: .* `sar'
+.*:[1-9][0-9]*: Warning: .* `sar'
+.*:[1-9][0-9]*: Warning: .* `sar'
+.*:[1-9][0-9]*: Warning: .* `shl'
+.*:[1-9][0-9]*: Warning: .* `shl'
+.*:[1-9][0-9]*: Warning: .* `shl'
+.*:[1-9][0-9]*: Warning: .* `shl'
+.*:[1-9][0-9]*: Warning: .* `shr'
+.*:[1-9][0-9]*: Warning: .* `shr'
+.*:[1-9][0-9]*: Warning: .* `shr'
+.*:[1-9][0-9]*: Warning: .* `shr'
+.*:[1-9][0-9]*: Warning: .* `stos'
+.*:[1-9][0-9]*: Warning: .* `stos'
+.*:[1-9][0-9]*: Warning: .* `sub'
+.*:[1-9][0-9]*: Warning: .* `sub'
+.*:[1-9][0-9]*: Warning: .* `sub'
+.*:[1-9][0-9]*: Warning: .* `sub'
+.*:[1-9][0-9]*: Warning: .* `sysret'
+.*:[1-9][0-9]*: Warning: .* `test'
+.*:[1-9][0-9]*: Warning: .* `test'
+.*:[1-9][0-9]*: Warning: .* `test'
+.*:[1-9][0-9]*: Warning: .* `xor'
+.*:[1-9][0-9]*: Warning: .* `xor'
+.*:[1-9][0-9]*: Warning: .* `xor'
+.*:[1-9][0-9]*: Warning: .* `xor'
diff --git a/gas/testsuite/gas/i386/noreg-intel64.s b/gas/testsuite/gas/i386/noreg-intel64.s
new file mode 100644
index 0000000..e5487d1
--- /dev/null
+++ b/gas/testsuite/gas/i386/noreg-intel64.s
@@ -0,0 +1 @@
+ .include "noreg64.s"
diff --git a/gas/testsuite/gas/i386/noreg64.d b/gas/testsuite/gas/i386/noreg64.d
index f381c75..fd1193d 100644
--- a/gas/testsuite/gas/i386/noreg64.d
+++ b/gas/testsuite/gas/i386/noreg64.d
@@ -66,8 +66,10 @@ Disassembly of section .text:
*[a-f0-9]+: 6d insl \(%dx\),%es:\(%rdi\)
*[a-f0-9]+: cf iret *
*[a-f0-9]+: ff 20 jmpq \*\(%rax\)
+ *[a-f0-9]+: ff 18 lcall \*\(%rax\)
*[a-f0-9]+: 0f 01 10 lgdt \(%rax\)
*[a-f0-9]+: 0f 01 18 lidt \(%rax\)
+ *[a-f0-9]+: ff 28 ljmp \*\(%rax\)
*[a-f0-9]+: 0f 00 10 lldt \(%rax\)
*[a-f0-9]+: 0f 01 30 lmsw \(%rax\)
*[a-f0-9]+: ad lods %ds:\(%rsi\),%eax
diff --git a/gas/testsuite/gas/i386/noreg64.s b/gas/testsuite/gas/i386/noreg64.s
index 1ccb8fd..4a68c4b 100644
--- a/gas/testsuite/gas/i386/noreg64.s
+++ b/gas/testsuite/gas/i386/noreg64.s
@@ -59,8 +59,10 @@ noreg:
ins %dx, %es:(%rdi)
iret
jmp *(%rax)
+ lcall *(%rax)
lgdt (%rax)
lidt (%rax)
+ ljmp *(%rax)
lldt (%rax)
lmsw (%rax)
lods