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| author | Jan Beulich <jbeulich@suse.com> | 2023-12-22 09:34:10 +0100 |
|---|---|---|
| committer | Jan Beulich <jbeulich@suse.com> | 2023-12-22 09:34:10 +0100 |
| commit | 3e4a511bee874d73f9f749cc8cf3bc748b4d47b5 (patch) | |
| tree | ef60a2e3f33f6e5ceabe27ffcdc316ed47d24ba9 | |
| parent | ce7056886a6e52a4fc91b5e3b28da2c0735d0b19 (diff) | |
| download | gdb-3e4a511bee874d73f9f749cc8cf3bc748b4d47b5.zip gdb-3e4a511bee874d73f9f749cc8cf3bc748b4d47b5.tar.gz gdb-3e4a511bee874d73f9f749cc8cf3bc748b4d47b5.tar.bz2 | |
x86-64: refuse "high" 8-bit regs with .insn and VEX/XOP/EVEX encodings
Much like REX, those encodings - if permitting 8-bit regs at all, i.e.
only starting with APX - permit use of "new" 8-bit registers only. %ah,
%ch, %dh, and %bh cannot be encoded and hence should be rejected.
Permit their use outside of 64-bit code though, as "new" registers
simply don't exist there.
| -rw-r--r-- | gas/config/tc-i386.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 6e2f6e5..cdd3b55 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -11485,6 +11485,16 @@ s_insn (int dummy ATTRIBUTE_UNUSED) for (j = i.imm_operands; j < i.operands; ++j) { + /* Look for 8-bit operands that use old registers. */ + if (i.vec_encoding != vex_encoding_default + && flag_code == CODE_64BIT + && i.types[j].bitfield.class == Reg + && i.types[j].bitfield.byte + && !(i.op[j].regs->reg_flags & RegRex64) + && i.op[j].regs->reg_num > 3) + as_bad (_("can't encode register '%s%s' with VEX/XOP/EVEX"), + register_prefix, i.op[j].regs->reg_name); + i.types[j].bitfield.instance = InstanceNone; if (operand_type_check (i.types[j], disp)) |