aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRichard Earnshaw <rearnsha@arm.com>2024-04-29 15:09:06 +0100
committerRichard Earnshaw <rearnsha@arm.com>2024-05-14 10:56:58 +0100
commit30d57f2e41b168dcce23e5e63fae28685920077e (patch)
tree1974613c62b0616226773467902717a3ef6953e0
parent71afdf2e2645e7123e166834b0344323b0a41ce2 (diff)
downloadgdb-30d57f2e41b168dcce23e5e63fae28685920077e.zip
gdb-30d57f2e41b168dcce23e5e63fae28685920077e.tar.gz
gdb-30d57f2e41b168dcce23e5e63fae28685920077e.tar.bz2
arm: update documentation for removal of the Maverick extension
Finally, update the documentation and add a NEWS item.
-rw-r--r--binutils/NEWS4
-rw-r--r--gas/doc/c-arm.texi11
2 files changed, 8 insertions, 7 deletions
diff --git a/binutils/NEWS b/binutils/NEWS
index 5c31953..756a29d 100644
--- a/binutils/NEWS
+++ b/binutils/NEWS
@@ -12,6 +12,10 @@
section they will now also display the contents of the .eh_frame_hdr section,
if present.
+* Support for the Maverick co-processor (via -mfpu=maverick) on Arm has been
+ removed. The CPU name ep9312 is still recognized, but treated as an alias
+ for arm920t.
+
Changes in 2.42:
* The objdump program has a new command line option -Z/--decompress which
diff --git a/gas/doc/c-arm.texi b/gas/doc/c-arm.texi
index 0c13343..067ed4d 100644
--- a/gas/doc/c-arm.texi
+++ b/gas/doc/c-arm.texi
@@ -162,7 +162,7 @@ recognized:
@code{neoverse-v1},
@code{xgene1},
@code{xgene2},
-@code{ep9312} (ARM920 with Cirrus Maverick coprocessor),
+@code{ep9312},
@code{i80200} (Intel XScale processor)
@code{iwmmxt} (Intel XScale processor with Wireless MMX technology coprocessor)
and
@@ -172,8 +172,8 @@ assembler to accept instructions valid for any ARM processor.
In addition to the basic instruction set, the assembler can be told to
accept various extension mnemonics that extend the processor using the
-co-processor instruction space. For example, @code{-mcpu=arm920+maverick}
-is equivalent to specifying @code{-mcpu=ep9312}.
+co-processor instruction space. For example, @code{-mcpu=cortex-a53+simd}
+enables the Advanced SIMD extension.
Multiple extensions may be specified, separated by a @code{+}. The
extensions should be specified in ascending alphabetical order.
@@ -184,8 +184,7 @@ documented in the list of extensions below.
Extension mnemonics may also be removed from those the assembler accepts.
This is done be prepending @code{no} to the option that adds the extension.
Extensions that are removed should be listed after all extensions which have
-been added, again in ascending alphabetical order. For example,
-@code{-mcpu=ep9312+nomaverick} is equivalent to specifying @code{-mcpu=arm920}.
+been added, again in ascending alphabetical order.
The following extensions are currently supported:
@@ -201,7 +200,6 @@ The following extensions are currently supported:
@code{iwmmxt},
@code{iwmmxt2},
@code{xscale},
-@code{maverick},
@code{mp} (Multiprocessing Extensions for v7-A and v7-R
architectures),
@code{os} (Operating System for v6M architecture),
@@ -525,7 +523,6 @@ The following format options are recognized:
@code{arm1020t},
@code{arm1020e},
@code{arm1136jf-s},
-@code{maverick},
@code{neon},
@code{neon-vfpv3},
@code{neon-fp16},