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authorSergey Belyashov <sergey.belyashov@gmail.com>2020-01-14 13:13:57 +0000
committerNick Clifton <nickc@redhat.com>2020-01-14 13:13:57 +0000
commit7a6bf3becbe3e0ce47d2681edcfe7adcb67fe4e2 (patch)
treea164f68d854f21e3f5b27109be9e88f69fbf7fdb
parentef4e5ba50c76511d4306edf1526c15269f1d7747 (diff)
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Fix various assembler testsuite failures for the Z80 target.
PR 25377 gas * config/tc-z80.c: Add support for half precision, single precision and double precision floating point values. * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes. * doc/as.texi: Add new z80 command line options. * doc/c-z80.texi: Document new z80 command line options. * testsuite/gas/z80/ez80_pref_dis.s: New test. * testsuite/gas/z80/ez80_pref_dis.d: New test driver. * testsuite/gas/z80/z80.exp: Run the new test. * testsuite/gas/z80/fp_math48.d: Use correct command line option. * testsuite/gas/z80/fp_zeda32.d: Likewise. * testsuite/gas/z80/strings.d: Update expected output. opcodes * z80-dis.c (suffix): Use .db instruction to generate double prefix.
-rw-r--r--gas/ChangeLog15
-rw-r--r--gas/config/tc-z80.c68
-rw-r--r--gas/config/tc-z80.h1
-rw-r--r--gas/doc/as.texi85
-rw-r--r--gas/doc/c-z80.texi139
-rw-r--r--gas/testsuite/gas/z80/ez80_pref_dis.d34
-rw-r--r--gas/testsuite/gas/z80/ez80_pref_dis.s8
-rw-r--r--gas/testsuite/gas/z80/fp_math48.d2
-rw-r--r--gas/testsuite/gas/z80/fp_zeda32.d2
-rw-r--r--gas/testsuite/gas/z80/strings.d14
-rw-r--r--gas/testsuite/gas/z80/z80.exp2
-rw-r--r--opcodes/ChangeLog6
-rw-r--r--opcodes/z80-dis.c2
13 files changed, 251 insertions, 127 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 184af58..07cb331 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,18 @@
+2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25377
+ * config/tc-z80.c: Add support for half precision, single
+ precision and double precision floating point values.
+ * config/tc-z80.h b/gas/config/tc-z80.h: Disable string escapes.
+ * doc/as.texi: Add new z80 command line options.
+ * doc/c-z80.texi: Document new z80 command line options.
+ * testsuite/gas/z80/ez80_pref_dis.s: New test.
+ * testsuite/gas/z80/ez80_pref_dis.d: New test driver.
+ * testsuite/gas/z80/z80.exp: Run the new test.
+ * testsuite/gas/z80/fp_math48.d: Use correct command line option.
+ * testsuite/gas/z80/fp_zeda32.d: Likewise.
+ * testsuite/gas/z80/strings.d: Update expected output.
+
2020-01-13 Matthew Malcomson <matthew.malcomson@arm.com>
* config/tc-aarch64.c (f64mm, f32mm): Add sve as a feature
diff --git a/gas/config/tc-z80.c b/gas/config/tc-z80.c
index 28b0f2b..d823549 100644
--- a/gas/config/tc-z80.c
+++ b/gas/config/tc-z80.c
@@ -23,13 +23,14 @@
#include "safe-ctype.h"
#include "subsegs.h"
#include "elf/z80.h"
+#include "dwarf2dbg.h"
/* Exported constants. */
const char comment_chars[] = ";\0";
const char line_comment_chars[] = "#;\0";
const char line_separator_chars[] = "\0";
const char EXP_CHARS[] = "eE\0";
-const char FLT_CHARS[] = "RrFf\0";
+const char FLT_CHARS[] = "RrDdFfSsHh\0";
/* For machine specific options. */
const char * md_shortopts = ""; /* None yet. */
@@ -50,8 +51,8 @@ enum options
OPTION_MACH_IUP,
OPTION_MACH_WUP,
OPTION_MACH_FUP,
- OPTION_FLOAT_FORMAT,
- OPTION_DOUBLE_FORMAT,
+ OPTION_FP_SINGLE_FORMAT,
+ OPTION_FP_DOUBLE_FORMAT,
OPTION_COMPAT_LL_PREFIX,
OPTION_COMPAT_COLONLESS,
OPTION_COMPAT_SDCC
@@ -84,8 +85,8 @@ struct option md_longopts[] =
{ "z180", no_argument, NULL, OPTION_MACH_Z180},
{ "ez80", no_argument, NULL, OPTION_MACH_EZ80_Z80},
{ "ez80-adl", no_argument, NULL, OPTION_MACH_EZ80_ADL},
- { "float", required_argument, NULL, OPTION_FLOAT_FORMAT},
- { "double", required_argument, NULL, OPTION_DOUBLE_FORMAT},
+ { "fp-s", required_argument, NULL, OPTION_FP_SINGLE_FORMAT},
+ { "fp-d", required_argument, NULL, OPTION_FP_DOUBLE_FORMAT},
{ "strict", no_argument, NULL, OPTION_MACH_FUD},
{ "full", no_argument, NULL, OPTION_MACH_IUP},
{ "with-inst", required_argument, NULL, OPTION_MACH_INST},
@@ -164,6 +165,12 @@ static const char *
str_to_zeda32 (char *litP, int *sizeP);
static const char *
str_to_float48 (char *litP, int *sizeP);
+static const char *
+str_to_ieee754_h (char *litP, int *sizeP);
+static const char *
+str_to_ieee754_s (char *litP, int *sizeP);
+static const char *
+str_to_ieee754_d (char *litP, int *sizeP);
static str_to_float_t
get_str_to_float (const char *arg)
@@ -174,7 +181,16 @@ get_str_to_float (const char *arg)
if (strcasecmp (arg, "math48") == 0)
return str_to_float48;
- if (strcasecmp (arg, "ieee754") != 0)
+ if (strcasecmp (arg, "half") != 0)
+ return str_to_ieee754_h;
+
+ if (strcasecmp (arg, "single") != 0)
+ return str_to_ieee754_s;
+
+ if (strcasecmp (arg, "double") != 0)
+ return str_to_ieee754_d;
+
+ if (strcasecmp (arg, "ieee754") == 0)
as_fatal (_("invalid floating point numbers type `%s'"), arg);
return NULL;
}
@@ -248,10 +264,10 @@ md_parse_option (int c, const char* arg)
ins_ok = INS_GBZ80;
ins_err = INS_UNDOC | INS_UNPORT;
break;
- case OPTION_FLOAT_FORMAT:
+ case OPTION_FP_SINGLE_FORMAT:
str_to_float = get_str_to_float (arg);
break;
- case OPTION_DOUBLE_FORMAT:
+ case OPTION_FP_DOUBLE_FORMAT:
str_to_double = get_str_to_float (arg);
break;
case OPTION_MACH_INST:
@@ -319,11 +335,14 @@ Compatibility options:\n\
-local-prefix=TEXT\t treat labels prefixed by TEXT as local\n\
-colonless\t\t permit colonless labels\n\
-sdcc\t\t\t accept SDCC specific instruction syntax\n\
- -float=FORMAT\t\t set floating point numbers format\n\
- -double=FORMAT\t\t set floating point numbers format\n\
+ -fp-s=FORMAT\t\t set single precission FP numbers format\n\
+ -fp-d=FORMAT\t\t set double precission FP numbers format\n\
Where FORMAT one of:\n\
ieee754\t\t IEEE754 compatible\n\
- zeda32\t\t\t Zeda z80float library 32 bit format\n\
+ half\t\t\t IEEE754 half precision (16 bit)\n\
+ single\t\t IEEE754 single precision (32 bit)\n\
+ double\t\t IEEE754 double precision (64 bit)\n\
+ zeda32\t\t Zeda z80float library 32 bit format\n\
math48\t\t 48 bit format from Math48 library\n\
\n\
Support for known undocumented instructions:\n\
@@ -649,13 +668,17 @@ md_atof (int type, char *litP, int *sizeP)
{
case 'f':
case 'F':
+ case 's':
+ case 'S':
if (str_to_float)
- return str_to_float (litP, sizeP);
+ return str_to_float (litP, sizeP);
break;
case 'd':
case 'D':
+ case 'r':
+ case 'R':
if (str_to_double)
- return str_to_double (litP, sizeP);
+ return str_to_double (litP, sizeP);
break;
}
return ieee_md_atof (type, litP, sizeP, FALSE);
@@ -3255,6 +3278,7 @@ md_assemble (char *str)
}
else
{
+ dwarf2_emit_insn (0);
if ((*p) && (!ISSPACE (*p)))
{
if (*p != '.' || !(ins_ok & INS_EZ80) || !assemble_suffix (&p))
@@ -3670,3 +3694,21 @@ str_to_float48(char *litP, int *sizeP)
*litP++ = (char)(mantissa >> i);
return NULL;
}
+
+static const char *
+str_to_ieee754_h(char *litP, int *sizeP)
+{
+ return ieee_md_atof ('h', litP, sizeP, FALSE);
+}
+
+static const char *
+str_to_ieee754_s(char *litP, int *sizeP)
+{
+ return ieee_md_atof ('s', litP, sizeP, FALSE);
+}
+
+static const char *
+str_to_ieee754_d(char *litP, int *sizeP)
+{
+ return ieee_md_atof ('d', litP, sizeP, FALSE);
+}
diff --git a/gas/config/tc-z80.h b/gas/config/tc-z80.h
index ae98d5d..5749027 100644
--- a/gas/config/tc-z80.h
+++ b/gas/config/tc-z80.h
@@ -96,7 +96,6 @@ extern void z80_cons_fix_new (fragS *, int, int, expressionS *);
/* We allow single quotes to delimit character constants as
well, but it is cleaner to handle that in tc-z80.c. */
#define SINGLE_QUOTE_STRINGS
-#define TC_STRING_ESCAPES 0
/* An `.lcomm' directive with no explicit alignment parameter will
use this macro to set P2VAR to the alignment that a request for
diff --git a/gas/doc/as.texi b/gas/doc/as.texi
index ab661a7..fa15509 100644
--- a/gas/doc/as.texi
+++ b/gas/doc/as.texi
@@ -631,6 +631,11 @@ gcc(1), ld(1), and the Info entries for @file{binutils} and @file{ld}.
@emph{Target Z80 options:}
[@b{-z80}]|[@b{-z180}]|[@b{-r800}]|[@b{-ez80}]|[@b{-ez80-adl}]
+ [@b{-local-prefix=}@var{PREFIX}]
+ [@b{-colonless}]
+ [@b{-sdcc}]
+ [@b{-fp-s=}@var{FORMAT}]
+ [@b{-fp-d=}@var{FORMAT}]
[@b{-strict}]|[@b{-full}]
[@b{-with-inst=@var{INST}[,...]}] [@b{-Wnins @var{INST}[,...]}]
[@b{-without-inst=@var{INST}[,...]}] [@b{-Fins @var{INST}[,...]}]
@@ -1940,78 +1945,24 @@ Xtensa processor.
@end ifset
-@c man begin OPTIONS
-
@ifset Z80
-The following options are available when @value{AS} is configured for
-a Z80 family processor.
-@table @gcctabopt
-@item -z80
-Assemble for Z80 processor.
-@item -r800
-Assemble for R800 processor.
-@item -z180
-Assemble for Z180 processor.
-@item -ez80
-Assemble for eZ80 processor in Z80 memory mode by default.
-@item -ez80-adl
-Assemble for eZ80 processor in ADL memory mode by default.
-
-@item @code{-colonless}
-Accept colonless labels. All names at line begin are treated as labels.
-@item @code{-sdcc}
-Accept assembler code produces by SDCC.
-
-@item @code{-strict}
-Accept documented instructions only.
-@item @code{-full}
-Accept all known Z80 instructions.
-@item @code{-with-inst=INST[,...]}
-@itemx @code{-Wnins INST[,...]}
-Enable specified undocumented instruction(s).
-@item @code{-without-inst=INST[,...]}
-@itemx @code{-Fins INST[,...]}
-Disable specified undocumented instruction(s).
-
-@item -ignore-undocumented-instructions
-@itemx -Wnud
-Assemble undocumented Z80 instructions that also work on R800 without warning.
-@item -ignore-unportable-instructions
-@itemx -Wnup
-Assemble all undocumented Z80 instructions without warning.
-@item -warn-undocumented-instructions
-@itemx -Wud
-Issue a warning for undocumented Z80 instructions that also work on R800.
-@item -warn-unportable-instructions
-@itemx -Wup
-Issue a warning for undocumented Z80 instructions that do not work on R800.
-@item -forbid-undocumented-instructions
-@itemx -Fud
-Treat all undocumented instructions as errors.
-@item -forbid-unportable-instructions
-@itemx -Fup
-Treat undocumented Z80 instructions that do not work on R800 as errors.
-@end table
+@ifclear man
+@xref{Z80 Options}, for the options available when @value{AS} is configured
+for an Z80 processor.
+@end ifclear
-Folowing undocumented instructions may be enabled/disabled by
-@code{-with-inst}/@code{-without-inst}:
-@table @gcctabopt
-@item @code{idx-reg-halves}
-All operations with halves of index registers (IXL, IXH, IYL, IYH).
-@item @code{sli}
-SLI or SLL instruction.
-@item @code{op-ii-ld}
-Istructions like @code{<op> (<ii>+<d>),<r>}, where @code{<op>}
-is shift or bit manipulation instruction (RLC, SLA, SET, RES...).
-@item @code{in-f-c}
-Instruction @code{IN F,(C)}.
-@item @code{out-c-0}
-Instruction @code{OUT (C),0}
-@end table
+@ifset man
+@c man begin OPTIONS
+The following options are available when @value{AS} is configured for an
+Z80 processor.
+@c man end
+@c man begin INCLUDE
+@include c-z80.texi
+@c ended inside the included file
@end ifset
-@c man end
+@end ifset
@menu
* Manual:: Structure of this Manual
diff --git a/gas/doc/c-z80.texi b/gas/doc/c-z80.texi
index a436646..dd6332d 100644
--- a/gas/doc/c-z80.texi
+++ b/gas/doc/c-z80.texi
@@ -24,87 +24,125 @@
@end menu
@node Z80 Options
-@section Options
+@section Command-line Options
@cindex Z80 options
@cindex options for Z80
-@table @option
+@c man begin OPTIONS
+@table @gcctabopt
@cindex @code{-z80} command-line option, Z80
@item -z80
Produce code for the Z80 processor. By default accepted undocumented
-operations with halves of index registers (IXL, IXH, IYL, IYH) and
-instuction IN F,(C). Other useful undocumented instructions produces
+operations with halves of index registers (@code{IXL}, @code{IXH}, @code{IYL}, @code{IYH}) and
+instuction @code{IN F,(C)}. Other useful undocumented instructions produces
warnings. Undocumented instructions may not work on some CPUs, use
them on your own risk.
-@cindex @code{-r800} command-line option, R800
+@cindex @code{-r800} command-line option, Z80
@item -r800
Produce code for the R800 processor.
-@cindex @code{-z180} command-line option, Z180
+@cindex @code{-z180} command-line option, Z80
@item -z180
Produce code for the Z180 processor.
-@cindex @code{-ez80} command-line option, eZ80
+@cindex @code{-ez80} command-line option, Z80
@item -ez80
Produce code for the eZ80 processor in Z80 memory mode by default.
-@cindex @code{-ez80-adl} command-line option, eZ80
+@cindex @code{-ez80-adl} command-line option, Z80
@item -ez80-adl
Produce code for the eZ80 processor in ADL memory mode by default.
-@cindex Compatibility options
-@item @code{-colonless}
+@cindex @code{-local-prefix} command-line option, Z80
+@item -local-prefix=@var{prefix}
+Mark all labels with specified prefix as local. But such label can be
+marked global explicitly in the code. This option do not change default
+local label prefix @code{.L}, it is just adds new one.
+
+@cindex @code{-colonless} command-line option, Z80
+@item -colonless
Accept colonless labels. All names at line begin are treated as labels.
-@item @code{-sdcc}
-Accept assembler code produces by SDCC.
+@cindex @code{-sdcc} command-line option, Z80
+@item -sdcc
+Accept assembler code produced by SDCC.
+
+@cindex @code{-fp-s} command-line option, Z80
+@item -fp-s=@var{FORMAT}
+Single precision floating point numbers format. Default: ieee754 (32 bit).
-@cindex Undocumented instruction control
-@item @code{-strict}
+@cindex @code{-fp-d} command-line option, Z80
+@item -fp-d=@var{FORMAT}
+Double precision floating point numbers format. Default: ieee754 (64 bit).
+
+@cindex @code{-strict} command-line option, Z80
+@item -strict
Accept documented instructions only.
-@item @code{-full}
+@cindex @code{-full} command-line option, Z80
+@item -full
Accept all known Z80 instructions.
-@item @code{-with-inst=INST[,...]}
-@itemx @code{-Wnins INST[,...]}
+@item -with-inst=@var{INST}[,...]
+@itemx -Wnins @var{INST}[,...]
Enable specified undocumented instruction(s).
-@item @code{-without-inst=INST[,...]}
-@itemx @code{-Fins INST[,...]}
+@item -without-inst=@var{INST}[,...]
+@itemx -Fins @var{INST}[,...]
Disable specified undocumented instruction(s).
-@cindex Obsolete options
-@item @code{-ignore-undocumented-instructions}
-@itemx @code{-Wnud}
+@item -ignore-undocumented-instructions
+@itemx -Wnud
Silently assemble undocumented Z80-instructions that have been adopted
as documented R800-instructions .
-@item @code{-ignore-unportable-instructions}
-@itemx @code{-Wnup}
+@item -ignore-unportable-instructions
+@itemx -Wnup
Silently assemble all undocumented Z80-instructions.
-@item @code{-warn-undocumented-instructions}
-@itemx @code{-Wud}
+@item -warn-undocumented-instructions
+@itemx -Wud
Issue warnings for undocumented Z80-instructions that work on R800, do
not assemble other undocumented instructions without warning.
-@item @code{-warn-unportable-instructions}
-@itemx @code{-Wup}
+@item -warn-unportable-instructions
+@itemx -Wup
Issue warnings for other undocumented Z80-instructions, do not treat any
undocumented instructions as errors.
-@item @code{-forbid-undocumented-instructions}
-@itemx @code{-Fud}
+@item -forbid-undocumented-instructions
+@itemx -Fud
Treat all undocumented z80-instructions as errors.
@item -forbid-unportable-instructions
-@itemx @code{-Fup}
+@itemx -Fup
Treat undocumented z80-instructions that do not work on R800 as errors.
@end table
+@c man end
+
+Floating point numbers formats.
+@table @option
+@item @code{ieee754}
+Single or double precision IEEE754 compatible format.
+
+@item @code{half}
+Half precision IEEE754 compatible format (16 bits).
+
+@item @code{single}
+Single precision IEEE754 compatible format (32 bits).
+
+@item @code{double}
+Double precision IEEE754 compatible format (64 bits).
+
+@item @code{zeda32}
+32 bit floating point format from z80float library by Zeda.
+
+@item @code{math48}
+48 bit floating point format from Math48 package by Anders Hejlsberg.
+@end table
Known undocumented instructions.
@table @option
@cindex Known undocumented instructions
@item @code{idx-reg-halves}
-All operations with halves of index registers (IXL, IXH, IYL, IYH).
+All operations with halves of index registers (@code{IXL}, @code{IXH}, @code{IYL}, @code{IYH}).
@item @code{sli}
-SLI or SLL instruction. Same as @code{SLA r; INC r}.
+@code{SLI} or @code{SLL} instruction. Same as @code{SLA r; INC r}.
@item @code{op-ii-ld}
Istructions like @code{<op> (<ii>+<d>),<r>}. For example: @code{RL (IX+5),C}
@item @code{in-f-c}
@@ -132,6 +170,7 @@ The suffix @samp{b} denotes a backreference to local label.
* Z80-Chars:: Special Characters
* Z80-Regs:: Register Names
* Z80-Case:: Case Sensitivity
+* Z80-Labels:: Labels
@end menu
@node Z80-Chars
@@ -191,11 +230,35 @@ The case of letters is significant in labels and symbol names. The case
is also important to distinguish the suffix @samp{b} for a backward reference
to a local label from the suffix @samp{B} for a number in binary notation.
+@node Z80-Labels
+@subsection Labels
+
+@cindex labels, Z80
+@cindex Z80 labels
+Labels started by @code{.L} acts as local labels. You may specify custom local
+label prefix by @code{-local-prefix} command-line option.
+Dollar, forward and backward local labels are supported. By default, all labels
+are followed by colon.
+Legacy code with colonless labels can be built with @code{-colonless}
+command-line option specified. In this case all tokens at line begin are treated
+as labels.
+
@node Z80 Floating Point
@section Floating Point
@cindex floating point, Z80
@cindex Z80 floating point
-Floating-point numbers are not supported.
+Floating-point numbers of following types are supported:
+
+@table @option
+@item @code{ieee754}
+Supported half, single and double precision IEEE754 compatible numbers.
+
+@item @code{zeda32}
+32 bit floating point numbers from z80float library by Zeda.
+
+@item @code{math48}
+48 bit floating point numbers from Math48 package by Anders Hejlsberg.
+@end table
@node Z80 Directives
@section Z80 Assembler Directives
@@ -208,15 +271,19 @@ These are the additional directives in @code{@value{AS}} for the Z80:
@table @code
@item assume @var{ADL}@samp{=}@var{expression}
-Set ADL status for eZ80. Non-null value enable compilation ADL mode else
+Set ADL status for eZ80. Non-zero value enable compilation in ADL mode else
used Z80 mode. ADL and Z80 mode produces incompatible object code. Mixing
both of them within one binary may lead problems with disassembler.
@item db @var{expression}|@var{string}[,@var{expression}|@var{string}...]
@itemx defb @var{expression}|@var{string}[,@var{expression}|@var{string}...]
+@itemx defm @var{string}...]
For each @var{string} the characters are copied to the object file, for
each other @var{expression} the value is stored in one byte.
A warning is issued in case of an overflow.
+Backslash symbol in the strings is generic symbol, it cannot be used as
+escape character (for this purpose use @code{.ascii} or @code{.asciiz}
+directives).
@item dw @var{expression}[,@var{expression}...]
@itemx defw @var{expression}[,@var{expression}...]
@@ -289,7 +356,7 @@ The assembler also supports the following undocumented Z80-instructions,
that have not been adopted in any other instruction set:
@table @code
@item out (c),0
-Sends zero to the port pointed to by register c.
+Sends zero to the port pointed to by register @code{C}.
@item sli @var{m}
Equivalent to @code{@var{m} = (@var{m}<<1)+1}, the operand @var{m} can
diff --git a/gas/testsuite/gas/z80/ez80_pref_dis.d b/gas/testsuite/gas/z80/ez80_pref_dis.d
new file mode 100644
index 0000000..d76e43f
--- /dev/null
+++ b/gas/testsuite/gas/z80/ez80_pref_dis.d
@@ -0,0 +1,34 @@
+#name: multiple eZ80 opcode prefixes
+#as: -ez80
+#objdump: -d
+
+.*:[ ]+file format (coff)|(elf32)\-z80
+
+
+Disassembly of section \.text:
+
+00000000 <\.text>:
+[ ]+0:[ ]+40[ ]+\.db 0x40\s.*
+[ ]+1:[ ]+40[ ]+\.db 0x40\s.*
+[ ]+2:[ ]+40[ ]+\.db 0x40\s.*
+[ ]+3:[ ]+40[ ]+\.db 0x40\s.*
+[ ]+4:[ ]+40[ ]+\.db 0x40\s.*
+[ ]+5:[ ]+40 00[ ]+nop.sis
+[ ]+7:[ ]+49[ ]+\.db 0x49\s.*
+[ ]+8:[ ]+49[ ]+\.db 0x49\s.*
+[ ]+9:[ ]+49[ ]+\.db 0x49\s.*
+[ ]+a:[ ]+49[ ]+\.db 0x49\s.*
+[ ]+b:[ ]+49[ ]+\.db 0x49\s.*
+[ ]+c:[ ]+49 00[ ]+nop.lis
+[ ]+e:[ ]+52[ ]+\.db 0x52\s.*
+[ ]+f:[ ]+52[ ]+\.db 0x52\s.*
+[ ]+10:[ ]+52[ ]+\.db 0x52\s.*
+[ ]+11:[ ]+52[ ]+\.db 0x52\s.*
+[ ]+12:[ ]+52[ ]+\.db 0x52\s.*
+[ ]+13:[ ]+52 00[ ]+nop.sil
+[ ]+15:[ ]+5b[ ]+\.db 0x5b\s.*
+[ ]+16:[ ]+5b[ ]+\.db 0x5b\s.*
+[ ]+17:[ ]+5b[ ]+\.db 0x5b\s.*
+[ ]+18:[ ]+5b[ ]+\.db 0x5b\s.*
+[ ]+19:[ ]+5b[ ]+\.db 0x5b\s.*
+[ ]+1a:[ ]+5b 00[ ]+nop.lil
diff --git a/gas/testsuite/gas/z80/ez80_pref_dis.s b/gas/testsuite/gas/z80/ez80_pref_dis.s
new file mode 100644
index 0000000..77e9780
--- /dev/null
+++ b/gas/testsuite/gas/z80/ez80_pref_dis.s
@@ -0,0 +1,8 @@
+; eZ80 memory mode prefix disassembler test
+ .text
+ .org 0
+ .db 0x40, 0x40, 0x40, 0x40, 0x40, 0x40, 0
+ .db 0x49, 0x49, 0x49, 0x49, 0x49, 0x49, 0
+ .db 0x52, 0x52, 0x52, 0x52, 0x52, 0x52, 0
+ .db 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0x5b, 0
+
diff --git a/gas/testsuite/gas/z80/fp_math48.d b/gas/testsuite/gas/z80/fp_math48.d
index afd8927..d295e86 100644
--- a/gas/testsuite/gas/z80/fp_math48.d
+++ b/gas/testsuite/gas/z80/fp_math48.d
@@ -1,6 +1,6 @@
#name: Math48 floating point numbers
#objdump: -s -j .data
-#as: -float=math48
+#as: -fp-s=math48
.*:[ ]+file format (coff)|(elf32)\-z80
diff --git a/gas/testsuite/gas/z80/fp_zeda32.d b/gas/testsuite/gas/z80/fp_zeda32.d
index 38f568c..2875ede 100644
--- a/gas/testsuite/gas/z80/fp_zeda32.d
+++ b/gas/testsuite/gas/z80/fp_zeda32.d
@@ -1,5 +1,5 @@
#name: Zeda32 floating point numbers
-#as: -float=zeda32
+#as: -fp-s=zeda32
#objdump: -s -j .data
.*:[ ]+file format (coff)|(elf32)\-z80
diff --git a/gas/testsuite/gas/z80/strings.d b/gas/testsuite/gas/z80/strings.d
index 6fe0594..6a0e9f6 100644
--- a/gas/testsuite/gas/z80/strings.d
+++ b/gas/testsuite/gas/z80/strings.d
@@ -4,11 +4,11 @@
.*:[ ]+file format (coff)|(elf32)\-z80
Contents of section \.data:
- 0000 2e646220 74657874 5c6e3833 37343830.*
- 0010 44454642 20746578 745c6e64 38373833.*
- 0020 4445464d 20746578 745c6e33 37383537.*
- 0030 44422074 6578745c 6e333837 39383337.*
- 0040 2e617363 69692074 6578745c 37325c32.*
- 0050 37375c66 5c6e5c30 2e617363 697a2074.*
- 0060 6578745c 6e393939 002e7374 72696e67.*
+ 0000 2e646220 74657874 5c6e3833 37343830 .*
+ 0010 44454642 20746578 745c6e64 38373833 .*
+ 0020 4445464d 20746578 745c6e33 37383537 .*
+ 0030 44422074 6578745c 6e333837 39383337 .*
+ 0040 2e617363 69692074 6578743a bf0c0a00 .*
+ 0050 2e617363 697a2074 6578740a 39393900 .*
+ 0060 2e737472 696e6720 74657874 0a090000 .*
#pass
diff --git a/gas/testsuite/gas/z80/z80.exp b/gas/testsuite/gas/z80/z80.exp
index 334d7f9e..6ba13fc 100644
--- a/gas/testsuite/gas/z80/z80.exp
+++ b/gas/testsuite/gas/z80/z80.exp
@@ -90,6 +90,8 @@ if [istarget z80-*-*] then {
run_dump_test "ez80_adl_all"
#test for eZ80 instructions with sufficies in ADL mode
run_dump_test "ez80_adl_suf"
+#test for eZ80 opcode prefixes as multiple bytes before instruction
+ run_dump_test "ez80_pref_dis"
# test for SDCC compatibility mode
run_dump_test "sdcc"
# test for colonless labels
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 54619fa..accd25a 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,9 @@
+2020-01-14 Sergey Belyashov <sergey.belyashov@gmail.com>
+
+ PR 25377
+ * z80-dis.c (suffix): Use .db instruction to generate double
+ prefix.
+
2020-01-14 Alan Modra <amodra@gmail.com>
* z8k-dis.c (unpack_instr): Formatting. Cast unsigned short
diff --git a/opcodes/z80-dis.c b/opcodes/z80-dis.c
index b6f0606..7dfb5f2 100644
--- a/opcodes/z80-dis.c
+++ b/opcodes/z80-dis.c
@@ -738,7 +738,7 @@ suffix (struct buffer *buf, disassemble_info *info, const char *txt)
|| buf->data[1] == 0x5b)
{
/* Double prefix, or end of data. */
- info->fprintf_func (info->stream, "nop ;%s", txt);
+ info->fprintf_func (info->stream, ".db 0x%02x ; %s", (unsigned)buf->data[0], txt);
buf->n_used = 1;
return buf->n_used;
}