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| author | Tsukasa OI <research_trasio@irq.a4lg.com> | 2022-09-10 08:32:17 +0000 |
|---|---|---|
| committer | Tsukasa OI <research_trasio@irq.a4lg.com> | 2022-11-07 04:44:34 +0000 |
| commit | 092a151a38c1bd87f25d1d03d4089a25b1bfbbc8 (patch) | |
| tree | dbfedca176fb0c99c141aedb9373984b24f1ce56 | |
| parent | 2f008f0640923fa307fdd73b229f951e64a1574b (diff) | |
| download | gdb-092a151a38c1bd87f25d1d03d4089a25b1bfbbc8.zip gdb-092a151a38c1bd87f25d1d03d4089a25b1bfbbc8.tar.gz gdb-092a151a38c1bd87f25d1d03d4089a25b1bfbbc8.tar.bz2 | |
RISC-V: Remove RV32EF conflict
Despite that the RISC-V ISA Manual version 2.2 prohibited "RV32EF", later
versions beginning with the version 20190608-Base-Ratified removed this
restriction. Because the 'E' extension is still a draft, the author chose
to *just* remove the conflict (not checking the ISA version).
Note that, because RV32E is only used with a soft-float calling convention,
there's no valid official ABI for RV32EF. It means, even if we can assemble
a program with -march=rv32ef -mabi=ilp32e, floating-point registers are kept
in an unmanaged state (outside ABI management).
The purpose of this commit is to suppress unnecessary errors while parsing
an ISA string and/or disassembling, not to allow hard-float with RVE.
bfd/ChangeLog:
* elfxx-riscv.c (riscv_parse_check_conflicts): Accept RV32EF
because only older specifications disallowed it.
gas/ChangeLog:
* testsuite/gas/riscv/march-fail-rv32ef.d: Remove as not directly
prohibited.
* testsuite/gas/riscv/march-fail-rv32ef.l: Likewise.
| -rw-r--r-- | bfd/elfxx-riscv.c | 7 | ||||
| -rw-r--r-- | gas/testsuite/gas/riscv/march-fail-rv32ef.d | 3 | ||||
| -rw-r--r-- | gas/testsuite/gas/riscv/march-fail-rv32ef.l | 2 |
3 files changed, 0 insertions, 12 deletions
diff --git a/bfd/elfxx-riscv.c b/bfd/elfxx-riscv.c index 94bff0e..300ccf4 100644 --- a/bfd/elfxx-riscv.c +++ b/bfd/elfxx-riscv.c @@ -1876,13 +1876,6 @@ riscv_parse_check_conflicts (riscv_parse_subset_t *rps) rps->error_handler (_("rv%d does not support the `q' extension"), xlen); no_conflict = false; } - if (riscv_lookup_subset (rps->subset_list, "e", &subset) - && riscv_lookup_subset (rps->subset_list, "f", &subset)) - { - rps->error_handler - (_("rv32e does not support the `f' extension")); - no_conflict = false; - } if (riscv_lookup_subset (rps->subset_list, "zfinx", &subset) && riscv_lookup_subset (rps->subset_list, "f", &subset)) { diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.d b/gas/testsuite/gas/riscv/march-fail-rv32ef.d deleted file mode 100644 index d7b51c3..0000000 --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.d +++ /dev/null @@ -1,3 +0,0 @@ -#as: -march=rv32ef -#source: empty.s -#error_output: march-fail-rv32ef.l diff --git a/gas/testsuite/gas/riscv/march-fail-rv32ef.l b/gas/testsuite/gas/riscv/march-fail-rv32ef.l deleted file mode 100644 index e6d93f2..0000000 --- a/gas/testsuite/gas/riscv/march-fail-rv32ef.l +++ /dev/null @@ -1,2 +0,0 @@ -.*Assembler messages: -.*Error: .*rv32e does not support the `f' extension |