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authorMax Filippov <jcmvbkbc@gmail.com>2016-11-18 11:39:47 -0800
committerMax Filippov <jcmvbkbc@gmail.com>2017-03-27 13:02:12 -0700
commitf74f865e5030057deb8a6a56af4a9e003d82cdcd (patch)
tree08ff781da4df490835f53af4c23cabc80f4135ac
parent0d0bf81a6729478563c3851ccfca435222ddfa25 (diff)
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gdb: xtensa-linux: support THREADPTR register
Make THREADPTR user register accessible. gdb/ 2017-03-27 Max Filippov <jcmvbkbc@gmail.com> * xtensa-linux-nat.c (fill_gregset): Call regcache_raw_collect for THREADPTR register. (supply_gregset_reg): Call regcache_raw_supply for THREADPTR register. * xtensa-tdep.c (XTENSA_DBREGN_UREG): New definition. (xtensa_derive_tdep): Initialize tdep->threadptr_regnum. * xtensa-tdep.h (gdbarch_tdep::threadptr_regnum): New field.
-rw-r--r--gdb/ChangeLog10
-rw-r--r--gdb/xtensa-linux-nat.c8
-rw-r--r--gdb/xtensa-tdep.c4
-rw-r--r--gdb/xtensa-tdep.h1
4 files changed, 23 insertions, 0 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog
index 2cebe10..25fde72 100644
--- a/gdb/ChangeLog
+++ b/gdb/ChangeLog
@@ -1,5 +1,15 @@
2017-03-27 Max Filippov <jcmvbkbc@gmail.com>
+ * xtensa-linux-nat.c (fill_gregset): Call regcache_raw_collect
+ for THREADPTR register.
+ (supply_gregset_reg): Call regcache_raw_supply for THREADPTR
+ register.
+ * xtensa-tdep.c (XTENSA_DBREGN_UREG): New definition.
+ (xtensa_derive_tdep): Initialize tdep->threadptr_regnum.
+ * xtensa-tdep.h (gdbarch_tdep::threadptr_regnum): New field.
+
+2017-03-27 Max Filippov <jcmvbkbc@gmail.com>
+
* xtensa-tdep.c (xtensa_pseudo_register_read): Treat all
registers above gdbarch_num_regs (gdbarch) as privileged in
call0 ABI.
diff --git a/gdb/xtensa-linux-nat.c b/gdb/xtensa-linux-nat.c
index a4b001e..2781686 100644
--- a/gdb/xtensa-linux-nat.c
+++ b/gdb/xtensa-linux-nat.c
@@ -82,6 +82,10 @@ fill_gregset (const struct regcache *regcache,
regcache_raw_collect (regcache,
gdbarch_tdep (gdbarch)->sar_regnum,
&regs->sar);
+ if (regnum == gdbarch_tdep (gdbarch)->threadptr_regnum || regnum == -1)
+ regcache_raw_collect (regcache,
+ gdbarch_tdep (gdbarch)->threadptr_regnum,
+ &regs->threadptr);
if (regnum >=gdbarch_tdep (gdbarch)->ar_base
&& regnum < gdbarch_tdep (gdbarch)->ar_base
+ gdbarch_tdep (gdbarch)->num_aregs)
@@ -148,6 +152,10 @@ supply_gregset_reg (struct regcache *regcache,
regcache_raw_supply (regcache,
gdbarch_tdep (gdbarch)->sar_regnum,
&regs->sar);
+ if (regnum == gdbarch_tdep (gdbarch)->threadptr_regnum || regnum == -1)
+ regcache_raw_supply (regcache,
+ gdbarch_tdep (gdbarch)->threadptr_regnum,
+ &regs->threadptr);
if (regnum >=gdbarch_tdep (gdbarch)->ar_base
&& regnum < gdbarch_tdep (gdbarch)->ar_base
+ gdbarch_tdep (gdbarch)->num_aregs)
diff --git a/gdb/xtensa-tdep.c b/gdb/xtensa-tdep.c
index 2338ac1..13f1514 100644
--- a/gdb/xtensa-tdep.c
+++ b/gdb/xtensa-tdep.c
@@ -3107,6 +3107,8 @@ xtensa_derive_tdep (struct gdbarch_tdep *tdep)
/* Special registers 0..255 (core). */
#define XTENSA_DBREGN_SREG(n) (0x0200+(n))
+/* User registers 0..255. */
+#define XTENSA_DBREGN_UREG(n) (0x0300+(n))
for (rmap = tdep->regmap, n = 0; rmap->target_number != -1; n++, rmap++)
{
@@ -3138,6 +3140,8 @@ xtensa_derive_tdep (struct gdbarch_tdep *tdep)
tdep->litbase_regnum = n;
else if (rmap->target_number == XTENSA_DBREGN_SREG(230))
tdep->ps_regnum = n;
+ else if (rmap->target_number == XTENSA_DBREGN_UREG(231))
+ tdep->threadptr_regnum = n;
#if 0
else if (rmap->target_number == XTENSA_DBREGN_SREG(226))
tdep->interrupt_regnum = n;
diff --git a/gdb/xtensa-tdep.h b/gdb/xtensa-tdep.h
index 46aeecb..986aa68 100644
--- a/gdb/xtensa-tdep.h
+++ b/gdb/xtensa-tdep.h
@@ -204,6 +204,7 @@ struct gdbarch_tdep
int lcount_regnum;
int sar_regnum; /* Register number of SAR. */
int litbase_regnum; /* Register number of LITBASE. */
+ int threadptr_regnum; /* Register number of THREADPTR. */
int interrupt_regnum; /* Register number for interrupt. */
int interrupt2_regnum; /* Register number for interrupt2. */