binutils/

2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* doc/binutils.texi (objdump): Document the new addr64 option
	for i386 disassembler.

include/

2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* dis-asm.h (print_i386_disassembler_options): New.

opcodes/

2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>

	* disassemble.c (disassembler_usage): Call
	print_i386_disassembler_options for i386 disassembler.

	* i386-dis.c (print_i386_disassembler_options): New.
	(print_insn): Support the new addr64 option.

7 files changed, 56 insertions, 5 deletions

diff --git a/binutils/ChangeLog b/binutils/ChangeLog
index 58e63a6..62a353f 100644
--- a/binutils/ChangeLog
+++ b/binutils/ChangeLog
@@ -1,5 +1,10 @@
 2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>
 
+	* doc/binutils.texi (objdump): Document the new addr64 option
+	for i386 disassembler.
+
+2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>
+
 	PR binutils/3945
 	* configure.in (DLLTOOL_DEFAULT): New. Defined for the first PE
 	target.
diff --git a/binutils/doc/binutils.texi b/binutils/doc/binutils.texi
index a0611b1..3751d04 100644
--- a/binutils/doc/binutils.texi
+++ b/binutils/doc/binutils.texi
@@ -1760,7 +1760,7 @@ switch, but allow finer grained control.  Multiple selections from the
 following may be specified as a comma separated string.
 @option{x86-64}, @option{i386} and @option{i8086} select disassembly for
 the given architecture.  @option{intel} and @option{att} select between
-intel syntax mode and AT&T syntax mode.  @option{addr32},
+intel syntax mode and AT&T syntax mode.  @option{addr64}, @option{addr32},
 @option{addr16}, @option{data32} and @option{data16} specify the default
 address size and operand size.  These four options will be overridden if
 @option{x86-64}, @option{i386} or @option{i8086} appear later in the
diff --git a/include/ChangeLog b/include/ChangeLog
index 6e67822..363d043 100644
--- a/include/ChangeLog
+++ b/include/ChangeLog
@@ -1,3 +1,7 @@
+2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* dis-asm.h (print_i386_disassembler_options): New.
+
 2007-01-31  Vladimir Prus  <vladimir@codesourcery.com>
 	
 	* libiberty.h (PEX_STDERR_TO_PIPE): New define.
diff --git a/include/dis-asm.h b/include/dis-asm.h
index af48e85..9dfd503 100644
--- a/include/dis-asm.h
+++ b/include/dis-asm.h
@@ -284,6 +284,7 @@ extern int print_insn_z8002		(bfd_vma, disassemble_info *);
 extern disassembler_ftype arc_get_disassembler (void *);
 extern disassembler_ftype cris_get_disassembler (bfd *);
 
+extern void print_i386_disassembler_options (FILE *);
 extern void print_mips_disassembler_options (FILE *);
 extern void print_ppc_disassembler_options (FILE *);
 extern void print_arm_disassembler_options (FILE *);
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index a7db87f..af2d0bd 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,11 @@
+2076-02-02  H.J. Lu  <hongjiu.lu@intel.com>
+
+	* disassemble.c (disassembler_usage): Call
+	print_i386_disassembler_options for i386 disassembler.
+
+	* i386-dis.c (print_i386_disassembler_options): New.
+	(print_insn): Support the new addr64 option.
+
 2007-02-02  Hiroki Kaminaga  <kaminaga@sm.sony.co.jp>
 
 	* ppc-dis.c (powerpc_dialect): Handle ppc440.
diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c
index ca28f56..f86d21c 100644
--- a/opcodes/disassemble.c
+++ b/opcodes/disassemble.c
@@ -448,6 +448,9 @@ disassembler_usage (stream)
 #ifdef ARCH_powerpc
   print_ppc_disassembler_options (stream);
 #endif
+#ifdef ARCH_i386
+  print_i386_disassembler_options (stream);
+#endif
 
   return;
 }
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index eb751bc..58f630e 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -2856,6 +2856,26 @@ print_insn_i386 (bfd_vma pc, disassemble_info *info)
   return print_insn (pc, info);
 }
 
+void
+print_i386_disassembler_options (FILE *stream)
+{
+  fprintf (stream, _("\n\
+The following i386/x86-64 specific disassembler options are supported for use\n\
+with the -M switch (multiple options should be separated by commas):\n"));
+
+  fprintf (stream, _("  x86-64      Disassemble in 64bit mode\n"));
+  fprintf (stream, _("  i386        Disassemble in 32bit mode\n"));
+  fprintf (stream, _("  i8086       Disassemble in 16bit mode\n"));
+  fprintf (stream, _("  att         Display instruction in AT&T syntax\n"));
+  fprintf (stream, _("  intel       Display instruction in Intel syntax\n"));
+  fprintf (stream, _("  addr64      Assume 64bit address size\n"));
+  fprintf (stream, _("  addr32      Assume 32bit address size\n"));
+  fprintf (stream, _("  addr16      Assume 16bit address size\n"));
+  fprintf (stream, _("  data32      Assume 32bit data size\n"));
+  fprintf (stream, _("  data16      Assume 16bit data size\n"));
+  fprintf (stream, _("  suffix      Always display instruction suffix in AT&T syntax\n"));
+}
+
 static int
 print_insn (bfd_vma pc, disassemble_info *info)
 {
@@ -2917,10 +2937,20 @@ print_insn (bfd_vma pc, disassemble_info *info)
 	}
       else if (CONST_STRNEQ (p, "addr"))
 	{
-	  if (p[4] == '1' && p[5] == '6')
-	    priv.orig_sizeflag &= ~AFLAG;
-	  else if (p[4] == '3' && p[5] == '2')
-	    priv.orig_sizeflag |= AFLAG;
+	  if (address_mode == mode_64bit)
+	    {
+	      if (p[4] == '3' && p[5] == '2')
+		priv.orig_sizeflag &= ~AFLAG;
+	      else if (p[4] == '6' && p[5] == '4')
+		priv.orig_sizeflag |= AFLAG;
+	    }
+	  else
+	    {
+	      if (p[4] == '1' && p[5] == '6')
+		priv.orig_sizeflag &= ~AFLAG;
+	      else if (p[4] == '3' && p[5] == '2')
+		priv.orig_sizeflag |= AFLAG;
+	    }
 	}
       else if (CONST_STRNEQ (p, "data"))
 	{