diff options
author | Nelson Chu <nelson.chu@sifive.com> | 2020-03-03 21:08:05 -0800 |
---|---|---|
committer | Jim Wilson <jimw@sifive.com> | 2020-03-04 17:11:37 -0800 |
commit | dee35d026c92b4054a90d655324dc90b4ea6cbfc (patch) | |
tree | a5f9654e612006b23bc8922a0fd903282e21ec32 | |
parent | de48783e2fbb57e39b9931b1eceef28a1ad1eeaf (diff) | |
download | gdb-dee35d026c92b4054a90d655324dc90b4ea6cbfc.zip gdb-dee35d026c92b4054a90d655324dc90b4ea6cbfc.tar.gz gdb-dee35d026c92b4054a90d655324dc90b4ea6cbfc.tar.bz2 |
RISC-V: Support assembler modifier %got_pcrel_hi.
gas/
* config/tc-riscv.c: Support the modifier %got_pcrel_hi.
* doc/c-riscv.texi: Add documentation.
* testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new
modifier %got_pcrel_hi.
* testsuite/gas/riscv/no-relax-reloc.s: Likewise.
* testsuite/gas/riscv/relax-reloc.d: Likewise.
* testsuite/gas/riscv/relax-reloc.s: Likewise.
-rw-r--r-- | gas/ChangeLog | 9 | ||||
-rw-r--r-- | gas/config/tc-riscv.c | 1 | ||||
-rw-r--r-- | gas/doc/c-riscv.texi | 17 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/no-relax-reloc.d | 4 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/no-relax-reloc.s | 7 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/relax-reloc.d | 7 | ||||
-rw-r--r-- | gas/testsuite/gas/riscv/relax-reloc.s | 7 |
7 files changed, 45 insertions, 7 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 179ebe7..859f01f 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,5 +1,14 @@ 2020-03-04 Nelson Chu <nelson.chu@sifive.com> + * config/tc-riscv.c (percent_op_utype): Support the modifier + %got_pcrel_hi. + * doc/c-riscv.texi: Add documentation. + * testsuite/gas/riscv/no-relax-reloc.d: Add test case for the new + modifier %got_pcrel_hi. + * testsuite/gas/riscv/no-relax-reloc.s: Likewise. + * testsuite/gas/riscv/relax-reloc.d: Likewise. + * testsuite/gas/riscv/relax-reloc.s: Likewise. + * doc/c-riscv.texi (relocation modifiers): Add documentation. (RISC-V-Formats): Update the section name from "Instruction Formats" to "RISC-V Instruction Formats". diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c index ddd4d14..168561e 100644 --- a/gas/config/tc-riscv.c +++ b/gas/config/tc-riscv.c @@ -1308,6 +1308,7 @@ static const struct percent_op_match percent_op_utype[] = { {"%tprel_hi", BFD_RELOC_RISCV_TPREL_HI20}, {"%pcrel_hi", BFD_RELOC_RISCV_PCREL_HI20}, + {"%got_pcrel_hi", BFD_RELOC_RISCV_GOT_HI20}, {"%tls_ie_pcrel_hi", BFD_RELOC_RISCV_TLS_GOT_HI20}, {"%tls_gd_pcrel_hi", BFD_RELOC_RISCV_TLS_GD_HI20}, {"%hi", BFD_RELOC_RISCV_HI20}, diff --git a/gas/doc/c-riscv.texi b/gas/doc/c-riscv.texi index 6e932dc..488cf56 100644 --- a/gas/doc/c-riscv.texi +++ b/gas/doc/c-riscv.texi @@ -257,6 +257,23 @@ Or you can use the pseudo lla/lw/sw/... instruction to do this. lla a0, @var{symbol} @end smallexample +@item %got_pcrel_hi(@var{symbol}) +The high 20 bits of relative address between pc and the GOT entry of +@var{symbol}. This is usually used with the %pcrel_lo modifier to access +the GOT entry. + +@smallexample +@var{label}: + auipc a0, %got_pcrel_hi(@var{symbol}) // R_RISCV_GOT_HI20 + addi a0, a0, %pcrel_lo(@var{label}) // R_RISCV_PCREL_LO12_I + +@var{label}: + auipc a0, %got_pcrel_hi(@var{symbol}) // R_RISCV_GOT_HI20 + load/store a0, %pcrel_lo(@var{label})(a0) // R_RISCV_PCREL_LO12_I/S +@end smallexample + +Also, the pseudo la instruction with PIC has similar behavior. + @item %tprel_add(@var{symbol}) This is used purely to associate the R_RISCV_TPREL_ADD relocation for TLS relaxation. This one is only valid as the fourth operand to the normally diff --git a/gas/testsuite/gas/riscv/no-relax-reloc.d b/gas/testsuite/gas/riscv/no-relax-reloc.d index 62f28e0..c2ca1aa 100644 --- a/gas/testsuite/gas/riscv/no-relax-reloc.d +++ b/gas/testsuite/gas/riscv/no-relax-reloc.d @@ -9,4 +9,6 @@ RELOCATION RECORDS FOR .* 0+4 R_RISCV_LO12_I.* 0+8 R_RISCV_PCREL_HI20.* 0+c R_RISCV_PCREL_LO12_I.* -0+10 R_RISCV_CALL.* +0+10 R_RISCV_GOT_HI20.* +0+14 R_RISCV_PCREL_LO12_I.* +0+18 R_RISCV_CALL.* diff --git a/gas/testsuite/gas/riscv/no-relax-reloc.s b/gas/testsuite/gas/riscv/no-relax-reloc.s index 7f1a484..2aab995 100644 --- a/gas/testsuite/gas/riscv/no-relax-reloc.s +++ b/gas/testsuite/gas/riscv/no-relax-reloc.s @@ -2,7 +2,10 @@ target: lui a5,%hi(target) lw a5,%lo(target)(a5) - .LA0: auipc a5,%pcrel_hi(bar) - lw a0,%pcrel_lo(.LA0)(a5) + .LA0: auipc a5,%pcrel_hi(symbol1) + lw a0,%pcrel_lo(.LA0)(a5) + + .LA1: auipc a5,%got_pcrel_hi(symbol2) + lw a0,%pcrel_lo(.LA1)(a5) call target diff --git a/gas/testsuite/gas/riscv/relax-reloc.d b/gas/testsuite/gas/riscv/relax-reloc.d index f5f592c..623218e 100644 --- a/gas/testsuite/gas/riscv/relax-reloc.d +++ b/gas/testsuite/gas/riscv/relax-reloc.d @@ -13,5 +13,8 @@ RELOCATION RECORDS FOR .* 0+8 R_RISCV_RELAX.* 0+c R_RISCV_PCREL_LO12_I.* 0+c R_RISCV_RELAX.* -0+10 R_RISCV_CALL.* -0+10 R_RISCV_RELAX.* +0+10 R_RISCV_GOT_HI20.* +0+14 R_RISCV_PCREL_LO12_I.* +0+14 R_RISCV_RELAX.* +0+18 R_RISCV_CALL.* +0+18 R_RISCV_RELAX.* diff --git a/gas/testsuite/gas/riscv/relax-reloc.s b/gas/testsuite/gas/riscv/relax-reloc.s index 7f1a484..2aab995 100644 --- a/gas/testsuite/gas/riscv/relax-reloc.s +++ b/gas/testsuite/gas/riscv/relax-reloc.s @@ -2,7 +2,10 @@ target: lui a5,%hi(target) lw a5,%lo(target)(a5) - .LA0: auipc a5,%pcrel_hi(bar) - lw a0,%pcrel_lo(.LA0)(a5) + .LA0: auipc a5,%pcrel_hi(symbol1) + lw a0,%pcrel_lo(.LA0)(a5) + + .LA1: auipc a5,%got_pcrel_hi(symbol2) + lw a0,%pcrel_lo(.LA1)(a5) call target |