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authorAlan Modra <amodra@gmail.com>2019-12-17 14:26:39 +1030
committerAlan Modra <amodra@gmail.com>2019-12-17 14:32:23 +1030
commit62e6599087efba193e0156d89ee65fb74fc99cb2 (patch)
treee6316a78fdde602c597410a4dfa4b09815c6724a
parent45d735237b7edf282131d570a7a9f6aa9ee1bd9c (diff)
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ubsan: bpf: left shift cannot be represented in type 'DI' (aka 'long')
cpu/ * bpf.cpu (f-imm64): Avoid signed overflow. opcodes/ * bpf-ibld.c: Regenerate.
-rw-r--r--cpu/ChangeLog4
-rw-r--r--cpu/bpf.cpu4
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/bpf-ibld.c2
4 files changed, 11 insertions, 3 deletions
diff --git a/cpu/ChangeLog b/cpu/ChangeLog
index 688c596..8755ee7 100644
--- a/cpu/ChangeLog
+++ b/cpu/ChangeLog
@@ -1,3 +1,7 @@
+2019-12-17 Alan Modra <amodra@gmail.com>
+
+ * bpf.cpu (f-imm64): Avoid signed overflow.
+
2019-12-16 Alan Modra <amodra@gmail.com>
* xstormy16.cpu (f-rel12a): Avoid signed overflow.
diff --git a/cpu/bpf.cpu b/cpu/bpf.cpu
index db2301c..d5a8eac 100644
--- a/cpu/bpf.cpu
+++ b/cpu/bpf.cpu
@@ -288,8 +288,8 @@
(set (ifield f-imm64-a) (and (ifield f-imm64) (const #xffffffff)))))
(extract (sequence ()
(set (ifield f-imm64)
- (or (sll DI (zext DI (ifield f-imm64-c)) (const 32))
- (zext DI (ifield f-imm64-a)))))))
+ (or (sll UDI (zext UDI (ifield f-imm64-c)) (const 32))
+ (zext UDI (ifield f-imm64-a)))))))
;;; Operands
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 898a916..26f25a4 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,7 @@
+2019-12-17 Alan Modra <amodra@gmail.com>
+
+ * bpf-ibld.c: Regenerate.
+
2019-12-16 Alan Modra <amodra@gmail.com>
* aarch64-dis.c (sign_extend): Return uint64_t. Rewrite without
diff --git a/opcodes/bpf-ibld.c b/opcodes/bpf-ibld.c
index b14c28b..e2601dd 100644
--- a/opcodes/bpf-ibld.c
+++ b/opcodes/bpf-ibld.c
@@ -689,7 +689,7 @@ bpf_cgen_extract_operand (CGEN_CPU_DESC cd,
length = extract_normal (cd, ex_info, insn_value, 0, 96, 31, 32, 32, total_length, pc, & fields->f_imm64_c);
if (length <= 0) break;
{
- FLD (f_imm64) = ((((((DI) (UINT) (FLD (f_imm64_c)))) << (32))) | (((DI) (UINT) (FLD (f_imm64_a)))));
+ FLD (f_imm64) = ((((((UDI) (UINT) (FLD (f_imm64_c)))) << (32))) | (((UDI) (UINT) (FLD (f_imm64_a)))));
}
}
break;