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| author | Simon Marchi <simon.marchi@polymtl.ca> | 2017-03-13 18:51:39 -0400 |
|---|---|---|
| committer | Simon Marchi <simon.marchi@ericsson.com> | 2017-03-13 18:51:39 -0400 |
| commit | 551196862e4e9dfda510f59c53b0a3ff3153e4ed (patch) | |
| tree | 1ae065dc345a76a56e96a2f220db4aab12dbf89c | |
| parent | 6a06fbb7b73fe55d6b9057f8154652e1ae8f883c (diff) | |
| download | gdb-551196862e4e9dfda510f59c53b0a3ff3153e4ed.zip gdb-551196862e4e9dfda510f59c53b0a3ff3153e4ed.tar.gz gdb-551196862e4e9dfda510f59c53b0a3ff3153e4ed.tar.bz2 | |
aarc64-linux-nat: Use ptid from regcache instead of inferior_ptid
gdb/ChangeLog:
* aarch64-linux-nat.c (fetch_gregs_from_thread,
store_gregs_to_thread, fetch_fpregs_from_thread,
store_fpregs_to_thread): Use regcache->ptid instead of
inferior_ptid.
| -rw-r--r-- | gdb/ChangeLog | 7 | ||||
| -rw-r--r-- | gdb/aarch64-linux-nat.c | 8 |
2 files changed, 11 insertions, 4 deletions
diff --git a/gdb/ChangeLog b/gdb/ChangeLog index 6f25b87..ea293a4 100644 --- a/gdb/ChangeLog +++ b/gdb/ChangeLog @@ -1,5 +1,12 @@ 2017-03-13 Simon Marchi <simon.marchi@polymtl.ca> + * aarch64-linux-nat.c (fetch_gregs_from_thread, + store_gregs_to_thread, fetch_fpregs_from_thread, + store_fpregs_to_thread): Use regcache->ptid instead of + inferior_ptid. + +2017-03-13 Simon Marchi <simon.marchi@polymtl.ca> + * amd64-linux-nat.c (amd64_linux_fetch_inferior_registers, amd64_linux_fetch_inferior_registers): Use regcache->ptid instead of inferior_ptid. diff --git a/gdb/aarch64-linux-nat.c b/gdb/aarch64-linux-nat.c index 0d472e2..3f5b30e 100644 --- a/gdb/aarch64-linux-nat.c +++ b/gdb/aarch64-linux-nat.c @@ -163,7 +163,7 @@ fetch_gregs_from_thread (struct regcache *regcache) and arm. */ gdb_static_assert (sizeof (regs) >= 18 * 4); - tid = ptid_get_lwp (inferior_ptid); + tid = ptid_get_lwp (regcache_get_ptid (regcache)); iovec.iov_base = ®s; if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) @@ -200,7 +200,7 @@ store_gregs_to_thread (const struct regcache *regcache) /* Make sure REGS can hold all registers contents on both aarch64 and arm. */ gdb_static_assert (sizeof (regs) >= 18 * 4); - tid = ptid_get_lwp (inferior_ptid); + tid = ptid_get_lwp (regcache_get_ptid (regcache)); iovec.iov_base = ®s; if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32) @@ -244,7 +244,7 @@ fetch_fpregs_from_thread (struct regcache *regcache) and arm. */ gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); - tid = ptid_get_lwp (inferior_ptid); + tid = ptid_get_lwp (regcache_get_ptid (regcache)); iovec.iov_base = ®s; @@ -291,7 +291,7 @@ store_fpregs_to_thread (const struct regcache *regcache) /* Make sure REGS can hold all VFP registers contents on both aarch64 and arm. */ gdb_static_assert (sizeof regs >= VFP_REGS_SIZE); - tid = ptid_get_lwp (inferior_ptid); + tid = ptid_get_lwp (regcache_get_ptid (regcache)); iovec.iov_base = ®s; |