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author | Nick Clifton <nickc@redhat.com> | 2012-06-13 14:19:00 +0000 |
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committer | Nick Clifton <nickc@redhat.com> | 2012-06-13 14:19:00 +0000 |
commit | 1a43faafe7c5e36bd950ada4081d0e8221d648a9 (patch) | |
tree | 84a014c9e75428c2b11b6b941eaba217171ac117 | |
parent | fdbe2eb720c3f35955eb789c9cace24cfc95cd6c (diff) | |
download | gdb-1a43faafe7c5e36bd950ada4081d0e8221d648a9.zip gdb-1a43faafe7c5e36bd950ada4081d0e8221d648a9.tar.gz gdb-1a43faafe7c5e36bd950ada4081d0e8221d648a9.tar.bz2 |
PR gas/12698
* config/tc-arm.c (do_t_mrs): Do not require an m-profile
architecure when assembling for all archiectures.
(do_t_msr): Likewise.
-rw-r--r-- | gas/ChangeLog | 7 | ||||
-rw-r--r-- | gas/config/tc-arm.c | 26 |
2 files changed, 25 insertions, 8 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog index 1182c13..a9fc59a 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2012-06-13 Zhenqiang Chen <zhenqiang.chen@linaro.org> + + PR gas/12698 + * config/tc-arm.c (do_t_mrs): Do not require an m-profile + architecure when assembling for all archiectures. + (do_t_msr): Likewise. + 2012-06-11 Georg-Johann Lay <avr@gjlay.de> PR 13503 diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c index 6ff64a6..2257d4e 100644 --- a/gas/config/tc-arm.c +++ b/gas/config/tc-arm.c @@ -11201,8 +11201,14 @@ do_t_mrs (void) int flags = inst.operands[1].imm & (PSR_c|PSR_x|PSR_s|PSR_f|SPSR_BIT); if (ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_m)) - constraint (flags != 0, _("selected processor does not support " - "requested special purpose register")); + { + /* PR gas/12698: The constraint is only applied for m_profile. + If the user has specified -march=all, we want to ignore it as + we are building for any CPU type, including non-m variants. */ + bfd_boolean m_profile = selected_cpu.core != arm_arch_any.core; + constraint ((flags != 0) && m_profile, _("selected processor does " + "not support requested special purpose register")); + } else /* mrs only accepts APSR/CPSR/SPSR/CPSR_all/SPSR_all (for non-M profile devices). */ @@ -11236,12 +11242,16 @@ do_t_msr (void) { int bits = inst.operands[0].imm & (PSR_c|PSR_x|PSR_s|PSR_f|SPSR_BIT); - constraint ((ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v6_dsp) - && (bits & ~(PSR_s | PSR_f)) != 0) - || (!ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v6_dsp) - && bits != PSR_f), - _("selected processor does not support requested special " - "purpose register")); + /* PR gas/12698: The constraint is only applied for m_profile. + If the user has specified -march=all, we want to ignore it as + we are building for any CPU type, including non-m variants. */ + bfd_boolean m_profile = selected_cpu.core != arm_arch_any.core; + constraint (((ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v6_dsp) + && (bits & ~(PSR_s | PSR_f)) != 0) + || (!ARM_CPU_HAS_FEATURE (selected_cpu, arm_ext_v6_dsp) + && bits != PSR_f)) && m_profile, + _("selected processor does not support requested special " + "purpose register")); } else constraint ((flags & 0xff) != 0, _("selected processor does not support " |