[AArch64][3/6] GAS support TLSLD move/add relocation types

2015-08-19  Jiong Wang  <jiong.wang@arm.com>

bfd/
  * reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
  * elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
  * bfd-in2.h: Regenerate.
  * libbfd.h: Regenerate.

gas/
  * config/tc-aarch64.c (reloc_table): New relocation modifiers,
  "dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
  "dtprel_g1_nc", "dtprel_g2".
  (md_apply_fix): Support new relocation types.
  (aarch64_force_relocation): Likewise.
  (process_movw_reloc_info): Likewise.

gas/testsuite/
  * gas/aarch64/reloc-dtprel_g0.s: New testcase.
  * gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
  * gas/aarch64/reloc-dtprel_g2.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.s: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
  * gas/aarch64/reloc-dtprel_g0.d: New expectation file.
  * gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
  * gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
  * gas/aarch64/reloc-dtprel_g2.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12.d: Likewise.
  * gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.

29 files changed, 401 insertions, 0 deletions

diff --git a/bfd/ChangeLog b/bfd/ChangeLog
index a6491e1..efef958 100644
--- a/bfd/ChangeLog
+++ b/bfd/ChangeLog
@@ -1,5 +1,17 @@
 2015-08-19  Jiong Wang  <jiong.wang@arm.com>
 
+	* reloc.c (BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
+	BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
+	BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
+	BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
+	BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
+	BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2): New entries.
+	* elfnn-aarch64.c (elfNN_aarch64_howto_table): Likewise.
+	* bfd-in2.h: Regenerate.
+	* libbfd.h: Regenerate.
+
+2015-08-19  Jiong Wang  <jiong.wang@arm.com>
+
 	* elfnn-aarch64.c (IS_AARCH64_TLS_RELOC): Recognize
 	BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
 	(aarch64_reloc_got_type): Likewise.
diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
index 1a99ba6..7a5ff76 100644
--- a/bfd/bfd-in2.h
+++ b/bfd/bfd-in2.h
@@ -5794,6 +5794,9 @@ BFD_RELOC_AARCH64_TLSGD_ADR_PAGE21.  */
 /* AArch64 TLS INITIAL EXEC relocation.  */
   BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19,
 
+/* bit[23:12] of byte offset to module TLS base address.  */
+  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
+
 /* Unsigned 12 bit byte offset to module TLS base address.  */
   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12,
 
@@ -5812,6 +5815,21 @@ instruction.  */
 /* GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.  */
   BFD_RELOC_AARCH64_TLSLD_ADR_PREL21,
 
+/* bit[15:0] of byte offset to module TLS base address.  */
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
+
+/* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0  */
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
+
+/* bit[31:16] of byte offset to module TLS base address.  */
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
+
+/* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1  */
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
+
+/* bit[47:32] of byte offset to module TLS base address.  */
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2,
+
 /* AArch64 TLS LOCAL EXEC relocation.  */
   BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2,
 
diff --git a/bfd/elfnn-aarch64.c b/bfd/elfnn-aarch64.c
index 962a10e..6051108 100644
--- a/bfd/elfnn-aarch64.c
+++ b/bfd/elfnn-aarch64.c
@@ -1043,6 +1043,21 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
 	 0x1ffffc,		/* dst_mask */
 	 FALSE),		/* pcrel_offset */
 
+  /* ADD: bit[23:12] of byte offset to module TLS base address.  */
+  HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_HI12),	/* type */
+	 12,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 12,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_ADD_DTPREL_HI12),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xfff,			/* src_mask */
+	 0xfff,			/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
   /* Unsigned 12 bit byte offset to module TLS base address.  */
   HOWTO (AARCH64_R (TLSLD_ADD_DTPREL_LO12),	/* type */
 	 0,			/* rightshift */
@@ -1118,6 +1133,81 @@ static reloc_howto_type elfNN_aarch64_howto_table[] =
 	 0x1fffff,		/* dst_mask */
 	 TRUE),			/* pcrel_offset */
 
+  /* MOVZ: bit[15:0] of byte offset to module TLS base address.  */
+  HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0),	/* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffff,		/* src_mask */
+	 0xffff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0.  */
+  HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G0_NC),	/* type */
+	 0,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G0_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffff,		/* src_mask */
+	 0xffff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* MOVZ: bit[31:16] of byte offset to module TLS base address.  */
+  HOWTO (AARCH64_R (TLSLD_MOVW_DTPREL_G1),	/* type */
+	 16,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffff,		/* src_mask */
+	 0xffff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1.  */
+  HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G1_NC),	/* type */
+	 16,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_dont,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G1_NC),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffff,		/* src_mask */
+	 0xffff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
+  /* MOVZ: bit[47:32] of byte offset to module TLS base address.  */
+  HOWTO64 (AARCH64_R (TLSLD_MOVW_DTPREL_G2),	/* type */
+	 32,			/* rightshift */
+	 2,			/* size (0 = byte, 1 = short, 2 = long) */
+	 16,			/* bitsize */
+	 FALSE,			/* pc_relative */
+	 0,			/* bitpos */
+	 complain_overflow_unsigned,	/* complain_on_overflow */
+	 bfd_elf_generic_reloc,	/* special_function */
+	 AARCH64_R_STR (TLSLD_MOVW_DTPREL_G2),	/* name */
+	 FALSE,			/* partial_inplace */
+	 0xffff,		/* src_mask */
+	 0xffff,		/* dst_mask */
+	 FALSE),		/* pcrel_offset */
+
   HOWTO64 (AARCH64_R (TLSLE_MOVW_TPREL_G2),	/* type */
 	 32,			/* rightshift */
 	 2,			/* size (0 = byte, 1 = short, 2 = long) */
diff --git a/bfd/libbfd.h b/bfd/libbfd.h
index cdda315..5b3359c 100644
--- a/bfd/libbfd.h
+++ b/bfd/libbfd.h
@@ -2759,11 +2759,17 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
   "BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19",
+  "BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12",
   "BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12",
   "BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC",
   "BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC",
   "BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21",
   "BFD_RELOC_AARCH64_TLSLD_ADR_PREL21",
+  "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0",
+  "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC",
+  "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1",
+  "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC",
+  "BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2",
   "BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2",
   "BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1",
   "BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC",
diff --git a/bfd/reloc.c b/bfd/reloc.c
index 846befc..90ddfb5 100644
--- a/bfd/reloc.c
+++ b/bfd/reloc.c
@@ -6844,6 +6844,10 @@ ENUM
 ENUMDOC
   AArch64 TLS INITIAL EXEC relocation.
 ENUM
+  BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
+ENUMDOC
+  bit[23:12] of byte offset to module TLS base address.
+ENUM
   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12
 ENUMDOC
   Unsigned 12 bit byte offset to module TLS base address.
@@ -6867,6 +6871,26 @@ ENUM
 ENUMDOC
   GOT entry address for AArch64 TLS Local Dynamic, used with ADR instruction.
 ENUM
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
+ENUMDOC
+  bit[15:0] of byte offset to module TLS base address.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
+ENUMDOC
+  No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
+ENUMDOC
+  bit[31:16] of byte offset to module TLS base address.
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC
+ENUMDOC
+  No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
+ENUM
+  BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2
+ENUMDOC
+  bit[47:32] of byte offset to module TLS base address.
+ENUM
   BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2
 ENUMDOC
   AArch64 TLS LOCAL EXEC relocation.
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 2ba9c00..1407052 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,14 @@
 2015-08-19  Jiong Wang  <jiong.wang@arm.com>
 
+	* config/tc-aarch64.c (reloc_table): New relocation modifiers,
+	"dtprel_hi12", "dtprel_g0", "dtprel_g0_nc", "dtprel_g1",
+	"dtprel_g1_nc", "dtprel_g2".
+	(md_apply_fix): Support new relocation types.
+	(aarch64_force_relocation): Likewise.
+	(process_movw_reloc_info): Likewise.
+
+2015-08-19  Jiong Wang  <jiong.wang@arm.com>
+
 	* config/tc-aarch64.c (reloc_table): New relocation modifiers.
 	(md_apply_fix): Support BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC.
 	(aarch64_force_relocation): Likewise.
diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
index d55356f..d373c70 100644
--- a/gas/config/tc-aarch64.c
+++ b/gas/config/tc-aarch64.c
@@ -2540,6 +2540,60 @@ static struct reloc_table_entry reloc_table[] = {
    0,
    0},
 
+  /* bits[23:12] of offset to the module TLS base address.  */
+  {"dtprel_hi12", 0,
+   0,				/* adr_type */
+   0,
+   0,
+   BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12,
+   0,
+   0},
+
+  /* bits[15:0] of offset to the module TLS base address.  */
+  {"dtprel_g0", 0,
+   0,				/* adr_type */
+   0,
+   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0,
+   0,
+   0,
+   0},
+
+  /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0.  */
+  {"dtprel_g0_nc", 0,
+   0,				/* adr_type */
+   0,
+   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC,
+   0,
+   0,
+   0},
+
+  /* bits[31:16] of offset to the module TLS base address.  */
+  {"dtprel_g1", 0,
+   0,				/* adr_type */
+   0,
+   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1,
+   0,
+   0,
+   0},
+
+  /* No overflow check version of BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1.  */
+  {"dtprel_g1_nc", 0,
+   0,				/* adr_type */
+   0,
+   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC,
+   0,
+   0,
+   0},
+
+  /* bits[47:32] of offset to the module TLS base address.  */
+  {"dtprel_g2", 0,
+   0,				/* adr_type */
+   0,
+   BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2,
+   0,
+   0,
+   0},
+
   /* Get to the page containing GOT TLS entry for a symbol */
   {"gottprel", 0,
    0,				/* adr_type */
@@ -4613,6 +4667,8 @@ process_movw_reloc_info (void)
     case BFD_RELOC_AARCH64_MOVW_G0:
     case BFD_RELOC_AARCH64_MOVW_G0_NC:
     case BFD_RELOC_AARCH64_MOVW_G0_S:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G0_NC:
       shift = 0;
@@ -4620,6 +4676,8 @@ process_movw_reloc_info (void)
     case BFD_RELOC_AARCH64_MOVW_G1:
     case BFD_RELOC_AARCH64_MOVW_G1_NC:
     case BFD_RELOC_AARCH64_MOVW_G1_S:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G1_NC:
       shift = 16;
@@ -4627,6 +4685,7 @@ process_movw_reloc_info (void)
     case BFD_RELOC_AARCH64_MOVW_G2:
     case BFD_RELOC_AARCH64_MOVW_G2_NC:
     case BFD_RELOC_AARCH64_MOVW_G2_S:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
     case BFD_RELOC_AARCH64_TLSLE_MOVW_TPREL_G2:
       if (is32)
 	{
@@ -6805,11 +6864,17 @@ md_apply_fix (fixS * fixP, valueT * valP, segT seg)
     case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
@@ -7019,11 +7084,17 @@ aarch64_force_relocation (struct fix *fixp)
     case BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_PREL19:
+    case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADD_LO12_NC:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PAGE21:
     case BFD_RELOC_AARCH64_TLSLD_ADR_PREL21:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC:
+    case BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_HI12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12:
     case BFD_RELOC_AARCH64_TLSLE_ADD_TPREL_LO12_NC:
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 3be3dd1..84424b4 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,5 +1,28 @@
 2015-08-19  Jiong Wang  <jiong.wang@arm.com>
 
+	* gas/aarch64/reloc-dtprel_g0.s: New testcase.
+	* gas/aarch64/reloc-dtprel_g0-ilp32.s: Likewise.
+	* gas/aarch64/reloc-dtprel_g0_nc.s: Likewise.
+	* gas/aarch64/reloc-dtprel_g0_nc-ilp32.s: Likewise.
+	* gas/aarch64/reloc-dtprel_g1.s: Likewise.
+	* gas/aarch64/reloc-dtprel_g1-ilp32.s: Likewise.
+	* gas/aarch64/reloc-dtprel_g1_nc.s: Likewise.
+	* gas/aarch64/reloc-dtprel_g2.s: Likewise.
+	* gas/aarch64/reloc-dtprel_hi12.s: Likewise.
+	* gas/aarch64/reloc-dtprel_hi12-ilp32.s: Likewise.
+	* gas/aarch64/reloc-dtprel_g0.d: New expectation file.
+	* gas/aarch64/reloc-dtprel_g0-ilp32.d: Likewise.
+	* gas/aarch64/reloc-dtprel_g0_nc.d: Likewise.
+	* gas/aarch64/reloc-dtprel_g0_nc-ilp32.d: Likewise.
+	* gas/aarch64/reloc-dtprel_g1.d: Likewise.
+	* gas/aarch64/reloc-dtprel_g1-ilp32.d: Likewise.
+	* gas/aarch64/reloc-dtprel_g1_nc.d: Likewise.
+	* gas/aarch64/reloc-dtprel_g2.d: Likewise.
+	* gas/aarch64/reloc-dtprel_hi12.d: Likewise.
+	* gas/aarch64/reloc-dtprel_hi12-ilp32.d: Likewise.
+
+2015-08-19  Jiong Wang  <jiong.wang@arm.com>
+
 	* gas/aarch64/reloc-dtprel_lo12_nc.s: New testcase.
 	* gas/aarch64/reloc-dtprel_lo12_nc-ilp32.s: Likewise.
 	* gas/aarch64/reloc-dtprel_lo12_nc.d: New expectation file.
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d
new file mode 100644
index 0000000..44b6676
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.d
@@ -0,0 +1,10 @@
+#as: -mabi=ilp32
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	52800009 	mov	w9, #0x0.*
+			0: R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.s
new file mode 100644
index 0000000..ebf106e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0-ilp32.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g0 ILP32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
+	movz w9, #:dtprel_g0:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d
new file mode 100644
index 0000000..f1d4c16
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	d2800009 	mov	x9, #0x0.*
+			0: R_AARCH64_TLSLD_MOVW_DTPREL_G0	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g0.s
new file mode 100644
index 0000000..201c2a7
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g0
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0
+	movz x9, #:dtprel_g0:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d
new file mode 100644
index 0000000..c319e3d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.d
@@ -0,0 +1,10 @@
+#as: -mabi=ilp32
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	72800010 	movk	w16, #0x0
+			0: R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.s
new file mode 100644
index 0000000..59881bf
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc-ilp32.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g0_nc ILP32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
+	movk w16, #:dtprel_g0_nc:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d
new file mode 100644
index 0000000..68bcc00
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f2800010 	movk	x16, #0x0
+			0: R_AARCH64_TLSLD_MOVW_DTPREL_G0_NC	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.s
new file mode 100644
index 0000000..649b6a2
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g0_nc.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g0_nc
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G0_NC
+	movk x16, #:dtprel_g0_nc:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d
new file mode 100644
index 0000000..6a91806
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.d
@@ -0,0 +1,10 @@
+#as: -mabi=ilp32
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	52a00009 	movz	w9, #0x0, lsl #16
+			0: R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.s
new file mode 100644
index 0000000..1a51e9e
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1-ilp32.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g1 ILP32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
+	movz w9, #:dtprel_g1:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d
new file mode 100644
index 0000000..859da28
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	d2a00009 	movz	x9, #0x0, lsl #16
+			0: R_AARCH64_TLSLD_MOVW_DTPREL_G1	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g1.s
new file mode 100644
index 0000000..7dc1685
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g1
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1
+	movz x9, #:dtprel_g1:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d
new file mode 100644
index 0000000..4a053eb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	f2a00009 	movk	x9, #0x0, lsl #16
+			0: R_AARCH64_TLSLD_MOVW_DTPREL_G1_NC	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.s
new file mode 100644
index 0000000..571f759
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g1_nc.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g1_nc
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G1_NC
+	movk x9, #:dtprel_g1_nc:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d b/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d
new file mode 100644
index 0000000..1f2fb2d
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g2.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	d2c0000a 	movz	x10, #0x0, lsl #32
+			0: R_AARCH64_TLSLD_MOVW_DTPREL_G2	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_g2.s b/gas/testsuite/gas/aarch64/reloc-dtprel_g2.s
new file mode 100644
index 0000000..9e11002
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_g2.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_g2
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_MOVW_DTPREL_G2
+	movz x10, #:dtprel_g2:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d
new file mode 100644
index 0000000..0235aeb
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.d
@@ -0,0 +1,10 @@
+#as: -mabi=ilp32
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+00000000 <.*>:
+   0:	11000341 	add	w1, w26, #0x0
+			0: R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.s b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.s
new file mode 100644
index 0000000..3d1b852
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12-ilp32.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_hi12 ILP32
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
+	add  w1, w26, #:dtprel_hi12:x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d
new file mode 100644
index 0000000..84cec8c
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.d
@@ -0,0 +1,9 @@
+#objdump: -dr
+
+.*:     file format .*
+
+Disassembly of section \.text:
+
+0000000000000000 <.*>:
+   0:	91000341 	add	x1, x26, #0x0
+			0: R_AARCH64_TLSLD_ADD_DTPREL_HI12	x
diff --git a/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.s b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.s
new file mode 100644
index 0000000..c4a5cb6
--- /dev/null
+++ b/gas/testsuite/gas/aarch64/reloc-dtprel_hi12.s
@@ -0,0 +1,5 @@
+// Test file for AArch64 GAS -- dtprel_hi12
+
+func:
+	// BFD_RELOC_AARCH64_TLSLD_ADD_DTPREL_HI12
+	add  x1, x26, #:dtprel_hi12:x
diff --git a/include/elf/aarch64.h b/include/elf/aarch64.h
index c297ebc..41de67e 100644
--- a/include/elf/aarch64.h
+++ b/include/elf/aarch64.h
@@ -132,6 +132,10 @@ RELOC_NUMBER (R_AARCH64_P32_TLSGD_ADD_LO12_NC, 82)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PREL21, 83)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADR_PAGE21, 84)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_LO12_NC, 85)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G1, 87)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0, 88)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_MOVW_DTPREL_G0_NC, 89)
+RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_HI12, 90)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12, 91)
 RELOC_NUMBER (R_AARCH64_P32_TLSLD_ADD_DTPREL_LO12_NC, 92)
 RELOC_NUMBER (R_AARCH64_P32_TLSIE_ADR_GOTTPREL_PAGE21, 103)