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| author | Nick Clifton <nickc@redhat.com> | 2001-02-16 22:04:22 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2001-02-16 22:04:22 +0000 |
| commit | 2ef048fc9fe85293e7cb3aa8259ab0a60bcedb1b (patch) | |
| tree | 460f9db84cb9eddb2ff379e5a6abd2a05d0bc5bc | |
| parent | 8a0c27cda907d1e09f8d952e911b73d77e7f4737 (diff) | |
| download | gdb-2ef048fc9fe85293e7cb3aa8259ab0a60bcedb1b.zip gdb-2ef048fc9fe85293e7cb3aa8259ab0a60bcedb1b.tar.gz gdb-2ef048fc9fe85293e7cb3aa8259ab0a60bcedb1b.tar.bz2 | |
Remove Prefetch abort for breakpoints. Instead set the state to RESUME.
| -rw-r--r-- | sim/arm/ChangeLog | 5 | ||||
| -rw-r--r-- | sim/arm/armemu.c | 14 |
2 files changed, 7 insertions, 12 deletions
diff --git a/sim/arm/ChangeLog b/sim/arm/ChangeLog index 4b1331a..7ed494d 100644 --- a/sim/arm/ChangeLog +++ b/sim/arm/ChangeLog @@ -1,3 +1,8 @@ +2001-02-16 Nick Clifton <nickc@redhat.com> + + * armemu.c: Remove Prefetch abort for breakpoints. Instead set + the state to RESUME. + 2001-02-14 Nick Clifton <nickc@redhat.com> * armemu.c: Add code to preserve processor mode when a prefetch diff --git a/sim/arm/armemu.c b/sim/arm/armemu.c index f0a6103..6b963c7 100644 --- a/sim/arm/armemu.c +++ b/sim/arm/armemu.c @@ -1340,7 +1340,6 @@ ARMul_Emulate26 (register ARMul_State * state) { ARMword value; extern int SWI_vector_installed; - int in_thumb_mode; /* Hardware is allowed to optionally override this instruction and treat it as a breakpoint. Since @@ -1378,17 +1377,8 @@ ARMul_Emulate26 (register ARMul_State * state) } } - /* We must signal an abort to mark the next instruction as - invalid and in need of refetching. This is because if this - the instruction was a breakpoint inserted by the debugger, - the instruction could be changed back to its original value. - The abort however, will automatically reset the processor into - ARM mode, so we have to preserve the mode flag and resort it - after singalling the abort. */ - in_thumb_mode = TFLAG; - ARMul_Abort (state, ARMul_PrefetchAbortV); - ASSIGNT (in_thumb_mode); - + /* Force the next instruction to be refetched. */ + state->NextInstr = RESUME; break; } } |