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authorPaul Brook <paul@codesourcery.com>2007-04-04 19:21:24 +0000
committerPaul Brook <paul@codesourcery.com>2007-04-04 19:21:24 +0000
commit3b8d421e14a00af07a4e21d3f021fd02cd609670 (patch)
tree2a958234e58ddef093b322046be4ce6f00bbf25c
parent9fcfe2ed35402e619d8c65f4ae030b10a5ec140f (diff)
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2007-04-04 Paul Brook <paul@codesourcery.com>
gas/ * config/tc-arm.c (do_neon_ext): Enforce immediate range. (insns): Use I15 for vext. gas/testsute/ * gas/arm/neon-cov.s: Add new vext test. * gas/arm/neon-cov.d: Ditto.
-rw-r--r--gas/ChangeLog5
-rw-r--r--gas/config/tc-arm.c5
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/arm/neon-cov.d1
-rw-r--r--gas/testsuite/gas/arm/neon-cov.s1
5 files changed, 15 insertions, 2 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 1b94c4b..9844026 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,10 @@
2007-04-04 Paul Brook <paul@codesourcery.com>
+ * config/tc-arm.c (do_neon_ext): Enforce immediate range.
+ (insns): Use I15 for vext.
+
+2007-04-04 Paul Brook <paul@codesourcery.com>
+
* configure.tgt: Loosen checks for arm uclinux eabi targets.
2007-04-02 Sterling Augustine <sterling@tensilica.com>
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index 6b915ba..9b8db7a 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -12815,6 +12815,7 @@ do_neon_ext (void)
struct neon_type_el et = neon_check_type (3, rs,
N_EQK, N_EQK, N_8 | N_16 | N_32 | N_64 | N_KEY);
unsigned imm = (inst.operands[3].imm * et.size) / 8;
+ constraint (imm >= (neon_quad (rs) ? 16 : 8), _("shift out of range"));
inst.instruction |= LOW4 (inst.operands[0].reg) << 12;
inst.instruction |= HI1 (inst.operands[0].reg) << 22;
inst.instruction |= LOW4 (inst.operands[1].reg) << 16;
@@ -15927,8 +15928,8 @@ static const struct asm_opcode insns[] =
nUF(vmull, vmull, 3, (RNQ, RND, RND_RNSC), neon_vmull),
/* Extract. Size 8. */
- NUF(vext, 0b00000, 4, (RNDQ, oRNDQ, RNDQ, I7), neon_ext),
- NUF(vextq, 0b00000, 4, (RNQ, oRNQ, RNQ, I7), neon_ext),
+ NUF(vext, 0b00000, 4, (RNDQ, oRNDQ, RNDQ, I15), neon_ext),
+ NUF(vextq, 0b00000, 4, (RNQ, oRNQ, RNQ, I15), neon_ext),
/* Two registers, miscellaneous. */
/* Reverse. Sizes 8 16 32 (must be < size in opcode). */
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index c9aab5d..39459e8 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2007-04-04 Paul Brook <paul@codesourcery.com>
+
+ * gas/arm/neon-cov.s: Add new vext test.
+ * gas/arm/neon-cov.d: Ditto.
+
2007-04-01 Christian Groessler <chris@groessler.org>
* gas/z8k/calr.d: Fix for 64bit bfd.
diff --git a/gas/testsuite/gas/arm/neon-cov.d b/gas/testsuite/gas/arm/neon-cov.d
index 3190327..e3f02f8 100644
--- a/gas/testsuite/gas/arm/neon-cov.d
+++ b/gas/testsuite/gas/arm/neon-cov.d
@@ -1338,6 +1338,7 @@ Disassembly of section \.text:
0[0-9a-f]+ <[^>]+> f2b00040 vext\.8 q0, q0, q0, #0
0[0-9a-f]+ <[^>]+> f2b00040 vext\.8 q0, q0, q0, #0
0[0-9a-f]+ <[^>]+> f2b00000 vext\.8 d0, d0, d0, #0
+0[0-9a-f]+ <[^>]+> f2b00840 vext\.8 q0, q0, q0, #8
0[0-9a-f]+ <[^>]+> f3b00040 vrev64\.8 q0, q0
0[0-9a-f]+ <[^>]+> f3b00040 vrev64\.8 q0, q0
0[0-9a-f]+ <[^>]+> f3b00000 vrev64\.8 d0, d0
diff --git a/gas/testsuite/gas/arm/neon-cov.s b/gas/testsuite/gas/arm/neon-cov.s
index 2eeec27..04194a8 100644
--- a/gas/testsuite/gas/arm/neon-cov.s
+++ b/gas/testsuite/gas/arm/neon-cov.s
@@ -561,6 +561,7 @@
vext.8 q0,q0,q0,0
vextq.8 q0,q0,q0,0
vext.8 d0,d0,d0,0
+ vext.8 q0,q0,q0,8
.macro revs op opq vtype
\op\vtype q0,q0