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| author | Nick Clifton <nickc@redhat.com> | 1998-02-20 00:30:14 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 1998-02-20 00:30:14 +0000 |
| commit | c4448eec8ccdbfee0320fa42336a41c96dc3a2b0 (patch) | |
| tree | 4c06b51ab853cad4f4b5340f402bac4fd3fe7c63 | |
| parent | ecc9627d6f6b81d0e523c7968a21b1f190dff432 (diff) | |
| download | gdb-c4448eec8ccdbfee0320fa42336a41c96dc3a2b0.zip gdb-c4448eec8ccdbfee0320fa42336a41c96dc3a2b0.tar.gz gdb-c4448eec8ccdbfee0320fa42336a41c96dc3a2b0.tar.bz2 | |
Yet more tests of m32r instructions
| -rw-r--r-- | sim/testsuite/ChangeLog | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/sim/testsuite/ChangeLog b/sim/testsuite/ChangeLog index 71a5158..b113ba7 100644 --- a/sim/testsuite/ChangeLog +++ b/sim/testsuite/ChangeLog @@ -1,5 +1,11 @@ Thu Feb 19 11:15:45 1998 Nick Clifton <nickc@cygnus.com> + * sim/m32r/or3.cgs: Test OR3 instruction. + * sim/m32r/rach.cgs: Test RACH instruction. + * sim/m32r/rem.cgs: Test REM instruction. + * sim/m32r/sub.cgs: Test SUB instruction. + * sim/m32r/mv.cgs: Test MV instruction. + * sim/m32r/mul.cgs: Test MUL instruction. * sim/m32r/bl24.cgs: Test long BL instruction. * sim/m32r/bl8.cgs: Test short BL instruction. * sim/m32r/blez.cgs: Test BLEZ instruction. @@ -44,6 +50,7 @@ start-sanitize-m342rx * sim/m32r/bncl24.cgs: Test long BNCL instruction. * sim/m32r/bncl8.cgs: Test short BNCL instruction. * sim/m32r/divh.cgs: Test DIVH instruction. + * sim/m32r/rach-dsi.cgs: Test extended RACH instruction. end-sanitize-m342rx Tue Feb 17 12:46:05 1998 Doug Evans <devans@seba.cygnus.com> |