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authorJeff Law <law@redhat.com>1996-11-26 20:28:34 +0000
committerJeff Law <law@redhat.com>1996-11-26 20:28:34 +0000
commit23b01150f50eb4f960fd4ef61e50f88329c985ab (patch)
treefcbfb2d7f3d22b94fbf257701db023c7b6cfaec7
parent831f59a2189abfc5d321523c64474e9f04a2ddbe (diff)
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* mn10300-opc.c (mn10300_opcodes): Fix mask field for
mov am,(imm32,sp). Found during initial simulator work.
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/mn10300-opc.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index f7e9e0a..a311be6 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+Tue Nov 26 13:24:17 1996 Jeffrey A Law (law@cygnus.com)
+
+ * mn10300-opc.c (mn10300_opcodes): Fix mask field for
+ mov am,(imm32,sp).
+
Tue Nov 26 10:53:21 1996 Ian Lance Taylor <ian@cygnus.com>
Add support for mips16 (16 bit MIPS implementation):
diff --git a/opcodes/mn10300-opc.c b/opcodes/mn10300-opc.c
index 1f1fdb7..a370073 100644
--- a/opcodes/mn10300-opc.c
+++ b/opcodes/mn10300-opc.c
@@ -240,7 +240,7 @@ const struct mn10300_opcode mn10300_opcodes[] = {
{ "mov", 0xfc300000, 0xfff00000, FMT_D4, {AM1, MEM2(IMM32,AN0)}},
{ "mov", 0x4300, 0xf300, FMT_S1, {AM1, MEM2(IMM8, SP)}},
{ "mov", 0xfa900000, 0xfff30000, FMT_D2, {AM1, MEM2(IMM16, SP)}},
-{ "mov", 0xfc900000, 0xfc930000, FMT_D4, {AM1, MEM2(IMM32, SP)}},
+{ "mov", 0xfc900000, 0xfff30000, FMT_D4, {AM1, MEM2(IMM32, SP)}},
{ "mov", 0xf3c0, 0xffc0, FMT_D0, {AM2, MEM2(DI, AN0)}},
{ "mov", 0xfa800000, 0xfff30000, FMT_D2, {AM1, MEM(IMM16_MEM)}},
{ "mov", 0xfc800000, 0xfff30000, FMT_D4, {AM1, MEM(IMM32_MEM)}},