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authorNick Clifton <nickc@redhat.com>2009-06-15 15:42:36 +0000
committerNick Clifton <nickc@redhat.com>2009-06-15 15:42:36 +0000
commitfe2ceba1015932a19f428ccc01143df437567be4 (patch)
tree8cb99443b166325193633a74d21884b3755b75ee
parent522fe56177eaa68d38d62ae56763544ab795c36b (diff)
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PR 10186
* arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W instruction. * gas/arm/thumb32.d: Fix expected binary value of SEV.W instruction. * config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W instruction.
-rw-r--r--gas/ChangeLog6
-rw-r--r--gas/config/tc-arm.c2
-rw-r--r--gas/testsuite/ChangeLog5
-rw-r--r--gas/testsuite/gas/arm/thumb32.d2
-rw-r--r--opcodes/ChangeLog4
-rw-r--r--opcodes/arm-dis.c2
6 files changed, 18 insertions, 3 deletions
diff --git a/gas/ChangeLog b/gas/ChangeLog
index 5ddad8d..04e73ad 100644
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,3 +1,9 @@
+2009-06-15 Nick Clifton <nickc@redhat.com>
+
+ PR 10186
+ * config/tc-arm.c (T16_32_TAB): Fix binary value of SEV.W
+ instruction.
+
2009-06-13 H.J. Lu <hongjiu.lu@intel.com>
PR ld/10269
diff --git a/gas/config/tc-arm.c b/gas/config/tc-arm.c
index eaaaf06..67d8cc9 100644
--- a/gas/config/tc-arm.c
+++ b/gas/config/tc-arm.c
@@ -8429,7 +8429,7 @@ encode_thumb32_addr_mode (int i, bfd_boolean is_t, bfd_boolean is_d)
X(yield, bf10, f3af8001), \
X(wfe, bf20, f3af8002), \
X(wfi, bf30, f3af8003), \
- X(sev, bf40, f3af9004), /* typo, 8004? */
+ X(sev, bf40, f3af8004),
/* To catch errors in encoding functions, the codes are all offset by
0xF800, putting them in one of the 32-bit prefix ranges, ergo undefined
diff --git a/gas/testsuite/ChangeLog b/gas/testsuite/ChangeLog
index 2d92d05..b2fba43 100644
--- a/gas/testsuite/ChangeLog
+++ b/gas/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2009-06-15 Nick Clifton <nickc@redhat.com>
+
+ PR gas/10186
+ * gas/arm/thumb32.d: Fix expected binary value of SEV.W instruction.
+
2009-06-09 Jakub Jelinek <jakub@redhat.com>
PR gas/10255
diff --git a/gas/testsuite/gas/arm/thumb32.d b/gas/testsuite/gas/arm/thumb32.d
index c508b21..9637022 100644
--- a/gas/testsuite/gas/arm/thumb32.d
+++ b/gas/testsuite/gas/arm/thumb32.d
@@ -359,7 +359,7 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> f3af 8001 yield\.w
0[0-9a-f]+ <[^>]+> f3af 8002 wfe\.w
0[0-9a-f]+ <[^>]+> f3af 8003 wfi\.w
-0[0-9a-f]+ <[^>]+> f3af 9004 sev\.w
+0[0-9a-f]+ <[^>]+> f3af 8004 sev\.w
0[0-9a-f]+ <[^>]+> bf90 nop \{9\}
0[0-9a-f]+ <[^>]+> f3af 8081 nop\.w \{129\}
0[0-9a-f]+ <[^>]+> bf08 it eq
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 5fd7db0..0596631 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,9 @@
2009-06-15 Nick Clifton <nickc@redhat.com>
+ PR 10186
+ * arm-dis.c (thumb32_opcodes): Fix binary value of SEV.W
+ instruction.
+
PR 10173
* cr16-dis.c (print_arg): Avoid printing the 0x prefix twice.
diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c
index cb3bc99..ce724a5 100644
--- a/opcodes/arm-dis.c
+++ b/opcodes/arm-dis.c
@@ -1245,7 +1245,7 @@ static const struct opcode32 thumb32_opcodes[] =
{ARM_EXT_V6T2, 0xf3af8001, 0xffffffff, "yield%c.w"},
{ARM_EXT_V6T2, 0xf3af8002, 0xffffffff, "wfe%c.w"},
{ARM_EXT_V6T2, 0xf3af8003, 0xffffffff, "wfi%c.w"},
- {ARM_EXT_V6T2, 0xf3af9004, 0xffffffff, "sev%c.w"},
+ {ARM_EXT_V6T2, 0xf3af8004, 0xffffffff, "sev%c.w"},
{ARM_EXT_V6T2, 0xf3af8000, 0xffffff00, "nop%c.w\t{%0-7d}"},
{ARM_EXT_V6T2, 0xf3bf8f2f, 0xffffffff, "clrex%c"},