x86: VFPCLASSSH is Evex.LLIG

This also was mistakenly flagged as Evex.128.

7 files changed, 54 insertions, 3 deletions

diff --git a/gas/testsuite/gas/i386/evex-lig.s b/gas/testsuite/gas/i386/evex-lig.s
index 7aeedcc..db0891a 100644
--- a/gas/testsuite/gas/i386/evex-lig.s
+++ b/gas/testsuite/gas/i386/evex-lig.s
@@ -1710,6 +1710,12 @@ _start:
 	vcmpsh	$123, 254(%ecx), %xmm5, %k5	# AVX512-FP16 Disp8
 	vcmpsh	$123, -256(%edx), %xmm5, %k5{%k7}	# AVX512-FP16 Disp8
 
+	vfpclasssh	$123, %xmm4, %k5	# AVX512-FP16
+	vfpclasssh	$123, (%ecx), %k5	# AVX512-FP16
+	vfpclasssh	$123, -123456(%esp, %esi, 8), %k5{%k7}	# AVX512-FP16
+	vfpclasssh	$123, 254(%ecx), %k5	# AVX512-FP16 Disp8
+	vfpclasssh	$123, -256(%edx), %k5{%k7}	# AVX512-FP16 Disp8
+
 	.intel_syntax noprefix
 	vaddsd	xmm6{k7}, xmm5, xmm4	 # AVX512
 	vaddsd	xmm6{k7}{z}, xmm5, xmm4	 # AVX512
@@ -3416,3 +3422,9 @@ _start:
 	vcmpsh	k5{k7}, xmm5, WORD PTR [esp+esi*8-123456], 123	# AVX512-FP16
 	vcmpsh	k5, xmm5, WORD PTR [ecx+254], 123	# AVX512-FP16 Disp8
 	vcmpsh	k5{k7}, xmm5, WORD PTR [edx-256], 123	# AVX512-FP16 Disp8
+
+	vfpclasssh	k5, xmm4, 123	# AVX512-FP16
+	vfpclasssh	k5, WORD PTR [ecx], 123	# AVX512-FP16
+	vfpclasssh	k5{k7}, WORD PTR [esp+esi*8-123456], 123	# AVX512-FP16
+	vfpclasssh	k5, WORD PTR [ecx+254], 123	# AVX512-FP16 Disp8
+	vfpclasssh	k5{k7}, WORD PTR [edx-256], 123	# AVX512-FP16 Disp8
diff --git a/gas/testsuite/gas/i386/evex-lig256-intel.d b/gas/testsuite/gas/i386/evex-lig256-intel.d
index 817995c..1622dc9 100644
--- a/gas/testsuite/gas/i386/evex-lig256-intel.d
+++ b/gas/testsuite/gas/i386/evex-lig256-intel.d
@@ -1542,6 +1542,11 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 f3 56 2f c2 ac f4 c0 1d fe ff 7b 	vcmpsh k5\{k7\},xmm5,WORD PTR \[esp\+esi\*8-0x1e240\],0x7b
 [ 	]*[a-f0-9]+:	62 f3 56 28 c2 69 7f 7b 	vcmpsh k5,xmm5,WORD PTR \[ecx\+0xfe\],0x7b
 [ 	]*[a-f0-9]+:	62 f3 56 2f c2 6a 80 7b 	vcmpsh k5\{k7\},xmm5,WORD PTR \[edx-0x100\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 28 67 ec 7b 	vfpclasssh k5,xmm4,0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 28 67 29 7b 	vfpclasssh k5,WORD PTR \[ecx\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 2f 67 ac f4 c0 1d fe ff 7b 	vfpclasssh k5\{k7\},WORD PTR \[esp\+esi\*8-0x1e240\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 28 67 69 7f 7b 	vfpclasssh k5,WORD PTR \[ecx\+0xfe\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 2f 67 6a 80 7b 	vfpclasssh k5\{k7\},WORD PTR \[edx-0x100\],0x7b
 [ 	]*[a-f0-9]+:	62 f1 d7 2f 58 f4    	vaddsd xmm6\{k7\},xmm5,xmm4
 [ 	]*[a-f0-9]+:	62 f1 d7 af 58 f4    	vaddsd xmm6\{k7\}\{z\},xmm5,xmm4
 [ 	]*[a-f0-9]+:	62 f1 d7 1f 58 f4    	vaddsd xmm6\{k7\},xmm5,xmm4,\{rn-sae\}
@@ -3075,4 +3080,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 f3 56 2f c2 ac f4 c0 1d fe ff 7b 	vcmpsh k5\{k7\},xmm5,WORD PTR \[esp\+esi\*8-0x1e240\],0x7b
 [ 	]*[a-f0-9]+:	62 f3 56 28 c2 69 7f 7b 	vcmpsh k5,xmm5,WORD PTR \[ecx\+0xfe\],0x7b
 [ 	]*[a-f0-9]+:	62 f3 56 2f c2 6a 80 7b 	vcmpsh k5\{k7\},xmm5,WORD PTR \[edx-0x100\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 28 67 ec 7b 	vfpclasssh k5,xmm4,0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 28 67 29 7b 	vfpclasssh k5,WORD PTR \[ecx\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 2f 67 ac f4 c0 1d fe ff 7b 	vfpclasssh k5\{k7\},WORD PTR \[esp\+esi\*8-0x1e240\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 28 67 69 7f 7b 	vfpclasssh k5,WORD PTR \[ecx\+0xfe\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 2f 67 6a 80 7b 	vfpclasssh k5\{k7\},WORD PTR \[edx-0x100\],0x7b
 #pass
diff --git a/gas/testsuite/gas/i386/evex-lig256.d b/gas/testsuite/gas/i386/evex-lig256.d
index 274bc66..8ce21d4 100644
--- a/gas/testsuite/gas/i386/evex-lig256.d
+++ b/gas/testsuite/gas/i386/evex-lig256.d
@@ -1542,6 +1542,11 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 f3 56 2f c2 ac f4 c0 1d fe ff 7b 	vcmpsh \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%k5\{%k7\}
 [ 	]*[a-f0-9]+:	62 f3 56 28 c2 69 7f 7b 	vcmpsh \$0x7b,0xfe\(%ecx\),%xmm5,%k5
 [ 	]*[a-f0-9]+:	62 f3 56 2f c2 6a 80 7b 	vcmpsh \$0x7b,-0x100\(%edx\),%xmm5,%k5\{%k7\}
+[ 	]*[a-f0-9]+:	62 f3 7c 28 67 ec 7b 	vfpclasssh \$0x7b,%xmm4,%k5
+[ 	]*[a-f0-9]+:	62 f3 7c 28 67 29 7b 	vfpclasssh \$0x7b,\(%ecx\),%k5
+[ 	]*[a-f0-9]+:	62 f3 7c 2f 67 ac f4 c0 1d fe ff 7b 	vfpclasssh \$0x7b,-0x1e240\(%esp,%esi,8\),%k5\{%k7\}
+[ 	]*[a-f0-9]+:	62 f3 7c 28 67 69 7f 7b 	vfpclasssh \$0x7b,0xfe\(%ecx\),%k5
+[ 	]*[a-f0-9]+:	62 f3 7c 2f 67 6a 80 7b 	vfpclasssh \$0x7b,-0x100\(%edx\),%k5\{%k7\}
 [ 	]*[a-f0-9]+:	62 f1 d7 2f 58 f4    	vaddsd %xmm4,%xmm5,%xmm6\{%k7\}
 [ 	]*[a-f0-9]+:	62 f1 d7 af 58 f4    	vaddsd %xmm4,%xmm5,%xmm6\{%k7\}\{z\}
 [ 	]*[a-f0-9]+:	62 f1 d7 1f 58 f4    	vaddsd \{rn-sae\},%xmm4,%xmm5,%xmm6\{%k7\}
@@ -3075,4 +3080,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 f3 56 2f c2 ac f4 c0 1d fe ff 7b 	vcmpsh \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%k5\{%k7\}
 [ 	]*[a-f0-9]+:	62 f3 56 28 c2 69 7f 7b 	vcmpsh \$0x7b,0xfe\(%ecx\),%xmm5,%k5
 [ 	]*[a-f0-9]+:	62 f3 56 2f c2 6a 80 7b 	vcmpsh \$0x7b,-0x100\(%edx\),%xmm5,%k5\{%k7\}
+[ 	]*[a-f0-9]+:	62 f3 7c 28 67 ec 7b 	vfpclasssh \$0x7b,%xmm4,%k5
+[ 	]*[a-f0-9]+:	62 f3 7c 28 67 29 7b 	vfpclasssh \$0x7b,\(%ecx\),%k5
+[ 	]*[a-f0-9]+:	62 f3 7c 2f 67 ac f4 c0 1d fe ff 7b 	vfpclasssh \$0x7b,-0x1e240\(%esp,%esi,8\),%k5\{%k7\}
+[ 	]*[a-f0-9]+:	62 f3 7c 28 67 69 7f 7b 	vfpclasssh \$0x7b,0xfe\(%ecx\),%k5
+[ 	]*[a-f0-9]+:	62 f3 7c 2f 67 6a 80 7b 	vfpclasssh \$0x7b,-0x100\(%edx\),%k5\{%k7\}
 #pass
diff --git a/gas/testsuite/gas/i386/evex-lig512-intel.d b/gas/testsuite/gas/i386/evex-lig512-intel.d
index 83e5002..cb44c2d 100644
--- a/gas/testsuite/gas/i386/evex-lig512-intel.d
+++ b/gas/testsuite/gas/i386/evex-lig512-intel.d
@@ -1542,6 +1542,11 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 f3 56 4f c2 ac f4 c0 1d fe ff 7b 	vcmpsh k5\{k7\},xmm5,WORD PTR \[esp\+esi\*8-0x1e240\],0x7b
 [ 	]*[a-f0-9]+:	62 f3 56 48 c2 69 7f 7b 	vcmpsh k5,xmm5,WORD PTR \[ecx\+0xfe\],0x7b
 [ 	]*[a-f0-9]+:	62 f3 56 4f c2 6a 80 7b 	vcmpsh k5\{k7\},xmm5,WORD PTR \[edx-0x100\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 48 67 ec 7b 	vfpclasssh k5,xmm4,0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 48 67 29 7b 	vfpclasssh k5,WORD PTR \[ecx\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 4f 67 ac f4 c0 1d fe ff 7b 	vfpclasssh k5\{k7\},WORD PTR \[esp\+esi\*8-0x1e240\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 48 67 69 7f 7b 	vfpclasssh k5,WORD PTR \[ecx\+0xfe\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 4f 67 6a 80 7b 	vfpclasssh k5\{k7\},WORD PTR \[edx-0x100\],0x7b
 [ 	]*[a-f0-9]+:	62 f1 d7 4f 58 f4    	vaddsd xmm6\{k7\},xmm5,xmm4
 [ 	]*[a-f0-9]+:	62 f1 d7 cf 58 f4    	vaddsd xmm6\{k7\}\{z\},xmm5,xmm4
 [ 	]*[a-f0-9]+:	62 f1 d7 1f 58 f4    	vaddsd xmm6\{k7\},xmm5,xmm4,\{rn-sae\}
@@ -3075,4 +3080,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 f3 56 4f c2 ac f4 c0 1d fe ff 7b 	vcmpsh k5\{k7\},xmm5,WORD PTR \[esp\+esi\*8-0x1e240\],0x7b
 [ 	]*[a-f0-9]+:	62 f3 56 48 c2 69 7f 7b 	vcmpsh k5,xmm5,WORD PTR \[ecx\+0xfe\],0x7b
 [ 	]*[a-f0-9]+:	62 f3 56 4f c2 6a 80 7b 	vcmpsh k5\{k7\},xmm5,WORD PTR \[edx-0x100\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 48 67 ec 7b 	vfpclasssh k5,xmm4,0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 48 67 29 7b 	vfpclasssh k5,WORD PTR \[ecx\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 4f 67 ac f4 c0 1d fe ff 7b 	vfpclasssh k5\{k7\},WORD PTR \[esp\+esi\*8-0x1e240\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 48 67 69 7f 7b 	vfpclasssh k5,WORD PTR \[ecx\+0xfe\],0x7b
+[ 	]*[a-f0-9]+:	62 f3 7c 4f 67 6a 80 7b 	vfpclasssh k5\{k7\},WORD PTR \[edx-0x100\],0x7b
 #pass
diff --git a/gas/testsuite/gas/i386/evex-lig512.d b/gas/testsuite/gas/i386/evex-lig512.d
index c88bdbb..bea8f28 100644
--- a/gas/testsuite/gas/i386/evex-lig512.d
+++ b/gas/testsuite/gas/i386/evex-lig512.d
@@ -1542,6 +1542,11 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 f3 56 4f c2 ac f4 c0 1d fe ff 7b 	vcmpsh \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%k5\{%k7\}
 [ 	]*[a-f0-9]+:	62 f3 56 48 c2 69 7f 7b 	vcmpsh \$0x7b,0xfe\(%ecx\),%xmm5,%k5
 [ 	]*[a-f0-9]+:	62 f3 56 4f c2 6a 80 7b 	vcmpsh \$0x7b,-0x100\(%edx\),%xmm5,%k5\{%k7\}
+[ 	]*[a-f0-9]+:	62 f3 7c 48 67 ec 7b 	vfpclasssh \$0x7b,%xmm4,%k5
+[ 	]*[a-f0-9]+:	62 f3 7c 48 67 29 7b 	vfpclasssh \$0x7b,\(%ecx\),%k5
+[ 	]*[a-f0-9]+:	62 f3 7c 4f 67 ac f4 c0 1d fe ff 7b 	vfpclasssh \$0x7b,-0x1e240\(%esp,%esi,8\),%k5\{%k7\}
+[ 	]*[a-f0-9]+:	62 f3 7c 48 67 69 7f 7b 	vfpclasssh \$0x7b,0xfe\(%ecx\),%k5
+[ 	]*[a-f0-9]+:	62 f3 7c 4f 67 6a 80 7b 	vfpclasssh \$0x7b,-0x100\(%edx\),%k5\{%k7\}
 [ 	]*[a-f0-9]+:	62 f1 d7 4f 58 f4    	vaddsd %xmm4,%xmm5,%xmm6\{%k7\}
 [ 	]*[a-f0-9]+:	62 f1 d7 cf 58 f4    	vaddsd %xmm4,%xmm5,%xmm6\{%k7\}\{z\}
 [ 	]*[a-f0-9]+:	62 f1 d7 1f 58 f4    	vaddsd \{rn-sae\},%xmm4,%xmm5,%xmm6\{%k7\}
@@ -3075,4 +3080,9 @@ Disassembly of section .text:
 [ 	]*[a-f0-9]+:	62 f3 56 4f c2 ac f4 c0 1d fe ff 7b 	vcmpsh \$0x7b,-0x1e240\(%esp,%esi,8\),%xmm5,%k5\{%k7\}
 [ 	]*[a-f0-9]+:	62 f3 56 48 c2 69 7f 7b 	vcmpsh \$0x7b,0xfe\(%ecx\),%xmm5,%k5
 [ 	]*[a-f0-9]+:	62 f3 56 4f c2 6a 80 7b 	vcmpsh \$0x7b,-0x100\(%edx\),%xmm5,%k5\{%k7\}
+[ 	]*[a-f0-9]+:	62 f3 7c 48 67 ec 7b 	vfpclasssh \$0x7b,%xmm4,%k5
+[ 	]*[a-f0-9]+:	62 f3 7c 48 67 29 7b 	vfpclasssh \$0x7b,\(%ecx\),%k5
+[ 	]*[a-f0-9]+:	62 f3 7c 4f 67 ac f4 c0 1d fe ff 7b 	vfpclasssh \$0x7b,-0x1e240\(%esp,%esi,8\),%k5\{%k7\}
+[ 	]*[a-f0-9]+:	62 f3 7c 48 67 69 7f 7b 	vfpclasssh \$0x7b,0xfe\(%ecx\),%k5
+[ 	]*[a-f0-9]+:	62 f3 7c 4f 67 6a 80 7b 	vfpclasssh \$0x7b,-0x100\(%edx\),%k5\{%k7\}
 #pass
diff --git a/opcodes/i386-opc.tbl b/opcodes/i386-opc.tbl
index bbf58dc..c29af3b 100644
--- a/opcodes/i386-opc.tbl
+++ b/opcodes/i386-opc.tbl
@@ -3918,8 +3918,7 @@ vfpclassph, 0x66, None, CpuAVX512_FP16, Modrm|Masking=2|Space0F3A|VexW0|Broadcas
 vfpclassphz, 0x66, None, CpuAVX512_FP16, Modrm|EVex512|Masking=2|Space0F3A|VexW0|Disp8MemShift=6|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegZMM|Unspecified|BaseIndex, RegMask }
 vfpclassphx, 0x66, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex128|Masking=2|Space0F3A|VexW0|Disp8MemShift=4|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegXMM|Unspecified|BaseIndex, RegMask }
 vfpclassphy, 0x66, None, CpuAVX512_FP16|CpuAVX512VL, Modrm|EVex256|Masking=2|Space0F3A|VexW0|Disp8MemShift=5|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|ATTSyntax, { Imm8, RegYMM|Unspecified|BaseIndex, RegMask }
-
-vfpclasssh, 0x67, None, CpuAVX512_FP16, Modrm|EVex128|Masking=2|Space0F3A|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|Word|Unspecified|BaseIndex, RegMask }
+vfpclasssh, 0x67, None, CpuAVX512_FP16, Modrm|EVexLIG|Masking=2|Space0F3A|VexW0|Disp8MemShift=1|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|Word|Unspecified|BaseIndex, RegMask }
 
 vgetmantph, 0x26, None, CpuAVX512_FP16, Modrm|Masking=3|Space0F3A|VexW0|Broadcast|Disp8ShiftVL|CheckRegSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Imm8, RegXMM|RegYMM|RegZMM|Word|Unspecified|BaseIndex, RegXMM|RegYMM|RegZMM }
 vgetmantph, 0x26, None, CpuAVX512_FP16, Modrm|EVex512|Masking=3|Space0F3A|VexW0|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|SAE, { Imm8, Imm8, RegZMM, RegZMM }
diff --git a/opcodes/i386-tbl.h b/opcodes/i386-tbl.h
index cf6b1a8..f996add 100644
--- a/opcodes/i386-tbl.h
+++ b/opcodes/i386-tbl.h
@@ -69008,7 +69008,7 @@ const insn_template i386_optab[] =
   { "vfpclasssh", 0x67, None, 3,
     { 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0,
       0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 3, 0, 0, 0,
-      0, 2, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
+      0, 4, 2, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0 },
     { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
         0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,