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author | DJ Delorie <dj@redhat.com> | 2015-04-30 15:25:49 -0400 |
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committer | DJ Delorie <dj@redhat.com> | 2015-04-30 15:25:49 -0400 |
commit | 0952813b0b27abe7f53a8048c0218883412e54cd (patch) | |
tree | 5407096ab234c7abec96a530789cd5bdb7069077 /.cvsignore | |
parent | b49f93f6995a5d23c752db103902314d4e23f761 (diff) | |
download | gdb-0952813b0b27abe7f53a8048c0218883412e54cd.zip gdb-0952813b0b27abe7f53a8048c0218883412e54cd.tar.gz gdb-0952813b0b27abe7f53a8048c0218883412e54cd.tar.bz2 |
Make RL78 disassembler and simulator respect ISA for mul/div
[gas]
* config/rl78-defs.h (rl78_isa_g10): New.
(rl78_isa_g13): New.
(rl78_isa_g14): New.
* config/rl78-parse.y (ISA_G10): New.
(ISA_G13): New.
(ISA_G14): New.
(MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
* config/tc-rl78.c (rl78_isa_g10): New.
(rl78_isa_g13): New.
(rl78_isa_g14): New.
[gdb]
* rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to
rl78_decode_opcode
[include]
* dis-asm.h (print_insn_rl78_g10): New.
(print_insn_rl78_g13): New.
(print_insn_rl78_g14): New.
(rl78_get_disassembler): New.
* opcode/rl78.h (RL78_Dis_Isa): New.
(rl78_decode_opcode): Add ISA parameter.
[opcodes]
* disassemble.c (disassembler): Choose suitable disassembler based
on E_ABI.
* rl78-decode.opc (rl78_decode_opcode): Take ISA parameter. Use
it to decode mul/div insns.
* rl78-decode.c: Regenerate.
* rl78-dis.c (print_insn_rl78): Rename to...
(print_insn_rl78_common): ...this, take ISA parameter.
(print_insn_rl78): New.
(print_insn_rl78_g10): New.
(print_insn_rl78_g13): New.
(print_insn_rl78_g14): New.
(rl78_get_disassembler): New.
[sim]
* rl78/cpu.c (g14_multiply): New.
* rl78/cpu.h (g14_multiply): New.
* rl78/load.c (rl78_load): Decode ISA completely.
* rl78/main.c (main): Expand -M to include other ISAs.
* rl78/rl78.c (decode_opcode): Decode based on ISA.
* rl78/trace.c (rl78_disasm_fn): New.
(sim_disasm_init): Reset it.
(sim_disasm_one): Get correct disassembler for ISA.
Diffstat (limited to '.cvsignore')
0 files changed, 0 insertions, 0 deletions