path: root/gcc/doc/extend.texi

@c Copyright (C) 1988-2024 Free Software Foundation, Inc.

@c This is part of the GCC manual.
@c For copying conditions, see the file gcc.texi.

@node C Extensions
@chapter Extensions to the C Language Family
@cindex extensions, C language
@cindex C language extensions

@opindex pedantic
GNU C provides several language features not found in ISO standard C@.
(The @option{-pedantic} option directs GCC to print a warning message if
any of these features is used.)  To test for the availability of these
features in conditional compilation, check for a predefined macro
@code{__GNUC__}, which is always defined under GCC@.

These extensions are available in C and Objective-C@.  Most of them are
also available in C++.  @xref{C++ Extensions,,Extensions to the
C++ Language}, for extensions that apply @emph{only} to C++.

Some features that are in ISO C99 but not C90 or C++ are also, as
extensions, accepted by GCC in C90 mode and in C++.

@menu
* Statement Exprs::     Putting statements and declarations inside expressions.
* Local Labels::        Labels local to a block.
* Labels as Values::    Getting pointers to labels, and computed gotos.
* Nested Functions::    Nested function in GNU C.
* Nonlocal Gotos::      Nonlocal gotos.
* Constructing Calls::  Dispatching a call to another function.
* Typeof::              @code{typeof}: referring to the type of an expression.
* Conditionals::        Omitting the middle operand of a @samp{?:} expression.
* __int128::		128-bit integers---@code{__int128}.
* Long Long::           Double-word integers---@code{long long int}.
* Complex::             Data types for complex numbers.
* Floating Types::      Additional Floating Types.
* Half-Precision::      Half-Precision Floating Point.
* Decimal Float::       Decimal Floating Types.
* Hex Floats::          Hexadecimal floating-point constants.
* Fixed-Point::         Fixed-Point Types.
* Named Address Spaces::Named address spaces.
* Zero Length::         Zero-length arrays.
* Empty Structures::    Structures with no members.
* Flexible Array Members in Unions::  Unions with Flexible Array Members.
* Flexible Array Members alone in Structures::  Structures with only Flexible Array Members.
* Variable Length::     Arrays whose length is computed at run time.
* Variadic Macros::     Macros with a variable number of arguments.
* Escaped Newlines::    Slightly looser rules for escaped newlines.
* Subscripting::        Any array can be subscripted, even if not an lvalue.
* Pointer Arith::       Arithmetic on @code{void}-pointers and function pointers.
* Variadic Pointer Args::  Pointer arguments to variadic functions.
* Pointers to Arrays::  Pointers to arrays with qualifiers work as expected.
* Initializers::        Non-constant initializers.
* Compound Literals::   Compound literals give structures, unions
                        or arrays as values.
* Designated Inits::    Labeling elements of initializers.
* Case Ranges::         `case 1 ... 9' and such.
* Cast to Union::       Casting to union type from any member of the union.
* Mixed Labels and Declarations::  Mixing declarations, labels and code.
* Function Attributes:: Declaring that functions have no side effects,
                        or that they can never return.
* Variable Attributes:: Specifying attributes of variables.
* Type Attributes::     Specifying attributes of types.
* Label Attributes::    Specifying attributes on labels.
* Enumerator Attributes:: Specifying attributes on enumerators.
* Statement Attributes:: Specifying attributes on statements.
* Attribute Syntax::    Formal syntax for attributes.
* Function Prototypes:: Prototype declarations and old-style definitions.
* C++ Comments::        C++ comments are recognized.
* Dollar Signs::        Dollar sign is allowed in identifiers.
* Character Escapes::   @samp{\e} stands for the character @key{ESC}.
* Alignment::           Determining the alignment of a function, type or variable.
* Inline::              Defining inline functions (as fast as macros).
* Const and Volatile Functions :: GCC interprets these specially in C.
* Volatiles::           What constitutes an access to a volatile object.
* Using Assembly Language with C:: Instructions and extensions for interfacing C with assembler.
* Alternate Keywords::  @code{__const__}, @code{__asm__}, etc., for header files.
* Incomplete Enums::    @code{enum foo;}, with details to follow.
* Function Names::      Printable strings which are the name of the current
                        function.
* Return Address::      Getting the return or frame address of a function.
* Stack Scrubbing::     Stack scrubbing internal interfaces.
* Vector Extensions::   Using vector instructions through built-in functions.
* Offsetof::            Special syntax for implementing @code{offsetof}.
* __sync Builtins::     Legacy built-in functions for atomic memory access.
* __atomic Builtins::   Atomic built-in functions with memory model.
* Integer Overflow Builtins:: Built-in functions to perform arithmetics and
                        arithmetic overflow checking.
* x86 specific memory model extensions for transactional memory:: x86 memory models.
* Object Size Checking:: Built-in functions for limited buffer overflow
                        checking.
* Other Builtins::      Other built-in functions.
* Target Builtins::     Built-in functions specific to particular targets.
* Target Format Checks:: Format checks specific to particular targets.
* Pragmas::             Pragmas accepted by GCC.
* Unnamed Fields::      Unnamed struct/union fields within structs/unions.
* Thread-Local::        Per-thread variables.
* Binary constants::    Binary constants using the @samp{0b} prefix.
@end menu

@node Statement Exprs
@section Statements and Declarations in Expressions
@cindex statements inside expressions
@cindex declarations inside expressions
@cindex expressions containing statements
@cindex macros, statements in expressions

@c the above section title wrapped and causes an underfull hbox.. i
@c changed it from "within" to "in". --mew 4feb93
A compound statement enclosed in parentheses may appear as an expression
in GNU C@.  This allows you to use loops, switches, and local variables
within an expression.

Recall that a compound statement is a sequence of statements surrounded
by braces; in this construct, parentheses go around the braces.  For
example:

@smallexample
(@{ int y = foo (); int z;
   if (y > 0) z = y;
   else z = - y;
   z; @})
@end smallexample

@noindent
is a valid (though slightly more complex than necessary) expression
for the absolute value of @code{foo ()}.

The last thing in the compound statement should be an expression
followed by a semicolon; the value of this subexpression serves as the
value of the entire construct.  (If you use some other kind of statement
last within the braces, the construct has type @code{void}, and thus
effectively no value.)

This feature is especially useful in making macro definitions ``safe'' (so
that they evaluate each operand exactly once).  For example, the
``maximum'' function is commonly defined as a macro in standard C as
follows:

@smallexample
#define max(a,b) ((a) > (b) ? (a) : (b))
@end smallexample

@noindent
@cindex side effects, macro argument
But this definition computes either @var{a} or @var{b} twice, with bad
results if the operand has side effects.  In GNU C, if you know the
type of the operands (here taken as @code{int}), you can avoid this
problem by defining the macro as follows:

@smallexample
#define maxint(a,b) \
  (@{int _a = (a), _b = (b); _a > _b ? _a : _b; @})
@end smallexample

Note that introducing variable declarations (as we do in @code{maxint}) can
cause variable shadowing, so while this example using the @code{max} macro
produces correct results:
@smallexample
int _a = 1, _b = 2, c;
c = max (_a, _b);
@end smallexample
@noindent
this example using maxint will not:
@smallexample
int _a = 1, _b = 2, c;
c = maxint (_a, _b);
@end smallexample

This problem may for instance occur when we use this pattern recursively, like
so:

@smallexample
#define maxint3(a, b, c) \
  (@{int _a = (a), _b = (b), _c = (c); maxint (maxint (_a, _b), _c); @})
@end smallexample

Embedded statements are not allowed in constant expressions, such as
the value of an enumeration constant, the width of a bit-field, or
the initial value of a static variable.

If you don't know the type of the operand, you can still do this, but you
must use @code{typeof} or @code{__auto_type} (@pxref{Typeof}).

In G++, the result value of a statement expression undergoes array and
function pointer decay, and is returned by value to the enclosing
expression.  For instance, if @code{A} is a class, then

@smallexample
        A a;

        (@{a;@}).Foo ()
@end smallexample

@noindent
constructs a temporary @code{A} object to hold the result of the
statement expression, and that is used to invoke @code{Foo}.
Therefore the @code{this} pointer observed by @code{Foo} is not the
address of @code{a}.

In a statement expression, any temporaries created within a statement
are destroyed at that statement's end.  This makes statement
expressions inside macros slightly different from function calls.  In
the latter case temporaries introduced during argument evaluation are
destroyed at the end of the statement that includes the function
call.  In the statement expression case they are destroyed during
the statement expression.  For instance,

@smallexample
#define macro(a)  (@{__typeof__(a) b = (a); b + 3; @})
template<typename T> T function(T a) @{ T b = a; return b + 3; @}

void foo ()
@{
  macro (X ());
  function (X ());
@}
@end smallexample

@noindent
has different places where temporaries are destroyed.  For the
@code{macro} case, the temporary @code{X} is destroyed just after
the initialization of @code{b}.  In the @code{function} case that
temporary is destroyed when the function returns.

These considerations mean that it is probably a bad idea to use
statement expressions of this form in header files that are designed to
work with C++.  (Note that some versions of the GNU C Library contained
header files using statement expressions that lead to precisely this
bug.)

Jumping into a statement expression with @code{goto} or using a
@code{switch} statement outside the statement expression with a
@code{case} or @code{default} label inside the statement expression is
not permitted.  Jumping into a statement expression with a computed
@code{goto} (@pxref{Labels as Values}) has undefined behavior.
Jumping out of a statement expression is permitted, but if the
statement expression is part of a larger expression then it is
unspecified which other subexpressions of that expression have been
evaluated except where the language definition requires certain
subexpressions to be evaluated before or after the statement
expression.  A @code{break} or @code{continue} statement inside of
a statement expression used in @code{while}, @code{do} or @code{for}
loop or @code{switch} statement condition
or @code{for} statement init or increment expressions jumps to an
outer loop or @code{switch} statement if any (otherwise it is an error),
rather than to the loop or @code{switch} statement in whose condition
or init or increment expression it appears.
In any case, as with a function call, the evaluation of a
statement expression is not interleaved with the evaluation of other
parts of the containing expression.  For example,

@smallexample
  foo (), ((@{ bar1 (); goto a; 0; @}) + bar2 ()), baz();
@end smallexample

@noindent
calls @code{foo} and @code{bar1} and does not call @code{baz} but
may or may not call @code{bar2}.  If @code{bar2} is called, it is
called after @code{foo} and before @code{bar1}.

@node Local Labels
@section Locally Declared Labels
@cindex local labels
@cindex macros, local labels

GCC allows you to declare @dfn{local labels} in any nested block
scope.  A local label is just like an ordinary label, but you can
only reference it (with a @code{goto} statement, or by taking its
address) within the block in which it is declared.

A local label declaration looks like this:

@smallexample
__label__ @var{label};
@end smallexample

@noindent
or

@smallexample
__label__ @var{label1}, @var{label2}, /* @r{@dots{}} */;
@end smallexample

Local label declarations must come at the beginning of the block,
before any ordinary declarations or statements.

The label declaration defines the label @emph{name}, but does not define
the label itself.  You must do this in the usual way, with
@code{@var{label}:}, within the statements of the statement expression.

The local label feature is useful for complex macros.  If a macro
contains nested loops, a @code{goto} can be useful for breaking out of
them.  However, an ordinary label whose scope is the whole function
cannot be used: if the macro can be expanded several times in one
function, the label is multiply defined in that function.  A
local label avoids this problem.  For example:

@smallexample
#define SEARCH(value, array, target)              \
do @{                                              \
  __label__ found;                                \
  typeof (target) _SEARCH_target = (target);      \
  typeof (*(array)) *_SEARCH_array = (array);     \
  int i, j;                                       \
  int value;                                      \
  for (i = 0; i < max; i++)                       \
    for (j = 0; j < max; j++)                     \
      if (_SEARCH_array[i][j] == _SEARCH_target)  \
        @{ (value) = i; goto found; @}              \
  (value) = -1;                                   \
 found:;                                          \
@} while (0)
@end smallexample

This could also be written using a statement expression:

@smallexample
#define SEARCH(array, target)                     \
(@{                                                \
  __label__ found;                                \
  typeof (target) _SEARCH_target = (target);      \
  typeof (*(array)) *_SEARCH_array = (array);     \
  int i, j;                                       \
  int value;                                      \
  for (i = 0; i < max; i++)                       \
    for (j = 0; j < max; j++)                     \
      if (_SEARCH_array[i][j] == _SEARCH_target)  \
        @{ value = i; goto found; @}                \
  value = -1;                                     \
 found:                                           \
  value;                                          \
@})
@end smallexample

Local label declarations also make the labels they declare visible to
nested functions, if there are any.  @xref{Nested Functions}, for details.

@node Labels as Values
@section Labels as Values
@cindex labels as values
@cindex computed gotos
@cindex goto with computed label
@cindex address of a label

You can get the address of a label defined in the current function
(or a containing function) with the unary operator @samp{&&}.  The
value has type @code{void *}.  This value is a constant and can be used
wherever a constant of that type is valid.  For example:

@smallexample
void *ptr;
/* @r{@dots{}} */
ptr = &&foo;
@end smallexample

To use these values, you need to be able to jump to one.  This is done
with the computed goto statement@footnote{The analogous feature in
Fortran is called an assigned goto, but that name seems inappropriate in
C, where one can do more than simply store label addresses in label
variables.}, @code{goto *@var{exp};}.  For example,

@smallexample
goto *ptr;
@end smallexample

@noindent
Any expression of type @code{void *} is allowed.

One way of using these constants is in initializing a static array that
serves as a jump table:

@smallexample
static void *array[] = @{ &&foo, &&bar, &&hack @};
@end smallexample

@noindent
Then you can select a label with indexing, like this:

@smallexample
goto *array[i];
@end smallexample

@noindent
Note that this does not check whether the subscript is in bounds---array
indexing in C never does that.

Such an array of label values serves a purpose much like that of the
@code{switch} statement.  The @code{switch} statement is cleaner, so
use that rather than an array unless the problem does not fit a
@code{switch} statement very well.

Another use of label values is in an interpreter for threaded code.
The labels within the interpreter function can be stored in the
threaded code for super-fast dispatching.

You may not use this mechanism to jump to code in a different function.
If you do that, totally unpredictable things happen.  The best way to
avoid this is to store the label address only in automatic variables and
never pass it as an argument.

An alternate way to write the above example is

@smallexample
static const int array[] = @{ &&foo - &&foo, &&bar - &&foo,
                             &&hack - &&foo @};
goto *(&&foo + array[i]);
@end smallexample

@noindent
This is more friendly to code living in shared libraries, as it reduces
the number of dynamic relocations that are needed, and by consequence,
allows the data to be read-only.
This alternative with label differences is not supported for the AVR target,
please use the first approach for AVR programs.

The @code{&&foo} expressions for the same label might have different
values if the containing function is inlined or cloned.  If a program
relies on them being always the same,
@code{__attribute__((__noinline__,__noclone__))} should be used to
prevent inlining and cloning.  If @code{&&foo} is used in a static
variable initializer, inlining and cloning is forbidden.

Unlike a normal goto, in GNU C++ a computed goto will not call
destructors for objects that go out of scope.

@node Nested Functions
@section Nested Functions
@cindex nested functions
@cindex downward funargs
@cindex thunks

A @dfn{nested function} is a function defined inside another function.
Nested functions are supported as an extension in GNU C, but are not
supported by GNU C++.

The nested function's name is local to the block where it is defined.
For example, here we define a nested function named @code{square}, and
call it twice:

@smallexample
@group
foo (double a, double b)
@{
  double square (double z) @{ return z * z; @}

  return square (a) + square (b);
@}
@end group
@end smallexample

The nested function can access all the variables of the containing
function that are visible at the point of its definition.  This is
called @dfn{lexical scoping}.  For example, here we show a nested
function which uses an inherited variable named @code{offset}:

@smallexample
@group
bar (int *array, int offset, int size)
@{
  int access (int *array, int index)
    @{ return array[index + offset]; @}
  int i;
  /* @r{@dots{}} */
  for (i = 0; i < size; i++)
    /* @r{@dots{}} */ access (array, i) /* @r{@dots{}} */
@}
@end group
@end smallexample

Nested function definitions are permitted within functions in the places
where variable definitions are allowed; that is, in any block, mixed
with the other declarations and statements in the block.

It is possible to call the nested function from outside the scope of its
name by storing its address or passing the address to another function:

@smallexample
hack (int *array, int size)
@{
  void store (int index, int value)
    @{ array[index] = value; @}

  intermediate (store, size);
@}
@end smallexample

Here, the function @code{intermediate} receives the address of
@code{store} as an argument.  If @code{intermediate} calls @code{store},
the arguments given to @code{store} are used to store into @code{array}.
But this technique works only so long as the containing function
(@code{hack}, in this example) does not exit.

If you try to call the nested function through its address after the
containing function exits, all hell breaks loose.  If you try
to call it after a containing scope level exits, and if it refers
to some of the variables that are no longer in scope, you may be lucky,
but it's not wise to take the risk.  If, however, the nested function
does not refer to anything that has gone out of scope, you should be
safe.

GCC implements taking the address of a nested function using a technique
called @dfn{trampolines}.  This technique was described in
@cite{Lexical Closures for C++} (Thomas M. Breuel, USENIX
C++ Conference Proceedings, October 17-21, 1988).

A nested function can jump to a label inherited from a containing
function, provided the label is explicitly declared in the containing
function (@pxref{Local Labels}).  Such a jump returns instantly to the
containing function, exiting the nested function that did the
@code{goto} and any intermediate functions as well.  Here is an example:

@smallexample
@group
bar (int *array, int offset, int size)
@{
  __label__ failure;
  int access (int *array, int index)
    @{
      if (index > size)
        goto failure;
      return array[index + offset];
    @}
  int i;
  /* @r{@dots{}} */
  for (i = 0; i < size; i++)
    /* @r{@dots{}} */ access (array, i) /* @r{@dots{}} */
  /* @r{@dots{}} */
  return 0;

 /* @r{Control comes here from @code{access}
    if it detects an error.}  */
 failure:
  return -1;
@}
@end group
@end smallexample

A nested function always has no linkage.  Declaring one with
@code{extern} or @code{static} is erroneous.  If you need to declare the nested function
before its definition, use @code{auto} (which is otherwise meaningless
for function declarations).

@smallexample
bar (int *array, int offset, int size)
@{
  __label__ failure;
  auto int access (int *, int);
  /* @r{@dots{}} */
  int access (int *array, int index)
    @{
      if (index > size)
        goto failure;
      return array[index + offset];
    @}
  /* @r{@dots{}} */
@}
@end smallexample

@node Nonlocal Gotos
@section Nonlocal Gotos
@cindex nonlocal gotos

GCC provides the built-in functions @code{__builtin_setjmp} and
@code{__builtin_longjmp} which are similar to, but not interchangeable
with, the C library functions @code{setjmp} and @code{longjmp}.  
The built-in versions are used internally by GCC's libraries
to implement exception handling on some targets.  You should use the 
standard C library functions declared in @code{<setjmp.h>} in user code
instead of the builtins.

The built-in versions of these functions use GCC's normal
mechanisms to save and restore registers using the stack on function
entry and exit.  The jump buffer argument @var{buf} holds only the
information needed to restore the stack frame, rather than the entire 
set of saved register values.  

An important caveat is that GCC arranges to save and restore only
those registers known to the specific architecture variant being
compiled for.  This can make @code{__builtin_setjmp} and
@code{__builtin_longjmp} more efficient than their library
counterparts in some cases, but it can also cause incorrect and
mysterious behavior when mixing with code that uses the full register
set.

You should declare the jump buffer argument @var{buf} to the
built-in functions as:

@smallexample
#include <stdint.h>
intptr_t @var{buf}[5];
@end smallexample

@defbuiltin{{int} __builtin_setjmp (intptr_t *@var{buf})}
This function saves the current stack context in @var{buf}.  
@code{__builtin_setjmp} returns 0 when returning directly,
and 1 when returning from @code{__builtin_longjmp} using the same
@var{buf}.
@enddefbuiltin

@defbuiltin{{void} __builtin_longjmp (intptr_t *@var{buf}, int @var{val})}
This function restores the stack context in @var{buf}, 
saved by a previous call to @code{__builtin_setjmp}.  After
@code{__builtin_longjmp} is finished, the program resumes execution as
if the matching @code{__builtin_setjmp} returns the value @var{val},
which must be 1.

Because @code{__builtin_longjmp} depends on the function return
mechanism to restore the stack context, it cannot be called
from the same function calling @code{__builtin_setjmp} to
initialize @var{buf}.  It can only be called from a function called
(directly or indirectly) from the function calling @code{__builtin_setjmp}.
@enddefbuiltin

@node Constructing Calls
@section Constructing Function Calls
@cindex constructing calls
@cindex forwarding calls

Using the built-in functions described below, you can record
the arguments a function received, and call another function
with the same arguments, without knowing the number or types
of the arguments.

You can also record the return value of that function call,
and later return that value, without knowing what data type
the function tried to return (as long as your caller expects
that data type).

However, these built-in functions may interact badly with some
sophisticated features or other extensions of the language.  It
is, therefore, not recommended to use them outside very simple
functions acting as mere forwarders for their arguments.

@defbuiltin{{void *} __builtin_apply_args ()}
This built-in function returns a pointer to data
describing how to perform a call with the same arguments as are passed
to the current function.

The function saves the arg pointer register, structure value address,
and all registers that might be used to pass arguments to a function
into a block of memory allocated on the stack.  Then it returns the
address of that block.
@enddefbuiltin

@defbuiltin{{void *} __builtin_apply (void (*@var{function})(), void *@var{arguments}, size_t @var{size})}
This built-in function invokes @var{function}
with a copy of the parameters described by @var{arguments}
and @var{size}.

The value of @var{arguments} should be the value returned by
@code{__builtin_apply_args}.  The argument @var{size} specifies the size
of the stack argument data, in bytes.

This function returns a pointer to data describing
how to return whatever value is returned by @var{function}.  The data
is saved in a block of memory allocated on the stack.

It is not always simple to compute the proper value for @var{size}.  The
value is used by @code{__builtin_apply} to compute the amount of data
that should be pushed on the stack and copied from the incoming argument
area.
@enddefbuiltin

@defbuiltin{{void} __builtin_return (void *@var{result})}
This built-in function returns the value described by @var{result} from
the containing function.  You should specify, for @var{result}, a value
returned by @code{__builtin_apply}.
@enddefbuiltin

@defbuiltin{{} __builtin_va_arg_pack ()}
This built-in function represents all anonymous arguments of an inline
function.  It can be used only in inline functions that are always
inlined, never compiled as a separate function, such as those using
@code{__attribute__ ((__always_inline__))} or
@code{__attribute__ ((__gnu_inline__))} extern inline functions.
It must be only passed as last argument to some other function
with variable arguments.  This is useful for writing small wrapper
inlines for variable argument functions, when using preprocessor
macros is undesirable.  For example:
@smallexample
extern int myprintf (FILE *f, const char *format, ...);
extern inline __attribute__ ((__gnu_inline__)) int
myprintf (FILE *f, const char *format, ...)
@{
  int r = fprintf (f, "myprintf: ");
  if (r < 0)
    return r;
  int s = fprintf (f, format, __builtin_va_arg_pack ());
  if (s < 0)
    return s;
  return r + s;
@}
@end smallexample
@enddefbuiltin

@defbuiltin{int __builtin_va_arg_pack_len ()}
This built-in function returns the number of anonymous arguments of
an inline function.  It can be used only in inline functions that
are always inlined, never compiled as a separate function, such
as those using @code{__attribute__ ((__always_inline__))} or
@code{__attribute__ ((__gnu_inline__))} extern inline functions.
For example following does link- or run-time checking of open
arguments for optimized code:
@smallexample
#ifdef __OPTIMIZE__
extern inline __attribute__((__gnu_inline__)) int
myopen (const char *path, int oflag, ...)
@{
  if (__builtin_va_arg_pack_len () > 1)
    warn_open_too_many_arguments ();

  if (__builtin_constant_p (oflag))
    @{
      if ((oflag & O_CREAT) != 0 && __builtin_va_arg_pack_len () < 1)
        @{
          warn_open_missing_mode ();
          return __open_2 (path, oflag);
        @}
      return open (path, oflag, __builtin_va_arg_pack ());
    @}

  if (__builtin_va_arg_pack_len () < 1)
    return __open_2 (path, oflag);

  return open (path, oflag, __builtin_va_arg_pack ());
@}
#endif
@end smallexample
@enddefbuiltin

@node Typeof
@section Referring to a Type with @code{typeof}
@findex typeof
@findex sizeof
@cindex macros, types of arguments

Another way to refer to the type of an expression is with @code{typeof}.
The syntax of using of this keyword looks like @code{sizeof}, but the
construct acts semantically like a type name defined with @code{typedef}.

There are two ways of writing the argument to @code{typeof}: with an
expression or with a type.  Here is an example with an expression:

@smallexample
typeof (x[0](1))
@end smallexample

@noindent
This assumes that @code{x} is an array of pointers to functions;
the type described is that of the values of the functions.

Here is an example with a typename as the argument:

@smallexample
typeof (int *)
@end smallexample

@noindent
Here the type described is that of pointers to @code{int}.

If you are writing a header file that must work when included in ISO C
programs, write @code{__typeof__} instead of @code{typeof}.
@xref{Alternate Keywords}.

A @code{typeof} construct can be used anywhere a typedef name can be
used.  For example, you can use it in a declaration, in a cast, or inside
of @code{sizeof} or @code{typeof}.

The operand of @code{typeof} is evaluated for its side effects if and
only if it is an expression of variably modified type or the name of
such a type.

@code{typeof} is often useful in conjunction with
statement expressions (@pxref{Statement Exprs}).
Here is how the two together can
be used to define a safe ``maximum'' macro which operates on any
arithmetic type and evaluates each of its arguments exactly once:

@smallexample
#define max(a,b) \
  (@{ typeof (a) _a = (a); \
      typeof (b) _b = (b); \
    _a > _b ? _a : _b; @})
@end smallexample

@cindex underscores in variables in macros
@cindex @samp{_} in variables in macros
@cindex local variables in macros
@cindex variables, local, in macros
@cindex macros, local variables in

The reason for using names that start with underscores for the local
variables is to avoid conflicts with variable names that occur within the
expressions that are substituted for @code{a} and @code{b}.  Eventually we
hope to design a new form of declaration syntax that allows you to declare
variables whose scopes start only after their initializers; this will be a
more reliable way to prevent such conflicts.

@noindent
Some more examples of the use of @code{typeof}:

@itemize @bullet
@item
This declares @code{y} with the type of what @code{x} points to.

@smallexample
typeof (*x) y;
@end smallexample

@item
This declares @code{y} as an array of such values.

@smallexample
typeof (*x) y[4];
@end smallexample

@item
This declares @code{y} as an array of pointers to characters:

@smallexample
typeof (typeof (char *)[4]) y;
@end smallexample

@noindent
It is equivalent to the following traditional C declaration:

@smallexample
char *y[4];
@end smallexample

To see the meaning of the declaration using @code{typeof}, and why it
might be a useful way to write, rewrite it with these macros:

@smallexample
#define pointer(T)  typeof(T *)
#define array(T, N) typeof(T [N])
@end smallexample

@noindent
Now the declaration can be rewritten this way:

@smallexample
array (pointer (char), 4) y;
@end smallexample

@noindent
Thus, @code{array (pointer (char), 4)} is the type of arrays of 4
pointers to @code{char}.
@end itemize

The ISO C23 operator @code{typeof_unqual} is available in ISO C23 mode
and its result is the non-atomic unqualified version of what @code{typeof}
operator returns.  Alternate spelling @code{__typeof_unqual__} is
available in all C modes and provides non-atomic unqualified version of
what @code{__typeof__} operator returns.
@xref{Alternate Keywords}.

@cindex @code{__auto_type} in GNU C
In GNU C, but not GNU C++, you may also declare the type of a variable
as @code{__auto_type}.  In that case, the declaration must declare
only one variable, whose declarator must just be an identifier, the
declaration must be initialized, and the type of the variable is
determined by the initializer; the name of the variable is not in
scope until after the initializer.  (In C++, you should use C++11
@code{auto} for this purpose.)  Using @code{__auto_type}, the
``maximum'' macro above could be written as:

@smallexample
#define max(a,b) \
  (@{ __auto_type _a = (a); \
      __auto_type _b = (b); \
    _a > _b ? _a : _b; @})
@end smallexample

Using @code{__auto_type} instead of @code{typeof} has two advantages:

@itemize @bullet
@item Each argument to the macro appears only once in the expansion of
the macro.  This prevents the size of the macro expansion growing
exponentially when calls to such macros are nested inside arguments of
such macros.

@item If the argument to the macro has variably modified type, it is
evaluated only once when using @code{__auto_type}, but twice if
@code{typeof} is used.
@end itemize

@node Conditionals
@section Conditionals with Omitted Operands
@cindex conditional expressions, extensions
@cindex omitted middle-operands
@cindex middle-operands, omitted
@cindex extensions, @code{?:}
@cindex @code{?:} extensions

The middle operand in a conditional expression may be omitted.  Then
if the first operand is nonzero, its value is the value of the conditional
expression.

Therefore, the expression

@smallexample
x ? : y
@end smallexample

@noindent
has the value of @code{x} if that is nonzero; otherwise, the value of
@code{y}.

This example is perfectly equivalent to

@smallexample
x ? x : y
@end smallexample

@cindex side effect in @code{?:}
@cindex @code{?:} side effect
@noindent
In this simple case, the ability to omit the middle operand is not
especially useful.  When it becomes useful is when the first operand does,
or may (if it is a macro argument), contain a side effect.  Then repeating
the operand in the middle would perform the side effect twice.  Omitting
the middle operand uses the value already computed without the undesirable
effects of recomputing it.

@node __int128
@section 128-bit Integers
@cindex @code{__int128} data types

As an extension the integer scalar type @code{__int128} is supported for
targets which have an integer mode wide enough to hold 128 bits.
Simply write @code{__int128} for a signed 128-bit integer, or
@code{unsigned __int128} for an unsigned 128-bit integer.  There is no
support in GCC for expressing an integer constant of type @code{__int128}
for targets with @code{long long} integer less than 128 bits wide.

@node Long Long
@section Double-Word Integers
@cindex @code{long long} data types
@cindex double-word arithmetic
@cindex multiprecision arithmetic
@cindex @code{LL} integer suffix
@cindex @code{ULL} integer suffix

ISO C99 and ISO C++11 support data types for integers that are at least
64 bits wide, and as an extension GCC supports them in C90 and C++98 modes.
Simply write @code{long long int} for a signed integer, or
@code{unsigned long long int} for an unsigned integer.  To make an
integer constant of type @code{long long int}, add the suffix @samp{LL}
to the integer.  To make an integer constant of type @code{unsigned long
long int}, add the suffix @samp{ULL} to the integer.

You can use these types in arithmetic like any other integer types.
Addition, subtraction, and bitwise boolean operations on these types
are open-coded on all types of machines.  Multiplication is open-coded
if the machine supports a fullword-to-doubleword widening multiply
instruction.  Division and shifts are open-coded only on machines that
provide special support.  The operations that are not open-coded use
special library routines that come with GCC@.

There may be pitfalls when you use @code{long long} types for function
arguments without function prototypes.  If a function
expects type @code{int} for its argument, and you pass a value of type
@code{long long int}, confusion results because the caller and the
subroutine disagree about the number of bytes for the argument.
Likewise, if the function expects @code{long long int} and you pass
@code{int}.  The best way to avoid such problems is to use prototypes.

@node Complex
@section Complex Numbers
@cindex complex numbers
@cindex @code{_Complex} keyword
@cindex @code{__complex__} keyword

ISO C99 supports complex floating data types, and as an extension GCC
supports them in C90 mode and in C++.  GCC also supports complex integer data
types which are not part of ISO C99.  You can declare complex types
using the keyword @code{_Complex}.  As an extension, the older GNU
keyword @code{__complex__} is also supported.

For example, @samp{_Complex double x;} declares @code{x} as a
variable whose real part and imaginary part are both of type
@code{double}.  @samp{_Complex short int y;} declares @code{y} to
have real and imaginary parts of type @code{short int}; this is not
likely to be useful, but it shows that the set of complex types is
complete.

To write a constant with a complex data type, use the suffix @samp{i} or
@samp{j} (either one; they are equivalent).  For example, @code{2.5fi}
has type @code{_Complex float} and @code{3i} has type
@code{_Complex int}.  Such a constant always has a pure imaginary
value, but you can form any complex value you like by adding one to a
real constant.  This is a GNU extension; if you have an ISO C99
conforming C library (such as the GNU C Library), and want to construct complex
constants of floating type, you should include @code{<complex.h>} and
use the macros @code{I} or @code{_Complex_I} instead.

The ISO C++14 library also defines the @samp{i} suffix, so C++14 code
that includes the @samp{<complex>} header cannot use @samp{i} for the
GNU extension.  The @samp{j} suffix still has the GNU meaning.

GCC can handle both implicit and explicit casts between the @code{_Complex}
types and other @code{_Complex} types as casting both the real and imaginary
parts to the scalar type.
GCC can handle implicit and explicit casts from a scalar type to a @code{_Complex}
type and where the imaginary part will be considered zero.
The C front-end can handle implicit and explicit casts from a @code{_Complex} type
to a scalar type where the imaginary part will be ignored. In C++ code, this cast
is considered illformed and G++ will error out.

GCC provides a built-in function @code{__builtin_complex} will can be used to
construct a complex value.

@cindex @code{__real__} keyword
@cindex @code{__imag__} keyword

GCC has a few extensions which can be used to extract the real
and the imaginary part of the complex-valued expression. Note
these expressions are lvalues if the @var{exp} is an lvalue.
These expressions operands have the type of a complex type
which might get prompoted to a complex type from a scalar type.
E.g. @code{__real__ (int)@var{x}} is the same as casting to
@code{_Complex int} before @code{__real__} is done.

@multitable @columnfractions .4 .6
@headitem Expression @tab Description
@item @code{__real__ @var{exp}}
@tab Extract the real part of @var{exp}.
@item @code{__imag__ @var{exp}}
@tab Extract the imaginary part of @var{exp}.
@end multitable

For values of floating point, you should use the ISO C99
functions, declared in @code{<complex.h>} and also provided as
built-in functions by GCC@.

@multitable @columnfractions .4 .2 .2 .2
@headitem Expression @tab float @tab double @tab long double
@item @code{__real__ @var{exp}}
@tab @code{crealf} @tab @code{creal} @tab @code{creall}
@item @code{__imag__ @var{exp}}
@tab @code{cimagf} @tab @code{cimag} @tab @code{cimagl}
@end multitable

@cindex complex conjugation
The operator @samp{~} performs complex conjugation when used on a value
with a complex type.  This is a GNU extension; for values of
floating type, you should use the ISO C99 functions @code{conjf},
@code{conj} and @code{conjl}, declared in @code{<complex.h>} and also
provided as built-in functions by GCC@. Note unlike the @code{__real__}
and @code{__imag__} operators, this operator will not do an implicit cast
to the complex type because the @samp{~} is already a normal operator.

GCC can allocate complex automatic variables in a noncontiguous
fashion; it's even possible for the real part to be in a register while
the imaginary part is on the stack (or vice versa).  Only the DWARF
debug info format can represent this, so use of DWARF is recommended.
If you are using the stabs debug info format, GCC describes a noncontiguous
complex variable as if it were two separate variables of noncomplex type.
If the variable's actual name is @code{foo}, the two fictitious
variables are named @code{foo$real} and @code{foo$imag}.  You can
examine and set these two fictitious variables with your debugger.

@defbuiltin{@var{type} __builtin_complex (@var{real}, @var{imag})}

The built-in function @code{__builtin_complex} is provided for use in
implementing the ISO C11 macros @code{CMPLXF}, @code{CMPLX} and
@code{CMPLXL}.  @var{real} and @var{imag} must have the same type, a
real binary floating-point type, and the result has the corresponding
complex type with real and imaginary parts @var{real} and @var{imag}.
Unlike @samp{@var{real} + I * @var{imag}}, this works even when
infinities, NaNs and negative zeros are involved.

@enddefbuiltin

@node Floating Types
@section Additional Floating Types
@cindex additional floating types
@cindex @code{_Float@var{n}} data types
@cindex @code{_Float@var{n}x} data types
@cindex @code{__float80} data type
@cindex @code{__float128} data type
@cindex @code{__ibm128} data type
@cindex @code{w} floating point suffix
@cindex @code{q} floating point suffix
@cindex @code{W} floating point suffix
@cindex @code{Q} floating point suffix

ISO/IEC TS 18661-3:2015 defines C support for additional floating
types @code{_Float@var{n}} and @code{_Float@var{n}x}, and GCC supports
these type names; the set of types supported depends on the target
architecture.
Constants with these types use suffixes @code{f@var{n}} or
@code{F@var{n}} and @code{f@var{n}x} or @code{F@var{n}x}.  These type
names can be used together with @code{_Complex} to declare complex
types.

As an extension, GNU C and GNU C++ support additional floating
types, which are not supported by all targets.
@itemize @bullet
@item @code{__float128} is available on i386, x86_64, IA-64, LoongArch
and hppa HP-UX, as well as on PowerPC GNU/Linux targets that enable
the vector scalar (VSX) instruction set.  @code{__float128} supports
the 128-bit floating type.  On i386, x86_64, PowerPC, LoongArch and IA-64,
other than HP-UX, @code{__float128} is an alias for @code{_Float128}.
On hppa and IA-64 HP-UX, @code{__float128} is an alias for @code{long
double}.

@item @code{__float80} is available on the i386, x86_64, and IA-64
targets, and supports the 80-bit (@code{XFmode}) floating type.  It is
an alias for the type name @code{_Float64x} on these targets.

@item @code{__ibm128} is available on PowerPC targets, and provides
access to the IBM extended double format which is the current format
used for @code{long double}.  When @code{long double} transitions to
@code{__float128} on PowerPC in the future, @code{__ibm128} will remain
for use in conversions between the two types.
@end itemize

Support for these additional types includes the arithmetic operators:
add, subtract, multiply, divide; unary arithmetic operators;
relational operators; equality operators; and conversions to and from
integer and other floating types.  Use a suffix @samp{w} or @samp{W}
in a literal constant of type @code{__float80} or type
@code{__ibm128}.  Use a suffix @samp{q} or @samp{Q} for @code{__float128}.

In order to use @code{_Float128}, @code{__float128}, and @code{__ibm128}
on PowerPC Linux systems, you must use the @option{-mfloat128} option. It is
expected in future versions of GCC that @code{_Float128} and @code{__float128}
will be enabled automatically.

The @code{_Float128} type is supported on all systems where
@code{__float128} is supported or where @code{long double} has the
IEEE binary128 format.  The @code{_Float64x} type is supported on all
systems where @code{__float128} is supported.  The @code{_Float32}
type is supported on all systems supporting IEEE binary32; the
@code{_Float64} and @code{_Float32x} types are supported on all systems
supporting IEEE binary64.  The @code{_Float16} type is supported on AArch64
systems by default, on ARM systems when the IEEE format for 16-bit
floating-point types is selected with @option{-mfp16-format=ieee} and,
for both C and C++, on x86 systems with SSE2 enabled. GCC does not currently
support @code{_Float128x} on any systems.

On the i386, x86_64, IA-64, and HP-UX targets, you can declare complex
types using the corresponding internal complex type, @code{XCmode} for
@code{__float80} type and @code{TCmode} for @code{__float128} type:

@smallexample
typedef _Complex float __attribute__((mode(TC))) _Complex128;
typedef _Complex float __attribute__((mode(XC))) _Complex80;
@end smallexample

On the PowerPC Linux VSX targets, you can declare complex types using
the corresponding internal complex type, @code{KCmode} for
@code{__float128} type and @code{ICmode} for @code{__ibm128} type:

@smallexample
typedef _Complex float __attribute__((mode(KC))) _Complex_float128;
typedef _Complex float __attribute__((mode(IC))) _Complex_ibm128;
@end smallexample

@node Half-Precision
@section Half-Precision Floating Point
@cindex half-precision floating point
@cindex @code{__fp16} data type
@cindex @code{__Float16} data type

On ARM and AArch64 targets, GCC supports half-precision (16-bit) floating
point via the @code{__fp16} type defined in the ARM C Language Extensions.
On ARM systems, you must enable this type explicitly with the
@option{-mfp16-format} command-line option in order to use it.
On x86 targets with SSE2 enabled, GCC supports half-precision (16-bit)
floating point via the @code{_Float16} type. For C++, x86 provides a builtin
type named @code{_Float16} which contains same data format as C.

ARM targets support two incompatible representations for half-precision
floating-point values.  You must choose one of the representations and
use it consistently in your program.

Specifying @option{-mfp16-format=ieee} selects the IEEE 754-2008 format.
This format can represent normalized values in the range of @math{2^{-14}} to 65504.
There are 11 bits of significand precision, approximately 3
decimal digits.

Specifying @option{-mfp16-format=alternative} selects the ARM
alternative format.  This representation is similar to the IEEE
format, but does not support infinities or NaNs.  Instead, the range
of exponents is extended, so that this format can represent normalized
values in the range of @math{2^{-14}} to 131008.

The GCC port for AArch64 only supports the IEEE 754-2008 format, and does
not require use of the @option{-mfp16-format} command-line option.

The @code{__fp16} type may only be used as an argument to intrinsics defined
in @code{<arm_fp16.h>}, or as a storage format.  For purposes of
arithmetic and other operations, @code{__fp16} values in C or C++
expressions are automatically promoted to @code{float}.

The ARM target provides hardware support for conversions between
@code{__fp16} and @code{float} values
as an extension to VFP and NEON (Advanced SIMD), and from ARMv8-A provides
hardware support for conversions between @code{__fp16} and @code{double}
values.  GCC generates code using these hardware instructions if you
compile with options to select an FPU that provides them;
for example, @option{-mfpu=neon-fp16 -mfloat-abi=softfp},
in addition to the @option{-mfp16-format} option to select
a half-precision format.

Language-level support for the @code{__fp16} data type is
independent of whether GCC generates code using hardware floating-point
instructions.  In cases where hardware support is not specified, GCC
implements conversions between @code{__fp16} and other types as library
calls.

It is recommended that portable code use the @code{_Float16} type defined
by ISO/IEC TS 18661-3:2015.  @xref{Floating Types}.

On x86 targets with SSE2 enabled, without @option{-mavx512fp16},
all operations will be emulated by software emulation and the @code{float}
instructions. The default behavior for @code{FLT_EVAL_METHOD} is to keep the
intermediate result of the operation as 32-bit precision. This may lead to
inconsistent behavior between software emulation and AVX512-FP16 instructions.
Using @option{-fexcess-precision=16} will force round back after each operation.

Using @option{-mavx512fp16} will generate AVX512-FP16 instructions instead of
software emulation. The default behavior of @code{FLT_EVAL_METHOD} is to round
after each operation. The same is true with @option{-fexcess-precision=standard}
and @option{-mfpmath=sse}. If there is no @option{-mfpmath=sse},
@option{-fexcess-precision=standard} alone does the same thing as before,
It is useful for code that does not have @code{_Float16} and runs on the x87
FPU.

@node Decimal Float
@section Decimal Floating Types
@cindex decimal floating types
@cindex @code{_Decimal32} data type
@cindex @code{_Decimal64} data type
@cindex @code{_Decimal128} data type
@cindex @code{df} integer suffix
@cindex @code{dd} integer suffix
@cindex @code{dl} integer suffix
@cindex @code{DF} integer suffix
@cindex @code{DD} integer suffix
@cindex @code{DL} integer suffix

As an extension, GNU C supports decimal floating types as
defined in the N1312 draft of ISO/IEC WDTR24732.  Support for decimal
floating types in GCC will evolve as the draft technical report changes.
Calling conventions for any target might also change.  Not all targets
support decimal floating types.

The decimal floating types are @code{_Decimal32}, @code{_Decimal64}, and
@code{_Decimal128}.  They use a radix of ten, unlike the floating types
@code{float}, @code{double}, and @code{long double} whose radix is not
specified by the C standard but is usually two.

Support for decimal floating types includes the arithmetic operators
add, subtract, multiply, divide; unary arithmetic operators;
relational operators; equality operators; and conversions to and from
integer and other floating types.  Use a suffix @samp{df} or
@samp{DF} in a literal constant of type @code{_Decimal32}, @samp{dd}
or @samp{DD} for @code{_Decimal64}, and @samp{dl} or @samp{DL} for
@code{_Decimal128}.

GCC support of decimal float as specified by the draft technical report
is incomplete:

@itemize @bullet
@item
When the value of a decimal floating type cannot be represented in the
integer type to which it is being converted, the result is undefined
rather than the result value specified by the draft technical report.

@item
GCC does not provide the C library functionality associated with
@file{math.h}, @file{fenv.h}, @file{stdio.h}, @file{stdlib.h}, and
@file{wchar.h}, which must come from a separate C library implementation.
Because of this the GNU C compiler does not define macro
@code{__STDC_DEC_FP__} to indicate that the implementation conforms to
the technical report.
@end itemize

Types @code{_Decimal32}, @code{_Decimal64}, and @code{_Decimal128}
are supported by the DWARF debug information format.

@node Hex Floats
@section Hex Floats
@cindex hex floats

ISO C99 and ISO C++17 support floating-point numbers written not only in
the usual decimal notation, such as @code{1.55e1}, but also numbers such as
@code{0x1.fp3} written in hexadecimal format.  As a GNU extension, GCC
supports this in C90 mode (except in some cases when strictly
conforming) and in C++98, C++11 and C++14 modes.  In that format the
@samp{0x} hex introducer and the @samp{p} or @samp{P} exponent field are
mandatory.  The exponent is a decimal number that indicates the power of
2 by which the significant part is multiplied.  Thus @samp{0x1.f} is
@tex
$1 {15\over16}$,
@end tex
@ifnottex
1 15/16,
@end ifnottex
@samp{p3} multiplies it by 8, and the value of @code{0x1.fp3}
is the same as @code{1.55e1}.

Unlike for floating-point numbers in the decimal notation the exponent
is always required in the hexadecimal notation.  Otherwise the compiler
would not be able to resolve the ambiguity of, e.g., @code{0x1.f}.  This
could mean @code{1.0f} or @code{1.9375} since @samp{f} is also the
extension for floating-point constants of type @code{float}.

@node Fixed-Point
@section Fixed-Point Types
@cindex fixed-point types
@cindex @code{_Fract} data type
@cindex @code{_Accum} data type
@cindex @code{_Sat} data type
@cindex @code{hr} fixed-suffix
@cindex @code{r} fixed-suffix
@cindex @code{lr} fixed-suffix
@cindex @code{llr} fixed-suffix
@cindex @code{uhr} fixed-suffix
@cindex @code{ur} fixed-suffix
@cindex @code{ulr} fixed-suffix
@cindex @code{ullr} fixed-suffix
@cindex @code{hk} fixed-suffix
@cindex @code{k} fixed-suffix
@cindex @code{lk} fixed-suffix
@cindex @code{llk} fixed-suffix
@cindex @code{uhk} fixed-suffix
@cindex @code{uk} fixed-suffix
@cindex @code{ulk} fixed-suffix
@cindex @code{ullk} fixed-suffix
@cindex @code{HR} fixed-suffix
@cindex @code{R} fixed-suffix
@cindex @code{LR} fixed-suffix
@cindex @code{LLR} fixed-suffix
@cindex @code{UHR} fixed-suffix
@cindex @code{UR} fixed-suffix
@cindex @code{ULR} fixed-suffix
@cindex @code{ULLR} fixed-suffix
@cindex @code{HK} fixed-suffix
@cindex @code{K} fixed-suffix
@cindex @code{LK} fixed-suffix
@cindex @code{LLK} fixed-suffix
@cindex @code{UHK} fixed-suffix
@cindex @code{UK} fixed-suffix
@cindex @code{ULK} fixed-suffix
@cindex @code{ULLK} fixed-suffix

As an extension, GNU C supports fixed-point types as
defined in the N1169 draft of ISO/IEC DTR 18037.  Support for fixed-point
types in GCC will evolve as the draft technical report changes.
Calling conventions for any target might also change.  Not all targets
support fixed-point types.

The fixed-point types are
@code{short _Fract},
@code{_Fract},
@code{long _Fract},
@code{long long _Fract},
@code{unsigned short _Fract},
@code{unsigned _Fract},
@code{unsigned long _Fract},
@code{unsigned long long _Fract},
@code{_Sat short _Fract},
@code{_Sat _Fract},
@code{_Sat long _Fract},
@code{_Sat long long _Fract},
@code{_Sat unsigned short _Fract},
@code{_Sat unsigned _Fract},
@code{_Sat unsigned long _Fract},
@code{_Sat unsigned long long _Fract},
@code{short _Accum},
@code{_Accum},
@code{long _Accum},
@code{long long _Accum},
@code{unsigned short _Accum},
@code{unsigned _Accum},
@code{unsigned long _Accum},
@code{unsigned long long _Accum},
@code{_Sat short _Accum},
@code{_Sat _Accum},
@code{_Sat long _Accum},
@code{_Sat long long _Accum},
@code{_Sat unsigned short _Accum},
@code{_Sat unsigned _Accum},
@code{_Sat unsigned long _Accum},
@code{_Sat unsigned long long _Accum}.

Fixed-point data values contain fractional and optional integral parts.
The format of fixed-point data varies and depends on the target machine.

Support for fixed-point types includes:
@itemize @bullet
@item
prefix and postfix increment and decrement operators (@code{++}, @code{--})
@item
unary arithmetic operators (@code{+}, @code{-}, @code{!})
@item
binary arithmetic operators (@code{+}, @code{-}, @code{*}, @code{/})
@item
binary shift operators (@code{<<}, @code{>>})
@item
relational operators (@code{<}, @code{<=}, @code{>=}, @code{>})
@item
equality operators (@code{==}, @code{!=})
@item
assignment operators (@code{+=}, @code{-=}, @code{*=}, @code{/=},
@code{<<=}, @code{>>=})
@item
conversions to and from integer, floating-point, or fixed-point types
@end itemize

Use a suffix in a fixed-point literal constant:
@itemize
@item @samp{hr} or @samp{HR} for @code{short _Fract} and
@code{_Sat short _Fract}
@item @samp{r} or @samp{R} for @code{_Fract} and @code{_Sat _Fract}
@item @samp{lr} or @samp{LR} for @code{long _Fract} and
@code{_Sat long _Fract}
@item @samp{llr} or @samp{LLR} for @code{long long _Fract} and
@code{_Sat long long _Fract}
@item @samp{uhr} or @samp{UHR} for @code{unsigned short _Fract} and
@code{_Sat unsigned short _Fract}
@item @samp{ur} or @samp{UR} for @code{unsigned _Fract} and
@code{_Sat unsigned _Fract}
@item @samp{ulr} or @samp{ULR} for @code{unsigned long _Fract} and
@code{_Sat unsigned long _Fract}
@item @samp{ullr} or @samp{ULLR} for @code{unsigned long long _Fract}
and @code{_Sat unsigned long long _Fract}
@item @samp{hk} or @samp{HK} for @code{short _Accum} and
@code{_Sat short _Accum}
@item @samp{k} or @samp{K} for @code{_Accum} and @code{_Sat _Accum}
@item @samp{lk} or @samp{LK} for @code{long _Accum} and
@code{_Sat long _Accum}
@item @samp{llk} or @samp{LLK} for @code{long long _Accum} and
@code{_Sat long long _Accum}
@item @samp{uhk} or @samp{UHK} for @code{unsigned short _Accum} and
@code{_Sat unsigned short _Accum}
@item @samp{uk} or @samp{UK} for @code{unsigned _Accum} and
@code{_Sat unsigned _Accum}
@item @samp{ulk} or @samp{ULK} for @code{unsigned long _Accum} and
@code{_Sat unsigned long _Accum}
@item @samp{ullk} or @samp{ULLK} for @code{unsigned long long _Accum}
and @code{_Sat unsigned long long _Accum}
@end itemize

GCC support of fixed-point types as specified by the draft technical report
is incomplete:

@itemize @bullet
@item
Pragmas to control overflow and rounding behaviors are not implemented.
@end itemize

Fixed-point types are supported by the DWARF debug information format.

@node Named Address Spaces
@section Named Address Spaces
@cindex Named Address Spaces

As an extension, GNU C supports named address spaces as
defined in the N1275 draft of ISO/IEC DTR 18037.  Support for named
address spaces in GCC will evolve as the draft technical report
changes.  Calling conventions for any target might also change.  At
present, only the AVR, M32C, PRU, RL78, and x86 targets support
address spaces other than the generic address space.

Address space identifiers may be used exactly like any other C type
qualifier (e.g., @code{const} or @code{volatile}).  See the N1275
document for more details.

@anchor{AVR Named Address Spaces}
@subsection AVR Named Address Spaces

On the AVR target, there are several address spaces that can be used
in order to put read-only data into the flash memory and access that
data by means of the special instructions @code{LPM} or @code{ELPM}
needed to read from flash.

Devices belonging to @code{avrtiny} and @code{avrxmega3} can access
flash memory by means of @code{LD*} instructions because the flash
memory is mapped into the RAM address space.  There is @emph{no need}
for language extensions like @code{__flash} or attribute
@ref{AVR Variable Attributes,,@code{progmem}}.
The default linker description files for these devices cater for that
feature and @code{.rodata} stays in flash: The compiler just generates
@code{LD*} instructions, and the linker script adds core specific
offsets to all @code{.rodata} symbols: @code{0x4000} in the case of
@code{avrtiny} and @code{0x8000} in the case of @code{avrxmega3}.
See @ref{AVR Options} for a list of respective devices.

For devices not in @code{avrtiny} or @code{avrxmega3},
any data including read-only data is located in RAM (the generic
address space) because flash memory is not visible in the RAM address
space.  In order to locate read-only data in flash memory @emph{and}
to generate the right instructions to access this data without
using (inline) assembler code, special address spaces are needed.

@table @code
@cindex @code{__flash} AVR Named Address Spaces
@item __flash
The @code{__flash} qualifier locates data in the
@code{.progmem.data} section. Data is read using the @code{LPM}
instruction. Pointers to this address space are 16 bits wide.

@cindex @code{__flash1} AVR Named Address Spaces
@cindex @code{__flash2} AVR Named Address Spaces
@cindex @code{__flash3} AVR Named Address Spaces
@cindex @code{__flash4} AVR Named Address Spaces
@cindex @code{__flash5} AVR Named Address Spaces
@item __flash1
@itemx __flash2
@itemx __flash3
@itemx __flash4
@itemx __flash5
These are 16-bit address spaces locating data in section
@code{.progmem@var{N}.data} where @var{N} refers to
address space @code{__flash@var{N}}.
The compiler sets the @code{RAMPZ} segment register appropriately 
before reading data by means of the @code{ELPM} instruction.

@cindex @code{__memx} AVR Named Address Spaces
@item __memx
This is a 24-bit address space that linearizes flash and RAM:
If the high bit of the address is set, data is read from
RAM using the lower two bytes as RAM address.
If the high bit of the address is clear, data is read from flash
with @code{RAMPZ} set according to the high byte of the address.
@xref{AVR Built-in Functions,,@code{__builtin_avr_flash_segment}}.

Objects in this address space are located in @code{.progmemx.data}.
@end table

@b{Example}

@smallexample
char my_read (const __flash char ** p)
@{
    /* p is a pointer to RAM that points to a pointer to flash.
       The first indirection of p reads that flash pointer
       from RAM and the second indirection reads a char from this
       flash address.  */

    return **p;
@}

/* Locate array[] in flash memory */
const __flash int array[] = @{ 3, 5, 7, 11, 13, 17, 19 @};

int i = 1;

int main (void)
@{
   /* Return 17 by reading from flash memory */
   return array[array[i]];
@}
@end smallexample

@noindent
For each named address space supported by avr-gcc there is an equally
named but uppercase built-in macro defined. 
The purpose is to facilitate testing if respective address space
support is available or not:

@smallexample
#ifdef __FLASH
const __flash int var = 1;

int read_var (void)
@{
    return var;
@}
#else
#include <avr/pgmspace.h> /* From AVR-LibC */

const int var PROGMEM = 1;

int read_var (void)
@{
    return (int) pgm_read_word (&var);
@}
#endif /* __FLASH */
@end smallexample

@noindent
Notice that attribute @ref{AVR Variable Attributes,,@code{progmem}}
locates data in flash but
accesses to these data read from generic address space, i.e.@:
from RAM,
so that you need special accessors like @code{pgm_read_byte}
from @w{@uref{https://www.nongnu.org/avr-libc/user-manual/,AVR-LibC}}
together with attribute @code{progmem}.

@noindent
@b{Limitations and Caveats}

@itemize
@item
Reading across the 64@tie{}KiB section boundary of
the @code{__flash} or @code{__flash@var{N}} address spaces
shows undefined behavior. The only address space that
supports reading across the 64@tie{}KiB flash segment boundaries is
@code{__memx}.

@item
If you use one of the @code{__flash@var{N}} address spaces
you must arrange your linker script to locate the
@code{.progmem@var{N}.data} sections according to your needs.
For an example, see the
@w{@uref{https://gcc.gnu.org/wiki/avr-gcc#Address_Spaces,avr-gcc wiki}}

@item
Any data or pointers to the non-generic address spaces must
be qualified as @code{const}, i.e.@: as read-only data.
This still applies if the data in one of these address
spaces like software version number or calibration lookup table are intended to
be changed after load time by, say, a boot loader. In this case
the right qualification is @code{const} @code{volatile} so that the compiler
must not optimize away known values or insert them
as immediates into operands of instructions.

@item
The following code initializes a variable @code{pfoo}
located in static storage with a 24-bit address:
@smallexample
extern const __memx char foo;
const __memx void *pfoo = &foo;
@end smallexample

@item
On the reduced Tiny devices like ATtiny40, no address spaces are supported.
Just use vanilla C / C++ code without overhead as outlined above.
Attribute @code{progmem} is supported but works differently,
see @ref{AVR Variable Attributes}.

@end itemize

@subsection M32C Named Address Spaces
@cindex @code{__far} M32C Named Address Spaces

On the M32C target, with the R8C and M16C CPU variants, variables
qualified with @code{__far} are accessed using 32-bit addresses in
order to access memory beyond the first 64@tie{}Ki bytes.  If
@code{__far} is used with the M32CM or M32C CPU variants, it has no
effect.

@subsection PRU Named Address Spaces
@cindex @code{__regio_symbol} PRU Named Address Spaces

On the PRU target, variables qualified with @code{__regio_symbol} are
aliases used to access the special I/O CPU registers.  They must be
declared as @code{extern} because such variables will not be allocated in
any data memory.  They must also be marked as @code{volatile}, and can
only be 32-bit integer types.  The only names those variables can have
are @code{__R30} and @code{__R31}, representing respectively the
@code{R30} and @code{R31} special I/O CPU registers.  Hence the following
example is the only valid usage of @code{__regio_symbol}:

@smallexample
extern volatile __regio_symbol uint32_t __R30;
extern volatile __regio_symbol uint32_t __R31;
@end smallexample

@subsection RL78 Named Address Spaces
@cindex @code{__far} RL78 Named Address Spaces

On the RL78 target, variables qualified with @code{__far} are accessed
with 32-bit pointers (20-bit addresses) rather than the default 16-bit
addresses.  Non-far variables are assumed to appear in the topmost
64@tie{}KiB of the address space.

@subsection x86 Named Address Spaces
@cindex x86 named address spaces

On the x86 target, variables may be declared as being relative
to the @code{%fs} or @code{%gs} segments.

@table @code
@cindex @code{__seg_fs} x86 named address space
@cindex @code{__seg_gs} x86 named address space
@item __seg_fs
@itemx __seg_gs
The object is accessed with the respective segment override prefix.

The respective segment base must be set via some method specific to
the operating system.  Rather than require an expensive system call
to retrieve the segment base, these address spaces are not considered
to be subspaces of the generic (flat) address space.  This means that
explicit casts are required to convert pointers between these address
spaces and the generic address space.  In practice the application
should cast to @code{uintptr_t} and apply the segment base offset
that it installed previously.

The preprocessor symbols @code{__SEG_FS} and @code{__SEG_GS} are
defined when these address spaces are supported.
@end table

@node Zero Length
@section Arrays of Length Zero
@cindex arrays of length zero
@cindex zero-length arrays
@cindex length-zero arrays
@cindex flexible array members

Declaring zero-length arrays is allowed in GNU C as an extension.
A zero-length array can be useful as the last element of a structure
that is really a header for a variable-length object:

@smallexample
struct line @{
  int length;
  char contents[0];
@};

struct line *thisline = (struct line *)
  malloc (sizeof (struct line) + this_length);
thisline->length = this_length;
@end smallexample

In this example, @code{thisline->contents} is an array of @code{char} that
can hold up to @code{thisline->length} bytes.

Although the size of a zero-length array is zero, an array member of
this kind may increase the size of the enclosing type as a result of tail
padding.  The offset of a zero-length array member from the beginning
of the enclosing structure is the same as the offset of an array with
one or more elements of the same type.  The alignment of a zero-length
array is the same as the alignment of its elements.

Declaring zero-length arrays in other contexts, including as interior
members of structure objects or as non-member objects, is discouraged.
Accessing elements of zero-length arrays declared in such contexts is
undefined and may be diagnosed.

In the absence of the zero-length array extension, in ISO C90
the @code{contents} array in the example above would typically be declared
to have a single element.  Unlike a zero-length array which only contributes
to the size of the enclosing structure for the purposes of alignment,
a one-element array always occupies at least as much space as a single
object of the type.  Although using one-element arrays this way is
discouraged, GCC handles accesses to trailing one-element array members
analogously to zero-length arrays.

The preferred mechanism to declare variable-length types like
@code{struct line} above is the ISO C99 @dfn{flexible array member},
with slightly different syntax and semantics:

@itemize @bullet
@item
Flexible array members are written as @code{contents[]} without
the @code{0}.

@item
Flexible array members have incomplete type, and so the @code{sizeof}
operator may not be applied.  As a quirk of the original implementation
of zero-length arrays, @code{sizeof} evaluates to zero.

@item
Flexible array members may only appear as the last member of a
@code{struct} that is otherwise non-empty.

@item
A structure containing a flexible array member, or a union containing
such a structure (possibly recursively), may not be a member of a
structure or an element of an array.  (However, these uses are
permitted by GCC as extensions, see details below.)
@end itemize

The GCC extension accepts a structure containing an ISO C99 @dfn{flexible array
member}, or a union containing such a structure (possibly recursively)
to be a member of a structure.

There are two situations:

@itemize @bullet
@item
A structure containing a C99 flexible array member, or a union containing
such a structure, is the last field of another structure, for example:

@smallexample
struct flex  @{ int length; char data[]; @};
union union_flex @{ int others; struct flex f; @};

struct out_flex_struct @{ int m; struct flex flex_data; @};
struct out_flex_union @{ int n; union union_flex flex_data; @};
@end smallexample

In the above, both @code{out_flex_struct.flex_data.data[]} and
@code{out_flex_union.flex_data.f.data[]} are considered as flexible arrays too.

@item
A structure containing a C99 flexible array member, or a union containing
such a structure, is not the last field of another structure, for example:

@smallexample
struct flex  @{ int length; char data[]; @};

struct mid_flex @{ int m; struct flex flex_data; int n; @};
@end smallexample

In the above, accessing a member of the array @code{mid_flex.flex_data.data[]}
might have undefined behavior.  Compilers do not handle such a case
consistently.  Any code relying on this case should be modified to ensure
that flexible array members only end up at the ends of structures.

Please use the warning option @option{-Wflex-array-member-not-at-end} to
identify all such cases in the source code and modify them.  This extension
is now deprecated.
@end itemize

Non-empty initialization of zero-length
arrays is treated like any case where there are more initializer
elements than the array holds, in that a suitable warning about ``excess
elements in array'' is given, and the excess elements (all of them, in
this case) are ignored.

GCC allows static initialization of flexible array members.
This is equivalent to defining a new structure containing the original
structure followed by an array of sufficient size to contain the data.
E.g.@: in the following, @code{f1} is constructed as if it were declared
like @code{f2}.

@smallexample
struct f1 @{
  int x; int y[];
@} f1 = @{ 1, @{ 2, 3, 4 @} @};

struct f2 @{
  struct f1 f1; int data[3];
@} f2 = @{ @{ 1 @}, @{ 2, 3, 4 @} @};
@end smallexample

@noindent
The convenience of this extension is that @code{f1} has the desired
type, eliminating the need to consistently refer to @code{f2.f1}.

This has symmetry with normal static arrays, in that an array of
unknown size is also written with @code{[]}.

Of course, this extension only makes sense if the extra data comes at
the end of a top-level object, as otherwise we would be overwriting
data at subsequent offsets.  To avoid undue complication and confusion
with initialization of deeply nested arrays, we simply disallow any
non-empty initialization except when the structure is the top-level
object.  For example:

@smallexample
struct foo @{ int x; int y[]; @};
struct bar @{ struct foo z; @};

struct foo a = @{ 1, @{ 2, 3, 4 @} @};        // @r{Valid.}
struct bar b = @{ @{ 1, @{ 2, 3, 4 @} @} @};    // @r{Invalid.}
struct bar c = @{ @{ 1, @{ @} @} @};            // @r{Valid.}
struct foo d[1] = @{ @{ 1, @{ 2, 3, 4 @} @} @};  // @r{Invalid.}
@end smallexample

@node Empty Structures
@section Structures with No Members
@cindex empty structures
@cindex zero-size structures

GCC permits a C structure to have no members:

@smallexample
struct empty @{
@};
@end smallexample

The structure has size zero.  In C++, empty structures are part
of the language.  G++ treats empty structures as if they had a single
member of type @code{char}.

@node Flexible Array Members in Unions
@section Unions with Flexible Array Members
@cindex unions with flexible array members
@cindex unions with FAMs

GCC permits a C99 flexible array member (FAM) to be in a union:

@smallexample
union with_fam @{
  int a;
  int b[];
@};
@end smallexample

If every member of a union is a flexible array member, the size of
such a union is zero.

@node Flexible Array Members alone in Structures
@section Structures with only Flexible Array Members
@cindex structures with only flexible array members
@cindex structures with only FAMs

GCC permits a C99 flexible array member (FAM) to be alone in a structure:

@smallexample
struct only_fam @{
  int b[];
@};
@end smallexample

The size of such a structure is zero.

@node Variable Length
@section Arrays of Variable Length
@cindex variable-length arrays
@cindex arrays of variable length
@cindex VLAs

Variable-length automatic arrays are allowed in ISO C99, and as an
extension GCC accepts them in C90 mode and in C++.  These arrays are
declared like any other automatic arrays, but with a length that is not
a constant expression.  The storage is allocated at the point of
declaration and deallocated when the block scope containing the declaration
exits.  For
example:

@smallexample
FILE *
concat_fopen (char *s1, char *s2, char *mode)
@{
  char str[strlen (s1) + strlen (s2) + 1];
  strcpy (str, s1);
  strcat (str, s2);
  return fopen (str, mode);
@}
@end smallexample

@cindex scope of a variable length array
@cindex variable-length array scope
@cindex deallocating variable length arrays
Jumping or breaking out of the scope of the array name deallocates the
storage.  Jumping into the scope is not allowed; you get an error
message for it.

@cindex variable-length array in a structure
As an extension, GCC accepts variable-length arrays as a member of
a structure or a union.  For example:

@smallexample
void
foo (int n)
@{
  struct S @{ int x[n]; @};
@}
@end smallexample

@cindex @code{alloca} vs variable-length arrays
You can use the function @code{alloca} to get an effect much like
variable-length arrays.  The function @code{alloca} is available in
many other C implementations (but not in all).  On the other hand,
variable-length arrays are more elegant.

There are other differences between these two methods.  Space allocated
with @code{alloca} exists until the containing @emph{function} returns.
The space for a variable-length array is deallocated as soon as the array
name's scope ends, unless you also use @code{alloca} in this scope.

You can also use variable-length arrays as arguments to functions:

@smallexample
struct entry
tester (int len, char data[len][len])
@{
  /* @r{@dots{}} */
@}
@end smallexample

The length of an array is computed once when the storage is allocated
and is remembered for the scope of the array in case you access it with
@code{sizeof}.

If you want to pass the array first and the length afterward, you can
use a forward declaration in the parameter list---another GNU extension.

@smallexample
struct entry
tester (int len; char data[len][len], int len)
@{
  /* @r{@dots{}} */
@}
@end smallexample

@cindex parameter forward declaration
The @samp{int len} before the semicolon is a @dfn{parameter forward
declaration}, and it serves the purpose of making the name @code{len}
known when the declaration of @code{data} is parsed.

You can write any number of such parameter forward declarations in the
parameter list.  They can be separated by commas or semicolons, but the
last one must end with a semicolon, which is followed by the ``real''
parameter declarations.  Each forward declaration must match a ``real''
declaration in parameter name and data type.  ISO C99 does not support
parameter forward declarations.

@node Variadic Macros
@section Macros with a Variable Number of Arguments.
@cindex variable number of arguments
@cindex macro with variable arguments
@cindex rest argument (in macro)
@cindex variadic macros

In the ISO C standard of 1999, a macro can be declared to accept a
variable number of arguments much as a function can.  The syntax for
defining the macro is similar to that of a function.  Here is an
example:

@smallexample
#define debug(format, ...) fprintf (stderr, format, __VA_ARGS__)
@end smallexample

@noindent
Here @samp{@dots{}} is a @dfn{variable argument}.  In the invocation of
such a macro, it represents the zero or more tokens until the closing
parenthesis that ends the invocation, including any commas.  This set of
tokens replaces the identifier @code{__VA_ARGS__} in the macro body
wherever it appears.  See the CPP manual for more information.

GCC has long supported variadic macros, and used a different syntax that
allowed you to give a name to the variable arguments just like any other
argument.  Here is an example:

@smallexample
#define debug(format, args...) fprintf (stderr, format, args)
@end smallexample

@noindent
This is in all ways equivalent to the ISO C example above, but arguably
more readable and descriptive.

GNU CPP has two further variadic macro extensions, and permits them to
be used with either of the above forms of macro definition.

In standard C, you are not allowed to leave the variable argument out
entirely; but you are allowed to pass an empty argument.  For example,
this invocation is invalid in ISO C, because there is no comma after
the string:

@smallexample
debug ("A message")
@end smallexample

GNU CPP permits you to completely omit the variable arguments in this
way.  In the above examples, the compiler would complain, though since
the expansion of the macro still has the extra comma after the format
string.

To help solve this problem, CPP behaves specially for variable arguments
used with the token paste operator, @samp{##}.  If instead you write

@smallexample
#define debug(format, ...) fprintf (stderr, format, ## __VA_ARGS__)
@end smallexample

@noindent
and if the variable arguments are omitted or empty, the @samp{##}
operator causes the preprocessor to remove the comma before it.  If you
do provide some variable arguments in your macro invocation, GNU CPP
does not complain about the paste operation and instead places the
variable arguments after the comma.  Just like any other pasted macro
argument, these arguments are not macro expanded.

@node Escaped Newlines
@section Slightly Looser Rules for Escaped Newlines
@cindex escaped newlines
@cindex newlines (escaped)

The preprocessor treatment of escaped newlines is more relaxed 
than that specified by the C90 standard, which requires the newline
to immediately follow a backslash.  
GCC's implementation allows whitespace in the form
of spaces, horizontal and vertical tabs, and form feeds between the
backslash and the subsequent newline.  The preprocessor issues a
warning, but treats it as a valid escaped newline and combines the two
lines to form a single logical line.  This works within comments and
tokens, as well as between tokens.  Comments are @emph{not} treated as
whitespace for the purposes of this relaxation, since they have not
yet been replaced with spaces.

@node Subscripting
@section Non-Lvalue Arrays May Have Subscripts
@cindex subscripting
@cindex arrays, non-lvalue

@cindex subscripting and function values
In ISO C99, arrays that are not lvalues still decay to pointers, and
may be subscripted, although they may not be modified or used after
the next sequence point and the unary @samp{&} operator may not be
applied to them.  As an extension, GNU C allows such arrays to be
subscripted in C90 mode, though otherwise they do not decay to
pointers outside C99 mode.  For example,
this is valid in GNU C though not valid in C90:

@smallexample
@group
struct foo @{int a[4];@};

struct foo f();

bar (int index)
@{
  return f().a[index];
@}
@end group
@end smallexample

@node Pointer Arith
@section Arithmetic on @code{void}- and Function-Pointers
@cindex void pointers, arithmetic
@cindex void, size of pointer to
@cindex function pointers, arithmetic
@cindex function, size of pointer to

In GNU C, addition and subtraction operations are supported on pointers to
@code{void} and on pointers to functions.  This is done by treating the
size of a @code{void} or of a function as 1.

A consequence of this is that @code{sizeof} is also allowed on @code{void}
and on function types, and returns 1.

@opindex Wpointer-arith
The option @option{-Wpointer-arith} requests a warning if these extensions
are used.

@node Variadic Pointer Args
@section Pointer Arguments in Variadic Functions
@cindex pointer arguments in variadic functions
@cindex variadic functions, pointer arguments

Standard C requires that pointer types used with @code{va_arg} in
functions with variable argument lists either must be compatible with
that of the actual argument, or that one type must be a pointer to
@code{void} and the other a pointer to a character type.  GNU C
implements the POSIX XSI extension that additionally permits the use
of @code{va_arg} with a pointer type to receive arguments of any other
pointer type.

In particular, in GNU C @samp{va_arg (ap, void *)} can safely be used
to consume an argument of any pointer type.

@node Pointers to Arrays
@section Pointers to Arrays with Qualifiers Work as Expected
@cindex pointers to arrays
@cindex const qualifier

In GNU C, pointers to arrays with qualifiers work similar to pointers
to other qualified types. For example, a value of type @code{int (*)[5]}
can be used to initialize a variable of type @code{const int (*)[5]}.
These types are incompatible in ISO C because the @code{const} qualifier
is formally attached to the element type of the array and not the
array itself.

@smallexample
extern void
transpose (int N, int M, double out[M][N], const double in[N][M]);
double x[3][2];
double y[2][3];
@r{@dots{}}
transpose(3, 2, y, x);
@end smallexample

@node Initializers
@section Non-Constant Initializers
@cindex initializers, non-constant
@cindex non-constant initializers

As in standard C++ and ISO C99, the elements of an aggregate initializer for an
automatic variable are not required to be constant expressions in GNU C@.
Here is an example of an initializer with run-time varying elements:

@smallexample
foo (float f, float g)
@{
  float beat_freqs[2] = @{ f-g, f+g @};
  /* @r{@dots{}} */
@}
@end smallexample

@node Compound Literals
@section Compound Literals
@cindex constructor expressions
@cindex initializations in expressions
@cindex structures, constructor expression
@cindex expressions, constructor
@cindex compound literals
@c The GNU C name for what C99 calls compound literals was "constructor expressions".

A compound literal looks like a cast of a brace-enclosed aggregate
initializer list.  Its value is an object of the type specified in
the cast, containing the elements specified in the initializer.
Unlike the result of a cast, a compound literal is an lvalue.  ISO
C99 and later support compound literals.  As an extension, GCC
supports compound literals also in C90 mode and in C++, although
as explained below, the C++ semantics are somewhat different.

Usually, the specified type of a compound literal is a structure.  Assume
that @code{struct foo} and @code{structure} are declared as shown:

@smallexample
struct foo @{int a; char b[2];@} structure;
@end smallexample

@noindent
Here is an example of constructing a @code{struct foo} with a compound literal:

@smallexample
structure = ((struct foo) @{x + y, 'a', 0@});
@end smallexample

@noindent
This is equivalent to writing the following:

@smallexample
@{
  struct foo temp = @{x + y, 'a', 0@};
  structure = temp;
@}
@end smallexample

You can also construct an array, though this is dangerous in C++, as
explained below.  If all the elements of the compound literal are
(made up of) simple constant expressions suitable for use in
initializers of objects of static storage duration, then the compound
literal can be coerced to a pointer to its first element and used in
such an initializer, as shown here:

@smallexample
char **foo = (char *[]) @{ "x", "y", "z" @};
@end smallexample

Compound literals for scalar types and union types are also allowed.  In
the following example the variable @code{i} is initialized to the value
@code{2}, the result of incrementing the unnamed object created by
the compound literal.

@smallexample
int i = ++(int) @{ 1 @};
@end smallexample

As a GNU extension, GCC allows initialization of objects with static storage
duration by compound literals (which is not possible in ISO C99 because
the initializer is not a constant).
It is handled as if the object were initialized only with the brace-enclosed
list if the types of the compound literal and the object match.
The elements of the compound literal must be constant.
If the object being initialized has array type of unknown size, the size is
determined by the size of the compound literal.

@smallexample
static struct foo x = (struct foo) @{1, 'a', 'b'@};
static int y[] = (int []) @{1, 2, 3@};
static int z[] = (int [3]) @{1@};
@end smallexample

@noindent
The above lines are equivalent to the following:
@smallexample
static struct foo x = @{1, 'a', 'b'@};
static int y[] = @{1, 2, 3@};
static int z[] = @{1, 0, 0@};
@end smallexample

In C, a compound literal designates an unnamed object with static or
automatic storage duration.  In C++, a compound literal designates a
temporary object that only lives until the end of its full-expression.
As a result, well-defined C code that takes the address of a subobject
of a compound literal can be undefined in C++, so G++ rejects
the conversion of a temporary array to a pointer.  For instance, if
the array compound literal example above appeared inside a function,
any subsequent use of @code{foo} in C++ would have undefined behavior
because the lifetime of the array ends after the declaration of @code{foo}.

As an optimization, G++ sometimes gives array compound literals longer
lifetimes: when the array either appears outside a function or has
a @code{const}-qualified type.  If @code{foo} and its initializer had
elements of type @code{char *const} rather than @code{char *}, or if
@code{foo} were a global variable, the array would have static storage
duration.  But it is probably safest just to avoid the use of array
compound literals in C++ code.

@node Designated Inits
@section Designated Initializers
@cindex initializers with labeled elements
@cindex labeled elements in initializers
@cindex case labels in initializers
@cindex designated initializers

Standard C90 requires the elements of an initializer to appear in a fixed
order, the same as the order of the elements in the array or structure
being initialized.

In ISO C99 you can give the elements in any order, specifying the array
indices or structure field names they apply to, and GNU C allows this as
an extension in C90 mode as well.  This extension is not
implemented in GNU C++.

To specify an array index, write
@samp{[@var{index}] =} before the element value.  For example,

@smallexample
int a[6] = @{ [4] = 29, [2] = 15 @};
@end smallexample

@noindent
is equivalent to

@smallexample
int a[6] = @{ 0, 0, 15, 0, 29, 0 @};
@end smallexample

@noindent
The index values must be constant expressions, even if the array being
initialized is automatic.

An alternative syntax for this that has been obsolete since GCC 2.5 but
GCC still accepts is to write @samp{[@var{index}]} before the element
value, with no @samp{=}.

To initialize a range of elements to the same value, write
@samp{[@var{first} ... @var{last}] = @var{value}}.  This is a GNU
extension.  For example,

@smallexample
int widths[] = @{ [0 ... 9] = 1, [10 ... 99] = 2, [100] = 3 @};
@end smallexample

@noindent
If the value in it has side effects, the side effects happen only once,
not for each initialized field by the range initializer.

@noindent
Note that the length of the array is the highest value specified
plus one.

In a structure initializer, specify the name of a field to initialize
with @samp{.@var{fieldname} =} before the element value.  For example,
given the following structure,

@smallexample
struct point @{ int x, y; @};
@end smallexample

@noindent
the following initialization

@smallexample
struct point p = @{ .y = yvalue, .x = xvalue @};
@end smallexample

@noindent
is equivalent to

@smallexample
struct point p = @{ xvalue, yvalue @};
@end smallexample

Another syntax that has the same meaning, obsolete since GCC 2.5, is
@samp{@var{fieldname}:}, as shown here:

@smallexample
struct point p = @{ y: yvalue, x: xvalue @};
@end smallexample

Omitted fields are implicitly initialized the same as for objects
that have static storage duration.

@cindex designators
The @samp{[@var{index}]} or @samp{.@var{fieldname}} is known as a
@dfn{designator}.  You can also use a designator (or the obsolete colon
syntax) when initializing a union, to specify which element of the union
should be used.  For example,

@smallexample
union foo @{ int i; double d; @};

union foo f = @{ .d = 4 @};
@end smallexample

@noindent
converts 4 to a @code{double} to store it in the union using
the second element.  By contrast, casting 4 to type @code{union foo}
stores it into the union as the integer @code{i}, since it is
an integer.  @xref{Cast to Union}.

You can combine this technique of naming elements with ordinary C
initialization of successive elements.  Each initializer element that
does not have a designator applies to the next consecutive element of the
array or structure.  For example,

@smallexample
int a[6] = @{ [1] = v1, v2, [4] = v4 @};
@end smallexample

@noindent
is equivalent to

@smallexample
int a[6] = @{ 0, v1, v2, 0, v4, 0 @};
@end smallexample

Labeling the elements of an array initializer is especially useful
when the indices are characters or belong to an @code{enum} type.
For example:

@smallexample
int whitespace[256]
  = @{ [' '] = 1, ['\t'] = 1, ['\h'] = 1,
      ['\f'] = 1, ['\n'] = 1, ['\r'] = 1 @};
@end smallexample

@cindex designator lists
You can also write a series of @samp{.@var{fieldname}} and
@samp{[@var{index}]} designators before an @samp{=} to specify a
nested subobject to initialize; the list is taken relative to the
subobject corresponding to the closest surrounding brace pair.  For
example, with the @samp{struct point} declaration above:

@smallexample
struct point ptarray[10] = @{ [2].y = yv2, [2].x = xv2, [0].x = xv0 @};
@end smallexample

If the same field is initialized multiple times, or overlapping
fields of a union are initialized, the value from the last
initialization is used.  When a field of a union is itself a structure, 
the entire structure from the last field initialized is used.  If any previous
initializer has side effect, it is unspecified whether the side effect
happens or not.  Currently, GCC discards the side-effecting
initializer expressions and issues a warning.

@node Case Ranges
@section Case Ranges
@cindex case ranges
@cindex ranges in case statements

You can specify a range of consecutive values in a single @code{case} label,
like this:

@smallexample
case @var{low} ... @var{high}:
@end smallexample

@noindent
This has the same effect as the proper number of individual @code{case}
labels, one for each integer value from @var{low} to @var{high}, inclusive.

This feature is especially useful for ranges of ASCII character codes:

@smallexample
case 'A' ... 'Z':
@end smallexample

@strong{Be careful:} Write spaces around the @code{...}, for otherwise
it may be parsed wrong when you use it with integer values.  For example,
write this:

@smallexample
case 1 ... 5:
@end smallexample

@noindent
rather than this:

@smallexample
case 1...5:
@end smallexample

@node Cast to Union
@section Cast to a Union Type
@cindex cast to a union
@cindex union, casting to a

A cast to a union type is a C extension not available in C++.  It looks
just like ordinary casts with the constraint that the type specified is
a union type.  You can specify the type either with the @code{union}
keyword or with a @code{typedef} name that refers to a union.  The result
of a cast to a union is a temporary rvalue of the union type with a member
whose type matches that of the operand initialized to the value of
the operand.  The effect of a cast to a union is similar to a compound
literal except that it yields an rvalue like standard casts do.
@xref{Compound Literals}.

Expressions that may be cast to the union type are those whose type matches
at least one of the members of the union.  Thus, given the following union
and variables:

@smallexample
union foo @{ int i; double d; @};
int x;
double y;
union foo z;
@end smallexample

@noindent
both @code{x} and @code{y} can be cast to type @code{union foo} and
the following assignments
@smallexample
  z = (union foo) x;
  z = (union foo) y;
@end smallexample
are shorthand equivalents of these
@smallexample
  z = (union foo) @{ .i = x @};
  z = (union foo) @{ .d = y @};
@end smallexample

However, @code{(union foo) FLT_MAX;} is not a valid cast because the union
has no member of type @code{float}.

Using the cast as the right-hand side of an assignment to a variable of
union type is equivalent to storing in a member of the union with
the same type

@smallexample
union foo u;
/* @r{@dots{}} */
u = (union foo) x  @equiv{}  u.i = x
u = (union foo) y  @equiv{}  u.d = y
@end smallexample

You can also use the union cast as a function argument:

@smallexample
void hack (union foo);
/* @r{@dots{}} */
hack ((union foo) x);
@end smallexample

@node Mixed Labels and Declarations
@section Mixed Declarations, Labels and Code
@cindex mixed declarations and code
@cindex declarations, mixed with code
@cindex code, mixed with declarations

ISO C99 and ISO C++ allow declarations and code to be freely mixed
within compound statements.  ISO C23 allows labels to be
placed before declarations and at the end of a compound statement.
As an extension, GNU C also allows all this in C90 mode.  For example,
you could do:

@smallexample
int i;
/* @r{@dots{}} */
i++;
int j = i + 2;
@end smallexample

Each identifier is visible from where it is declared until the end of
the enclosing block.

@node Function Attributes
@section Declaring Attributes of Functions
@cindex function attributes
@cindex declaring attributes of functions

In GNU C and C++, you can use function attributes to specify certain
function properties that may help the compiler optimize calls or
check code more carefully for correctness.  For example, you
can use attributes to specify that a function never returns
(@code{noreturn}), returns a value depending only on the values of
its arguments (@code{const}), or has @code{printf}-style arguments
(@code{format}).

You can also use attributes to control memory placement, code
generation options or call/return conventions within the function
being annotated.  Many of these attributes are target-specific.  For
example, many targets support attributes for defining interrupt
handler functions, which typically must follow special register usage
and return conventions.  Such attributes are described in the subsection
for each target.  However, a considerable number of attributes are
supported by most, if not all targets.  Those are described in
the @ref{Common Function Attributes} section.

GCC provides two different ways to specify attributes: the traditional
GNU syntax using @samp{__attribute__ ((...))} annotations, and the
newer standard C and C++ syntax using @samp{[[...]]} with the
@samp{gnu::} prefix on attribute names.  Note that the exact rules for
placement of attributes in your source code are different depending on
which syntax you use.  @xref{Attribute Syntax}, for details.

Compatible attribute specifications on distinct declarations
of the same function are merged.  An attribute specification that is not
compatible with attributes already applied to a declaration of the same
function is ignored with a warning.

Some function attributes take one or more arguments that refer to
the function's parameters by their positions within the function parameter
list.  Such attribute arguments are referred to as @dfn{positional arguments}.
Unless specified otherwise, positional arguments that specify properties
of parameters with pointer types can also specify the same properties of
the implicit C++ @code{this} argument in non-static member functions, and
of parameters of reference to a pointer type.  For ordinary functions,
position one refers to the first parameter on the list.  In C++ non-static
member functions, position one refers to the implicit @code{this} pointer.
The same restrictions and effects apply to function attributes used with
ordinary functions or C++ member functions.

GCC also supports attributes on
variable declarations (@pxref{Variable Attributes}),
labels (@pxref{Label Attributes}),
enumerators (@pxref{Enumerator Attributes}),
statements (@pxref{Statement Attributes}),
types (@pxref{Type Attributes}),
and on field declarations (for @code{tainted_args}).

There is some overlap between the purposes of attributes and pragmas
(@pxref{Pragmas,,Pragmas Accepted by GCC}).  It has been
found convenient to use @code{__attribute__} to achieve a natural
attachment of attributes to their corresponding declarations, whereas
@code{#pragma} is of use for compatibility with other compilers
or constructs that do not naturally form part of the grammar.

In addition to the attributes documented here,
GCC plugins may provide their own attributes.

@menu
* Common Function Attributes::
* AArch64 Function Attributes::
* AMD GCN Function Attributes::
* ARC Function Attributes::
* ARM Function Attributes::
* AVR Function Attributes::
* Blackfin Function Attributes::
* BPF Function Attributes::
* C-SKY Function Attributes::
* Epiphany Function Attributes::
* H8/300 Function Attributes::
* IA-64 Function Attributes::
* M32C Function Attributes::
* M32R/D Function Attributes::
* m68k Function Attributes::
* MCORE Function Attributes::
* MicroBlaze Function Attributes::
* Microsoft Windows Function Attributes::
* MIPS Function Attributes::
* MSP430 Function Attributes::
* NDS32 Function Attributes::
* Nios II Function Attributes::
* Nvidia PTX Function Attributes::
* PowerPC Function Attributes::
* RISC-V Function Attributes::
* RL78 Function Attributes::
* RX Function Attributes::
* S/390 Function Attributes::
* SH Function Attributes::
* Symbian OS Function Attributes::
* V850 Function Attributes::
* Visium Function Attributes::
* x86 Function Attributes::
* Xstormy16 Function Attributes::
@end menu

@node Common Function Attributes
@subsection Common Function Attributes

The following attributes are supported on most targets.

@table @code
@c Keep this table alphabetized by attribute name.  Treat _ as space.

@cindex @code{access} function attribute
@item access (@var{access-mode}, @var{ref-index})
@itemx access (@var{access-mode}, @var{ref-index}, @var{size-index})

The @code{access} attribute enables the detection of invalid or unsafe
accesses by functions to which they apply or their callers, as well as
write-only accesses to objects that are never read from.  Such accesses
may be diagnosed by warnings such as @option{-Wstringop-overflow},
@option{-Wuninitialized}, @option{-Wunused}, and others.

The @code{access} attribute specifies that a function to whose by-reference
arguments the attribute applies accesses the referenced object according to
@var{access-mode}.  The @var{access-mode} argument is required and must be
one of four names: @code{read_only}, @code{read_write}, @code{write_only},
or @code{none}.  The remaining two are positional arguments.

The required @var{ref-index} positional argument  denotes a function
argument of pointer (or in C++, reference) type that is subject to
the access.  The same pointer argument can be referenced by at most one
distinct @code{access} attribute.

The optional @var{size-index} positional argument denotes a function
argument of integer type that specifies the maximum size of the access.
The size is the number of elements of the type referenced by @var{ref-index},
or the number of bytes when the pointer type is @code{void*}.  When no
@var{size-index} argument is specified, the pointer argument must be either
null or point to a space that is suitably aligned and large for at least one
object of the referenced type (this implies that a past-the-end pointer is
not a valid argument).  The actual size of the access may be less but it
must not be more.

The @code{read_only} access mode specifies that the pointer to which it
applies is used to read the referenced object but not write to it.  Unless
the argument specifying the size of the access denoted by @var{size-index}
is zero, the referenced object must be initialized.  The mode implies
a stronger guarantee than the @code{const} qualifier which, when cast away
from a pointer, does not prevent the pointed-to object from being modified.
Examples of the use of the @code{read_only} access mode is the argument to
the @code{puts} function, or the second and third arguments to
the @code{memcpy} function.

@smallexample
__attribute__ ((access (read_only, 1)))
int puts (const char*);

__attribute__ ((access (read_only, 2, 3)))
void* memcpy (void*, const void*, size_t);
@end smallexample

The @code{read_write} access mode applies to arguments of pointer types
without the @code{const} qualifier.  It specifies that the pointer to which
it applies is used to both read and write the referenced object.  Unless
the argument specifying the size of the access denoted by @var{size-index}
is zero, the object referenced by the pointer must be initialized.  An example
of the use of the @code{read_write} access mode is the first argument to
the @code{strcat} function.

@smallexample
__attribute__ ((access (read_write, 1), access (read_only, 2)))
char* strcat (char*, const char*);
@end smallexample

The @code{write_only} access mode applies to arguments of pointer types
without the @code{const} qualifier.  It specifies that the pointer to which
it applies is used to write to the referenced object but not read from it.
The object referenced by the pointer need not be initialized.  An example
of the use of the @code{write_only} access mode is the first argument to
the @code{strcpy} function, or the first two arguments to the @code{fgets}
function.

@smallexample
__attribute__ ((access (write_only, 1), access (read_only, 2)))
char* strcpy (char*, const char*);

__attribute__ ((access (write_only, 1, 2), access (read_write, 3)))
int fgets (char*, int, FILE*);
@end smallexample

The access mode @code{none} specifies that the pointer to which it applies
is not used to access the referenced object at all.  Unless the pointer is
null the pointed-to object must exist and have at least the size as denoted
by the @var{size-index} argument.  When the optional @var{size-index}
argument is omitted for an argument of @code{void*} type the actual pointer
agument is ignored.  The referenced object need not be initialized.
The mode is intended to be used as a means to help validate the expected
object size, for example in functions that call @code{__builtin_object_size}.
@xref{Object Size Checking}.

Note that the @code{access} attribute merely specifies how an object
referenced by the pointer argument can be accessed; it does not imply that
an access @strong{will} happen.  Also, the @code{access} attribute does not
imply the attribute @code{nonnull}; it may be appropriate to add both attributes
at the declaration of a function that unconditionally manipulates a buffer via
a pointer argument.  See the @code{nonnull} attribute for more information and
caveats.

@cindex @code{alias} function attribute
@item alias ("@var{target}")
The @code{alias} attribute causes the declaration to be emitted as an alias
for another symbol, which must have been previously declared with the same
type, and for variables, also the same size and alignment.  Declaring an alias
with a different type than the target is undefined and may be diagnosed.  As
an example, the following declarations:

@smallexample
void __f () @{ /* @r{Do something.} */; @}
void f () __attribute__ ((weak, alias ("__f")));
@end smallexample

@noindent
define @samp{f} to be a weak alias for @samp{__f}.  In C++, the mangled name
for the target must be used.  It is an error if @samp{__f} is not defined in
the same translation unit.

This attribute requires assembler and object file support,
and may not be available on all targets.

@cindex @code{aligned} function attribute
@item aligned
@itemx aligned (@var{alignment})
The @code{aligned} attribute specifies a minimum alignment for
the first instruction of the function, measured in bytes.  When specified,
@var{alignment} must be an integer constant power of 2.  Specifying no
@var{alignment} argument implies the ideal alignment for the target.
The @code{__alignof__} operator can be used to determine what that is
(@pxref{Alignment}).  The attribute has no effect when a definition for
the function is not provided in the same translation unit.

The attribute cannot be used to decrease the alignment of a function
previously declared with a more restrictive alignment; only to increase
it.  Attempts to do otherwise are diagnosed.  Some targets specify
a minimum default alignment for functions that is greater than 1.  On
such targets, specifying a less restrictive alignment is silently ignored.
Using the attribute overrides the effect of the @option{-falign-functions}
(@pxref{Optimize Options}) option for this function.

Note that the effectiveness of @code{aligned} attributes may be
limited by inherent limitations in the system linker 
and/or object file format.  On some systems, the
linker is only able to arrange for functions to be aligned up to a
certain maximum alignment.  (For some linkers, the maximum supported
alignment may be very very small.)  See your linker documentation for
further information.

The @code{aligned} attribute can also be used for variables and fields
(@pxref{Variable Attributes}.)

@cindex @code{alloc_align} function attribute
@item alloc_align (@var{position})
The @code{alloc_align} attribute may be applied to a function that
returns a pointer and takes at least one argument of an integer or
enumerated type.
It indicates that the returned pointer is aligned on a boundary given
by the function argument at @var{position}.  Meaningful alignments are
powers of 2 greater than one.  GCC uses this information to improve
pointer alignment analysis.

The function parameter denoting the allocated alignment is specified by
one constant integer argument whose number is the argument of the attribute.
Argument numbering starts at one.

For instance,

@smallexample
void* my_memalign (size_t, size_t) __attribute__ ((alloc_align (1)));
@end smallexample

@noindent
declares that @code{my_memalign} returns memory with minimum alignment
given by parameter 1.

@cindex @code{alloc_size} function attribute
@item alloc_size (@var{position})
@itemx alloc_size (@var{position-1}, @var{position-2})
The @code{alloc_size} attribute may be applied to a function that
returns a pointer and takes at least one argument of an integer or
enumerated type.
It indicates that the returned pointer points to memory whose size is
given by the function argument at @var{position-1}, or by the product
of the arguments at @var{position-1} and @var{position-2}.  Meaningful
sizes are positive values less than @code{PTRDIFF_MAX}.  GCC uses this
information to improve the results of @code{__builtin_object_size}.

The function parameter(s) denoting the allocated size are specified by
one or two integer arguments supplied to the attribute.  The allocated size
is either the value of the single function argument specified or the product
of the two function arguments specified.  Argument numbering starts at
one for ordinary functions, and at two for C++ non-static member functions.

For instance,

@smallexample
void* my_calloc (size_t, size_t) __attribute__ ((alloc_size (1, 2)));
void* my_realloc (void*, size_t) __attribute__ ((alloc_size (2)));
@end smallexample

@noindent
declares that @code{my_calloc} returns memory of the size given by
the product of parameter 1 and 2 and that @code{my_realloc} returns memory
of the size given by parameter 2.

@cindex @code{always_inline} function attribute
@item always_inline
Generally, functions are not inlined unless optimization is specified.
For functions declared inline, this attribute inlines the function
independent of any restrictions that otherwise apply to inlining.
Failure to inline such a function is diagnosed as an error.
Note that if such a function is called indirectly the compiler may
or may not inline it depending on optimization level and a failure
to inline an indirect call may or may not be diagnosed.

@cindex @code{artificial} function attribute
@item artificial
This attribute is useful for small inline wrappers that if possible
should appear during debugging as a unit.  Depending on the debug
info format it either means marking the function as artificial
or using the caller location for all instructions within the inlined
body.

@cindex @code{assume_aligned} function attribute
@item assume_aligned (@var{alignment})
@itemx assume_aligned (@var{alignment}, @var{offset})
The @code{assume_aligned} attribute may be applied to a function that
returns a pointer.  It indicates that the returned pointer is aligned
on a boundary given by @var{alignment}.  If the attribute has two
arguments, the second argument is misalignment @var{offset}.  Meaningful
values of @var{alignment} are powers of 2 greater than one.  Meaningful
values of @var{offset} are greater than zero and less than @var{alignment}.

For instance

@smallexample
void* my_alloc1 (size_t) __attribute__((assume_aligned (16)));
void* my_alloc2 (size_t) __attribute__((assume_aligned (32, 8)));
@end smallexample

@noindent
declares that @code{my_alloc1} returns 16-byte aligned pointers and
that @code{my_alloc2} returns a pointer whose value modulo 32 is equal
to 8.

@cindex @code{cold} function attribute
@item cold
The @code{cold} attribute on functions is used to inform the compiler that
the function is unlikely to be executed.  The function is optimized for
size rather than speed and on many targets it is placed into a special
subsection of the text section so all cold functions appear close together,
improving code locality of non-cold parts of program.  The paths leading
to calls of cold functions within code are marked as unlikely by the branch
prediction mechanism.  It is thus useful to mark functions used to handle
unlikely conditions, such as @code{perror}, as cold to improve optimization
of hot functions that do call marked functions in rare occasions.  In C++,
the @code{cold} attribute can be applied to types with the effect of being
propagated to member functions.  See
@ref{C++ Attributes}.

When profile feedback is available, via @option{-fprofile-use}, cold functions
are automatically detected and this attribute is ignored.

@cindex @code{const} function attribute
@cindex functions that have no side effects
@item const
Calls to functions whose return value is not affected by changes to
the observable state of the program and that have no observable effects
on such state other than to return a value may lend themselves to
optimizations such as common subexpression elimination.  Declaring such
functions with the @code{const} attribute allows GCC to avoid emitting
some calls in repeated invocations of the function with the same argument
values.

For example,

@smallexample
int square (int) __attribute__ ((const));
@end smallexample

@noindent
tells GCC that subsequent calls to function @code{square} with the same
argument value can be replaced by the result of the first call regardless
of the statements in between.

The @code{const} attribute prohibits a function from reading objects
that affect its return value between successive invocations.  However,
functions declared with the attribute can safely read objects that do
not change their return value, such as non-volatile constants.

The @code{const} attribute imposes greater restrictions on a function's
definition than the similar @code{pure} attribute.  Declaring the same
function with both the @code{const} and the @code{pure} attribute is
diagnosed.  Because a const function cannot have any observable side
effects it does not make sense for it to return @code{void}.  Declaring
such a function is diagnosed.

@cindex pointer arguments
Note that a function that has pointer arguments and examines the data
pointed to must @emph{not} be declared @code{const} if the pointed-to
data might change between successive invocations of the function.  In
general, since a function cannot distinguish data that might change
from data that cannot, const functions should never take pointer or,
in C++, reference arguments. Likewise, a function that calls a non-const
function usually must not be const itself.

@cindex @code{constructor} function attribute
@cindex @code{destructor} function attribute
@item constructor
@itemx destructor
@itemx constructor (@var{priority})
@itemx destructor (@var{priority})
The @code{constructor} attribute causes the function to be called
automatically before execution enters @code{main ()}.  Similarly, the
@code{destructor} attribute causes the function to be called
automatically after @code{main ()} completes or @code{exit ()} is
called.  Functions with these attributes are useful for
initializing data that is used implicitly during the execution of
the program.

On some targets the attributes also accept an integer argument to
specify a priority to control the order in which constructor and
destructor functions are run.  A constructor
with a smaller priority number runs before a constructor with a larger
priority number; the opposite relationship holds for destructors.  Note
that priorities 0-100 are reserved.  So, if you have a constructor that
allocates a resource and a destructor that deallocates the same
resource, both functions typically have the same priority.  The
priorities for constructor and destructor functions are the same as
those specified for namespace-scope C++ objects (@pxref{C++ Attributes}).
However, at present, the order in which constructors for C++ objects
with static storage duration and functions decorated with attribute
@code{constructor} are invoked is unspecified. In mixed declarations,
attribute @code{init_priority} can be used to impose a specific ordering.

Using the argument forms of the @code{constructor} and @code{destructor}
attributes on targets where the feature is not supported is rejected with
an error.

@cindex @code{copy} function attribute
@item copy
@itemx copy (@var{function})
The @code{copy} attribute applies the set of attributes with which
@var{function} has been declared to the declaration of the function
to which the attribute is applied.  The attribute is designed for
libraries that define aliases or function resolvers that are expected
to specify the same set of attributes as their targets.  The @code{copy}
attribute can be used with functions, variables, or types.  However,
the kind of symbol to which the attribute is applied (either function
or variable) must match the kind of symbol to which the argument refers.
The @code{copy} attribute copies only syntactic and semantic attributes
but not attributes that affect a symbol's linkage or visibility such as
@code{alias}, @code{visibility}, or @code{weak}.  The @code{deprecated}
and @code{target_clones} attribute are also not copied.
@xref{Common Type Attributes}.
@xref{Common Variable Attributes}.

For example, the @var{StrongAlias} macro below makes use of the @code{alias}
and @code{copy} attributes to define an alias named @var{alloc} for function
@var{allocate} declared with attributes @var{alloc_size}, @var{malloc}, and
@var{nothrow}.  Thanks to the @code{__typeof__} operator the alias has
the same type as the target function.  As a result of the @code{copy}
attribute the alias also shares the same attributes as the target.

@smallexample
#define StrongAlias(TargetFunc, AliasDecl)  \
  extern __typeof__ (TargetFunc) AliasDecl  \
    __attribute__ ((alias (#TargetFunc), copy (TargetFunc)));

extern __attribute__ ((alloc_size (1), malloc, nothrow))
  void* allocate (size_t);
StrongAlias (allocate, alloc);
@end smallexample

@cindex @code{deprecated} function attribute
@item deprecated
@itemx deprecated (@var{msg})
The @code{deprecated} attribute results in a warning if the function
is used anywhere in the source file.  This is useful when identifying
functions that are expected to be removed in a future version of a
program.  The warning also includes the location of the declaration
of the deprecated function, to enable users to easily find further
information about why the function is deprecated, or what they should
do instead.  Note that the warnings only occurs for uses:

@smallexample
int old_fn () __attribute__ ((deprecated));
int old_fn ();
int (*fn_ptr)() = old_fn;
@end smallexample

@noindent
results in a warning on line 3 but not line 2.  The optional @var{msg}
argument, which must be a string, is printed in the warning if
present.

The @code{deprecated} attribute can also be used for variables and
types (@pxref{Variable Attributes}, @pxref{Type Attributes}.)

The message attached to the attribute is affected by the setting of
the @option{-fmessage-length} option.

@cindex @code{error} function attribute
@cindex @code{warning} function attribute
@item error ("@var{message}")
@itemx warning ("@var{message}")
If the @code{error} or @code{warning} attribute 
is used on a function declaration and a call to such a function
is not eliminated through dead code elimination or other optimizations, 
an error or warning (respectively) that includes @var{message} is diagnosed.  
This is useful
for compile-time checking, especially together with @code{__builtin_constant_p}
and inline functions where checking the inline function arguments is not
possible through @code{extern char [(condition) ? 1 : -1];} tricks.

While it is possible to leave the function undefined and thus invoke
a link failure (to define the function with
a message in @code{.gnu.warning*} section),
when using these attributes the problem is diagnosed
earlier and with exact location of the call even in presence of inline
functions or when not emitting debugging information.

@cindex @code{expected_throw} function attribute
@item expected_throw
This attribute, attached to a function, tells the compiler the function
is more likely to raise or propagate an exception than to return, loop
forever, or terminate the program.

This hint is mostly ignored by the compiler.  The only effect is when
it's applied to @code{noreturn} functions and
@samp{-fharden-control-flow-redundancy} is enabled, and
@samp{-fhardcfr-check-noreturn-calls=not-always} is not overridden.

@cindex @code{externally_visible} function attribute
@item externally_visible
This attribute, attached to a global variable or function, nullifies
the effect of the @option{-fwhole-program} command-line option, so the
object remains visible outside the current compilation unit.

If @option{-fwhole-program} is used together with @option{-flto} and 
@command{gold} is used as the linker plugin, 
@code{externally_visible} attributes are automatically added to functions 
(not variable yet due to a current @command{gold} issue) 
that are accessed outside of LTO objects according to resolution file
produced by @command{gold}.
For other linkers that cannot generate resolution file,
explicit @code{externally_visible} attributes are still necessary.

@cindex @code{fd_arg} function attribute
@item fd_arg
@itemx fd_arg (@var{N})
The @code{fd_arg} attribute may be applied to a function that takes an open
file descriptor at referenced argument @var{N}.

It indicates that the passed filedescriptor must not have been closed.
Therefore, when the analyzer is enabled with @option{-fanalyzer}, the
analyzer may emit a @option{-Wanalyzer-fd-use-after-close} diagnostic
if it detects a code path in which a function with this attribute is
called with a closed file descriptor.

The attribute also indicates that the file descriptor must have been checked for
validity before usage. Therefore, analyzer may emit
@option{-Wanalyzer-fd-use-without-check} diagnostic if it detects a code path in
which a function with this attribute is called with a file descriptor that has
not been checked for validity.

@cindex @code{fd_arg_read} function attribute
@item fd_arg_read
@itemx fd_arg_read (@var{N})
The @code{fd_arg_read} is identical to @code{fd_arg}, but with the additional
requirement that it might read from the file descriptor, and thus, the file
descriptor must not have been opened as write-only.

The analyzer may emit a @option{-Wanalyzer-access-mode-mismatch}
diagnostic if it detects a code path in which a function with this
attribute is called on a file descriptor opened with @code{O_WRONLY}.

@cindex @code{fd_arg_write} function attribute
@item fd_arg_write
@itemx fd_arg_write (@var{N})
The @code{fd_arg_write} is identical to @code{fd_arg_read} except that the
analyzer may emit a @option{-Wanalyzer-access-mode-mismatch} diagnostic if
it detects a code path in which a function with this attribute is called on a
file descriptor opened with @code{O_RDONLY}.

@cindex @code{flatten} function attribute
@item flatten
Generally, inlining into a function is limited.  For a function marked with
this attribute, every call inside this function is inlined including the
calls such inlining introduces to the function (but not recursive calls
to the function itself), if possible.
Functions declared with attribute @code{noinline} and similar are not
inlined.  Whether the function itself is considered for inlining depends
on its size and the current inlining parameters.

@cindex @code{format} function attribute
@cindex functions with @code{printf}, @code{scanf}, @code{strftime} or @code{strfmon} style arguments
@opindex Wformat
@item format (@var{archetype}, @var{string-index}, @var{first-to-check})
The @code{format} attribute specifies that a function takes @code{printf},
@code{scanf}, @code{strftime} or @code{strfmon} style arguments that
should be type-checked against a format string.  For example, the
declaration:

@smallexample
extern int
my_printf (void *my_object, const char *my_format, ...)
      __attribute__ ((format (printf, 2, 3)));
@end smallexample

@noindent
causes the compiler to check the arguments in calls to @code{my_printf}
for consistency with the @code{printf} style format string argument
@code{my_format}.

The parameter @var{archetype} determines how the format string is
interpreted, and should be @code{printf}, @code{scanf}, @code{strftime},
@code{gnu_printf}, @code{gnu_scanf}, @code{gnu_strftime} or
@code{strfmon}.  (You can also use @code{__printf__},
@code{__scanf__}, @code{__strftime__} or @code{__strfmon__}.)  On
MinGW targets, @code{ms_printf}, @code{ms_scanf}, and
@code{ms_strftime} are also present.
@var{archetype} values such as @code{printf} refer to the formats accepted
by the system's C runtime library,
while values prefixed with @samp{gnu_} always refer
to the formats accepted by the GNU C Library.  On Microsoft Windows
targets, values prefixed with @samp{ms_} refer to the formats accepted by the
@file{msvcrt.dll} library.
The parameter @var{string-index}
specifies which argument is the format string argument (starting
from 1), while @var{first-to-check} is the number of the first
argument to check against the format string.  For functions
where the arguments are not available to be checked (such as
@code{vprintf}), specify the third parameter as zero.  In this case the
compiler only checks the format string for consistency.  For
@code{strftime} formats, the third parameter is required to be zero.
Since non-static C++ methods have an implicit @code{this} argument, the
arguments of such methods should be counted from two, not one, when
giving values for @var{string-index} and @var{first-to-check}.

In the example above, the format string (@code{my_format}) is the second
argument of the function @code{my_print}, and the arguments to check
start with the third argument, so the correct parameters for the format
attribute are 2 and 3.

@opindex ffreestanding
@opindex fno-builtin
The @code{format} attribute allows you to identify your own functions
that take format strings as arguments, so that GCC can check the
calls to these functions for errors.  The compiler always (unless
@option{-ffreestanding} or @option{-fno-builtin} is used) checks formats
for the standard library functions @code{printf}, @code{fprintf},
@code{sprintf}, @code{scanf}, @code{fscanf}, @code{sscanf}, @code{strftime},
@code{vprintf}, @code{vfprintf} and @code{vsprintf} whenever such
warnings are requested (using @option{-Wformat}), so there is no need to
modify the header file @file{stdio.h}.  In C99 mode, the functions
@code{snprintf}, @code{vsnprintf}, @code{vscanf}, @code{vfscanf} and
@code{vsscanf} are also checked.  Except in strictly conforming C
standard modes, the X/Open function @code{strfmon} is also checked as
are @code{printf_unlocked} and @code{fprintf_unlocked}.
@xref{C Dialect Options,,Options Controlling C Dialect}.

For Objective-C dialects, @code{NSString} (or @code{__NSString__}) is
recognized in the same context.  Declarations including these format attributes
are parsed for correct syntax, however the result of checking of such format
strings is not yet defined, and is not carried out by this version of the
compiler.

The target may also provide additional types of format checks.
@xref{Target Format Checks,,Format Checks Specific to Particular
Target Machines}.

@cindex @code{format_arg} function attribute
@opindex Wformat-nonliteral
@item format_arg (@var{string-index})
The @code{format_arg} attribute specifies that a function takes one or
more format strings for a @code{printf}, @code{scanf}, @code{strftime} or
@code{strfmon} style function and modifies it (for example, to translate
it into another language), so the result can be passed to a
@code{printf}, @code{scanf}, @code{strftime} or @code{strfmon} style
function (with the remaining arguments to the format function the same
as they would have been for the unmodified string).  Multiple
@code{format_arg} attributes may be applied to the same function, each
designating a distinct parameter as a format string.  For example, the
declaration:

@smallexample
extern char *
my_dgettext (char *my_domain, const char *my_format)
      __attribute__ ((format_arg (2)));
@end smallexample

@noindent
causes the compiler to check the arguments in calls to a @code{printf},
@code{scanf}, @code{strftime} or @code{strfmon} type function, whose
format string argument is a call to the @code{my_dgettext} function, for
consistency with the format string argument @code{my_format}.  If the
@code{format_arg} attribute had not been specified, all the compiler
could tell in such calls to format functions would be that the format
string argument is not constant; this would generate a warning when
@option{-Wformat-nonliteral} is used, but the calls could not be checked
without the attribute.

In calls to a function declared with more than one @code{format_arg}
attribute, each with a distinct argument value, the corresponding
actual function arguments are checked against all format strings
designated by the attributes.  This capability is designed to support
the GNU @code{ngettext} family of functions.

The parameter @var{string-index} specifies which argument is the format
string argument (starting from one).  Since non-static C++ methods have
an implicit @code{this} argument, the arguments of such methods should
be counted from two.

The @code{format_arg} attribute allows you to identify your own
functions that modify format strings, so that GCC can check the
calls to @code{printf}, @code{scanf}, @code{strftime} or @code{strfmon}
type function whose operands are a call to one of your own function.
The compiler always treats @code{gettext}, @code{dgettext}, and
@code{dcgettext} in this manner except when strict ISO C support is
requested by @option{-ansi} or an appropriate @option{-std} option, or
@option{-ffreestanding} or @option{-fno-builtin}
is used.  @xref{C Dialect Options,,Options
Controlling C Dialect}.

For Objective-C dialects, the @code{format-arg} attribute may refer to an
@code{NSString} reference for compatibility with the @code{format} attribute
above.

The target may also allow additional types in @code{format-arg} attributes.
@xref{Target Format Checks,,Format Checks Specific to Particular
Target Machines}.

@cindex @code{gnu_inline} function attribute
@item gnu_inline
This attribute should be used with a function that is also declared
with the @code{inline} keyword.  It directs GCC to treat the function
as if it were defined in gnu90 mode even when compiling in C99 or
gnu99 mode.

If the function is declared @code{extern}, then this definition of the
function is used only for inlining.  In no case is the function
compiled as a standalone function, not even if you take its address
explicitly.  Such an address becomes an external reference, as if you
had only declared the function, and had not defined it.  This has
almost the effect of a macro.  The way to use this is to put a
function definition in a header file with this attribute, and put
another copy of the function, without @code{extern}, in a library
file.  The definition in the header file causes most calls to the
function to be inlined.  If any uses of the function remain, they
refer to the single copy in the library.  Note that the two
definitions of the functions need not be precisely the same, although
if they do not have the same effect your program may behave oddly.

In C, if the function is neither @code{extern} nor @code{static}, then
the function is compiled as a standalone function, as well as being
inlined where possible.

This is how GCC traditionally handled functions declared
@code{inline}.  Since ISO C99 specifies a different semantics for
@code{inline}, this function attribute is provided as a transition
measure and as a useful feature in its own right.  This attribute is
available in GCC 4.1.3 and later.  It is available if either of the
preprocessor macros @code{__GNUC_GNU_INLINE__} or
@code{__GNUC_STDC_INLINE__} are defined.  @xref{Inline,,An Inline
Function is As Fast As a Macro}.

In C++, this attribute does not depend on @code{extern} in any way,
but it still requires the @code{inline} keyword to enable its special
behavior.

@cindex @code{hot} function attribute
@item hot
The @code{hot} attribute on a function is used to inform the compiler that
the function is a hot spot of the compiled program.  The function is
optimized more aggressively and on many targets it is placed into a special
subsection of the text section so all hot functions appear close together,
improving locality.  In C++, the @code{hot} attribute can be applied to types
with the effect of being propagated to member functions.  See
@ref{C++ Attributes}.

When profile feedback is available, via @option{-fprofile-use}, hot functions
are automatically detected and this attribute is ignored.

@cindex @code{ifunc} function attribute
@cindex indirect functions
@cindex functions that are dynamically resolved
@item ifunc ("@var{resolver}")
The @code{ifunc} attribute is used to mark a function as an indirect
function using the STT_GNU_IFUNC symbol type extension to the ELF
standard.  This allows the resolution of the symbol value to be
determined dynamically at load time, and an optimized version of the
routine to be selected for the particular processor or other system
characteristics determined then.  To use this attribute, first define
the implementation functions available, and a resolver function that
returns a pointer to the selected implementation function.  The
implementation functions' declarations must match the API of the
function being implemented.  The resolver should be declared to
be a function taking no arguments and returning a pointer to
a function of the same type as the implementation.  For example:

@smallexample
void *my_memcpy (void *dst, const void *src, size_t len)
@{
  @dots{}
  return dst;
@}

static void * (*resolve_memcpy (void))(void *, const void *, size_t)
@{
  return my_memcpy; // we will just always select this routine
@}
@end smallexample

@noindent
The exported header file declaring the function the user calls would
contain:

@smallexample
extern void *memcpy (void *, const void *, size_t);
@end smallexample

@noindent
allowing the user to call @code{memcpy} as a regular function, unaware of
the actual implementation.  Finally, the indirect function needs to be
defined in the same translation unit as the resolver function:

@smallexample
void *memcpy (void *, const void *, size_t)
     __attribute__ ((ifunc ("resolve_memcpy")));
@end smallexample

In C++, the @code{ifunc} attribute takes a string that is the mangled name
of the resolver function.  A C++ resolver for a non-static member function
of class @code{C} should be declared to return a pointer to a non-member
function taking pointer to @code{C} as the first argument, followed by
the same arguments as of the implementation function.  G++ checks
the signatures of the two functions and issues
a @option{-Wattribute-alias} warning for mismatches.  To suppress a warning
for the necessary cast from a pointer to the implementation member function
to the type of the corresponding non-member function use
the @option{-Wno-pmf-conversions} option.  For example:

@smallexample
class S
@{
private:
  int debug_impl (int);
  int optimized_impl (int);

  typedef int Func (S*, int);

  static Func* resolver ();
public:

  int interface (int);
@};

int S::debug_impl (int) @{ /* @r{@dots{}} */ @}
int S::optimized_impl (int) @{ /* @r{@dots{}} */ @}

S::Func* S::resolver ()
@{
  int (S::*pimpl) (int)
    = getenv ("DEBUG") ? &S::debug_impl : &S::optimized_impl;

  // Cast triggers -Wno-pmf-conversions.
  return reinterpret_cast<Func*>(pimpl);
@}

int S::interface (int) __attribute__ ((ifunc ("_ZN1S8resolverEv")));
@end smallexample

Indirect functions cannot be weak.  Binutils version 2.20.1 or higher
and GNU C Library version 2.11.1 are required to use this feature.

@cindex @code{interrupt_handler} function attribute
@cindex @code{interrupt} function attribute
@item interrupt
@itemx interrupt_handler
Many GCC back ends support attributes to indicate that a function is
an interrupt handler, which tells the compiler to generate function
entry and exit sequences that differ from those from regular
functions.  The exact syntax and behavior are target-specific;
refer to the following subsections for details.

@cindex @code{leaf} function attribute
@item leaf
Calls to external functions with this attribute must return to the
current compilation unit only by return or by exception handling.  In
particular, a leaf function is not allowed to invoke callback functions
passed to it from the current compilation unit, directly call functions
exported by the unit, or @code{longjmp} into the unit.  Leaf functions
might still call functions from other compilation units and thus they
are not necessarily leaf in the sense that they contain no function
calls at all.

The attribute is intended for library functions to improve dataflow
analysis.  The compiler takes the hint that any data not escaping the
current compilation unit cannot be used or modified by the leaf
function.  For example, the @code{sin} function is a leaf function, but
@code{qsort} is not.

Note that leaf functions might indirectly run a signal handler defined
in the current compilation unit that uses static variables.  Similarly,
when lazy symbol resolution is in effect, leaf functions might invoke
indirect functions whose resolver function or implementation function is
defined in the current compilation unit and uses static variables.  There
is no standard-compliant way to write such a signal handler, resolver
function, or implementation function, and the best that you can do is to
remove the @code{leaf} attribute or mark all such static variables
@code{volatile}.  Lastly, for ELF-based systems that support symbol
interposition, care should be taken that functions defined in the
current compilation unit do not unexpectedly interpose other symbols
based on the defined standards mode and defined feature test macros;
otherwise an inadvertent callback would be added.

The attribute has no effect on functions defined within the current
compilation unit.  This is to allow easy merging of multiple compilation
units into one, for example, by using the link-time optimization.  For
this reason the attribute is not allowed on types to annotate indirect
calls.

@cindex @code{malloc} function attribute
@cindex functions that behave like malloc
@item malloc
@item malloc (@var{deallocator})
@item malloc (@var{deallocator}, @var{ptr-index})
Attribute @code{malloc} indicates that a function is @code{malloc}-like,
i.e., that the pointer @var{P} returned by the function cannot alias any
other pointer valid when the function returns, and moreover no
pointers to valid objects occur in any storage addressed by @var{P}. In
addition, GCC predicts that a function with the attribute returns
non-null in most cases.

Independently, the form of the attribute with one or two arguments
associates @code{deallocator} as a suitable deallocation function for
pointers returned from the @code{malloc}-like function.  @var{ptr-index}
denotes the positional argument to which when the pointer is passed in
calls to @code{deallocator} has the effect of deallocating it.

Using the attribute with no arguments is designed to improve optimization
by relying on the aliasing property it implies.  Functions like @code{malloc}
and @code{calloc} have this property because they return a pointer to
uninitialized or zeroed-out, newly obtained storage.  However, functions
like @code{realloc} do not have this property, as they may return pointers
to storage containing pointers to existing objects.  Additionally, since
all such functions are assumed to return null only infrequently, callers
can be optimized based on that assumption.

Associating a function with a @var{deallocator} helps detect calls to
mismatched allocation and deallocation functions and diagnose them under
the control of options such as @option{-Wmismatched-dealloc}.  It also
makes it possible to diagnose attempts to deallocate objects that were not
allocated dynamically, by @option{-Wfree-nonheap-object}.  To indicate
that an allocation function both satisifies the nonaliasing property and
has a deallocator associated with it, both the plain form of the attribute
and the one with the @var{deallocator} argument must be used.  The same
function can be both an allocator and a deallocator.  Since inlining one
of the associated functions but not the other could result in apparent
mismatches, this form of attribute @code{malloc} is not accepted on inline
functions.  For the same reason, using the attribute prevents both
the allocation and deallocation functions from being expanded inline.

For example, besides stating that the functions return pointers that do
not alias any others, the following declarations make @code{fclose}
a suitable deallocator for pointers returned from all functions except
@code{popen}, and @code{pclose} as the only suitable deallocator for
pointers returned from @code{popen}.  The deallocator functions must
be declared before they can be referenced in the attribute.

@smallexample
int fclose (FILE*);
int pclose (FILE*);

__attribute__ ((malloc, malloc (fclose, 1)))
  FILE* fdopen (int, const char*);
__attribute__ ((malloc, malloc (fclose, 1)))
  FILE* fopen (const char*, const char*);
__attribute__ ((malloc, malloc (fclose, 1)))
  FILE* fmemopen(void *, size_t, const char *);
__attribute__ ((malloc, malloc (pclose, 1)))
  FILE* popen (const char*, const char*);
__attribute__ ((malloc, malloc (fclose, 1)))
  FILE* tmpfile (void);
@end smallexample

The warnings guarded by @option{-fanalyzer} respect allocation and
deallocation pairs marked with the @code{malloc}.  In particular:

@itemize @bullet

@item
The analyzer emits a @option{-Wanalyzer-mismatching-deallocation}
diagnostic if there is an execution path in which the result of an
allocation call is passed to a different deallocator.

@item
The analyzer emits a @option{-Wanalyzer-double-free}
diagnostic if there is an execution path in which a value is passed
more than once to a deallocation call.

@item
The analyzer considers the possibility that an allocation function
could fail and return null.  If there are
execution paths in which an unchecked result of an allocation call is
dereferenced or passed to a function requiring a non-null argument,
it emits
@option{-Wanalyzer-possible-null-dereference} and
@option{-Wanalyzer-possible-null-argument} diagnostics.
If the allocator always returns non-null, use
@code{__attribute__ ((returns_nonnull))} to suppress these warnings.
For example:
@smallexample
char *xstrdup (const char *)
  __attribute__((malloc (free), returns_nonnull));
@end smallexample

@item
The analyzer emits a @option{-Wanalyzer-use-after-free}
diagnostic if there is an execution path in which the memory passed
by pointer to a deallocation call is used after the deallocation.

@item
The analyzer emits a @option{-Wanalyzer-malloc-leak} diagnostic if
there is an execution path in which the result of an allocation call
is leaked (without being passed to the deallocation function).

@item
The analyzer emits a @option{-Wanalyzer-free-of-non-heap} diagnostic
if a deallocation function is used on a global or on-stack variable.

@end itemize

The analyzer assumes that deallocators can gracefully handle the null
pointer.  If this is not the case, the deallocator can be marked with
@code{__attribute__((nonnull))} so that @option{-fanalyzer} can emit
a @option{-Wanalyzer-possible-null-argument} diagnostic for code paths
in which the deallocator is called with null.

@cindex @code{no_icf} function attribute
@item no_icf
This function attribute prevents a functions from being merged with another
semantically equivalent function.

@cindex @code{no_instrument_function} function attribute
@opindex finstrument-functions
@opindex p
@opindex pg
@item no_instrument_function
If any of @option{-finstrument-functions}, @option{-p}, or @option{-pg} are 
given, profiling function calls are
generated at entry and exit of most user-compiled functions.
Functions with this attribute are not so instrumented.

@cindex @code{no_profile_instrument_function} function attribute
@item no_profile_instrument_function
The @code{no_profile_instrument_function} attribute on functions is used
to inform the compiler that it should not process any profile feedback based
optimization code instrumentation.

@cindex @code{no_reorder} function attribute
@item no_reorder
Do not reorder functions or variables marked @code{no_reorder}
against each other or top level assembler statements the executable.
The actual order in the program will depend on the linker command
line. Static variables marked like this are also not removed.
This has a similar effect
as the @option{-fno-toplevel-reorder} option, but only applies to the
marked symbols.

@cindex @code{no_sanitize} function attribute
@item no_sanitize ("@var{sanitize_option}")
The @code{no_sanitize} attribute on functions is used
to inform the compiler that it should not do sanitization of any option
mentioned in @var{sanitize_option}.  A list of values acceptable by
the @option{-fsanitize} option can be provided.

@smallexample
void __attribute__ ((no_sanitize ("alignment", "object-size")))
f () @{ /* @r{Do something.} */; @}
void __attribute__ ((no_sanitize ("alignment,object-size")))
g () @{ /* @r{Do something.} */; @}
@end smallexample

@cindex @code{no_sanitize_address} function attribute
@item no_sanitize_address
@itemx no_address_safety_analysis
The @code{no_sanitize_address} attribute on functions is used
to inform the compiler that it should not instrument memory accesses
in the function when compiling with the @option{-fsanitize=address} option.
The @code{no_address_safety_analysis} is a deprecated alias of the
@code{no_sanitize_address} attribute, new code should use
@code{no_sanitize_address}.

@cindex @code{no_sanitize_thread} function attribute
@item no_sanitize_thread
The @code{no_sanitize_thread} attribute on functions is used
to inform the compiler that it should not instrument memory accesses
in the function when compiling with the @option{-fsanitize=thread} option.

@cindex @code{no_sanitize_undefined} function attribute
@item no_sanitize_undefined
The @code{no_sanitize_undefined} attribute on functions is used
to inform the compiler that it should not check for undefined behavior
in the function when compiling with the @option{-fsanitize=undefined} option.

@cindex @code{no_sanitize_coverage} function attribute
@item no_sanitize_coverage
The @code{no_sanitize_coverage} attribute on functions is used
to inform the compiler that it should not do coverage-guided
fuzzing code instrumentation (@option{-fsanitize-coverage}).

@cindex @code{no_split_stack} function attribute
@opindex fsplit-stack
@item no_split_stack
If @option{-fsplit-stack} is given, functions have a small
prologue which decides whether to split the stack.  Functions with the
@code{no_split_stack} attribute do not have that prologue, and thus
may run with only a small amount of stack space available.

@cindex @code{no_stack_limit} function attribute
@item no_stack_limit
This attribute locally overrides the @option{-fstack-limit-register}
and @option{-fstack-limit-symbol} command-line options; it has the effect
of disabling stack limit checking in the function it applies to.

@cindex @code{no_stack_protector} function attribute
@item no_stack_protector
This attribute prevents stack protection code for the function.

@cindex @code{noclone} function attribute
@item noclone
This function attribute prevents a function from being considered for
cloning---a mechanism that produces specialized copies of functions
and which is (currently) performed by interprocedural constant
propagation.

@cindex @code{noinline} function attribute
@item noinline
This function attribute prevents a function from being considered for
inlining.  It also disables some other interprocedural optimizations; it's
preferable to use the more comprehensive @code{noipa} attribute instead
if that is your goal.

@c Don't enumerate the optimizations by name here; we try to be
@c future-compatible with this mechanism.
Even if a function is declared with the @code{noinline} attribute,
there are optimizations other than inlining that can cause calls to be
optimized away if it does not have side effects, although the function
call is live.  To keep such calls from being optimized away, put

@smallexample
asm ("");
@end smallexample

@noindent
(@pxref{Extended Asm}) in the called function, to serve as a special
side effect.

@cindex @code{noipa} function attribute
@item noipa
Disable interprocedural optimizations between the function with this
attribute and its callers, as if the body of the function is not available
when optimizing callers and the callers are unavailable when optimizing
the body.  This attribute implies @code{noinline}, @code{noclone} and
@code{no_icf} attributes.    However, this attribute is not equivalent
to a combination of other attributes, because its purpose is to suppress
existing and future optimizations employing interprocedural analysis,
including those that do not have an attribute suitable for disabling
them individually.

@cindex @code{nonnull} function attribute
@cindex functions with non-null pointer arguments
@item nonnull
@itemx nonnull (@var{arg-index}, @dots{})
The @code{nonnull} attribute may be applied to a function that takes at
least one argument of a pointer type.  It indicates that the referenced
arguments must be non-null pointers.  For instance, the declaration:

@smallexample
extern void *
my_memcpy (void *dest, const void *src, size_t len)
        __attribute__((nonnull (1, 2)));
@end smallexample

@noindent
informs the compiler that, in calls to @code{my_memcpy}, arguments
@var{dest} and @var{src} must be non-null.

The attribute has an effect both on functions calls and function definitions.

For function calls:
@itemize @bullet
@item If the compiler determines that a null pointer is
passed in an argument slot marked as non-null, and the
@option{-Wnonnull} option is enabled, a warning is issued.
@xref{Warning Options}.
@item The @option{-fisolate-erroneous-paths-attribute} option can be
specified to have GCC transform calls with null arguments to non-null
functions into traps.  @xref{Optimize Options}.
@item The compiler may also perform optimizations based on the
knowledge that certain function arguments cannot be null.  These
optimizations can be disabled by the
@option{-fno-delete-null-pointer-checks} option. @xref{Optimize Options}.
@end itemize

For function definitions:
@itemize @bullet
@item If the compiler determines that a function parameter that is
marked with nonnull is compared with null, and
@option{-Wnonnull-compare} option is enabled, a warning is issued.
@xref{Warning Options}.
@item The compiler may also perform optimizations based on the
knowledge that @code{nonnull} parameters cannot be null.  This can
currently not be disabled other than by removing the nonnull
attribute.
@end itemize

If no @var{arg-index} is given to the @code{nonnull} attribute,
all pointer arguments are marked as non-null.  To illustrate, the
following declaration is equivalent to the previous example:

@smallexample
extern void *
my_memcpy (void *dest, const void *src, size_t len)
        __attribute__((nonnull));
@end smallexample

@cindex @code{noplt} function attribute
@item noplt
The @code{noplt} attribute is the counterpart to option @option{-fno-plt}.
Calls to functions marked with this attribute in position-independent code
do not use the PLT.

@smallexample
@group
/* Externally defined function foo.  */
int foo () __attribute__ ((noplt));

int
main (/* @r{@dots{}} */)
@{
  /* @r{@dots{}} */
  foo ();
  /* @r{@dots{}} */
@}
@end group
@end smallexample

The @code{noplt} attribute on function @code{foo}
tells the compiler to assume that
the function @code{foo} is externally defined and that the call to
@code{foo} must avoid the PLT
in position-independent code.

In position-dependent code, a few targets also convert calls to
functions that are marked to not use the PLT to use the GOT instead.

@cindex @code{noreturn} function attribute
@cindex functions that never return
@item noreturn
A few standard library functions, such as @code{abort} and @code{exit},
cannot return.  GCC knows this automatically.  Some programs define
their own functions that never return.  You can declare them
@code{noreturn} to tell the compiler this fact.  For example,

@smallexample
@group
void fatal () __attribute__ ((noreturn));

void
fatal (/* @r{@dots{}} */)
@{
  /* @r{@dots{}} */ /* @r{Print error message.} */ /* @r{@dots{}} */
  exit (1);
@}
@end group
@end smallexample

The @code{noreturn} keyword tells the compiler to assume that
@code{fatal} cannot return.  It can then optimize without regard to what
would happen if @code{fatal} ever did return.  This makes slightly
better code.  More importantly, it helps avoid spurious warnings of
uninitialized variables.

The @code{noreturn} keyword does not affect the exceptional path when that
applies: a @code{noreturn}-marked function may still return to the caller
by throwing an exception or calling @code{longjmp}.

In order to preserve backtraces, GCC will never turn calls to
@code{noreturn} functions into tail calls.

Do not assume that registers saved by the calling function are
restored before calling the @code{noreturn} function.

It does not make sense for a @code{noreturn} function to have a return
type other than @code{void}.

@cindex @code{nothrow} function attribute
@item nothrow
The @code{nothrow} attribute is used to inform the compiler that a
function cannot throw an exception.  For example, most functions in
the standard C library can be guaranteed not to throw an exception
with the notable exceptions of @code{qsort} and @code{bsearch} that
take function pointer arguments.

@cindex @code{null_terminated_string_arg} function attribute
@item null_terminated_string_arg
@itemx null_terminated_string_arg (@var{N})
The @code{null_terminated_string_arg} attribute may be applied to a
function that takes a @code{char *} or @code{const char *} at
referenced argument @var{N}.

It indicates that the passed argument must be a C-style null-terminated
string.  Specifically, the presence of the attribute implies that, if
the pointer is non-null, the function may scan through the referenced
buffer looking for the first zero byte.

In particular, when the analyzer is enabled (via @option{-fanalyzer}),
if the pointer is non-null, it will simulate scanning for the first
zero byte in the referenced buffer, and potentially emit
@option{-Wanalyzer-use-of-uninitialized-value}
or @option{-Wanalyzer-out-of-bounds} on improperly terminated buffers.

For example, given the following:

@smallexample
char *example_1 (const char *p)
  __attribute__((null_terminated_string_arg (1)));
@end smallexample

the analyzer will check that any non-null pointers passed to the function
are validly terminated.

If the parameter must be non-null, it is appropriate to use both this
attribute and the attribute @code{nonnull}, such as in:

@smallexample
extern char *example_2 (const char *p)
  __attribute__((null_terminated_string_arg (1),
                 nonnull (1)));
@end smallexample

See the @code{nonnull} attribute for more information and
caveats.

If the pointer argument is also referred to by an @code{access} attribute on the
function with @var{access-mode} either @code{read_only} or @code{read_write}
and the latter attribute has the optional @var{size-index} argument
referring to a size argument, this expressses the maximum size of the access.
For example, given:

@smallexample
extern char *example_fn (const char *p, size_t n)
  __attribute__((null_terminated_string_arg (1),
                 access (read_only, 1, 2),
                 nonnull (1)));
@end smallexample

the analyzer will require the first parameter to be non-null, and either
be validly null-terminated, or validly readable up to the size specified by
the second parameter.

@cindex @code{optimize} function attribute
@item optimize (@var{level}, @dots{})
@item optimize (@var{string}, @dots{})
The @code{optimize} attribute is used to specify that a function is to
be compiled with different optimization options than specified on the
command line.  The optimize attribute arguments of a function behave
as if appended to the command-line.

Valid arguments are constant non-negative integers and
strings.  Each numeric argument specifies an optimization @var{level}.
Each @var{string} argument consists of one or more comma-separated
substrings.  Each substring that begins with the letter @code{O} refers
to an optimization option such as @option{-O0} or @option{-Os}.  Other
substrings are taken as suffixes to the @code{-f} prefix jointly
forming the name of an optimization option.  @xref{Optimize Options}.

@samp{#pragma GCC optimize} can be used to set optimization options
for more than one function.  @xref{Function Specific Option Pragmas},
for details about the pragma.

Providing multiple strings as arguments separated by commas to specify
multiple options is equivalent to separating the option suffixes with
a comma (@samp{,}) within a single string.  Spaces are not permitted
within the strings.

Not every optimization option that starts with the @var{-f} prefix
specified by the attribute necessarily has an effect on the function.
The @code{optimize} attribute should be used for debugging purposes only.
It is not suitable in production code.

@cindex @code{patchable_function_entry} function attribute
@cindex extra NOP instructions at the function entry point
@item patchable_function_entry
In case the target's text segment can be made writable at run time by
any means, padding the function entry with a number of NOPs can be
used to provide a universal tool for instrumentation.

The @code{patchable_function_entry} function attribute can be used to
change the number of NOPs to any desired value.  The two-value syntax
is the same as for the command-line switch
@option{-fpatchable-function-entry=N,M}, generating @var{N} NOPs, with
the function entry point before the @var{M}th NOP instruction.
@var{M} defaults to 0 if omitted e.g.@: function entry point is before
the first NOP.

If patchable function entries are enabled globally using the command-line
option @option{-fpatchable-function-entry=N,M}, then you must disable
instrumentation on all functions that are part of the instrumentation
framework with the attribute @code{patchable_function_entry (0)}
to prevent recursion.

@cindex @code{pure} function attribute
@cindex functions that have no side effects
@item pure

Calls to functions that have no observable effects on the state of
the program other than to return a value may lend themselves to optimizations
such as common subexpression elimination.  Declaring such functions with
the @code{pure} attribute allows GCC to avoid emitting some calls in repeated
invocations of the function with the same argument values.

The @code{pure} attribute prohibits a function from modifying the state
of the program that is observable by means other than inspecting
the function's return value.  However, functions declared with the @code{pure}
attribute can safely read any non-volatile objects, and modify the value of
objects in a way that does not affect their return value or the observable
state of the program.

For example,

@smallexample
int hash (char *) __attribute__ ((pure));
@end smallexample

@noindent
tells GCC that subsequent calls to the function @code{hash} with the same
string can be replaced by the result of the first call provided the state
of the program observable by @code{hash}, including the contents of the array
itself, does not change in between.  Even though @code{hash} takes a non-const
pointer argument it must not modify the array it points to, or any other object
whose value the rest of the program may depend on.  However, the caller may
safely change the contents of the array between successive calls to
the function (doing so disables the optimization).  The restriction also
applies to member objects referenced by the @code{this} pointer in C++
non-static member functions.

Some common examples of pure functions are @code{strlen} or @code{memcmp}.
Interesting non-pure functions are functions with infinite loops or those
depending on volatile memory or other system resource, that may change between
consecutive calls (such as the standard C @code{feof} function in
a multithreading environment).

The @code{pure} attribute imposes similar but looser restrictions on
a function's definition than the @code{const} attribute: @code{pure}
allows the function to read any non-volatile memory, even if it changes
in between successive invocations of the function.  Declaring the same
function with both the @code{pure} and the @code{const} attribute is
diagnosed.  Because a pure function cannot have any observable side
effects it does not make sense for such a function to return @code{void}.
Declaring such a function is diagnosed.

@cindex @code{retain} function attribute
@item retain
For ELF targets that support the GNU or FreeBSD OSABIs, this attribute
will save the function from linker garbage collection.  To support
this behavior, functions that have not been placed in specific sections
(e.g. by the @code{section} attribute, or the @code{-ffunction-sections}
option), will be placed in new, unique sections.

This additional functionality requires Binutils version 2.36 or later.

@cindex @code{returns_nonnull} function attribute
@item returns_nonnull
The @code{returns_nonnull} attribute specifies that the function
return value should be a non-null pointer.  For instance, the declaration:

@smallexample
extern void *
mymalloc (size_t len) __attribute__((returns_nonnull));
@end smallexample

@noindent
lets the compiler optimize callers based on the knowledge
that the return value will never be null.

@cindex @code{returns_twice} function attribute
@cindex functions that return more than once
@item returns_twice
The @code{returns_twice} attribute tells the compiler that a function may
return more than one time.  The compiler ensures that all registers
are dead before calling such a function and emits a warning about
the variables that may be clobbered after the second return from the
function.  Examples of such functions are @code{setjmp} and @code{vfork}.
The @code{longjmp}-like counterpart of such function, if any, might need
to be marked with the @code{noreturn} attribute.

@cindex @code{section} function attribute
@cindex functions in arbitrary sections
@item section ("@var{section-name}")
Normally, the compiler places the code it generates in the @code{text} section.
Sometimes, however, you need additional sections, or you need certain
particular functions to appear in special sections.  The @code{section}
attribute specifies that a function lives in a particular section.
For example, the declaration:

@smallexample
extern void foobar (void) __attribute__ ((section ("bar")));
@end smallexample

@noindent
puts the function @code{foobar} in the @code{bar} section.

Some file formats do not support arbitrary sections so the @code{section}
attribute is not available on all platforms.
If you need to map the entire contents of a module to a particular
section, consider using the facilities of the linker instead.

@cindex @code{sentinel} function attribute
@item sentinel
@itemx sentinel (@var{position})
This function attribute indicates that an argument in a call to the function
is expected to be an explicit @code{NULL}.  The attribute is only valid on
variadic functions.  By default, the sentinel is expected to be the last
argument of the function call.  If the optional @var{position} argument
is specified to the attribute, the sentinel must be located at
@var{position} counting backwards from the end of the argument list.

@smallexample
__attribute__ ((sentinel))
is equivalent to
__attribute__ ((sentinel(0)))
@end smallexample

The attribute is automatically set with a position of 0 for the built-in
functions @code{execl} and @code{execlp}.  The built-in function
@code{execle} has the attribute set with a position of 1.

A valid @code{NULL} in this context is defined as zero with any object
pointer type.  If your system defines the @code{NULL} macro with
an integer type then you need to add an explicit cast.  During
installation GCC replaces the system @code{<stddef.h>} header with
a copy that redefines NULL appropriately.

The warnings for missing or incorrect sentinels are enabled with
@option{-Wformat}.

@cindex @code{simd} function attribute
@item simd
@itemx simd("@var{mask}")
This attribute enables creation of one or more function versions that
can process multiple arguments using SIMD instructions from a
single invocation.  Specifying this attribute allows compiler to
assume that such versions are available at link time (provided
in the same or another translation unit).  Generated versions are
target-dependent and described in the corresponding Vector ABI document.  For
x86_64 target this document can be found
@w{@uref{https://sourceware.org/glibc/wiki/libmvec?action=AttachFile&do=view&target=VectorABI.txt,here}}.

The optional argument @var{mask} may have the value
@code{notinbranch} or @code{inbranch},
and instructs the compiler to generate non-masked or masked
clones correspondingly. By default, all clones are generated.

If the attribute is specified and @code{#pragma omp declare simd} is
present on a declaration and the @option{-fopenmp} or @option{-fopenmp-simd}
switch is specified, then the attribute is ignored.

@cindex @code{stack_protect} function attribute
@item stack_protect
This attribute adds stack protection code to the function if 
flags @option{-fstack-protector}, @option{-fstack-protector-strong}
or @option{-fstack-protector-explicit} are set.

@cindex @code{symver} function attribute
@item symver ("@var{name2}@@@var{nodename}")
On ELF targets this attribute creates a symbol version.  The @var{name2} part
of the parameter is the actual name of the symbol by which it will be
externally referenced.  The @code{nodename} portion should be the name of a
node specified in the version script supplied to the linker when building a
shared library.  Versioned symbol must be defined and must be exported with
default visibility.

@smallexample
__attribute__ ((__symver__ ("foo@@VERS_1"))) int
foo_v1 (void)
@{
@}
@end smallexample

Will produce a @code{.symver foo_v1, foo@@VERS_1} directive in the assembler
output. 

One can also define multiple version for a given symbol
(starting from binutils 2.35).

@smallexample
__attribute__ ((__symver__ ("foo@@VERS_2"), __symver__ ("foo@@VERS_3")))
int symver_foo_v1 (void)
@{
@}
@end smallexample

This example creates a symbol name @code{symver_foo_v1}
which will be version @code{VERS_2} and @code{VERS_3} of @code{foo}.

If you have an older release of binutils, then symbol alias needs to
be used:

@smallexample
__attribute__ ((__symver__ ("foo@@VERS_2")))
int foo_v1 (void)
@{
  return 0;
@}

__attribute__ ((__symver__ ("foo@@VERS_3")))
__attribute__ ((alias ("foo_v1")))
int symver_foo_v1 (void);
@end smallexample

Finally if the parameter is @code{"@var{name2}@@@@@var{nodename}"} then in
addition to creating a symbol version (as if
@code{"@var{name2}@@@var{nodename}"} was used) the version will be also used
to resolve @var{name2} by the linker.

@cindex @code{tainted_args} function attribute
@item tainted_args
The @code{tainted_args} attribute is used to specify that a function is called
in a way that requires sanitization of its arguments, such as a system
call in an operating system kernel.  Such a function can be considered part
of the ``attack surface'' of the program.  The attribute can be used both
on function declarations, and on field declarations containing function
pointers.  In the latter case, any function used as an initializer of
such a callback field will be treated as being called with tainted
arguments.

The analyzer will pay particular attention to such functions when
@option{-fanalyzer} is supplied, potentially issuing warnings guarded by
@option{-Wanalyzer-tainted-allocation-size},
@option{-Wanalyzer-tainted-array-index},
@option{-Wanalyzer-tainted-divisor},
@option{-Wanalyzer-tainted-offset},
and @option{-Wanalyzer-tainted-size}.

@cindex @code{target} function attribute
@item target (@var{string}, @dots{})
Multiple target back ends implement the @code{target} attribute
to specify that a function is to
be compiled with different target options than specified on the
command line.  The original target command-line options are ignored.
One or more strings can be provided as arguments.
Each string consists of one or more comma-separated suffixes to
the @code{-m} prefix jointly forming the name of a machine-dependent
option.  @xref{Submodel Options,,Machine-Dependent Options}.

The @code{target} attribute can be used for instance to have a function
compiled with a different ISA (instruction set architecture) than the
default.  @samp{#pragma GCC target} can be used to specify target-specific
options for more than one function.  @xref{Function Specific Option Pragmas},
for details about the pragma.

For instance, on an x86, you could declare one function with the
@code{target("sse4.1,arch=core2")} attribute and another with
@code{target("sse4a,arch=amdfam10")}.  This is equivalent to
compiling the first function with @option{-msse4.1} and
@option{-march=core2} options, and the second function with
@option{-msse4a} and @option{-march=amdfam10} options.  It is up to you
to make sure that a function is only invoked on a machine that
supports the particular ISA it is compiled for (for example by using
@code{cpuid} on x86 to determine what feature bits and architecture
family are used).

@smallexample
int core2_func (void) __attribute__ ((__target__ ("arch=core2")));
int sse3_func (void) __attribute__ ((__target__ ("sse3")));
@end smallexample

Providing multiple strings as arguments separated by commas to specify
multiple options is equivalent to separating the option suffixes with
a comma (@samp{,}) within a single string.  Spaces are not permitted
within the strings.

The options supported are specific to each target; refer to @ref{x86
Function Attributes}, @ref{PowerPC Function Attributes},
@ref{ARM Function Attributes}, @ref{AArch64 Function Attributes},
@ref{Nios II Function Attributes}, and @ref{S/390 Function Attributes}
for details.

@cindex @code{target_clones} function attribute
@item target_clones (@var{options})
The @code{target_clones} attribute is used to specify that a function
be cloned into multiple versions compiled with different target options
than specified on the command line.  The supported options and restrictions
are the same as for @code{target} attribute.

For instance, on an x86, you could compile a function with
@code{target_clones("sse4.1,avx")}.  GCC creates two function clones,
one compiled with @option{-msse4.1} and another with @option{-mavx}.

On a PowerPC, you can compile a function with
@code{target_clones("cpu=power9,default")}.  GCC will create two
function clones, one compiled with @option{-mcpu=power9} and another
with the default options.  GCC must be configured to use GLIBC 2.23 or
newer in order to use the @code{target_clones} attribute.

It also creates a resolver function (see
the @code{ifunc} attribute above) that dynamically selects a clone
suitable for current architecture.  The resolver is created only if there
is a usage of a function with @code{target_clones} attribute.

Note that any subsequent call of a function without @code{target_clone}
from a @code{target_clone} caller will not lead to copying
(target clone) of the called function.
If you want to enforce such behaviour,
we recommend declaring the calling function with the @code{flatten} attribute?

@cindex @code{unavailable} function attribute
@item unavailable
@itemx unavailable (@var{msg})
The @code{unavailable} attribute results in an error if the function
is used anywhere in the source file.  This is useful when identifying
functions that have been removed from a particular variation of an
interface.  Other than emitting an error rather than a warning, the
@code{unavailable} attribute behaves in the same manner as
@code{deprecated}.

The @code{unavailable} attribute can also be used for variables and
types (@pxref{Variable Attributes}, @pxref{Type Attributes}.)

@cindex @code{unused} function attribute
@item unused
This attribute, attached to a function, means that the function is meant
to be possibly unused.  GCC does not produce a warning for this
function.

@cindex @code{used} function attribute
@item used
This attribute, attached to a function, means that code must be emitted
for the function even if it appears that the function is not referenced.
This is useful, for example, when the function is referenced only in
inline assembly.

When applied to a member function of a C++ class template, the
attribute also means that the function is instantiated if the
class itself is instantiated.

@cindex @code{visibility} function attribute
@item visibility ("@var{visibility_type}")
This attribute affects the linkage of the declaration to which it is attached.
It can be applied to variables (@pxref{Common Variable Attributes}) and types
(@pxref{Common Type Attributes}) as well as functions.

There are four supported @var{visibility_type} values: default,
hidden, protected or internal visibility.

@smallexample
void __attribute__ ((visibility ("protected")))
f () @{ /* @r{Do something.} */; @}
int i __attribute__ ((visibility ("hidden")));
@end smallexample

The possible values of @var{visibility_type} correspond to the
visibility settings in the ELF gABI.

@table @code
@c keep this list of visibilities in alphabetical order.

@item default
Default visibility is the normal case for the object file format.
This value is available for the visibility attribute to override other
options that may change the assumed visibility of entities.

On ELF, default visibility means that the declaration is visible to other
modules and, in shared libraries, means that the declared entity may be
overridden.

On Darwin, default visibility means that the declaration is visible to
other modules.

Default visibility corresponds to ``external linkage'' in the language.

@item hidden
Hidden visibility indicates that the entity declared has a new
form of linkage, which we call ``hidden linkage''.  Two
declarations of an object with hidden linkage refer to the same object
if they are in the same shared object.

@item internal
Internal visibility is like hidden visibility, but with additional
processor specific semantics.  Unless otherwise specified by the
psABI, GCC defines internal visibility to mean that a function is
@emph{never} called from another module.  Compare this with hidden
functions which, while they cannot be referenced directly by other
modules, can be referenced indirectly via function pointers.  By
indicating that a function cannot be called from outside the module,
GCC may for instance omit the load of a PIC register since it is known
that the calling function loaded the correct value.

@item protected
Protected visibility is like default visibility except that it
indicates that references within the defining module bind to the
definition in that module.  That is, the declared entity cannot be
overridden by another module.

@end table

All visibilities are supported on many, but not all, ELF targets
(supported when the assembler supports the @samp{.visibility}
pseudo-op).  Default visibility is supported everywhere.  Hidden
visibility is supported on Darwin targets.

The visibility attribute should be applied only to declarations that
would otherwise have external linkage.  The attribute should be applied
consistently, so that the same entity should not be declared with
different settings of the attribute.

In C++, the visibility attribute applies to types as well as functions
and objects, because in C++ types have linkage.  A class must not have
greater visibility than its non-static data member types and bases,
and class members default to the visibility of their class.  Also, a
declaration without explicit visibility is limited to the visibility
of its type.

In C++, you can mark member functions and static member variables of a
class with the visibility attribute.  This is useful if you know a
particular method or static member variable should only be used from
one shared object; then you can mark it hidden while the rest of the
class has default visibility.  Care must be taken to avoid breaking
the One Definition Rule; for example, it is usually not useful to mark
an inline method as hidden without marking the whole class as hidden.

A C++ namespace declaration can also have the visibility attribute.

@smallexample
namespace nspace1 __attribute__ ((visibility ("protected")))
@{ /* @r{Do something.} */; @}
@end smallexample

This attribute applies only to the particular namespace body, not to
other definitions of the same namespace; it is equivalent to using
@samp{#pragma GCC visibility} before and after the namespace
definition (@pxref{Visibility Pragmas}).

In C++, if a template argument has limited visibility, this
restriction is implicitly propagated to the template instantiation.
Otherwise, template instantiations and specializations default to the
visibility of their template.

If both the template and enclosing class have explicit visibility, the
visibility from the template is used.

@cindex @code{warn_unused_result} function attribute
@item warn_unused_result
The @code{warn_unused_result} attribute causes a warning to be emitted
if a caller of the function with this attribute does not use its
return value.  This is useful for functions where not checking
the result is either a security problem or always a bug, such as
@code{realloc}.

@smallexample
int fn () __attribute__ ((warn_unused_result));
int foo ()
@{
  if (fn () < 0) return -1;
  fn ();
  return 0;
@}
@end smallexample

@noindent
results in warning on line 5.

@cindex @code{weak} function attribute
@item weak
The @code{weak} attribute causes a declaration of an external symbol
to be emitted as a weak symbol rather than a global.  This is primarily
useful in defining library functions that can be overridden in user code,
though it can also be used with non-function declarations.  The overriding
symbol must have the same type as the weak symbol.  In addition, if it
designates a variable it must also have the same size and alignment as
the weak symbol.  Weak symbols are supported for ELF targets, and also
for a.out targets when using the GNU assembler and linker.

@cindex @code{weakref} function attribute
@item weakref
@itemx weakref ("@var{target}")
The @code{weakref} attribute marks a declaration as a weak reference.
Without arguments, it should be accompanied by an @code{alias} attribute
naming the target symbol.  Alternatively, @var{target} may be given as
an argument to @code{weakref} itself, naming the target definition of
the alias.  The @var{target} must have the same type as the declaration.
In addition, if it designates a variable it must also have the same size
and alignment as the declaration.  In either form of the declaration
@code{weakref} implicitly marks the declared symbol as @code{weak}.  Without
a @var{target} given as an argument to @code{weakref} or to @code{alias},
@code{weakref} is equivalent to @code{weak} (in that case the declaration
may be @code{extern}).

@smallexample
/* Given the declaration: */
extern int y (void);

/* the following... */
static int x (void) __attribute__ ((weakref ("y")));

/* is equivalent to... */
static int x (void) __attribute__ ((weakref, alias ("y")));

/* or, alternatively, to... */
static int x (void) __attribute__ ((weakref));
static int x (void) __attribute__ ((alias ("y")));
@end smallexample

A weak reference is an alias that does not by itself require a
definition to be given for the target symbol.  If the target symbol is
only referenced through weak references, then it becomes a @code{weak}
undefined symbol.  If it is directly referenced, however, then such
strong references prevail, and a definition is required for the
symbol, not necessarily in the same translation unit.

The effect is equivalent to moving all references to the alias to a
separate translation unit, renaming the alias to the aliased symbol,
declaring it as weak, compiling the two separate translation units and
performing a link with relocatable output (i.e.@: @code{ld -r}) on them.

A declaration to which @code{weakref} is attached and that is associated
with a named @code{target} must be @code{static}.

@cindex @code{zero_call_used_regs} function attribute
@item zero_call_used_regs ("@var{choice}")

The @code{zero_call_used_regs} attribute causes the compiler to zero
a subset of all call-used registers@footnote{A ``call-used'' register
is a register whose contents can be changed by a function call;
therefore, a caller cannot assume that the register has the same contents
on return from the function as it had before calling the function.  Such
registers are also called ``call-clobbered'', ``caller-saved'', or
``volatile''.} at function return.
This is used to increase program security by either mitigating
Return-Oriented Programming (ROP) attacks or preventing information leakage
through registers.

In order to satisfy users with different security needs and control the
run-time overhead at the same time, the @var{choice} parameter provides a
flexible way to choose the subset of the call-used registers to be zeroed.
The four basic values of @var{choice} are:

@itemize @bullet
@item
@samp{skip} doesn't zero any call-used registers.

@item
@samp{used} only zeros call-used registers that are used in the function.
A ``used'' register is one whose content has been set or referenced in
the function.

@item
@samp{all} zeros all call-used registers.

@item
@samp{leafy} behaves like @samp{used} in a leaf function, and like
@samp{all} in a nonleaf function.  This makes for leaner zeroing in leaf
functions, where the set of used registers is known, and that may be
enough for some purposes of register zeroing.
@end itemize

In addition to these three basic choices, it is possible to modify
@samp{used}, @samp{all}, and @samp{leafy} as follows:

@itemize @bullet
@item
Adding @samp{-gpr} restricts the zeroing to general-purpose registers.

@item
Adding @samp{-arg} restricts the zeroing to registers that can sometimes
be used to pass function arguments.  This includes all argument registers
defined by the platform's calling conversion, regardless of whether the
function uses those registers for function arguments or not.
@end itemize

The modifiers can be used individually or together.  If they are used
together, they must appear in the order above.

The full list of @var{choice}s is therefore:

@table @code
@item skip
doesn't zero any call-used register.

@item used
only zeros call-used registers that are used in the function.

@item used-gpr
only zeros call-used general purpose registers that are used in the function.

@item used-arg
only zeros call-used registers that are used in the function and pass arguments.

@item used-gpr-arg
only zeros call-used general purpose registers that are used in the function
and pass arguments.

@item all
zeros all call-used registers.

@item all-gpr
zeros all call-used general purpose registers.

@item all-arg
zeros all call-used registers that pass arguments.

@item all-gpr-arg
zeros all call-used general purpose registers that pass
arguments.

@item leafy
Same as @samp{used} in a leaf function, and same as @samp{all} in a
nonleaf function.

@item leafy-gpr
Same as @samp{used-gpr} in a leaf function, and same as @samp{all-gpr}
in a nonleaf function.

@item leafy-arg
Same as @samp{used-arg} in a leaf function, and same as @samp{all-arg}
in a nonleaf function.

@item leafy-gpr-arg
Same as @samp{used-gpr-arg} in a leaf function, and same as
@samp{all-gpr-arg} in a nonleaf function.

@end table

Of this list, @samp{used-arg}, @samp{used-gpr-arg}, @samp{all-arg},
@samp{all-gpr-arg}, @samp{leafy-arg}, and @samp{leafy-gpr-arg} are
mainly used for ROP mitigation.

The default for the attribute is controlled by @option{-fzero-call-used-regs}.
@end table

@c This is the end of the target-independent attribute table

@node AArch64 Function Attributes
@subsection AArch64 Function Attributes

The following target-specific function attributes are available for the
AArch64 target.  For the most part, these options mirror the behavior of
similar command-line options (@pxref{AArch64 Options}), but on a
per-function basis.

@table @code
@cindex @code{general-regs-only} function attribute, AArch64
@item general-regs-only
Indicates that no floating-point or Advanced SIMD registers should be
used when generating code for this function.  If the function explicitly
uses floating-point code, then the compiler gives an error.  This is
the same behavior as that of the command-line option
@option{-mgeneral-regs-only}.

@cindex @code{fix-cortex-a53-835769} function attribute, AArch64
@item fix-cortex-a53-835769
Indicates that the workaround for the Cortex-A53 erratum 835769 should be
applied to this function.  To explicitly disable the workaround for this
function specify the negated form: @code{no-fix-cortex-a53-835769}.
This corresponds to the behavior of the command-line options
@option{-mfix-cortex-a53-835769} and @option{-mno-fix-cortex-a53-835769}.

@cindex @code{cmodel=} function attribute, AArch64
@item cmodel=
Indicates that code should be generated for a particular code model for
this function.  The behavior and permissible arguments are the same as
for the command-line option @option{-mcmodel=}.

@cindex @code{strict-align} function attribute, AArch64
@item strict-align
@itemx no-strict-align
@code{strict-align} indicates that the compiler should not assume that unaligned
memory references are handled by the system.  To allow the compiler to assume
that aligned memory references are handled by the system, the inverse attribute
@code{no-strict-align} can be specified.  The behavior is same as for the
command-line option @option{-mstrict-align} and @option{-mno-strict-align}.

@cindex @code{omit-leaf-frame-pointer} function attribute, AArch64
@item omit-leaf-frame-pointer
Indicates that the frame pointer should be omitted for a leaf function call.
To keep the frame pointer, the inverse attribute
@code{no-omit-leaf-frame-pointer} can be specified.  These attributes have
the same behavior as the command-line options @option{-momit-leaf-frame-pointer}
and @option{-mno-omit-leaf-frame-pointer}.

@cindex @code{tls-dialect=} function attribute, AArch64
@item tls-dialect=
Specifies the TLS dialect to use for this function.  The behavior and
permissible arguments are the same as for the command-line option
@option{-mtls-dialect=}.

@cindex @code{arch=} function attribute, AArch64
@item arch=
Specifies the architecture version and architectural extensions to use
for this function.  The behavior and permissible arguments are the same as
for the @option{-march=} command-line option.

@cindex @code{tune=} function attribute, AArch64
@item tune=
Specifies the core for which to tune the performance of this function.
The behavior and permissible arguments are the same as for the @option{-mtune=}
command-line option.

@cindex @code{cpu=} function attribute, AArch64
@item cpu=
Specifies the core for which to tune the performance of this function and also
whose architectural features to use.  The behavior and valid arguments are the
same as for the @option{-mcpu=} command-line option.

@cindex @code{sign-return-address} function attribute, AArch64
@item sign-return-address
Select the function scope on which return address signing will be applied.  The
behavior and permissible arguments are the same as for the command-line option
@option{-msign-return-address=}.  The default value is @code{none}.  This
attribute is deprecated.  The @code{branch-protection} attribute should
be used instead.

@cindex @code{branch-protection} function attribute, AArch64
@item branch-protection
Select the function scope on which branch protection will be applied.  The
behavior and permissible arguments are the same as for the command-line option
@option{-mbranch-protection=}.  The default value is @code{none}.

@cindex @code{outline-atomics} function attribute, AArch64
@item outline-atomics
Enable or disable calls to out-of-line helpers to implement atomic operations.
This corresponds to the behavior of the command-line options
@option{-moutline-atomics} and @option{-mno-outline-atomics}.

@end table

The above target attributes can be specified as follows:

@smallexample
__attribute__((target("@var{attr-string}")))
int
f (int a)
@{
  return a + 5;
@}
@end smallexample

where @code{@var{attr-string}} is one of the attribute strings specified above.

Additionally, the architectural extension string may be specified on its
own.  This can be used to turn on and off particular architectural extensions
without having to specify a particular architecture version or core.  Example:

@smallexample
__attribute__((target("+crc+nocrypto")))
int
foo (int a)
@{
  return a + 5;
@}
@end smallexample

In this example @code{target("+crc+nocrypto")} enables the @code{crc}
extension and disables the @code{crypto} extension for the function @code{foo}
without modifying an existing @option{-march=} or @option{-mcpu} option.

Multiple target function attributes can be specified by separating them with
a comma.  For example:
@smallexample
__attribute__((target("arch=armv8-a+crc+crypto,tune=cortex-a53")))
int
foo (int a)
@{
  return a + 5;
@}
@end smallexample

is valid and compiles function @code{foo} for ARMv8-A with @code{crc}
and @code{crypto} extensions and tunes it for @code{cortex-a53}.

@subsubsection Inlining rules
Specifying target attributes on individual functions or performing link-time
optimization across translation units compiled with different target options
can affect function inlining rules:

In particular, a caller function can inline a callee function only if the
architectural features available to the callee are a subset of the features
available to the caller.
For example: A function @code{foo} compiled with @option{-march=armv8-a+crc},
or tagged with the equivalent @code{arch=armv8-a+crc} attribute,
can inline a function @code{bar} compiled with @option{-march=armv8-a+nocrc}
because the all the architectural features that function @code{bar} requires
are available to function @code{foo}.  Conversely, function @code{bar} cannot
inline function @code{foo}.

Additionally inlining a function compiled with @option{-mstrict-align} into a
function compiled without @code{-mstrict-align} is not allowed.
However, inlining a function compiled without @option{-mstrict-align} into a
function compiled with @option{-mstrict-align} is allowed.

Note that CPU tuning options and attributes such as the @option{-mcpu=},
@option{-mtune=} do not inhibit inlining unless the CPU specified by the
@option{-mcpu=} option or the @code{cpu=} attribute conflicts with the
architectural feature rules specified above.

@node AMD GCN Function Attributes
@subsection AMD GCN Function Attributes

These function attributes are supported by the AMD GCN back end:

@table @code
@cindex @code{amdgpu_hsa_kernel} function attribute, AMD GCN
@item amdgpu_hsa_kernel
This attribute indicates that the corresponding function should be compiled as
a kernel function, that is an entry point that can be invoked from the host
via the HSA runtime library.  By default functions are only callable only from
other GCN functions.

This attribute is implicitly applied to any function named @code{main}, using
default parameters.

Kernel functions may return an integer value, which will be written to a
conventional place within the HSA "kernargs" region.

The attribute parameters configure what values are passed into the kernel
function by the GPU drivers, via the initial register state.  Some values are
used by the compiler, and therefore forced on.  Enabling other options may
break assumptions in the compiler and/or run-time libraries.

@table @code
@item private_segment_buffer
Set @code{enable_sgpr_private_segment_buffer} flag.  Always on (required to
locate the stack).

@item dispatch_ptr
Set @code{enable_sgpr_dispatch_ptr} flag.  Always on (required to locate the
launch dimensions).

@item queue_ptr
Set @code{enable_sgpr_queue_ptr} flag.  Always on (required to convert address
spaces).

@item kernarg_segment_ptr
Set @code{enable_sgpr_kernarg_segment_ptr} flag.  Always on (required to
locate the kernel arguments, "kernargs").

@item dispatch_id
Set @code{enable_sgpr_dispatch_id} flag.

@item flat_scratch_init
Set @code{enable_sgpr_flat_scratch_init} flag.

@item private_segment_size
Set @code{enable_sgpr_private_segment_size} flag.

@item grid_workgroup_count_X
Set @code{enable_sgpr_grid_workgroup_count_x} flag.  Always on (required to
use OpenACC/OpenMP).

@item grid_workgroup_count_Y
Set @code{enable_sgpr_grid_workgroup_count_y} flag.

@item grid_workgroup_count_Z
Set @code{enable_sgpr_grid_workgroup_count_z} flag.

@item workgroup_id_X
Set @code{enable_sgpr_workgroup_id_x} flag.

@item workgroup_id_Y
Set @code{enable_sgpr_workgroup_id_y} flag.

@item workgroup_id_Z
Set @code{enable_sgpr_workgroup_id_z} flag.

@item workgroup_info
Set @code{enable_sgpr_workgroup_info} flag.

@item private_segment_wave_offset
Set @code{enable_sgpr_private_segment_wave_byte_offset} flag.  Always on
(required to locate the stack).

@item work_item_id_X
Set @code{enable_vgpr_workitem_id} parameter.  Always on (can't be disabled).

@item work_item_id_Y
Set @code{enable_vgpr_workitem_id} parameter.  Always on (required to enable
vectorization.)

@item work_item_id_Z
Set @code{enable_vgpr_workitem_id} parameter.  Always on (required to use
OpenACC/OpenMP).

@end table
@end table

@node ARC Function Attributes
@subsection ARC Function Attributes

These function attributes are supported by the ARC back end:

@table @code
@cindex @code{interrupt} function attribute, ARC
@item interrupt
Use this attribute to indicate
that the specified function is an interrupt handler.  The compiler generates
function entry and exit sequences suitable for use in an interrupt handler
when this attribute is present.

On the ARC, you must specify the kind of interrupt to be handled
in a parameter to the interrupt attribute like this:

@smallexample
void f () __attribute__ ((interrupt ("ilink1")));
@end smallexample

Permissible values for this parameter are: @w{@code{ilink1}} and
@w{@code{ilink2}} for ARCv1 architecture, and @w{@code{ilink}} and
@w{@code{firq}} for ARCv2 architecture.

@cindex @code{long_call} function attribute, ARC
@cindex @code{medium_call} function attribute, ARC
@cindex @code{short_call} function attribute, ARC
@cindex indirect calls, ARC
@item long_call
@itemx medium_call
@itemx short_call
These attributes specify how a particular function is called.
These attributes override the
@option{-mlong-calls} and @option{-mmedium-calls} (@pxref{ARC Options})
command-line switches and @code{#pragma long_calls} settings.

For ARC, a function marked with the @code{long_call} attribute is
always called using register-indirect jump-and-link instructions,
thereby enabling the called function to be placed anywhere within the
32-bit address space.  A function marked with the @code{medium_call}
attribute will always be close enough to be called with an unconditional
branch-and-link instruction, which has a 25-bit offset from
the call site.  A function marked with the @code{short_call}
attribute will always be close enough to be called with a conditional
branch-and-link instruction, which has a 21-bit offset from
the call site.

@cindex @code{jli_always} function attribute, ARC
@item jli_always
Forces a particular function to be called using @code{jli}
instruction.  The @code{jli} instruction makes use of a table stored
into @code{.jlitab} section, which holds the location of the functions
which are addressed using this instruction.

@cindex @code{jli_fixed} function attribute, ARC
@item jli_fixed
Identical like the above one, but the location of the function in the
@code{jli} table is known and given as an attribute parameter.

@cindex @code{secure_call} function attribute, ARC
@item secure_call
This attribute allows one to mark secure-code functions that are
callable from normal mode.  The location of the secure call function
into the @code{sjli} table needs to be passed as argument.

@cindex @code{naked} function attribute, ARC
@item naked
This attribute allows the compiler to construct the requisite function
declaration, while allowing the body of the function to be assembly
code.  The specified function will not have prologue/epilogue
sequences generated by the compiler.  Only basic @code{asm} statements
can safely be included in naked functions (@pxref{Basic Asm}).  While
using extended @code{asm} or a mixture of basic @code{asm} and C code
may appear to work, they cannot be depended upon to work reliably and
are not supported.

@end table

@node ARM Function Attributes
@subsection ARM Function Attributes

These function attributes are supported for ARM targets:

@table @code

@cindex @code{general-regs-only} function attribute, ARM
@item general-regs-only
Indicates that no floating-point or Advanced SIMD registers should be
used when generating code for this function.  If the function explicitly
uses floating-point code, then the compiler gives an error.  This is
the same behavior as that of the command-line option
@option{-mgeneral-regs-only}.

@cindex @code{interrupt} function attribute, ARM
@item interrupt
Use this attribute to indicate
that the specified function is an interrupt handler.  The compiler generates
function entry and exit sequences suitable for use in an interrupt handler
when this attribute is present.

You can specify the kind of interrupt to be handled by
adding an optional parameter to the interrupt attribute like this:

@smallexample
void f () __attribute__ ((interrupt ("IRQ")));
@end smallexample

@noindent
Permissible values for this parameter are: @code{IRQ}, @code{FIQ},
@code{SWI}, @code{ABORT} and @code{UNDEF}.

On ARMv7-M the interrupt type is ignored, and the attribute means the function
may be called with a word-aligned stack pointer.

@cindex @code{isr} function attribute, ARM
@item isr
Use this attribute on ARM to write Interrupt Service Routines. This is an
alias to the @code{interrupt} attribute above.

@cindex @code{long_call} function attribute, ARM
@cindex @code{short_call} function attribute, ARM
@cindex indirect calls, ARM
@item long_call
@itemx short_call
These attributes specify how a particular function is called.
These attributes override the
@option{-mlong-calls} (@pxref{ARM Options})
command-line switch and @code{#pragma long_calls} settings.  For ARM, the
@code{long_call} attribute indicates that the function might be far
away from the call site and require a different (more expensive)
calling sequence.   The @code{short_call} attribute always places
the offset to the function from the call site into the @samp{BL}
instruction directly.

@cindex @code{naked} function attribute, ARM
@item naked
This attribute allows the compiler to construct the
requisite function declaration, while allowing the body of the
function to be assembly code. The specified function will not have
prologue/epilogue sequences generated by the compiler. Only basic
@code{asm} statements can safely be included in naked functions
(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
basic @code{asm} and C code may appear to work, they cannot be
depended upon to work reliably and are not supported.

@cindex @code{pcs} function attribute, ARM
@item pcs

The @code{pcs} attribute can be used to control the calling convention
used for a function on ARM.  The attribute takes an argument that specifies
the calling convention to use.

When compiling using the AAPCS ABI (or a variant of it) then valid
values for the argument are @code{"aapcs"} and @code{"aapcs-vfp"}.  In
order to use a variant other than @code{"aapcs"} then the compiler must
be permitted to use the appropriate co-processor registers (i.e., the
VFP registers must be available in order to use @code{"aapcs-vfp"}).
For example,

@smallexample
/* Argument passed in r0, and result returned in r0+r1.  */
double f2d (float) __attribute__((pcs("aapcs")));
@end smallexample

Variadic functions always use the @code{"aapcs"} calling convention and
the compiler rejects attempts to specify an alternative.

@cindex @code{target} function attribute
@item target (@var{options})
As discussed in @ref{Common Function Attributes}, this attribute 
allows specification of target-specific compilation options.

On ARM, the following options are allowed:

@table @samp
@cindex @code{target("thumb")} function attribute, ARM
@item thumb
Force code generation in the Thumb (T16/T32) ISA, depending on the
architecture level.

@cindex @code{target("arm")} function attribute, ARM
@item arm
Force code generation in the ARM (A32) ISA.

Functions from different modes can be inlined in the caller's mode.

@cindex @code{target("fpu=")} function attribute, ARM
@item fpu=
Specifies the fpu for which to tune the performance of this function.
The behavior and permissible arguments are the same as for the @option{-mfpu=}
command-line option.

@cindex @code{arch=} function attribute, ARM
@item arch=
Specifies the architecture version and architectural extensions to use
for this function.  The behavior and permissible arguments are the same as
for the @option{-march=} command-line option.

The above target attributes can be specified as follows:

@smallexample
__attribute__((target("arch=armv8-a+crc")))
int
f (int a)
@{
  return a + 5;
@}
@end smallexample

Additionally, the architectural extension string may be specified on its
own.  This can be used to turn on and off particular architectural extensions
without having to specify a particular architecture version or core.  Example:

@smallexample
__attribute__((target("+crc+nocrypto")))
int
foo (int a)
@{
  return a + 5;
@}
@end smallexample

In this example @code{target("+crc+nocrypto")} enables the @code{crc}
extension and disables the @code{crypto} extension for the function @code{foo}
without modifying an existing @option{-march=} or @option{-mcpu} option.

@end table

@end table

@node AVR Function Attributes
@subsection AVR Function Attributes

These function attributes are supported by the AVR back end:

@table @code
@cindex @code{signal} function attribute, AVR
@cindex @code{interrupt} function attribute, AVR
@item signal
@itemx interrupt
The function is an interrupt service routine (ISR).  The compiler generates
function entry and exit sequences suitable for use in an interrupt handler
when one of the attributes is present.

The AVR hardware globally disables interrupts when an interrupt is executed.

@itemize @bullet
@item ISRs with the @code{signal} attribute do not re-enable interrupts.
It is save to enable interrupts in a @code{signal} handler.
This ``save'' only applies to the code
generated by the compiler and not to the IRQ layout of the
application which is responsibility of the application.

@item ISRs with the @code{interrupt} attribute re-enable interrupts.
The first instruction of the routine is a @code{SEI} instruction to
globally enable interrupts.
@end itemize

The recommended way to use these attributes is by means of the
@code{ISR} macro provided by @code{avr/interrupt.h} from
@w{@uref{https://www.nongnu.org/avr-libc/user-manual/group__avr__interrupts.html,,AVR-LibC}}:
@example
#include <avr/interrupt.h>

ISR (INT0_vect) // Uses the "signal" attribute.
@{
    // Code
@}

ISR (ADC_vect, ISR_NOBLOCK) // Uses the "interrupt" attribute.
@{
    // Code
@}
@end example

When both @code{signal} and @code{interrupt} are specified for the same
function, then @code{signal} is silently ignored.

@cindex @code{naked} function attribute, AVR
@item naked
This attribute allows the compiler to construct the
requisite function declaration, while allowing the body of the
function to be assembly code. The specified function will not have
prologue/epilogue sequences generated by the compiler. Only basic
@code{asm} statements can safely be included in naked functions
(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
basic @code{asm} and C code may appear to work, they cannot be
depended upon to work reliably and are not supported.

@cindex @code{no_gccisr} function attribute, AVR
@item no_gccisr
Do not use the @code{__gcc_isr}
@uref{https://sourceware.org/binutils/docs/as/AVR-Pseudo-Instructions.html,pseudo instruction}
in a function with
the @code{interrupt} or @code{signal} attribute aka. interrupt
service routine (ISR).
Use this attribute if the preamble of the ISR prologue should always read
@example
push  __zero_reg__
push  __tmp_reg__
in    __tmp_reg__, __SREG__
push  __tmp_reg__
clr   __zero_reg__
@end example
and accordingly for the postamble of the epilogue --- no matter whether
the mentioned registers are actually used in the ISR or not.
Situations where you might want to use this attribute include:
@itemize @bullet
@item
Code that (effectively) clobbers bits of @code{SREG} other than the
@code{I}-flag by writing to the memory location of @code{SREG}.
@item
Code that uses inline assembler to jump to a different function which
expects (parts of) the prologue code as outlined above to be present.
@end itemize
To disable @code{__gcc_isr} generation for the whole compilation unit,
there is option @option{-mno-gas-isr-prologues}, @pxref{AVR Options}.

@cindex @code{OS_main} function attribute, AVR
@cindex @code{OS_task} function attribute, AVR
@item OS_main
@itemx OS_task
On AVR, functions with the @code{OS_main} or @code{OS_task} attribute
do not save/restore any call-saved register in their prologue/epilogue.

The @code{OS_main} attribute can be used when there @emph{is
guarantee} that interrupts are disabled at the time when the function
is entered.  This saves resources when the stack pointer has to be
changed to set up a frame for local variables.

The @code{OS_task} attribute can be used when there is @emph{no
guarantee} that interrupts are disabled at that time when the function
is entered like for, e@.g@. task functions in a multi-threading operating
system. In that case, changing the stack pointer register is
guarded by save/clear/restore of the global interrupt enable flag.

The differences to the @code{naked} function attribute are:
@itemize @bullet
@item @code{naked} functions do not have a return instruction whereas 
@code{OS_main} and @code{OS_task} functions have a @code{RET} or
@code{RETI} return instruction.
@item @code{naked} functions do not set up a frame for local variables
or a frame pointer whereas @code{OS_main} and @code{OS_task} do this
as needed.
@end itemize

@end table

@node Blackfin Function Attributes
@subsection Blackfin Function Attributes

These function attributes are supported by the Blackfin back end:

@table @code

@cindex @code{exception_handler} function attribute
@cindex exception handler functions, Blackfin
@item exception_handler
Use this attribute on the Blackfin to indicate that the specified function
is an exception handler.  The compiler generates function entry and
exit sequences suitable for use in an exception handler when this
attribute is present.

@cindex @code{interrupt_handler} function attribute, Blackfin
@item interrupt_handler
Use this attribute to
indicate that the specified function is an interrupt handler.  The compiler
generates function entry and exit sequences suitable for use in an
interrupt handler when this attribute is present.

@cindex @code{kspisusp} function attribute, Blackfin
@cindex User stack pointer in interrupts on the Blackfin
@item kspisusp
When used together with @code{interrupt_handler}, @code{exception_handler}
or @code{nmi_handler}, code is generated to load the stack pointer
from the USP register in the function prologue.

@cindex @code{l1_text} function attribute, Blackfin
@item l1_text
This attribute specifies a function to be placed into L1 Instruction
SRAM@. The function is put into a specific section named @code{.l1.text}.
With @option{-mfdpic}, function calls with a such function as the callee
or caller uses inlined PLT.

@cindex @code{l2} function attribute, Blackfin
@item l2
This attribute specifies a function to be placed into L2
SRAM. The function is put into a specific section named
@code{.l2.text}. With @option{-mfdpic}, callers of such functions use
an inlined PLT.

@cindex indirect calls, Blackfin
@cindex @code{longcall} function attribute, Blackfin
@cindex @code{shortcall} function attribute, Blackfin
@item longcall
@itemx shortcall
The @code{longcall} attribute
indicates that the function might be far away from the call site and
require a different (more expensive) calling sequence.  The
@code{shortcall} attribute indicates that the function is always close
enough for the shorter calling sequence to be used.  These attributes
override the @option{-mlongcall} switch.

@cindex @code{nesting} function attribute, Blackfin
@cindex Allow nesting in an interrupt handler on the Blackfin processor
@item nesting
Use this attribute together with @code{interrupt_handler},
@code{exception_handler} or @code{nmi_handler} to indicate that the function
entry code should enable nested interrupts or exceptions.

@cindex @code{nmi_handler} function attribute, Blackfin
@cindex NMI handler functions on the Blackfin processor
@item nmi_handler
Use this attribute on the Blackfin to indicate that the specified function
is an NMI handler.  The compiler generates function entry and
exit sequences suitable for use in an NMI handler when this
attribute is present.

@cindex @code{saveall} function attribute, Blackfin
@cindex save all registers on the Blackfin
@item saveall
Use this attribute to indicate that
all registers except the stack pointer should be saved in the prologue
regardless of whether they are used or not.
@end table

@node BPF Function Attributes
@subsection BPF Function Attributes

These function attributes are supported by the BPF back end:

@table @code
@cindex @code{kernel helper}, function attribute, BPF
@item kernel_helper
use this attribute to indicate the specified function declaration is a
kernel helper.  The helper function is passed as an argument to the
attribute.  Example:

@smallexample
int bpf_probe_read (void *dst, int size, const void *unsafe_ptr)
  __attribute__ ((kernel_helper (4)));
@end smallexample

@cindex @code{naked} function attribute, BPF
@item naked
This attribute allows the compiler to construct the requisite function
declaration, while allowing the body of the function to be assembly
code.  The specified function will not have prologue/epilogue
sequences generated by the compiler.  Only basic @code{asm} statements
can safely be included in naked functions (@pxref{Basic Asm}).  While
using extended @code{asm} or a mixture of basic @code{asm} and C code
may appear to work, they cannot be depended upon to work reliably and
are not supported.
@end table

@node C-SKY Function Attributes
@subsection C-SKY Function Attributes

These function attributes are supported by the C-SKY back end:

@table @code
@cindex @code{interrupt} function attribute, C-SKY
@cindex @code{isr} function attribute, C-SKY
@item interrupt
@itemx isr
Use these attributes to indicate that the specified function
is an interrupt handler.
The compiler generates function entry and exit sequences suitable for
use in an interrupt handler when either of these attributes are present.

Use of these options requires the @option{-mistack} command-line option
to enable support for the necessary interrupt stack instructions.  They
are ignored with a warning otherwise.  @xref{C-SKY Options}.

@cindex @code{naked} function attribute, C-SKY
@item naked
This attribute allows the compiler to construct the
requisite function declaration, while allowing the body of the
function to be assembly code. The specified function will not have
prologue/epilogue sequences generated by the compiler. Only basic
@code{asm} statements can safely be included in naked functions
(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
basic @code{asm} and C code may appear to work, they cannot be
depended upon to work reliably and are not supported.
@end table


@node Epiphany Function Attributes
@subsection Epiphany Function Attributes

These function attributes are supported by the Epiphany back end:

@table @code
@cindex @code{disinterrupt} function attribute, Epiphany
@item disinterrupt
This attribute causes the compiler to emit
instructions to disable interrupts for the duration of the given
function.

@cindex @code{forwarder_section} function attribute, Epiphany
@item forwarder_section
This attribute modifies the behavior of an interrupt handler.
The interrupt handler may be in external memory which cannot be
reached by a branch instruction, so generate a local memory trampoline
to transfer control.  The single parameter identifies the section where
the trampoline is placed.

@cindex @code{interrupt} function attribute, Epiphany
@item interrupt
Use this attribute to indicate
that the specified function is an interrupt handler.  The compiler generates
function entry and exit sequences suitable for use in an interrupt handler
when this attribute is present.  It may also generate
a special section with code to initialize the interrupt vector table.

On Epiphany targets one or more optional parameters can be added like this:

@smallexample
void __attribute__ ((interrupt ("dma0, dma1"))) universal_dma_handler ();
@end smallexample

Permissible values for these parameters are: @w{@code{reset}},
@w{@code{software_exception}}, @w{@code{page_miss}},
@w{@code{timer0}}, @w{@code{timer1}}, @w{@code{message}},
@w{@code{dma0}}, @w{@code{dma1}}, @w{@code{wand}} and @w{@code{swi}}.
Multiple parameters indicate that multiple entries in the interrupt
vector table should be initialized for this function, i.e.@: for each
parameter @w{@var{name}}, a jump to the function is emitted in
the section @w{ivt_entry_@var{name}}.  The parameter(s) may be omitted
entirely, in which case no interrupt vector table entry is provided.

Note that interrupts are enabled inside the function
unless the @code{disinterrupt} attribute is also specified.

The following examples are all valid uses of these attributes on
Epiphany targets:
@smallexample
void __attribute__ ((interrupt)) universal_handler ();
void __attribute__ ((interrupt ("dma1"))) dma1_handler ();
void __attribute__ ((interrupt ("dma0, dma1"))) 
  universal_dma_handler ();
void __attribute__ ((interrupt ("timer0"), disinterrupt))
  fast_timer_handler ();
void __attribute__ ((interrupt ("dma0, dma1"), 
                     forwarder_section ("tramp")))
  external_dma_handler ();
@end smallexample

@cindex @code{long_call} function attribute, Epiphany
@cindex @code{short_call} function attribute, Epiphany
@cindex indirect calls, Epiphany
@item long_call
@itemx short_call
These attributes specify how a particular function is called.
These attributes override the
@option{-mlong-calls} (@pxref{Adapteva Epiphany Options})
command-line switch and @code{#pragma long_calls} settings.
@end table


@node H8/300 Function Attributes
@subsection H8/300 Function Attributes

These function attributes are available for H8/300 targets:

@table @code
@cindex @code{function_vector} function attribute, H8/300
@item function_vector
Use this attribute on the H8/300, H8/300H, and H8S to indicate 
that the specified function should be called through the function vector.
Calling a function through the function vector reduces code size; however,
the function vector has a limited size (maximum 128 entries on the H8/300
and 64 entries on the H8/300H and H8S)
and shares space with the interrupt vector.

@cindex @code{interrupt_handler} function attribute, H8/300
@item interrupt_handler
Use this attribute on the H8/300, H8/300H, and H8S to
indicate that the specified function is an interrupt handler.  The compiler
generates function entry and exit sequences suitable for use in an
interrupt handler when this attribute is present.

@cindex @code{saveall} function attribute, H8/300
@cindex save all registers on the H8/300, H8/300H, and H8S
@item saveall
Use this attribute on the H8/300, H8/300H, and H8S to indicate that
all registers except the stack pointer should be saved in the prologue
regardless of whether they are used or not.
@end table

@node IA-64 Function Attributes
@subsection IA-64 Function Attributes

These function attributes are supported on IA-64 targets:

@table @code
@cindex @code{syscall_linkage} function attribute, IA-64
@item syscall_linkage
This attribute is used to modify the IA-64 calling convention by marking
all input registers as live at all function exits.  This makes it possible
to restart a system call after an interrupt without having to save/restore
the input registers.  This also prevents kernel data from leaking into
application code.

@cindex @code{version_id} function attribute, IA-64
@item version_id
This IA-64 HP-UX attribute, attached to a global variable or function, renames a
symbol to contain a version string, thus allowing for function level
versioning.  HP-UX system header files may use function level versioning
for some system calls.

@smallexample
extern int foo () __attribute__((version_id ("20040821")));
@end smallexample

@noindent
Calls to @code{foo} are mapped to calls to @code{foo@{20040821@}}.
@end table

@node M32C Function Attributes
@subsection M32C Function Attributes

These function attributes are supported by the M32C back end:

@table @code
@cindex @code{bank_switch} function attribute, M32C
@item bank_switch
When added to an interrupt handler with the M32C port, causes the
prologue and epilogue to use bank switching to preserve the registers
rather than saving them on the stack.

@cindex @code{fast_interrupt} function attribute, M32C
@item fast_interrupt
Use this attribute on the M32C port to indicate that the specified
function is a fast interrupt handler.  This is just like the
@code{interrupt} attribute, except that @code{freit} is used to return
instead of @code{reit}.

@cindex @code{function_vector} function attribute, M16C/M32C
@item function_vector
On M16C/M32C targets, the @code{function_vector} attribute declares a
special page subroutine call function. Use of this attribute reduces
the code size by 2 bytes for each call generated to the
subroutine. The argument to the attribute is the vector number entry
from the special page vector table which contains the 16 low-order
bits of the subroutine's entry address. Each vector table has special
page number (18 to 255) that is used in @code{jsrs} instructions.
Jump addresses of the routines are generated by adding 0x0F0000 (in
case of M16C targets) or 0xFF0000 (in case of M32C targets), to the
2-byte addresses set in the vector table. Therefore you need to ensure
that all the special page vector routines should get mapped within the
address range 0x0F0000 to 0x0FFFFF (for M16C) and 0xFF0000 to 0xFFFFFF
(for M32C).

In the following example 2 bytes are saved for each call to
function @code{foo}.

@smallexample
void foo (void) __attribute__((function_vector(0x18)));
void foo (void)
@{
@}

void bar (void)
@{
    foo();
@}
@end smallexample

If functions are defined in one file and are called in another file,
then be sure to write this declaration in both files.

This attribute is ignored for R8C target.

@cindex @code{interrupt} function attribute, M32C
@item interrupt
Use this attribute to indicate
that the specified function is an interrupt handler.  The compiler generates
function entry and exit sequences suitable for use in an interrupt handler
when this attribute is present.
@end table

@node M32R/D Function Attributes
@subsection M32R/D Function Attributes

These function attributes are supported by the M32R/D back end:

@table @code
@cindex @code{interrupt} function attribute, M32R/D
@item interrupt
Use this attribute to indicate
that the specified function is an interrupt handler.  The compiler generates
function entry and exit sequences suitable for use in an interrupt handler
when this attribute is present.

@cindex @code{model} function attribute, M32R/D
@cindex function addressability on the M32R/D
@item model (@var{model-name})

On the M32R/D, use this attribute to set the addressability of an
object, and of the code generated for a function.  The identifier
@var{model-name} is one of @code{small}, @code{medium}, or
@code{large}, representing each of the code models.

Small model objects live in the lower 16MB of memory (so that their
addresses can be loaded with the @code{ld24} instruction), and are
callable with the @code{bl} instruction.

Medium model objects may live anywhere in the 32-bit address space (the
compiler generates @code{seth/add3} instructions to load their addresses),
and are callable with the @code{bl} instruction.

Large model objects may live anywhere in the 32-bit address space (the
compiler generates @code{seth/add3} instructions to load their addresses),
and may not be reachable with the @code{bl} instruction (the compiler
generates the much slower @code{seth/add3/jl} instruction sequence).
@end table

@node m68k Function Attributes
@subsection m68k Function Attributes

These function attributes are supported by the m68k back end:

@table @code
@cindex @code{interrupt} function attribute, m68k
@cindex @code{interrupt_handler} function attribute, m68k
@item interrupt
@itemx interrupt_handler
Use this attribute to
indicate that the specified function is an interrupt handler.  The compiler
generates function entry and exit sequences suitable for use in an
interrupt handler when this attribute is present.  Either name may be used.

@cindex @code{interrupt_thread} function attribute, fido
@item interrupt_thread
Use this attribute on fido, a subarchitecture of the m68k, to indicate
that the specified function is an interrupt handler that is designed
to run as a thread.  The compiler omits generate prologue/epilogue
sequences and replaces the return instruction with a @code{sleep}
instruction.  This attribute is available only on fido.
@end table

@node MCORE Function Attributes
@subsection MCORE Function Attributes

These function attributes are supported by the MCORE back end:

@table @code
@cindex @code{naked} function attribute, MCORE
@item naked
This attribute allows the compiler to construct the
requisite function declaration, while allowing the body of the
function to be assembly code. The specified function will not have
prologue/epilogue sequences generated by the compiler. Only basic
@code{asm} statements can safely be included in naked functions
(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
basic @code{asm} and C code may appear to work, they cannot be
depended upon to work reliably and are not supported.
@end table

@node MicroBlaze Function Attributes
@subsection MicroBlaze Function Attributes

These function attributes are supported on MicroBlaze targets:

@table @code
@cindex @code{save_volatiles} function attribute, MicroBlaze
@item save_volatiles
Use this attribute to indicate that the function is
an interrupt handler.  All volatile registers (in addition to non-volatile
registers) are saved in the function prologue.  If the function is a leaf
function, only volatiles used by the function are saved.  A normal function
return is generated instead of a return from interrupt.

@cindex @code{break_handler} function attribute, MicroBlaze
@cindex break handler functions
@item break_handler
Use this attribute to indicate that
the specified function is a break handler.  The compiler generates function
entry and exit sequences suitable for use in an break handler when this
attribute is present. The return from @code{break_handler} is done through
the @code{rtbd} instead of @code{rtsd}.

@smallexample
void f () __attribute__ ((break_handler));
@end smallexample

@cindex @code{interrupt_handler} function attribute, MicroBlaze
@cindex @code{fast_interrupt} function attribute, MicroBlaze
@item interrupt_handler
@itemx fast_interrupt
These attributes indicate that the specified function is an interrupt
handler.  Use the @code{fast_interrupt} attribute to indicate handlers
used in low-latency interrupt mode, and @code{interrupt_handler} for
interrupts that do not use low-latency handlers.  In both cases, GCC
emits appropriate prologue code and generates a return from the handler
using @code{rtid} instead of @code{rtsd}.
@end table

@node Microsoft Windows Function Attributes
@subsection Microsoft Windows Function Attributes

The following attributes are available on Microsoft Windows and Symbian OS
targets.

@table @code
@cindex @code{dllexport} function attribute
@cindex @code{__declspec(dllexport)}
@item dllexport
On Microsoft Windows targets and Symbian OS targets the
@code{dllexport} attribute causes the compiler to provide a global
pointer to a pointer in a DLL, so that it can be referenced with the
@code{dllimport} attribute.  On Microsoft Windows targets, the pointer
name is formed by combining @code{_imp__} and the function or variable
name.

You can use @code{__declspec(dllexport)} as a synonym for
@code{__attribute__ ((dllexport))} for compatibility with other
compilers.

On systems that support the @code{visibility} attribute, this
attribute also implies ``default'' visibility.  It is an error to
explicitly specify any other visibility.

GCC's default behavior is to emit all inline functions with the
@code{dllexport} attribute.  Since this can cause object file-size bloat,
you can use @option{-fno-keep-inline-dllexport}, which tells GCC to
ignore the attribute for inlined functions unless the 
@option{-fkeep-inline-functions} flag is used instead.

The attribute is ignored for undefined symbols.

When applied to C++ classes, the attribute marks defined non-inlined
member functions and static data members as exports.  Static consts
initialized in-class are not marked unless they are also defined
out-of-class.

For Microsoft Windows targets there are alternative methods for
including the symbol in the DLL's export table such as using a
@file{.def} file with an @code{EXPORTS} section or, with GNU ld, using
the @option{--export-all} linker flag.

@cindex @code{dllimport} function attribute
@cindex @code{__declspec(dllimport)}
@item dllimport
On Microsoft Windows and Symbian OS targets, the @code{dllimport}
attribute causes the compiler to reference a function or variable via
a global pointer to a pointer that is set up by the DLL exporting the
symbol.  The attribute implies @code{extern}.  On Microsoft Windows
targets, the pointer name is formed by combining @code{_imp__} and the
function or variable name.

You can use @code{__declspec(dllimport)} as a synonym for
@code{__attribute__ ((dllimport))} for compatibility with other
compilers.

On systems that support the @code{visibility} attribute, this
attribute also implies ``default'' visibility.  It is an error to
explicitly specify any other visibility.

Currently, the attribute is ignored for inlined functions.  If the
attribute is applied to a symbol @emph{definition}, an error is reported.
If a symbol previously declared @code{dllimport} is later defined, the
attribute is ignored in subsequent references, and a warning is emitted.
The attribute is also overridden by a subsequent declaration as
@code{dllexport}.

When applied to C++ classes, the attribute marks non-inlined
member functions and static data members as imports.  However, the
attribute is ignored for virtual methods to allow creation of vtables
using thunks.

On the SH Symbian OS target the @code{dllimport} attribute also has
another affect---it can cause the vtable and run-time type information
for a class to be exported.  This happens when the class has a
dllimported constructor or a non-inline, non-pure virtual function
and, for either of those two conditions, the class also has an inline
constructor or destructor and has a key function that is defined in
the current translation unit.

For Microsoft Windows targets the use of the @code{dllimport}
attribute on functions is not necessary, but provides a small
performance benefit by eliminating a thunk in the DLL@.  The use of the
@code{dllimport} attribute on imported variables can be avoided by passing the
@option{--enable-auto-import} switch to the GNU linker.  As with
functions, using the attribute for a variable eliminates a thunk in
the DLL@.

One drawback to using this attribute is that a pointer to a
@emph{variable} marked as @code{dllimport} cannot be used as a constant
address. However, a pointer to a @emph{function} with the
@code{dllimport} attribute can be used as a constant initializer; in
this case, the address of a stub function in the import lib is
referenced.  On Microsoft Windows targets, the attribute can be disabled
for functions by setting the @option{-mnop-fun-dllimport} flag.
@end table

@node MIPS Function Attributes
@subsection MIPS Function Attributes

These function attributes are supported by the MIPS back end:

@table @code
@cindex @code{interrupt} function attribute, MIPS
@item interrupt
Use this attribute to indicate that the specified function is an interrupt
handler.  The compiler generates function entry and exit sequences suitable
for use in an interrupt handler when this attribute is present.
An optional argument is supported for the interrupt attribute which allows
the interrupt mode to be described.  By default GCC assumes the external
interrupt controller (EIC) mode is in use, this can be explicitly set using
@code{eic}.  When interrupts are non-masked then the requested Interrupt
Priority Level (IPL) is copied to the current IPL which has the effect of only
enabling higher priority interrupts.  To use vectored interrupt mode use
the argument @code{vector=[sw0|sw1|hw0|hw1|hw2|hw3|hw4|hw5]}, this will change
the behavior of the non-masked interrupt support and GCC will arrange to mask
all interrupts from sw0 up to and including the specified interrupt vector.

You can use the following attributes to modify the behavior
of an interrupt handler:
@table @code
@cindex @code{use_shadow_register_set} function attribute, MIPS
@item use_shadow_register_set
Assume that the handler uses a shadow register set, instead of
the main general-purpose registers.  An optional argument @code{intstack} is
supported to indicate that the shadow register set contains a valid stack
pointer.

@cindex @code{keep_interrupts_masked} function attribute, MIPS
@item keep_interrupts_masked
Keep interrupts masked for the whole function.  Without this attribute,
GCC tries to reenable interrupts for as much of the function as it can.

@cindex @code{use_debug_exception_return} function attribute, MIPS
@item use_debug_exception_return
Return using the @code{deret} instruction.  Interrupt handlers that don't
have this attribute return using @code{eret} instead.
@end table

You can use any combination of these attributes, as shown below:
@smallexample
void __attribute__ ((interrupt)) v0 ();
void __attribute__ ((interrupt, use_shadow_register_set)) v1 ();
void __attribute__ ((interrupt, keep_interrupts_masked)) v2 ();
void __attribute__ ((interrupt, use_debug_exception_return)) v3 ();
void __attribute__ ((interrupt, use_shadow_register_set,
                     keep_interrupts_masked)) v4 ();
void __attribute__ ((interrupt, use_shadow_register_set,
                     use_debug_exception_return)) v5 ();
void __attribute__ ((interrupt, keep_interrupts_masked,
                     use_debug_exception_return)) v6 ();
void __attribute__ ((interrupt, use_shadow_register_set,
                     keep_interrupts_masked,
                     use_debug_exception_return)) v7 ();
void __attribute__ ((interrupt("eic"))) v8 ();
void __attribute__ ((interrupt("vector=hw3"))) v9 ();
@end smallexample

@cindex indirect calls, MIPS
@cindex @code{long_call} function attribute, MIPS
@cindex @code{short_call} function attribute, MIPS
@cindex @code{near} function attribute, MIPS
@cindex @code{far} function attribute, MIPS
@item long_call
@itemx short_call
@itemx near
@itemx far
These attributes specify how a particular function is called on MIPS@.
The attributes override the @option{-mlong-calls} (@pxref{MIPS Options})
command-line switch.  The @code{long_call} and @code{far} attributes are
synonyms, and cause the compiler to always call
the function by first loading its address into a register, and then using
the contents of that register.  The @code{short_call} and @code{near}
attributes are synonyms, and have the opposite
effect; they specify that non-PIC calls should be made using the more
efficient @code{jal} instruction.

@cindex @code{mips16} function attribute, MIPS
@cindex @code{nomips16} function attribute, MIPS
@item mips16
@itemx nomips16

On MIPS targets, you can use the @code{mips16} and @code{nomips16}
function attributes to locally select or turn off MIPS16 code generation.
A function with the @code{mips16} attribute is emitted as MIPS16 code,
while MIPS16 code generation is disabled for functions with the
@code{nomips16} attribute.  These attributes override the
@option{-mips16} and @option{-mno-mips16} options on the command line
(@pxref{MIPS Options}).

When compiling files containing mixed MIPS16 and non-MIPS16 code, the
preprocessor symbol @code{__mips16} reflects the setting on the command line,
not that within individual functions.  Mixed MIPS16 and non-MIPS16 code
may interact badly with some GCC extensions such as @code{__builtin_apply}
(@pxref{Constructing Calls}).

@cindex @code{micromips} function attribute
@cindex @code{nomicromips} function attribute
@item micromips, MIPS
@itemx nomicromips, MIPS

On MIPS targets, you can use the @code{micromips} and @code{nomicromips}
function attributes to locally select or turn off microMIPS code generation.
A function with the @code{micromips} attribute is emitted as microMIPS code,
while microMIPS code generation is disabled for functions with the
@code{nomicromips} attribute.  These attributes override the
@option{-mmicromips} and @option{-mno-micromips} options on the command line
(@pxref{MIPS Options}).

When compiling files containing mixed microMIPS and non-microMIPS code, the
preprocessor symbol @code{__mips_micromips} reflects the setting on the
command line,
not that within individual functions.  Mixed microMIPS and non-microMIPS code
may interact badly with some GCC extensions such as @code{__builtin_apply}
(@pxref{Constructing Calls}).

@cindex @code{nocompression} function attribute, MIPS
@item nocompression
On MIPS targets, you can use the @code{nocompression} function attribute
to locally turn off MIPS16 and microMIPS code generation.  This attribute
overrides the @option{-mips16} and @option{-mmicromips} options on the
command line (@pxref{MIPS Options}).

@cindex @code{use_hazard_barrier_return} function attribute, MIPS
@item use_hazard_barrier_return
This function attribute instructs the compiler to generate a hazard barrier
return that clears all execution and instruction hazards while returning,
instead of generating a normal return instruction.

@item code_readable
@cindex @code{code_readable} function attribute, MIPS
For MIPS targets that support PC-relative addressing modes, this attribute
can be used to control how an object is addressed.  The attribute takes
a single optional argument:

@table @samp
@item no
The function should not read the instruction stream as data.
@item yes
The function can read the instruction stream as data.
@item pcrel
The function can read the instruction stream in a pc-relative mode.
@end table

If there is no argument supplied, the default of @code{"yes"} applies.
@end table

@node MSP430 Function Attributes
@subsection MSP430 Function Attributes

These function attributes are supported by the MSP430 back end:

@table @code
@cindex @code{critical} function attribute, MSP430
@item critical
Critical functions disable interrupts upon entry and restore the
previous interrupt state upon exit.  Critical functions cannot also
have the @code{naked}, @code{reentrant} or @code{interrupt} attributes.

The MSP430 hardware ensures that interrupts are disabled on entry to
@code{interrupt} functions, and restores the previous interrupt state
on exit. The @code{critical} attribute is therefore redundant on
@code{interrupt} functions.

@cindex @code{interrupt} function attribute, MSP430
@item interrupt
Use this attribute to indicate
that the specified function is an interrupt handler.  The compiler generates
function entry and exit sequences suitable for use in an interrupt handler
when this attribute is present.

You can provide an argument to the interrupt
attribute which specifies a name or number.  If the argument is a
number it indicates the slot in the interrupt vector table (0 - 31) to
which this handler should be assigned.  If the argument is a name it
is treated as a symbolic name for the vector slot.  These names should
match up with appropriate entries in the linker script.  By default
the names @code{watchdog} for vector 26, @code{nmi} for vector 30 and
@code{reset} for vector 31 are recognized.

@cindex @code{naked} function attribute, MSP430
@item naked
This attribute allows the compiler to construct the
requisite function declaration, while allowing the body of the
function to be assembly code. The specified function will not have
prologue/epilogue sequences generated by the compiler. Only basic
@code{asm} statements can safely be included in naked functions
(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
basic @code{asm} and C code may appear to work, they cannot be
depended upon to work reliably and are not supported.

@cindex @code{reentrant} function attribute, MSP430
@item reentrant
Reentrant functions disable interrupts upon entry and enable them
upon exit.  Reentrant functions cannot also have the @code{naked}
or @code{critical} attributes.  They can have the @code{interrupt}
attribute.

@cindex @code{wakeup} function attribute, MSP430
@item wakeup
This attribute only applies to interrupt functions.  It is silently
ignored if applied to a non-interrupt function.  A wakeup interrupt
function will rouse the processor from any low-power state that it
might be in when the function exits.

@cindex @code{lower} function attribute, MSP430
@cindex @code{upper} function attribute, MSP430
@cindex @code{either} function attribute, MSP430
@item lower
@itemx upper
@itemx either
On the MSP430 target these attributes can be used to specify whether
the function or variable should be placed into low memory, high
memory, or the placement should be left to the linker to decide.  The
attributes are only significant if compiling for the MSP430X
architecture in the large memory model.

The attributes work in conjunction with a linker script that has been
augmented to specify where to place sections with a @code{.lower} and
a @code{.upper} prefix.  So, for example, as well as placing the
@code{.data} section, the script also specifies the placement of a
@code{.lower.data} and a @code{.upper.data} section.  The intention
is that @code{lower} sections are placed into a small but easier to
access memory region and the upper sections are placed into a larger, but
slower to access, region.

The @code{either} attribute is special.  It tells the linker to place
the object into the corresponding @code{lower} section if there is
room for it.  If there is insufficient room then the object is placed
into the corresponding @code{upper} section instead.  Note that the
placement algorithm is not very sophisticated.  It does not attempt to
find an optimal packing of the @code{lower} sections.  It just makes
one pass over the objects and does the best that it can.  Using the
@option{-ffunction-sections} and @option{-fdata-sections} command-line
options can help the packing, however, since they produce smaller,
easier to pack regions.
@end table

@node NDS32 Function Attributes
@subsection NDS32 Function Attributes

These function attributes are supported by the NDS32 back end:

@table @code
@cindex @code{exception} function attribute
@cindex exception handler functions, NDS32
@item exception
Use this attribute on the NDS32 target to indicate that the specified function
is an exception handler.  The compiler will generate corresponding sections
for use in an exception handler.

@cindex @code{interrupt} function attribute, NDS32
@item interrupt
On NDS32 target, this attribute indicates that the specified function
is an interrupt handler.  The compiler generates corresponding sections
for use in an interrupt handler.  You can use the following attributes
to modify the behavior:
@table @code
@cindex @code{nested} function attribute, NDS32
@item nested
This interrupt service routine is interruptible.
@cindex @code{not_nested} function attribute, NDS32
@item not_nested
This interrupt service routine is not interruptible.
@cindex @code{nested_ready} function attribute, NDS32
@item nested_ready
This interrupt service routine is interruptible after @code{PSW.GIE}
(global interrupt enable) is set.  This allows interrupt service routine to
finish some short critical code before enabling interrupts.
@cindex @code{save_all} function attribute, NDS32
@item save_all
The system will help save all registers into stack before entering
interrupt handler.
@cindex @code{partial_save} function attribute, NDS32
@item partial_save
The system will help save caller registers into stack before entering
interrupt handler.
@end table

@cindex @code{naked} function attribute, NDS32
@item naked
This attribute allows the compiler to construct the
requisite function declaration, while allowing the body of the
function to be assembly code. The specified function will not have
prologue/epilogue sequences generated by the compiler. Only basic
@code{asm} statements can safely be included in naked functions
(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
basic @code{asm} and C code may appear to work, they cannot be
depended upon to work reliably and are not supported.

@cindex @code{reset} function attribute, NDS32
@cindex reset handler functions
@item reset
Use this attribute on the NDS32 target to indicate that the specified function
is a reset handler.  The compiler will generate corresponding sections
for use in a reset handler.  You can use the following attributes
to provide extra exception handling:
@table @code
@cindex @code{nmi} function attribute, NDS32
@item nmi
Provide a user-defined function to handle NMI exception.
@cindex @code{warm} function attribute, NDS32
@item warm
Provide a user-defined function to handle warm reset exception.
@end table
@end table

@node Nios II Function Attributes
@subsection Nios II Function Attributes

These function attributes are supported by the Nios II back end:

@table @code
@cindex @code{target} function attribute
@item target (@var{options})
As discussed in @ref{Common Function Attributes}, this attribute 
allows specification of target-specific compilation options.

When compiling for Nios II, the following options are allowed:

@table @samp
@cindex @code{target("custom-@var{insn}=@var{N}")} function attribute, Nios II
@cindex @code{target("no-custom-@var{insn}")} function attribute, Nios II
@item custom-@var{insn}=@var{N}
@itemx no-custom-@var{insn}
Each @samp{custom-@var{insn}=@var{N}} attribute locally enables use of a
custom instruction with encoding @var{N} when generating code that uses 
@var{insn}.  Similarly, @samp{no-custom-@var{insn}} locally inhibits use of
the custom instruction @var{insn}.
These target attributes correspond to the
@option{-mcustom-@var{insn}=@var{N}} and @option{-mno-custom-@var{insn}}
command-line options, and support the same set of @var{insn} keywords.
@xref{Nios II Options}, for more information.

@cindex @code{target("custom-fpu-cfg=@var{name}")} function attribute, Nios II
@item custom-fpu-cfg=@var{name}
This attribute corresponds to the @option{-mcustom-fpu-cfg=@var{name}}
command-line option, to select a predefined set of custom instructions
named @var{name}.
@xref{Nios II Options}, for more information.
@end table
@end table

@node Nvidia PTX Function Attributes
@subsection Nvidia PTX Function Attributes

These function attributes are supported by the Nvidia PTX back end:

@table @code
@cindex @code{kernel} attribute, Nvidia PTX
@item kernel
This attribute indicates that the corresponding function should be compiled
as a kernel function, which can be invoked from the host via the CUDA RT 
library.
By default functions are only callable only from other PTX functions.

Kernel functions must have @code{void} return type.
@end table

@node PowerPC Function Attributes
@subsection PowerPC Function Attributes

These function attributes are supported by the PowerPC back end:

@table @code
@cindex indirect calls, PowerPC
@cindex @code{longcall} function attribute, PowerPC
@cindex @code{shortcall} function attribute, PowerPC
@item longcall
@itemx shortcall
The @code{longcall} attribute
indicates that the function might be far away from the call site and
require a different (more expensive) calling sequence.  The
@code{shortcall} attribute indicates that the function is always close
enough for the shorter calling sequence to be used.  These attributes
override both the @option{-mlongcall} switch and
the @code{#pragma longcall} setting.

@xref{RS/6000 and PowerPC Options}, for more information on whether long
calls are necessary.

@cindex @code{target} function attribute
@item target (@var{options})
As discussed in @ref{Common Function Attributes}, this attribute 
allows specification of target-specific compilation options.

On the PowerPC, the following options are allowed:

@table @samp
@cindex @code{target("altivec")} function attribute, PowerPC
@item altivec
@itemx no-altivec
Generate code that uses (does not use) AltiVec instructions.  In
32-bit code, you cannot enable AltiVec instructions unless
@option{-mabi=altivec} is used on the command line.

@cindex @code{target("cmpb")} function attribute, PowerPC
@item cmpb
@itemx no-cmpb
Generate code that uses (does not use) the compare bytes instruction
implemented on the POWER6 processor and other processors that support
the PowerPC V2.05 architecture.

@cindex @code{target("dlmzb")} function attribute, PowerPC
@item dlmzb
@itemx no-dlmzb
Generate code that uses (does not use) the string-search @samp{dlmzb}
instruction on the IBM 405, 440, 464 and 476 processors.  This instruction is
generated by default when targeting those processors.

@cindex @code{target("fprnd")} function attribute, PowerPC
@item fprnd
@itemx no-fprnd
Generate code that uses (does not use) the FP round to integer
instructions implemented on the POWER5+ processor and other processors
that support the PowerPC V2.03 architecture.

@cindex @code{target("hard-dfp")} function attribute, PowerPC
@item hard-dfp
@itemx no-hard-dfp
Generate code that uses (does not use) the decimal floating-point
instructions implemented on some POWER processors.

@cindex @code{target("isel")} function attribute, PowerPC
@item isel
@itemx no-isel
Generate code that uses (does not use) ISEL instruction.

@cindex @code{target("mfcrf")} function attribute, PowerPC
@item mfcrf
@itemx no-mfcrf
Generate code that uses (does not use) the move from condition
register field instruction implemented on the POWER4 processor and
other processors that support the PowerPC V2.01 architecture.

@cindex @code{target("mulhw")} function attribute, PowerPC
@item mulhw
@itemx no-mulhw
Generate code that uses (does not use) the half-word multiply and
multiply-accumulate instructions on the IBM 405, 440, 464 and 476 processors.
These instructions are generated by default when targeting those
processors.

@cindex @code{target("multiple")} function attribute, PowerPC
@item multiple
@itemx no-multiple
Generate code that uses (does not use) the load multiple word
instructions and the store multiple word instructions.

@cindex @code{target("update")} function attribute, PowerPC
@item update
@itemx no-update
Generate code that uses (does not use) the load or store instructions
that update the base register to the address of the calculated memory
location.

@cindex @code{target("popcntb")} function attribute, PowerPC
@item popcntb
@itemx no-popcntb
Generate code that uses (does not use) the popcount and double-precision
FP reciprocal estimate instruction implemented on the POWER5
processor and other processors that support the PowerPC V2.02
architecture.

@cindex @code{target("popcntd")} function attribute, PowerPC
@item popcntd
@itemx no-popcntd
Generate code that uses (does not use) the popcount instruction
implemented on the POWER7 processor and other processors that support
the PowerPC V2.06 architecture.

@cindex @code{target("powerpc-gfxopt")} function attribute, PowerPC
@item powerpc-gfxopt
@itemx no-powerpc-gfxopt
Generate code that uses (does not use) the optional PowerPC
architecture instructions in the Graphics group, including
floating-point select.

@cindex @code{target("powerpc-gpopt")} function attribute, PowerPC
@item powerpc-gpopt
@itemx no-powerpc-gpopt
Generate code that uses (does not use) the optional PowerPC
architecture instructions in the General Purpose group, including
floating-point square root.

@cindex @code{target("recip-precision")} function attribute, PowerPC
@item recip-precision
@itemx no-recip-precision
Assume (do not assume) that the reciprocal estimate instructions
provide higher-precision estimates than is mandated by the PowerPC
ABI.

@cindex @code{target("string")} function attribute, PowerPC
@item string
@itemx no-string
Generate code that uses (does not use) the load string instructions
and the store string word instructions to save multiple registers and
do small block moves.

@cindex @code{target("vsx")} function attribute, PowerPC
@item vsx
@itemx no-vsx
Generate code that uses (does not use) vector/scalar (VSX)
instructions, and also enable the use of built-in functions that allow
more direct access to the VSX instruction set.  In 32-bit code, you
cannot enable VSX or AltiVec instructions unless
@option{-mabi=altivec} is used on the command line.

@cindex @code{target("friz")} function attribute, PowerPC
@item friz
@itemx no-friz
Generate (do not generate) the @code{friz} instruction when the
@option{-funsafe-math-optimizations} option is used to optimize
rounding a floating-point value to 64-bit integer and back to floating
point.  The @code{friz} instruction does not return the same value if
the floating-point number is too large to fit in an integer.

@cindex @code{target("avoid-indexed-addresses")} function attribute, PowerPC
@item avoid-indexed-addresses
@itemx no-avoid-indexed-addresses
Generate code that tries to avoid (not avoid) the use of indexed load
or store instructions.

@cindex @code{target("paired")} function attribute, PowerPC
@item paired
@itemx no-paired
Generate code that uses (does not use) the generation of PAIRED simd
instructions.

@cindex @code{target("longcall")} function attribute, PowerPC
@item longcall
@itemx no-longcall
Generate code that assumes (does not assume) that all calls are far
away so that a longer more expensive calling sequence is required.

@cindex @code{target("cpu=@var{CPU}")} function attribute, PowerPC
@item cpu=@var{CPU}
Specify the architecture to generate code for when compiling the
function.  If you select the @code{target("cpu=power7")} attribute when
generating 32-bit code, VSX and AltiVec instructions are not generated
unless you use the @option{-mabi=altivec} option on the command line.

@cindex @code{target("tune=@var{TUNE}")} function attribute, PowerPC
@item tune=@var{TUNE}
Specify the architecture to tune for when compiling the function.  If
you do not specify the @code{target("tune=@var{TUNE}")} attribute and
you do specify the @code{target("cpu=@var{CPU}")} attribute,
compilation tunes for the @var{CPU} architecture, and not the
default tuning specified on the command line.
@end table

On the PowerPC, the inliner does not inline a
function that has different target options than the caller, unless the
callee has a subset of the target options of the caller.
@end table

@node RISC-V Function Attributes
@subsection RISC-V Function Attributes

These function attributes are supported by the RISC-V back end:

@table @code
@cindex @code{naked} function attribute, RISC-V
@item naked
This attribute allows the compiler to construct the
requisite function declaration, while allowing the body of the
function to be assembly code. The specified function will not have
prologue/epilogue sequences generated by the compiler. Only basic
@code{asm} statements can safely be included in naked functions
(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
basic @code{asm} and C code may appear to work, they cannot be
depended upon to work reliably and are not supported.

@cindex @code{interrupt} function attribute, RISC-V
@item interrupt
Use this attribute to indicate that the specified function is an interrupt
handler.  The compiler generates function entry and exit sequences suitable
for use in an interrupt handler when this attribute is present.

You can specify the kind of interrupt to be handled by adding an optional
parameter to the interrupt attribute like this:

@smallexample
void f (void) __attribute__ ((interrupt ("user")));
@end smallexample

Permissible values for this parameter are @code{user}, @code{supervisor},
and @code{machine}.  If there is no parameter, then it defaults to
@code{machine}.

@cindex @code{riscv_vector_cc} function attribute, RISC-V
@item riscv_vector_cc
Use this attribute to force the function to use the vector calling
convention variant.

@smallexample
void foo() __attribute__((riscv_vector_cc));
[[riscv::vector_cc]] void foo(); // For C++11 and C23
@end smallexample

@end table

The following target-specific function attributes are available for the
RISC-V target.  For the most part, these options mirror the behavior of
similar command-line options (@pxref{RISC-V Options}), but on a
per-function basis.

@table @code
@cindex @code{arch=} function attribute, RISC-V
@item arch=
Specifies the architecture version and architectural extensions to use
for this function.  The behavior and permissible arguments are the same as
for the @option{-march=} command-line option, in addtion, it also support
extension enablement list, a list of extension name and prefixed with @code{+},
like @code{arch=+zba} means enable @code{zba} extension.
Multiple extension can be enabled by separating them with a comma.  For example:
@code{arch=+zba,+zbb}.

@cindex @code{tune=} function attribute, RISC-V
@item tune=
Specifies the core for which to tune the performance of this function.
The behavior and permissible arguments are the same as for the @option{-mtune=}
command-line option.

@cindex @code{cpu=} function attribute, RISC-V
@item cpu=
Specifies the core for which to tune the performance of this function and also
whose architectural features to use.  The behavior and valid arguments are the
same as for the @option{-mcpu=} command-line option.

@end table

The above target attributes can be specified as follows:

@smallexample
__attribute__((target("@var{attr-string}")))
int
f (int a)
@{
  return a + 5;
@}
@end smallexample

where @code{@var{attr-string}} is one of the attribute strings specified above.

Multiple target function attributes can be specified by separating them with
a semicolon.  For example:
@smallexample
__attribute__((target("arch=+zba,+zbb;tune=rocket")))
int
foo (int a)
@{
  return a + 5;
@}
@end smallexample

is valid and compiles function @code{foo} with @code{zba}
and @code{zbb} extensions and tunes it for @code{rocket}.

@node RL78 Function Attributes
@subsection RL78 Function Attributes

These function attributes are supported by the RL78 back end:

@table @code
@cindex @code{interrupt} function attribute, RL78
@cindex @code{brk_interrupt} function attribute, RL78
@item interrupt
@itemx brk_interrupt
These attributes indicate
that the specified function is an interrupt handler.  The compiler generates
function entry and exit sequences suitable for use in an interrupt handler
when this attribute is present.

Use @code{brk_interrupt} instead of @code{interrupt} for
handlers intended to be used with the @code{BRK} opcode (i.e.@: those
that must end with @code{RETB} instead of @code{RETI}).

@cindex @code{naked} function attribute, RL78
@item naked
This attribute allows the compiler to construct the
requisite function declaration, while allowing the body of the
function to be assembly code. The specified function will not have
prologue/epilogue sequences generated by the compiler. Only basic
@code{asm} statements can safely be included in naked functions
(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
basic @code{asm} and C code may appear to work, they cannot be
depended upon to work reliably and are not supported.
@end table

@node RX Function Attributes
@subsection RX Function Attributes

These function attributes are supported by the RX back end:

@table @code
@cindex @code{fast_interrupt} function attribute, RX
@item fast_interrupt
Use this attribute on the RX port to indicate that the specified
function is a fast interrupt handler.  This is just like the
@code{interrupt} attribute, except that @code{freit} is used to return
instead of @code{reit}.

@cindex @code{interrupt} function attribute, RX
@item interrupt
Use this attribute to indicate
that the specified function is an interrupt handler.  The compiler generates
function entry and exit sequences suitable for use in an interrupt handler
when this attribute is present.

On RX and RL78 targets, you may specify one or more vector numbers as arguments
to the attribute, as well as naming an alternate table name.
Parameters are handled sequentially, so one handler can be assigned to
multiple entries in multiple tables.  One may also pass the magic
string @code{"$default"} which causes the function to be used for any
unfilled slots in the current table.

This example shows a simple assignment of a function to one vector in
the default table (note that preprocessor macros may be used for
chip-specific symbolic vector names):
@smallexample
void __attribute__ ((interrupt (5))) txd1_handler ();
@end smallexample

This example assigns a function to two slots in the default table
(using preprocessor macros defined elsewhere) and makes it the default
for the @code{dct} table:
@smallexample
void __attribute__ ((interrupt (RXD1_VECT,RXD2_VECT,"dct","$default")))
	txd1_handler ();
@end smallexample

@cindex @code{naked} function attribute, RX
@item naked
This attribute allows the compiler to construct the
requisite function declaration, while allowing the body of the
function to be assembly code. The specified function will not have
prologue/epilogue sequences generated by the compiler. Only basic
@code{asm} statements can safely be included in naked functions
(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
basic @code{asm} and C code may appear to work, they cannot be
depended upon to work reliably and are not supported.

@cindex @code{vector} function attribute, RX
@item vector
This RX attribute is similar to the @code{interrupt} attribute, including its
parameters, but does not make the function an interrupt-handler type
function (i.e.@: it retains the normal C function calling ABI).  See the
@code{interrupt} attribute for a description of its arguments.
@end table

@node S/390 Function Attributes
@subsection S/390 Function Attributes

These function attributes are supported on the S/390:

@table @code
@cindex @code{hotpatch} function attribute, S/390
@item hotpatch (@var{halfwords-before-function-label},@var{halfwords-after-function-label})

On S/390 System z targets, you can use this function attribute to
make GCC generate a ``hot-patching'' function prologue.  If the
@option{-mhotpatch=} command-line option is used at the same time,
the @code{hotpatch} attribute takes precedence.  The first of the
two arguments specifies the number of halfwords to be added before
the function label.  A second argument can be used to specify the
number of halfwords to be added after the function label.  For
both arguments the maximum allowed value is 1000000.

If both arguments are zero, hotpatching is disabled.

@cindex @code{target} function attribute
@item target (@var{options})
As discussed in @ref{Common Function Attributes}, this attribute
allows specification of target-specific compilation options.

On S/390, the following options are supported:

@table @samp
@item arch=
@item tune=
@item stack-guard=
@item stack-size=
@item branch-cost=
@item warn-framesize=
@item backchain
@itemx no-backchain
@item hard-dfp
@itemx no-hard-dfp
@item hard-float
@itemx soft-float
@item htm
@itemx no-htm
@item vx
@itemx no-vx
@item packed-stack
@itemx no-packed-stack
@item small-exec
@itemx no-small-exec
@item mvcle
@itemx no-mvcle
@item warn-dynamicstack
@itemx no-warn-dynamicstack
@end table

The options work exactly like the S/390 specific command line
options (without the prefix @option{-m}) except that they do not
change any feature macros.  For example,

@smallexample
@code{target("no-vx")}
@end smallexample

does not undefine the @code{__VEC__} macro.
@end table

@node SH Function Attributes
@subsection SH Function Attributes

These function attributes are supported on the SH family of processors:

@table @code
@cindex @code{function_vector} function attribute, SH
@cindex calling functions through the function vector on SH2A
@item function_vector
On SH2A targets, this attribute declares a function to be called using the
TBR relative addressing mode.  The argument to this attribute is the entry
number of the same function in a vector table containing all the TBR
relative addressable functions.  For correct operation the TBR must be setup
accordingly to point to the start of the vector table before any functions with
this attribute are invoked.  Usually a good place to do the initialization is
the startup routine.  The TBR relative vector table can have at max 256 function
entries.  The jumps to these functions are generated using a SH2A specific,
non delayed branch instruction JSR/N @@(disp8,TBR).  You must use GAS and GLD
from GNU binutils version 2.7 or later for this attribute to work correctly.

In an application, for a function being called once, this attribute
saves at least 8 bytes of code; and if other successive calls are being
made to the same function, it saves 2 bytes of code per each of these
calls.

@cindex @code{interrupt_handler} function attribute, SH
@item interrupt_handler
Use this attribute to
indicate that the specified function is an interrupt handler.  The compiler
generates function entry and exit sequences suitable for use in an
interrupt handler when this attribute is present.

@cindex @code{nosave_low_regs} function attribute, SH
@item nosave_low_regs
Use this attribute on SH targets to indicate that an @code{interrupt_handler}
function should not save and restore registers R0..R7.  This can be used on SH3*
and SH4* targets that have a second R0..R7 register bank for non-reentrant
interrupt handlers.

@cindex @code{renesas} function attribute, SH
@item renesas
On SH targets this attribute specifies that the function or struct follows the
Renesas ABI.

@cindex @code{resbank} function attribute, SH
@item resbank
On the SH2A target, this attribute enables the high-speed register
saving and restoration using a register bank for @code{interrupt_handler}
routines.  Saving to the bank is performed automatically after the CPU
accepts an interrupt that uses a register bank.

The nineteen 32-bit registers comprising general register R0 to R14,
control register GBR, and system registers MACH, MACL, and PR and the
vector table address offset are saved into a register bank.  Register
banks are stacked in first-in last-out (FILO) sequence.  Restoration
from the bank is executed by issuing a RESBANK instruction.

@cindex @code{sp_switch} function attribute, SH
@item sp_switch
Use this attribute on the SH to indicate an @code{interrupt_handler}
function should switch to an alternate stack.  It expects a string
argument that names a global variable holding the address of the
alternate stack.

@smallexample
void *alt_stack;
void f () __attribute__ ((interrupt_handler,
                          sp_switch ("alt_stack")));
@end smallexample

@cindex @code{trap_exit} function attribute, SH
@item trap_exit
Use this attribute on the SH for an @code{interrupt_handler} to return using
@code{trapa} instead of @code{rte}.  This attribute expects an integer
argument specifying the trap number to be used.

@cindex @code{trapa_handler} function attribute, SH
@item trapa_handler
On SH targets this function attribute is similar to @code{interrupt_handler}
but it does not save and restore all registers.
@end table

@node Symbian OS Function Attributes
@subsection Symbian OS Function Attributes

@xref{Microsoft Windows Function Attributes}, for discussion of the
@code{dllexport} and @code{dllimport} attributes.

@node V850 Function Attributes
@subsection V850 Function Attributes

The V850 back end supports these function attributes:

@table @code
@cindex @code{interrupt} function attribute, V850
@cindex @code{interrupt_handler} function attribute, V850
@item interrupt
@itemx interrupt_handler
Use these attributes to indicate
that the specified function is an interrupt handler.  The compiler generates
function entry and exit sequences suitable for use in an interrupt handler
when either attribute is present.
@end table

@node Visium Function Attributes
@subsection Visium Function Attributes

These function attributes are supported by the Visium back end:

@table @code
@cindex @code{interrupt} function attribute, Visium
@item interrupt
Use this attribute to indicate
that the specified function is an interrupt handler.  The compiler generates
function entry and exit sequences suitable for use in an interrupt handler
when this attribute is present.
@end table

@node x86 Function Attributes
@subsection x86 Function Attributes

These function attributes are supported by the x86 back end:

@table @code
@cindex @code{cdecl} function attribute, x86-32
@cindex functions that pop the argument stack on x86-32
@opindex mrtd
@item cdecl
On the x86-32 targets, the @code{cdecl} attribute causes the compiler to
assume that the calling function pops off the stack space used to
pass arguments.  This is
useful to override the effects of the @option{-mrtd} switch.

@cindex @code{fastcall} function attribute, x86-32
@cindex functions that pop the argument stack on x86-32
@item fastcall
On x86-32 targets, the @code{fastcall} attribute causes the compiler to
pass the first argument (if of integral type) in the register ECX and
the second argument (if of integral type) in the register EDX@.  Subsequent
and other typed arguments are passed on the stack.  The called function
pops the arguments off the stack.  If the number of arguments is variable all
arguments are pushed on the stack.

@cindex @code{thiscall} function attribute, x86-32
@cindex functions that pop the argument stack on x86-32
@item thiscall
On x86-32 targets, the @code{thiscall} attribute causes the compiler to
pass the first argument (if of integral type) in the register ECX.
Subsequent and other typed arguments are passed on the stack. The called
function pops the arguments off the stack.
If the number of arguments is variable all arguments are pushed on the
stack.
The @code{thiscall} attribute is intended for C++ non-static member functions.
As a GCC extension, this calling convention can be used for C functions
and for static member methods.

@cindex @code{ms_abi} function attribute, x86
@cindex @code{sysv_abi} function attribute, x86
@item ms_abi
@itemx sysv_abi

On 32-bit and 64-bit x86 targets, you can use an ABI attribute
to indicate which calling convention should be used for a function.  The
@code{ms_abi} attribute tells the compiler to use the Microsoft ABI,
while the @code{sysv_abi} attribute tells the compiler to use the System V
ELF ABI, which is used on GNU/Linux and other systems.  The default is to use
the Microsoft ABI when targeting Windows.  On all other systems, the default
is the System V ELF ABI.

Note, the @code{ms_abi} attribute for Microsoft Windows 64-bit targets currently
requires the @option{-maccumulate-outgoing-args} option.

@cindex @code{callee_pop_aggregate_return} function attribute, x86
@item callee_pop_aggregate_return (@var{number})

On x86-32 targets, you can use this attribute to control how
aggregates are returned in memory.  If the caller is responsible for
popping the hidden pointer together with the rest of the arguments, specify
@var{number} equal to zero.  If callee is responsible for popping the
hidden pointer, specify @var{number} equal to one.  

The default x86-32 ABI assumes that the callee pops the
stack for hidden pointer.  However, on x86-32 Microsoft Windows targets,
the compiler assumes that the
caller pops the stack for hidden pointer.

@cindex @code{ms_hook_prologue} function attribute, x86
@item ms_hook_prologue

On 32-bit and 64-bit x86 targets, you can use
this function attribute to make GCC generate the ``hot-patching'' function
prologue used in Win32 API functions in Microsoft Windows XP Service Pack 2
and newer.

@cindex @code{naked} function attribute, x86
@item naked
This attribute allows the compiler to construct the
requisite function declaration, while allowing the body of the
function to be assembly code. The specified function will not have
prologue/epilogue sequences generated by the compiler. Only basic
@code{asm} statements can safely be included in naked functions
(@pxref{Basic Asm}). While using extended @code{asm} or a mixture of
basic @code{asm} and C code may appear to work, they cannot be
depended upon to work reliably and are not supported.

@cindex @code{regparm} function attribute, x86
@cindex functions that are passed arguments in registers on x86-32
@item regparm (@var{number})
On x86-32 targets, the @code{regparm} attribute causes the compiler to
pass arguments number one to @var{number} if they are of integral type
in registers EAX, EDX, and ECX instead of on the stack.  Functions that
take a variable number of arguments continue to be passed all of their
arguments on the stack.

Beware that on some ELF systems this attribute is unsuitable for
global functions in shared libraries with lazy binding (which is the
default).  Lazy binding sends the first call via resolving code in
the loader, which might assume EAX, EDX and ECX can be clobbered, as
per the standard calling conventions.  Solaris 8 is affected by this.
Systems with the GNU C Library version 2.1 or higher
and FreeBSD are believed to be
safe since the loaders there save EAX, EDX and ECX.  (Lazy binding can be
disabled with the linker or the loader if desired, to avoid the
problem.)

@cindex @code{sseregparm} function attribute, x86
@item sseregparm
On x86-32 targets with SSE support, the @code{sseregparm} attribute
causes the compiler to pass up to 3 floating-point arguments in
SSE registers instead of on the stack.  Functions that take a
variable number of arguments continue to pass all of their
floating-point arguments on the stack.

@cindex @code{force_align_arg_pointer} function attribute, x86
@item force_align_arg_pointer
On x86 targets, the @code{force_align_arg_pointer} attribute may be
applied to individual function definitions, generating an alternate
prologue and epilogue that realigns the run-time stack if necessary.
This supports mixing legacy codes that run with a 4-byte aligned stack
with modern codes that keep a 16-byte stack for SSE compatibility.

@cindex @code{stdcall} function attribute, x86-32
@cindex functions that pop the argument stack on x86-32
@item stdcall
On x86-32 targets, the @code{stdcall} attribute causes the compiler to
assume that the called function pops off the stack space used to
pass arguments, unless it takes a variable number of arguments.

@cindex @code{no_callee_saved_registers} function attribute, x86
@item no_callee_saved_registers
Use this attribute to indicate that the specified function has no
callee-saved registers. That is, all registers can be used as scratch
registers. For example, this attribute can be used for a function
called from the interrupt handler assembly stub which will preserve
all registers and return from interrupt.

@cindex @code{no_caller_saved_registers} function attribute, x86
@item no_caller_saved_registers
Use this attribute to indicate that the specified function has no
caller-saved registers. That is, all registers are callee-saved. For
example, this attribute can be used for a function called from an
interrupt handler. The compiler generates proper function entry and
exit sequences to save and restore any modified registers, except for
the EFLAGS register.  Since GCC doesn't preserve SSE, MMX nor x87
states, the GCC option @option{-mgeneral-regs-only} should be used to
compile functions with @code{no_caller_saved_registers} attribute.

@cindex @code{interrupt} function attribute, x86
@item interrupt
Use this attribute to indicate that the specified function is an
interrupt handler or an exception handler (depending on parameters passed
to the function, explained further).  The compiler generates function
entry and exit sequences suitable for use in an interrupt handler when
this attribute is present.  The @code{IRET} instruction, instead of the
@code{RET} instruction, is used to return from interrupt handlers.  All
registers, except for the EFLAGS register which is restored by the
@code{IRET} instruction, are preserved by the compiler.  Since GCC
doesn't preserve SSE, MMX nor x87 states, the GCC option
@option{-mgeneral-regs-only} should be used to compile interrupt and
exception handlers.

Any interruptible-without-stack-switch code must be compiled with
@option{-mno-red-zone} since interrupt handlers can and will, because
of the hardware design, touch the red zone.

An interrupt handler must be declared with a mandatory pointer
argument:

@smallexample
struct interrupt_frame;

__attribute__ ((interrupt))
void
f (struct interrupt_frame *frame)
@{
@}
@end smallexample

@noindent
and you must define @code{struct interrupt_frame} as described in the
processor's manual.

Exception handlers differ from interrupt handlers because the system
pushes an error code on the stack.  An exception handler declaration is
similar to that for an interrupt handler, but with a different mandatory
function signature.  The compiler arranges to pop the error code off the
stack before the @code{IRET} instruction.

@smallexample
#ifdef __x86_64__
typedef unsigned long long int uword_t;
#else
typedef unsigned int uword_t;
#endif

struct interrupt_frame;

__attribute__ ((interrupt))
void
f (struct interrupt_frame *frame, uword_t error_code)
@{
  ...
@}
@end smallexample

Exception handlers should only be used for exceptions that push an error
code; you should use an interrupt handler in other cases.  The system
will crash if the wrong kind of handler is used.

@cindex @code{target} function attribute
@item target (@var{options})
As discussed in @ref{Common Function Attributes}, this attribute 
allows specification of target-specific compilation options.

On the x86, the following options are allowed:
@table @samp
@cindex @code{target("3dnow")} function attribute, x86
@item 3dnow
@itemx no-3dnow
Enable/disable the generation of the 3DNow!@: instructions.

@cindex @code{target("3dnowa")} function attribute, x86
@item 3dnowa
@itemx no-3dnowa
Enable/disable the generation of the enhanced 3DNow!@: instructions.

@cindex @code{target("abm")} function attribute, x86
@item abm
@itemx no-abm
Enable/disable the generation of the advanced bit instructions.

@cindex @code{target("adx")} function attribute, x86
@item adx
@itemx no-adx
Enable/disable the generation of the ADX instructions.

@cindex @code{target("aes")} function attribute, x86
@item aes
@itemx no-aes
Enable/disable the generation of the AES instructions.

@cindex @code{target("avx")} function attribute, x86
@item avx
@itemx no-avx
Enable/disable the generation of the AVX instructions.

@cindex @code{target("avx2")} function attribute, x86
@item avx2
@itemx no-avx2
Enable/disable the generation of the AVX2 instructions.

@cindex @code{target("avx512bitalg")} function attribute, x86
@item avx512bitalg
@itemx no-avx512bitalg
Enable/disable the generation of the AVX512BITALG instructions.

@cindex @code{target("avx512bw")} function attribute, x86
@item avx512bw
@itemx no-avx512bw
Enable/disable the generation of the AVX512BW instructions.

@cindex @code{target("avx512cd")} function attribute, x86
@item avx512cd
@itemx no-avx512cd
Enable/disable the generation of the AVX512CD instructions.

@cindex @code{target("avx512dq")} function attribute, x86
@item avx512dq
@itemx no-avx512dq
Enable/disable the generation of the AVX512DQ instructions.

@cindex @code{target("avx512er")} function attribute, x86
@item avx512er
@itemx no-avx512er
Enable/disable the generation of the AVX512ER instructions.

@cindex @code{target("avx512f")} function attribute, x86
@item avx512f
@itemx no-avx512f
Enable/disable the generation of the AVX512F instructions.

@cindex @code{target("avx512ifma")} function attribute, x86
@item avx512ifma
@itemx no-avx512ifma
Enable/disable the generation of the AVX512IFMA instructions.

@cindex @code{target("avx512vbmi")} function attribute, x86
@item avx512vbmi
@itemx no-avx512vbmi
Enable/disable the generation of the AVX512VBMI instructions.

@cindex @code{target("avx512vbmi2")} function attribute, x86
@item avx512vbmi2
@itemx no-avx512vbmi2
Enable/disable the generation of the AVX512VBMI2 instructions.

@cindex @code{target("avx512vl")} function attribute, x86
@item avx512vl
@itemx no-avx512vl
Enable/disable the generation of the AVX512VL instructions.

@cindex @code{target("avx512vnni")} function attribute, x86
@item avx512vnni
@itemx no-avx512vnni
Enable/disable the generation of the AVX512VNNI instructions.

@cindex @code{target("avx512vpopcntdq")} function attribute, x86
@item avx512vpopcntdq
@itemx no-avx512vpopcntdq
Enable/disable the generation of the AVX512VPOPCNTDQ instructions.

@cindex @code{target("bmi")} function attribute, x86
@item bmi
@itemx no-bmi
Enable/disable the generation of the BMI instructions.

@cindex @code{target("bmi2")} function attribute, x86
@item bmi2
@itemx no-bmi2
Enable/disable the generation of the BMI2 instructions.

@cindex @code{target("cldemote")} function attribute, x86
@item cldemote
@itemx no-cldemote
Enable/disable the generation of the CLDEMOTE instructions.

@cindex @code{target("clflushopt")} function attribute, x86
@item clflushopt
@itemx no-clflushopt
Enable/disable the generation of the CLFLUSHOPT instructions.

@cindex @code{target("clwb")} function attribute, x86
@item clwb
@itemx no-clwb
Enable/disable the generation of the CLWB instructions.

@cindex @code{target("clzero")} function attribute, x86
@item clzero
@itemx no-clzero
Enable/disable the generation of the CLZERO instructions.

@cindex @code{target("crc32")} function attribute, x86
@item crc32
@itemx no-crc32
Enable/disable the generation of the CRC32 instructions.

@cindex @code{target("cx16")} function attribute, x86
@item cx16
@itemx no-cx16
Enable/disable the generation of the CMPXCHG16B instructions.

@cindex @code{target("default")} function attribute, x86
@item default
@xref{Function Multiversioning}, where it is used to specify the
default function version.

@cindex @code{target("f16c")} function attribute, x86
@item f16c
@itemx no-f16c
Enable/disable the generation of the F16C instructions.

@cindex @code{target("fma")} function attribute, x86
@item fma
@itemx no-fma
Enable/disable the generation of the FMA instructions.

@cindex @code{target("fma4")} function attribute, x86
@item fma4
@itemx no-fma4
Enable/disable the generation of the FMA4 instructions.

@cindex @code{target("fsgsbase")} function attribute, x86
@item fsgsbase
@itemx no-fsgsbase
Enable/disable the generation of the FSGSBASE instructions.

@cindex @code{target("fxsr")} function attribute, x86
@item fxsr
@itemx no-fxsr
Enable/disable the generation of the FXSR instructions.

@cindex @code{target("gfni")} function attribute, x86
@item gfni
@itemx no-gfni
Enable/disable the generation of the GFNI instructions.

@cindex @code{target("hle")} function attribute, x86
@item hle
@itemx no-hle
Enable/disable the generation of the HLE instruction prefixes.

@cindex @code{target("lwp")} function attribute, x86
@item lwp
@itemx no-lwp
Enable/disable the generation of the LWP instructions.

@cindex @code{target("lzcnt")} function attribute, x86
@item lzcnt
@itemx no-lzcnt
Enable/disable the generation of the LZCNT instructions.

@cindex @code{target("mmx")} function attribute, x86
@item mmx
@itemx no-mmx
Enable/disable the generation of the MMX instructions.

@cindex @code{target("movbe")} function attribute, x86
@item movbe
@itemx no-movbe
Enable/disable the generation of the MOVBE instructions.

@cindex @code{target("movdir64b")} function attribute, x86
@item movdir64b
@itemx no-movdir64b
Enable/disable the generation of the MOVDIR64B instructions.

@cindex @code{target("movdiri")} function attribute, x86
@item movdiri
@itemx no-movdiri
Enable/disable the generation of the MOVDIRI instructions.

@cindex @code{target("mwait")} function attribute, x86
@item mwait
@itemx no-mwait
Enable/disable the generation of the MWAIT and MONITOR instructions.

@cindex @code{target("mwaitx")} function attribute, x86
@item mwaitx
@itemx no-mwaitx
Enable/disable the generation of the MWAITX instructions.

@cindex @code{target("pclmul")} function attribute, x86
@item pclmul
@itemx no-pclmul
Enable/disable the generation of the PCLMUL instructions.

@cindex @code{target("pconfig")} function attribute, x86
@item pconfig
@itemx no-pconfig
Enable/disable the generation of the PCONFIG instructions.

@cindex @code{target("pku")} function attribute, x86
@item pku
@itemx no-pku
Enable/disable the generation of the PKU instructions.

@cindex @code{target("popcnt")} function attribute, x86
@item popcnt
@itemx no-popcnt
Enable/disable the generation of the POPCNT instruction.

@cindex @code{target("prfchw")} function attribute, x86
@item prfchw
@itemx no-prfchw
Enable/disable the generation of the PREFETCHW instruction.

@cindex @code{target("ptwrite")} function attribute, x86
@item ptwrite
@itemx no-ptwrite
Enable/disable the generation of the PTWRITE instructions.

@cindex @code{target("rdpid")} function attribute, x86
@item rdpid
@itemx no-rdpid
Enable/disable the generation of the RDPID instructions.

@cindex @code{target("rdrnd")} function attribute, x86
@item rdrnd
@itemx no-rdrnd
Enable/disable the generation of the RDRND instructions.

@cindex @code{target("rdseed")} function attribute, x86
@item rdseed
@itemx no-rdseed
Enable/disable the generation of the RDSEED instructions.

@cindex @code{target("rtm")} function attribute, x86
@item rtm
@itemx no-rtm
Enable/disable the generation of the RTM instructions.

@cindex @code{target("sahf")} function attribute, x86
@item sahf
@itemx no-sahf
Enable/disable the generation of the SAHF instructions.

@cindex @code{target("sgx")} function attribute, x86
@item sgx
@itemx no-sgx
Enable/disable the generation of the SGX instructions.

@cindex @code{target("sha")} function attribute, x86
@item sha
@itemx no-sha
Enable/disable the generation of the SHA instructions.

@cindex @code{target("shstk")} function attribute, x86
@item shstk
@itemx no-shstk
Enable/disable the shadow stack built-in functions from CET.

@cindex @code{target("sse")} function attribute, x86
@item sse
@itemx no-sse
Enable/disable the generation of the SSE instructions.

@cindex @code{target("sse2")} function attribute, x86
@item sse2
@itemx no-sse2
Enable/disable the generation of the SSE2 instructions.

@cindex @code{target("sse3")} function attribute, x86
@item sse3
@itemx no-sse3
Enable/disable the generation of the SSE3 instructions.

@cindex @code{target("sse4")} function attribute, x86
@item sse4
@itemx no-sse4
Enable/disable the generation of the SSE4 instructions (both SSE4.1
and SSE4.2).

@cindex @code{target("sse4.1")} function attribute, x86
@item sse4.1
@itemx no-sse4.1
Enable/disable the generation of the SSE4.1 instructions.

@cindex @code{target("sse4.2")} function attribute, x86
@item sse4.2
@itemx no-sse4.2
Enable/disable the generation of the SSE4.2 instructions.

@cindex @code{target("sse4a")} function attribute, x86
@item sse4a
@itemx no-sse4a
Enable/disable the generation of the SSE4A instructions.

@cindex @code{target("ssse3")} function attribute, x86
@item ssse3
@itemx no-ssse3
Enable/disable the generation of the SSSE3 instructions.

@cindex @code{target("tbm")} function attribute, x86
@item tbm
@itemx no-tbm
Enable/disable the generation of the TBM instructions.

@cindex @code{target("vaes")} function attribute, x86
@item vaes
@itemx no-vaes
Enable/disable the generation of the VAES instructions.

@cindex @code{target("vpclmulqdq")} function attribute, x86
@item vpclmulqdq
@itemx no-vpclmulqdq
Enable/disable the generation of the VPCLMULQDQ instructions.

@cindex @code{target("waitpkg")} function attribute, x86
@item waitpkg
@itemx no-waitpkg
Enable/disable the generation of the WAITPKG instructions.

@cindex @code{target("wbnoinvd")} function attribute, x86
@item wbnoinvd
@itemx no-wbnoinvd
Enable/disable the generation of the WBNOINVD instructions.

@cindex @code{target("xop")} function attribute, x86
@item xop
@itemx no-xop
Enable/disable the generation of the XOP instructions.

@cindex @code{target("xsave")} function attribute, x86
@item xsave
@itemx no-xsave
Enable/disable the generation of the XSAVE instructions.

@cindex @code{target("xsavec")} function attribute, x86
@item xsavec
@itemx no-xsavec
Enable/disable the generation of the XSAVEC instructions.

@cindex @code{target("xsaveopt")} function attribute, x86
@item xsaveopt
@itemx no-xsaveopt
Enable/disable the generation of the XSAVEOPT instructions.

@cindex @code{target("xsaves")} function attribute, x86
@item xsaves
@itemx no-xsaves
Enable/disable the generation of the XSAVES instructions.

@cindex @code{target("amx-tile")} function attribute, x86
@item amx-tile
@itemx no-amx-tile
Enable/disable the generation of the AMX-TILE instructions.

@cindex @code{target("amx-int8")} function attribute, x86
@item amx-int8
@itemx no-amx-int8
Enable/disable the generation of the AMX-INT8 instructions.

@cindex @code{target("amx-bf16")} function attribute, x86
@item amx-bf16
@itemx no-amx-bf16
Enable/disable the generation of the AMX-BF16 instructions.

@cindex @code{target("uintr")} function attribute, x86
@item uintr
@itemx no-uintr
Enable/disable the generation of the UINTR instructions.

@cindex @code{target("hreset")} function attribute, x86
@item hreset
@itemx no-hreset
Enable/disable the generation of the HRESET instruction.

@cindex @code{target("kl")} function attribute, x86
@item kl
@itemx no-kl
Enable/disable the generation of the KEYLOCKER instructions.

@cindex @code{target("widekl")} function attribute, x86
@item widekl
@itemx no-widekl
Enable/disable the generation of the WIDEKL instructions.

@cindex @code{target("avxvnni")} function attribute, x86
@item avxvnni
@itemx no-avxvnni
Enable/disable the generation of the AVXVNNI instructions.

@cindex @code{target("avxifma")} function attribute, x86
@item avxifma
@itemx no-avxifma
Enable/disable the generation of the AVXIFMA instructions.

@cindex @code{target("avxvnniint8")} function attribute, x86
@item avxvnniint8
@itemx no-avxvnniint8
Enable/disable the generation of the AVXVNNIINT8 instructions.

@cindex @code{target("avxneconvert")} function attribute, x86
@item avxneconvert
@itemx no-avxneconvert
Enable/disable the generation of the AVXNECONVERT instructions.

@cindex @code{target("cmpccxadd")} function attribute, x86
@item cmpccxadd
@itemx no-cmpccxadd
Enable/disable the generation of the CMPccXADD instructions.

@cindex @code{target("amx-fp16")} function attribute, x86
@item amx-fp16
@itemx no-amx-fp16
Enable/disable the generation of the AMX-FP16 instructions.

@cindex @code{target("prefetchi")} function attribute, x86
@item prefetchi
@itemx no-prefetchi
Enable/disable the generation of the PREFETCHI instructions.

@cindex @code{target("raoint")} function attribute, x86
@item raoint
@itemx no-raoint
Enable/disable the generation of the RAOINT instructions.

@cindex @code{target("amx-complex")} function attribute, x86
@item amx-complex
@itemx no-amx-complex
Enable/disable the generation of the AMX-COMPLEX instructions.

@cindex @code{target("avxvnniint16")} function attribute, x86
@item avxvnniint16
@itemx no-avxvnniint16
Enable/disable the generation of the AVXVNNIINT16 instructions.

@cindex @code{target("sm3")} function attribute, x86
@item sm3
@itemx no-sm3
Enable/disable the generation of the SM3 instructions.

@cindex @code{target("sha512")} function attribute, x86
@item sha512
@itemx no-sha512
Enable/disable the generation of the SHA512 instructions.

@cindex @code{target("sm4")} function attribute, x86
@item sm4
@itemx no-sm4
Enable/disable the generation of the SM4 instructions.

@cindex @code{target("usermsr")} function attribute, x86
@item usermsr
@itemx no-usermsr
Enable/disable the generation of the USER_MSR instructions.

@cindex @code{target("apxf")} function attribute, x86
@item apxf
@itemx no-apxf
Enable/disable the generation of the APX features, including
EGPR, PUSH2POP2, NDD and PPX.

@cindex @code{target("avx10.1")} function attribute, x86
@item avx10.1
@itemx no-avx10.1
Enable/disable the generation of the AVX10.1 instructions.

@cindex @code{target("avx10.1-256")} function attribute, x86
@item avx10.1-256
@itemx no-avx10.1-256
Enable/disable the generation of the AVX10.1 instructions.

@cindex @code{target("avx10.1-512")} function attribute, x86
@item avx10.1-512
@itemx no-avx10.1-512
Enable/disable the generation of the AVX10.1 512 bit instructions.

@cindex @code{target("cld")} function attribute, x86
@item cld
@itemx no-cld
Enable/disable the generation of the CLD before string moves.

@cindex @code{target("fancy-math-387")} function attribute, x86
@item fancy-math-387
@itemx no-fancy-math-387
Enable/disable the generation of the @code{sin}, @code{cos}, and
@code{sqrt} instructions on the 387 floating-point unit.

@cindex @code{target("ieee-fp")} function attribute, x86
@item ieee-fp
@itemx no-ieee-fp
Enable/disable the generation of floating point that depends on IEEE arithmetic.

@cindex @code{target("inline-all-stringops")} function attribute, x86
@item inline-all-stringops
@itemx no-inline-all-stringops
Enable/disable inlining of string operations.

@cindex @code{target("inline-stringops-dynamically")} function attribute, x86
@item inline-stringops-dynamically
@itemx no-inline-stringops-dynamically
Enable/disable the generation of the inline code to do small string
operations and calling the library routines for large operations.

@cindex @code{target("align-stringops")} function attribute, x86
@item align-stringops
@itemx no-align-stringops
Do/do not align destination of inlined string operations.

@cindex @code{target("recip")} function attribute, x86
@item recip
@itemx no-recip
Enable/disable the generation of RCPSS, RCPPS, RSQRTSS and RSQRTPS
instructions followed an additional Newton-Raphson step instead of
doing a floating-point division.

@cindex @code{target("general-regs-only")} function attribute, x86
@item general-regs-only
Generate code which uses only the general registers.

@cindex @code{target("arch=@var{ARCH}")} function attribute, x86
@item arch=@var{ARCH}
Specify the architecture to generate code for in compiling the function.

@cindex @code{target("tune=@var{TUNE}")} function attribute, x86
@item tune=@var{TUNE}
Specify the architecture to tune for in compiling the function.

@cindex @code{target("fpmath=@var{FPMATH}")} function attribute, x86
@item fpmath=@var{FPMATH}
Specify which floating-point unit to use.  You must specify the
@code{target("fpmath=sse,387")} option as
@code{target("fpmath=sse+387")} because the comma would separate
different options.

@cindex @code{prefer-vector-width} function attribute, x86
@item prefer-vector-width=@var{OPT}
On x86 targets, the @code{prefer-vector-width} attribute informs the
compiler to use @var{OPT}-bit vector width in instructions
instead of the default on the selected platform.

Valid @var{OPT} values are:

@table @samp
@item none
No extra limitations applied to GCC other than defined by the selected platform.

@item 128
Prefer 128-bit vector width for instructions.

@item 256
Prefer 256-bit vector width for instructions.

@item 512
Prefer 512-bit vector width for instructions.
@end table

@end table

@cindex @code{indirect_branch} function attribute, x86
@item indirect_branch("@var{choice}")
On x86 targets, the @code{indirect_branch} attribute causes the compiler
to convert indirect call and jump with @var{choice}.  @samp{keep}
keeps indirect call and jump unmodified.  @samp{thunk} converts indirect
call and jump to call and return thunk.  @samp{thunk-inline} converts
indirect call and jump to inlined call and return thunk.
@samp{thunk-extern} converts indirect call and jump to external call
and return thunk provided in a separate object file.

@cindex @code{function_return} function attribute, x86
@item function_return("@var{choice}")
On x86 targets, the @code{function_return} attribute causes the compiler
to convert function return with @var{choice}.  @samp{keep} keeps function
return unmodified.  @samp{thunk} converts function return to call and
return thunk.  @samp{thunk-inline} converts function return to inlined
call and return thunk.  @samp{thunk-extern} converts function return to
external call and return thunk provided in a separate object file.

@cindex @code{nocf_check} function attribute
@item nocf_check
The @code{nocf_check} attribute on a function is used to inform the
compiler that the function's prologue should not be instrumented when
compiled with the @option{-fcf-protection=branch} option.  The
compiler assumes that the function's address is a valid target for a
control-flow transfer.

The @code{nocf_check} attribute on a type of pointer to function is
used to inform the compiler that a call through the pointer should
not be instrumented when compiled with the
@option{-fcf-protection=branch} option.  The compiler assumes
that the function's address from the pointer is a valid target for
a control-flow transfer.  A direct function call through a function
name is assumed to be a safe call thus direct calls are not
instrumented by the compiler.

The @code{nocf_check} attribute is applied to an object's type.
In case of assignment of a function address or a function pointer to
another pointer, the attribute is not carried over from the right-hand
object's type; the type of left-hand object stays unchanged.  The
compiler checks for @code{nocf_check} attribute mismatch and reports
a warning in case of mismatch.

@smallexample
@{
int foo (void) __attribute__(nocf_check);
void (*foo1)(void) __attribute__(nocf_check);
void (*foo2)(void);

/* foo's address is assumed to be valid.  */
int
foo (void) 

  /* This call site is not checked for control-flow 
     validity.  */
  (*foo1)();

  /* A warning is issued about attribute mismatch.  */
  foo1 = foo2; 

  /* This call site is still not checked.  */
  (*foo1)();

  /* This call site is checked.  */
  (*foo2)();

  /* A warning is issued about attribute mismatch.  */
  foo2 = foo1; 

  /* This call site is still checked.  */
  (*foo2)();

  return 0;
@}
@end smallexample

@cindex @code{cf_check} function attribute, x86
@item cf_check

The @code{cf_check} attribute on a function is used to inform the
compiler that ENDBR instruction should be placed at the function
entry when @option{-fcf-protection=branch} is enabled.

@cindex @code{indirect_return} function attribute, x86
@item indirect_return

The @code{indirect_return} attribute can be applied to a function,
as well as variable or type of function pointer to inform the
compiler that the function may return via indirect branch.

@cindex @code{fentry_name} function attribute, x86
@item fentry_name("@var{name}")
On x86 targets, the @code{fentry_name} attribute sets the function to
call on function entry when function instrumentation is enabled
with @option{-pg -mfentry}. When @var{name} is nop then a 5 byte
nop sequence is generated.

@cindex @code{fentry_section} function attribute, x86
@item fentry_section("@var{name}")
On x86 targets, the @code{fentry_section} attribute sets the name
of the section to record function entry instrumentation calls in when
enabled with @option{-pg -mrecord-mcount}

@cindex @code{nodirect_extern_access} function attribute
@opindex mno-direct-extern-access
@item nodirect_extern_access
This attribute, attached to a global variable or function, is the
counterpart to option @option{-mno-direct-extern-access}.

@end table

@subsubsection Inlining rules
On the x86, the inliner does not inline a
function that has different target options than the caller, unless the
callee has a subset of the target options of the caller.  For example
a function declared with @code{target("sse3")} can inline a function
with @code{target("sse2")}, since @code{-msse3} implies @code{-msse2}.

Besides the basic rule, when a function specifies
@code{target("arch=@var{ARCH}")} or @code{target("tune=@var{TUNE}")}
attribute, the inlining rule will be different. It allows inlining of
a function with default @option{-march=x86-64} and
@option{-mtune=generic} specified, or a function that has a subset
of ISA features and marked with always_inline.

@node Xstormy16 Function Attributes
@subsection Xstormy16 Function Attributes

These function attributes are supported by the Xstormy16 back end:

@table @code
@cindex @code{interrupt} function attribute, Xstormy16
@item interrupt
Use this attribute to indicate
that the specified function is an interrupt handler.  The compiler generates
function entry and exit sequences suitable for use in an interrupt handler
when this attribute is present.
@end table

@node Variable Attributes
@section Specifying Attributes of Variables
@cindex attribute of variables
@cindex variable attributes

You can use attributes to specify special properties
of variables, function parameters, or structure, union, and, in C++, class
members.  Some attributes are currently
defined generically for variables.  Other attributes are defined for
variables on particular target systems.  Other attributes are available
for functions (@pxref{Function Attributes}), labels (@pxref{Label Attributes}),
enumerators (@pxref{Enumerator Attributes}), statements
(@pxref{Statement Attributes}), and for types (@pxref{Type Attributes}).
Other front ends might define more attributes
(@pxref{C++ Extensions,,Extensions to the C++ Language}).

GCC provides two different ways to specify attributes: the traditional
GNU syntax using @samp{__attribute__ ((...))} annotations, and the
newer standard C and C++ syntax using @samp{[[...]]} with the
@samp{gnu::} prefix on attribute names.  Note that the exact rules for
placement of attributes in your source code are different depending on
which syntax you use.  @xref{Attribute Syntax}, for details.

@menu
* Common Variable Attributes::
* ARC Variable Attributes::
* AVR Variable Attributes::
* Blackfin Variable Attributes::
* H8/300 Variable Attributes::
* IA-64 Variable Attributes::
* LoongArch Variable Attributes::
* M32R/D Variable Attributes::
* Microsoft Windows Variable Attributes::
* MSP430 Variable Attributes::
* Nvidia PTX Variable Attributes::
* PowerPC Variable Attributes::
* RL78 Variable Attributes::
* V850 Variable Attributes::
* x86 Variable Attributes::
* Xstormy16 Variable Attributes::
@end menu

@node Common Variable Attributes
@subsection Common Variable Attributes

The following attributes are supported on most targets.

@table @code
@c Keep this table alphabetized by attribute name.  Treat _ as space.

@cindex @code{alias} variable attribute
@item alias ("@var{target}")
The @code{alias} variable attribute causes the declaration to be emitted
as an alias for another symbol known as an @dfn{alias target}.  Except
for top-level qualifiers the alias target must have the same type as
the alias.  For instance, the following

@smallexample
int var_target;
extern int __attribute__ ((alias ("var_target"))) var_alias;
@end smallexample

@noindent
defines @code{var_alias} to be an alias for the @code{var_target} variable.

It is an error if the alias target is not defined in the same translation
unit as the alias.

Note that in the absence of the attribute GCC assumes that distinct
declarations with external linkage denote distinct objects.  Using both
the alias and the alias target to access the same object is undefined
in a translation unit without a declaration of the alias with the attribute.

This attribute requires assembler and object file support, and may not be
available on all targets.

@cindex @code{aligned} variable attribute
@item aligned
@itemx aligned (@var{alignment})
The @code{aligned} attribute specifies a minimum alignment for the variable
or structure field, measured in bytes.  When specified, @var{alignment} must
be an integer constant power of 2.  Specifying no @var{alignment} argument
implies the maximum alignment for the target, which is often, but by no
means always, 8 or 16 bytes.

For example, the declaration:

@smallexample
int x __attribute__ ((aligned (16))) = 0;
@end smallexample

@noindent
causes the compiler to allocate the global variable @code{x} on a
16-byte boundary.  On a 68040, this could be used in conjunction with
an @code{asm} expression to access the @code{move16} instruction which
requires 16-byte aligned operands.

You can also specify the alignment of structure fields.  For example, to
create a double-word aligned @code{int} pair, you could write:

@smallexample
struct foo @{ int x[2] __attribute__ ((aligned (8))); @};
@end smallexample

@noindent
This is an alternative to creating a union with a @code{double} member,
which forces the union to be double-word aligned.

As in the preceding examples, you can explicitly specify the alignment
(in bytes) that you wish the compiler to use for a given variable or
structure field.  Alternatively, you can leave out the alignment factor
and just ask the compiler to align a variable or field to the
default alignment for the target architecture you are compiling for.
The default alignment is sufficient for all scalar types, but may not be
enough for all vector types on a target that supports vector operations.
The default alignment is fixed for a particular target ABI.

GCC also provides a target specific macro @code{__BIGGEST_ALIGNMENT__},
which is the largest alignment ever used for any data type on the
target machine you are compiling for.  For example, you could write:

@smallexample
short array[3] __attribute__ ((aligned (__BIGGEST_ALIGNMENT__)));
@end smallexample

The compiler automatically sets the alignment for the declared
variable or field to @code{__BIGGEST_ALIGNMENT__}.  Doing this can
often make copy operations more efficient, because the compiler can
use whatever instructions copy the biggest chunks of memory when
performing copies to or from the variables or fields that you have
aligned this way.  Note that the value of @code{__BIGGEST_ALIGNMENT__}
may change depending on command-line options.

When used on a struct, or struct member, the @code{aligned} attribute can
only increase the alignment; in order to decrease it, the @code{packed}
attribute must be specified as well.  When used as part of a typedef, the
@code{aligned} attribute can both increase and decrease alignment, and
specifying the @code{packed} attribute generates a warning.

Note that the effectiveness of @code{aligned} attributes for static
variables may be limited by inherent limitations in the system linker
and/or object file format.  On some systems, the linker is
only able to arrange for variables to be aligned up to a certain maximum
alignment.  (For some linkers, the maximum supported alignment may
be very very small.)  If your linker is only able to align variables
up to a maximum of 8-byte alignment, then specifying @code{aligned(16)}
in an @code{__attribute__} still only provides you with 8-byte
alignment.  See your linker documentation for further information.

Stack variables are not affected by linker restrictions; GCC can properly
align them on any target.

The @code{aligned} attribute can also be used for functions
(@pxref{Common Function Attributes}.)

@cindex @code{counted_by} variable attribute
@item counted_by (@var{count})
The @code{counted_by} attribute may be attached to the C99 flexible array
member of a structure.  It indicates that the number of the elements of the
array is given by the field "@var{count}" in the same structure as the
flexible array member.
GCC may use this information to improve detection of object size information
for such structures and provide better results in compile-time diagnostics
and runtime features like the array bound sanitizer and
the @code{__builtin_dynamic_object_size}.

For instance, the following code:

@smallexample
struct P @{
  size_t count;
  char other;
  char array[] __attribute__ ((counted_by (count)));
@} *p;
@end smallexample

@noindent
specifies that the @code{array} is a flexible array member whose number of
elements is given by the field @code{count} in the same structure.

The field that represents the number of the elements should have an
integer type.  Otherwise, the compiler reports an error and ignores
the attribute.

When the field that represents the number of the elements is assigned a
negative integer value, the compiler treats the value as zero.

An explicit @code{counted_by} annotation defines a relationship between
two objects, @code{p->array} and @code{p->count}, and there are the
following requirementthat on the relationship between this pair:

@itemize @bullet
@item
@code{p->count} must be initialized before the first reference to
@code{p->array};

@item
@code{p->array} has @emph{at least} @code{p->count} number of elements
available all the time.  This relationship must hold even after any of
these related objects are updated during the program.
@end itemize

It's the user's responsibility to make sure the above requirements to
be kept all the time.  Otherwise the compiler reports warnings,
at the same time, the results of the array bound sanitizer and the
@code{__builtin_dynamic_object_size} is undefined.

One important feature of the attribute is, a reference to the flexible
array member field uses the latest value assigned to the field that
represents the number of the elements before that reference.  For example,

@smallexample
  p->count = val1;
  p->array[20] = 0;  // ref1 to p->array
  p->count = val2;
  p->array[30] = 0;  // ref2 to p->array
@end smallexample

@noindent
in the above, @code{ref1} uses @code{val1} as the number of the elements in
@code{p->array}, and @code{ref2} uses @code{val2} as the number of elements
in @code{p->array}.

@cindex @code{alloc_size} variable attribute
@item alloc_size (@var{position})
@itemx alloc_size (@var{position-1}, @var{position-2})
The @code{alloc_size} variable attribute may be applied to the declaration
of a pointer to a function that returns a pointer and takes at least one
argument of an integer type.  It indicates that the returned pointer points
to an object whose size is given by the function argument at @var{position},
or by the product of the arguments at @var{position-1} and @var{position-2}.
Meaningful sizes are positive values less than @code{PTRDIFF_MAX}.  Other
sizes are diagnosed when detected.  GCC uses this information to improve
the results of @code{__builtin_object_size}.

For instance, the following declarations

@smallexample
typedef __attribute__ ((alloc_size (1, 2))) void*
  (*calloc_ptr) (size_t, size_t);
typedef __attribute__ ((alloc_size (1))) void*
  (*malloc_ptr) (size_t);
@end smallexample

@noindent
specify that @code{calloc_ptr} is a pointer of a function that, like
the standard C function @code{calloc}, returns an object whose size
is given by the product of arguments 1 and 2, and similarly, that
@code{malloc_ptr}, like the standard C function @code{malloc},
returns an object whose size is given by argument 1 to the function.

@cindex @code{cleanup} variable attribute
@item cleanup (@var{cleanup_function})
The @code{cleanup} attribute runs a function when the variable goes
out of scope.  This attribute can only be applied to auto function
scope variables; it may not be applied to parameters or variables
with static storage duration.  The function must take one parameter,
a pointer to a type compatible with the variable.  The return value
of the function (if any) is ignored.

When multiple variables in the same scope have @code{cleanup}
attributes, at exit from the scope their associated cleanup functions
are run in reverse order of definition (last defined, first
cleanup).

If @option{-fexceptions} is enabled, then @var{cleanup_function}
is run during the stack unwinding that happens during the
processing of the exception.  Note that the @code{cleanup} attribute
does not allow the exception to be caught, only to perform an action.
It is undefined what happens if @var{cleanup_function} does not
return normally.

@cindex @code{common} variable attribute
@cindex @code{nocommon} variable attribute
@opindex fcommon
@opindex fno-common
@item common
@itemx nocommon
The @code{common} attribute requests GCC to place a variable in
``common'' storage.  The @code{nocommon} attribute requests the
opposite---to allocate space for it directly.

These attributes override the default chosen by the
@option{-fno-common} and @option{-fcommon} flags respectively.

@cindex @code{copy} variable attribute
@item copy
@itemx copy (@var{variable})
The @code{copy} attribute applies the set of attributes with which
@var{variable} has been declared to the declaration of the variable
to which the attribute is applied.  The attribute is designed for
libraries that define aliases that are expected to specify the same
set of attributes as the aliased symbols.  The @code{copy} attribute
can be used with variables, functions or types.  However, the kind
of symbol to which the attribute is applied (either varible or
function) must match the kind of symbol to which the argument refers.
The @code{copy} attribute copies only syntactic and semantic attributes
but not attributes that affect a symbol's linkage or visibility such as
@code{alias}, @code{visibility}, or @code{weak}.  The @code{deprecated}
attribute is also not copied.  @xref{Common Function Attributes}.
@xref{Common Type Attributes}.

@cindex @code{deprecated} variable attribute
@item deprecated
@itemx deprecated (@var{msg})
The @code{deprecated} attribute results in a warning if the variable
is used anywhere in the source file.  This is useful when identifying
variables that are expected to be removed in a future version of a
program.  The warning also includes the location of the declaration
of the deprecated variable, to enable users to easily find further
information about why the variable is deprecated, or what they should
do instead.  Note that the warning only occurs for uses:

@smallexample
extern int old_var __attribute__ ((deprecated));
extern int old_var;
int new_fn () @{ return old_var; @}
@end smallexample

@noindent
results in a warning on line 3 but not line 2.  The optional @var{msg}
argument, which must be a string, is printed in the warning if
present.

The @code{deprecated} attribute can also be used for functions and
types (@pxref{Common Function Attributes},
@pxref{Common Type Attributes}).

The message attached to the attribute is affected by the setting of
the @option{-fmessage-length} option.

@cindex @code{mode} variable attribute
@item mode (@var{mode})
This attribute specifies the data type for the declaration---whichever
type corresponds to the mode @var{mode}.  This in effect lets you
request an integer or floating-point type according to its width.

@xref{Machine Modes,,, gccint, GNU Compiler Collection (GCC) Internals},
for a list of the possible keywords for @var{mode}.
You may also specify a mode of @code{byte} or @code{__byte__} to
indicate the mode corresponding to a one-byte integer, @code{word} or
@code{__word__} for the mode of a one-word integer, and @code{pointer}
or @code{__pointer__} for the mode used to represent pointers.

@cindex @code{no_icf} variable attribute
@item no_icf
This variable attribute prevents a variable from being merged with another
equivalent variable.

@cindex @code{noinit} variable attribute
@item noinit
Any data with the @code{noinit} attribute will not be initialized by
the C runtime startup code, or the program loader.  Not initializing
data in this way can reduce program startup times.

This attribute is specific to ELF targets and relies on the linker
script to place sections with the @code{.noinit} prefix in the right
location.

@cindex @code{nonstring} variable attribute
@item nonstring
The @code{nonstring} variable attribute specifies that an object or member
declaration with type array of @code{char}, @code{signed char}, or
@code{unsigned char}, or pointer to such a type is intended to store
character arrays that do not necessarily contain a terminating @code{NUL}.
This is useful in detecting uses of such arrays or pointers with functions
that expect @code{NUL}-terminated strings, and to avoid warnings when such
an array or pointer is used as an argument to a bounded string manipulation
function such as @code{strncpy}.  For example, without the attribute, GCC
will issue a warning for the @code{strncpy} call below because it may
truncate the copy without appending the terminating @code{NUL} character.
Using the attribute makes it possible to suppress the warning.  However,
when the array is declared with the attribute the call to @code{strlen} is
diagnosed because when the array doesn't contain a @code{NUL}-terminated
string the call is undefined.  To copy, compare, of search non-string
character arrays use the @code{memcpy}, @code{memcmp}, @code{memchr},
and other functions that operate on arrays of bytes.  In addition,
calling @code{strnlen} and @code{strndup} with such arrays is safe
provided a suitable bound is specified, and not diagnosed.

@smallexample
struct Data
@{
  char name [32] __attribute__ ((nonstring));
@};

int f (struct Data *pd, const char *s)
@{
  strncpy (pd->name, s, sizeof pd->name);
  @dots{}
  return strlen (pd->name);   // unsafe, gets a warning
@}
@end smallexample

@cindex @code{objc_nullability} variable attribute
@item objc_nullability (@var{nullability kind}) @r{(Objective-C and Objective-C++ only)}
This attribute applies to pointer variables only.  It allows marking the
pointer with one of four possible values describing the conditions under
which the pointer might have a @code{nil} value. In most cases, the
attribute is intended to be an internal representation for property and
method nullability (specified by language keywords); it is not recommended
to use it directly.

When @var{nullability kind} is @code{"unspecified"} or @code{0}, nothing is
known about the conditions in which the pointer might be @code{nil}. Making
this state specific serves to avoid false positives in diagnostics.

When @var{nullability kind} is @code{"nonnull"} or @code{1}, the pointer has
no meaning if it is @code{nil} and thus the compiler is free to emit
diagnostics if it can be determined that the value will be @code{nil}.

When @var{nullability kind} is @code{"nullable"} or @code{2}, the pointer might
be @code{nil} and carry meaning as such.

When @var{nullability kind} is @code{"resettable"} or @code{3} (used only in
the context of property attribute lists) this describes the case in which a
property setter may take the value @code{nil} (which perhaps causes the
property to be reset in some manner to a default) but for which the property
getter will never validly return @code{nil}.

@cindex @code{packed} variable attribute
@item packed
The @code{packed} attribute specifies that a structure member should have
the smallest possible alignment---one bit for a bit-field and one byte
otherwise, unless a larger value is specified with the @code{aligned}
attribute.  The attribute does not apply to non-member objects.

For example in the structure below, the member array @code{x} is packed
so that it immediately follows @code{a} with no intervening padding:

@smallexample
struct foo
@{
  char a;
  int x[2] __attribute__ ((packed));
@};
@end smallexample

@emph{Note:} The 4.1, 4.2 and 4.3 series of GCC ignore the
@code{packed} attribute on bit-fields of type @code{char}.  This has
been fixed in GCC 4.4 but the change can lead to differences in the
structure layout.  See the documentation of
@option{-Wpacked-bitfield-compat} for more information.

@cindex @code{persistent} variable attribute
@item persistent
Any data with the @code{persistent} attribute will not be initialized by
the C runtime startup code, but will be initialized by the program
loader.  This enables the value of the variable to @samp{persist}
between processor resets.

This attribute is specific to ELF targets and relies on the linker
script to place the sections with the @code{.persistent} prefix in the
right location.  Specifically, some type of non-volatile, writeable
memory is required.

@cindex @code{section} variable attribute
@item section ("@var{section-name}")
Normally, the compiler places the objects it generates in sections like
@code{data} and @code{bss}.  Sometimes, however, you need additional sections,
or you need certain particular variables to appear in special sections,
for example to map to special hardware.  The @code{section}
attribute specifies that a variable (or function) lives in a particular
section.  For example, this small program uses several specific section names:

@smallexample
struct duart a __attribute__ ((section ("DUART_A"))) = @{ 0 @};
struct duart b __attribute__ ((section ("DUART_B"))) = @{ 0 @};
char stack[10000] __attribute__ ((section ("STACK"))) = @{ 0 @};
int init_data __attribute__ ((section ("INITDATA")));

main()
@{
  /* @r{Initialize stack pointer} */
  init_sp (stack + sizeof (stack));

  /* @r{Initialize initialized data} */
  memcpy (&init_data, &data, &edata - &data);

  /* @r{Turn on the serial ports} */
  init_duart (&a);
  init_duart (&b);
@}
@end smallexample

@noindent
Use the @code{section} attribute with
@emph{global} variables and not @emph{local} variables,
as shown in the example.

You may use the @code{section} attribute with initialized or
uninitialized global variables but the linker requires
each object be defined once, with the exception that uninitialized
variables tentatively go in the @code{common} (or @code{bss}) section
and can be multiply ``defined''.  Using the @code{section} attribute
changes what section the variable goes into and may cause the
linker to issue an error if an uninitialized variable has multiple
definitions.  You can force a variable to be initialized with the
@option{-fno-common} flag or the @code{nocommon} attribute.

Some file formats do not support arbitrary sections so the @code{section}
attribute is not available on all platforms.
If you need to map the entire contents of a module to a particular
section, consider using the facilities of the linker instead.

@cindex @code{strict_flex_array} variable attribute
@item strict_flex_array (@var{level})
The @code{strict_flex_array} attribute should be attached to the trailing
array field of a structure.  It controls when to treat the trailing array
field of a structure as a flexible array member for the purposes of accessing
the elements of such an array.
@var{level} must be an integer betwen 0 to 3.

@var{level}=0 is the least strict level, all trailing arrays of structures
are treated as flexible array members. @var{level}=3 is the strictest level,
only when the trailing array is declared as a flexible array member per C99
standard onwards (@samp{[]}), it is treated as a flexible array member.

There are two more levels in between 0 and 3, which are provided to
support older codes that use GCC zero-length array extension
(@samp{[0]}) or one-element array as flexible array members
(@samp{[1]}).  When @var{level} is 1, the trailing array is treated as
a flexible array member when it is declared as either @samp{[]},
@samp{[0]}, or @samp{[1]}; When @var{level} is 2, the trailing array
is treated as a flexible array member when it is declared as either
@samp{[]}, or @samp{[0]}.

This attribute can be used with or without the
@option{-fstrict-flex-arrays} command-line option.  When both the
attribute and the option are present at the same time, the level of
the strictness for the specific trailing array field is determined by
the attribute.

The @code{strict_flex_array} attribute interacts with the
@option{-Wstrict-flex-arrays} option.  @xref{Warning Options}, for more
information.

@cindex @code{tls_model} variable attribute
@item tls_model ("@var{tls_model}")
The @code{tls_model} attribute sets thread-local storage model
(@pxref{Thread-Local}) of a particular @code{__thread} variable,
overriding @option{-ftls-model=} command-line switch on a per-variable
basis.
The @var{tls_model} argument should be one of @code{global-dynamic},
@code{local-dynamic}, @code{initial-exec} or @code{local-exec}.

Not all targets support this attribute.

@cindex @code{unavailable} variable attribute
@item unavailable
@itemx unavailable (@var{msg})
The @code{unavailable} attribute indicates that the variable so marked
is not available, if it is used anywhere in the source file.  It behaves
in the same manner as the @code{deprecated} attribute except that the
compiler will emit an error rather than a warning.

It is expected that items marked as @code{deprecated} will eventually be
withdrawn from interfaces, and then become unavailable.  This attribute
allows for marking them appropriately.

The @code{unavailable} attribute can also be used for functions and
types (@pxref{Common Function Attributes},
@pxref{Common Type Attributes}).

@cindex @code{unused} variable attribute
@item unused
This attribute, attached to a variable or structure field, means that
the variable or field is meant to be possibly unused.  GCC does not
produce a warning for this variable or field.

@cindex @code{used} variable attribute
@item used
This attribute, attached to a variable with static storage, means that
the variable must be emitted even if it appears that the variable is not
referenced.

When applied to a static data member of a C++ class template, the
attribute also means that the member is instantiated if the
class itself is instantiated.

@cindex @code{retain} variable attribute
@item retain
For ELF targets that support the GNU or FreeBSD OSABIs, this attribute
will save the variable from linker garbage collection.  To support
this behavior, variables that have not been placed in specific sections
(e.g. by the @code{section} attribute, or the @code{-fdata-sections} option),
will be placed in new, unique sections.

This additional functionality requires Binutils version 2.36 or later.

@cindex @code{uninitialized} variable attribute
@item uninitialized
This attribute, attached to a variable with automatic storage, means that
the variable should not be automatically initialized by the compiler when
the option @code{-ftrivial-auto-var-init} presents.

With the option @code{-ftrivial-auto-var-init}, all the automatic variables
that do not have explicit initializers will be initialized by the compiler.
These additional compiler initializations might incur run-time overhead,
sometimes dramatically.  This attribute can be used to mark some variables
to be excluded from such automatical initialization in order to reduce runtime
overhead.

This attribute has no effect when the option @code{-ftrivial-auto-var-init}
does not present.

@cindex @code{vector_size} variable attribute
@item vector_size (@var{bytes})
This attribute specifies the vector size for the type of the declared
variable, measured in bytes.  The type to which it applies is known as
the @dfn{base type}.  The @var{bytes} argument must be a positive
power-of-two multiple of the base type size.  For example, the declaration:

@smallexample
int foo __attribute__ ((vector_size (16)));
@end smallexample

@noindent
causes the compiler to set the mode for @code{foo}, to be 16 bytes,
divided into @code{int} sized units.  Assuming a 32-bit @code{int},
@code{foo}'s type is a vector of four units of four bytes each, and
the corresponding mode of @code{foo} is @code{V4SI}.
@xref{Vector Extensions}, for details of manipulating vector variables.

This attribute is only applicable to integral and floating scalars,
although arrays, pointers, and function return values are allowed in
conjunction with this construct.

Aggregates with this attribute are invalid, even if they are of the same
size as a corresponding scalar.  For example, the declaration:

@smallexample
struct S @{ int a; @};
struct S  __attribute__ ((vector_size (16))) foo;
@end smallexample

@noindent
is invalid even if the size of the structure is the same as the size of
the @code{int}.

@cindex @code{visibility} variable attribute
@item visibility ("@var{visibility_type}")
This attribute affects the linkage of the declaration to which it is attached.
The @code{visibility} attribute is described in
@ref{Common Function Attributes}.

@cindex @code{warn_if_not_aligned} variable attribute
@item warn_if_not_aligned (@var{alignment})
This attribute specifies a threshold for the structure field, measured
in bytes.  If the structure field is aligned below the threshold, a
warning will be issued.  For example, the declaration:

@smallexample
struct foo
@{
  int i1;
  int i2;
  unsigned long long x __attribute__ ((warn_if_not_aligned (16)));
@};
@end smallexample

@noindent
causes the compiler to issue an warning on @code{struct foo}, like
@samp{warning: alignment 8 of 'struct foo' is less than 16}.
The compiler also issues a warning, like @samp{warning: 'x' offset
8 in 'struct foo' isn't aligned to 16}, when the structure field has
the misaligned offset:

@smallexample
struct __attribute__ ((aligned (16))) foo
@{
  int i1;
  int i2;
  unsigned long long x __attribute__ ((warn_if_not_aligned (16)));
@};
@end smallexample

This warning can be disabled by @option{-Wno-if-not-aligned}.
The @code{warn_if_not_aligned} attribute can also be used for types
(@pxref{Common Type Attributes}.)

@cindex @code{weak} variable attribute
@item weak
The @code{weak} attribute is described in
@ref{Common Function Attributes}.

@end table

@node ARC Variable Attributes
@subsection ARC Variable Attributes

@table @code
@cindex @code{aux} variable attribute, ARC
@item aux
The @code{aux} attribute is used to directly access the ARC's
auxiliary register space from C.  The auxilirary register number is
given via attribute argument.

@end table

@node AVR Variable Attributes
@subsection AVR Variable Attributes

@table @code
@cindex @code{progmem} variable attribute, AVR
@item progmem
The @code{progmem} attribute is used on the AVR to place read-only
data in the non-volatile program memory (flash). The @code{progmem}
attribute accomplishes this by putting respective variables into a
section whose name starts with @code{.progmem}.

This attribute works similar to the @code{section} attribute
but adds additional checking.

@table @asis
@item @bullet{} Ordinary AVR cores with 32 general purpose registers:
@code{progmem} affects the location
of the data but not how this data is accessed.
In order to read data located with the @code{progmem} attribute
(inline) assembler must be used.
@smallexample
/* Use custom macros from AVR-LibC */
#include <avr/pgmspace.h> 

/* Locate var in flash memory */
const int var[2] PROGMEM = @{ 1, 2 @};

int read_var (int i)
@{
    /* Access var[] by accessor macro from avr/pgmspace.h */
    return (int) pgm_read_word (& var[i]);
@}
@end smallexample

AVR is a Harvard architecture processor and data and read-only data
normally resides in the data memory (RAM).

See also the @ref{AVR Named Address Spaces} section for
an alternate way to locate and access data in flash memory.

@item @bullet{} AVR cores with flash memory visible in the RAM address range:
On such devices, there is no need for attribute @code{progmem} or
@ref{AVR Named Address Spaces,,@code{__flash}} qualifier at all.
Just use standard C / C++.  The compiler will generate @code{LD*}
instructions.  As flash memory is visible in the RAM address range,
and the default linker script does @emph{not} locate @code{.rodata} in
RAM, no special features are needed in order not to waste RAM for
read-only data or to read from flash.  You might even get slightly better
performance by
avoiding @code{progmem} and @code{__flash}.  This applies to devices from
families @code{avrtiny} and @code{avrxmega3}, see @ref{AVR Options} for
an overview.

@item @bullet{} Reduced AVR Tiny cores like ATtiny40:
The compiler adds @code{0x4000}
to the addresses of objects and declarations in @code{progmem} and locates
the objects in flash memory, namely in section @code{.progmem.data}.
The offset is needed because the flash memory is visible in the RAM
address space starting at address @code{0x4000}.

Data in @code{progmem} can be accessed by means of ordinary C@tie{}code,
no special functions or macros are needed.

@smallexample
/* var is located in flash memory */
extern const int var[2] __attribute__((progmem));

int read_var (int i)
@{
    return var[i];
@}
@end smallexample

Please notice that on these devices, there is no need for @code{progmem}
at all.

@end table

@cindex @code{io} variable attribute, AVR
@item io
@itemx io (@var{addr})
Variables with the @code{io} attribute are used to address
memory-mapped peripherals in the I/O address range.
No memory is allocated.
If an address is specified, the variable
is assigned that address, and the value is interpreted as an
address in the data address space.
Example:

@smallexample
volatile int porta __attribute__((io (__AVR_SFR_OFFSET__ + 0x2)));
@end smallexample

Otherwise, the variable is not assigned an address, but the
compiler will still use @code{in} and @code{out} instructions where applicable,
assuming some other module assigns an address in the I/O address range.
Example:

@smallexample
extern volatile int porta __attribute__((io));
@end smallexample

@cindex @code{io_low} variable attribute, AVR
@item io_low
@itemx io_low (@var{addr})
This is like the @code{io} attribute, but additionally it informs the
compiler that the object lies in the lower half of the I/O area,
allowing the use of @code{cbi}, @code{sbi}, @code{sbic} and @code{sbis}
instructions.

@cindex @code{address} variable attribute, AVR
@item address (@var{addr})
Variables with the @code{address} attribute can be used to address
memory-mapped peripherals that may lie outside the I/O address range.
Just like with the @code{io} and @code{io_low} attributes, no memory is
allocated.

@smallexample
volatile int porta __attribute__((address (0x600)));
@end smallexample

This attribute can also be used to define symbols in C/C++
code which otherwise would require assembly, a linker description file
or command-line options like @code{-Wl,--defsym,a_symbol=@var{value}}.
For example,
@smallexample
int a_symbol __attribute__((weak, address (1234)));
@end smallexample
will be compiled to
@smallexample
.weak a_symbol
a_symbol = 1234
@end smallexample

@cindex @code{absdata} variable attribute, AVR
@item absdata
Variables in static storage and with the @code{absdata} attribute can
be accessed by the @code{LDS} and @code{STS} instructions which take
absolute addresses.

@itemize @bullet
@item
This attribute is only supported for the reduced AVR Tiny core
like ATtiny40.

@item
You must make sure that respective data is located in the
address range @code{0x40}@dots{}@code{0xbf} accessible by
@code{LDS} and @code{STS}.  One way to achieve this as an
appropriate linker description file.

@item
If the location does not fit the address range of @code{LDS}
and @code{STS}, there is currently (Binutils 2.26) just an unspecific
warning like
@quotation
@code{module.cc:(.text+0x1c): warning: internal error: out of range error}
@end quotation

@end itemize

See also the @option{-mabsdata} @ref{AVR Options,command-line option}.

@end table

@node Blackfin Variable Attributes
@subsection Blackfin Variable Attributes

Three attributes are currently defined for the Blackfin.

@table @code
@cindex @code{l1_data} variable attribute, Blackfin
@cindex @code{l1_data_A} variable attribute, Blackfin
@cindex @code{l1_data_B} variable attribute, Blackfin
@item l1_data
@itemx l1_data_A
@itemx l1_data_B
Use these attributes on the Blackfin to place the variable into L1 Data SRAM.
Variables with @code{l1_data} attribute are put into the specific section
named @code{.l1.data}. Those with @code{l1_data_A} attribute are put into
the specific section named @code{.l1.data.A}. Those with @code{l1_data_B}
attribute are put into the specific section named @code{.l1.data.B}.

@cindex @code{l2} variable attribute, Blackfin
@item l2
Use this attribute on the Blackfin to place the variable into L2 SRAM.
Variables with @code{l2} attribute are put into the specific section
named @code{.l2.data}.
@end table

@node H8/300 Variable Attributes
@subsection H8/300 Variable Attributes

These variable attributes are available for H8/300 targets:

@table @code
@cindex @code{eightbit_data} variable attribute, H8/300
@cindex eight-bit data on the H8/300, H8/300H, and H8S
@item eightbit_data
Use this attribute on the H8/300, H8/300H, and H8S to indicate that the specified
variable should be placed into the eight-bit data section.
The compiler generates more efficient code for certain operations
on data in the eight-bit data area.  Note the eight-bit data area is limited to
256 bytes of data.

You must use GAS and GLD from GNU binutils version 2.7 or later for
this attribute to work correctly.

@cindex @code{tiny_data} variable attribute, H8/300
@cindex tiny data section on the H8/300H and H8S
@item tiny_data
Use this attribute on the H8/300H and H8S to indicate that the specified
variable should be placed into the tiny data section.
The compiler generates more efficient code for loads and stores
on data in the tiny data section.  Note the tiny data area is limited to
slightly under 32KB of data.

@end table

@node IA-64 Variable Attributes
@subsection IA-64 Variable Attributes

The IA-64 back end supports the following variable attribute:

@table @code
@cindex @code{model} variable attribute, IA-64
@item model (@var{model-name})

On IA-64, use this attribute to set the addressability of an object.
At present, the only supported identifier for @var{model-name} is
@code{small}, indicating addressability via ``small'' (22-bit)
addresses (so that their addresses can be loaded with the @code{addl}
instruction).  Caveat: such addressing is by definition not position
independent and hence this attribute must not be used for objects
defined by shared libraries.

@end table

@node LoongArch Variable Attributes
@subsection LoongArch Variable Attributes

One attribute is currently defined for the LoongArch.

@table @code
@cindex @code{model} variable attribute, LoongArch
@item model("@var{name}")
Use this attribute on the LoongArch to use a different code model for
addressing this variable, than the code model specified by the global
@option{-mcmodel} option.  This attribute is mostly useful if a
@code{section} attribute and/or a linker script will locate this object
specially.  Currently the only supported values of @var{name} are
@code{normal} and @code{extreme}.
@end table

@node M32R/D Variable Attributes
@subsection M32R/D Variable Attributes

One attribute is currently defined for the M32R/D@.

@table @code
@cindex @code{model-name} variable attribute, M32R/D
@cindex variable addressability on the M32R/D
@item model (@var{model-name})
Use this attribute on the M32R/D to set the addressability of an object.
The identifier @var{model-name} is one of @code{small}, @code{medium},
or @code{large}, representing each of the code models.

Small model objects live in the lower 16MB of memory (so that their
addresses can be loaded with the @code{ld24} instruction).

Medium and large model objects may live anywhere in the 32-bit address space
(the compiler generates @code{seth/add3} instructions to load their
addresses).
@end table

@node Microsoft Windows Variable Attributes
@subsection Microsoft Windows Variable Attributes

You can use these attributes on Microsoft Windows targets.
@ref{x86 Variable Attributes} for additional Windows compatibility
attributes available on all x86 targets.

@table @code
@cindex @code{dllimport} variable attribute
@cindex @code{dllexport} variable attribute
@item dllimport
@itemx dllexport
The @code{dllimport} and @code{dllexport} attributes are described in
@ref{Microsoft Windows Function Attributes}.

@cindex @code{selectany} variable attribute
@item selectany
The @code{selectany} attribute causes an initialized global variable to
have link-once semantics.  When multiple definitions of the variable are
encountered by the linker, the first is selected and the remainder are
discarded.  Following usage by the Microsoft compiler, the linker is told
@emph{not} to warn about size or content differences of the multiple
definitions.

Although the primary usage of this attribute is for POD types, the
attribute can also be applied to global C++ objects that are initialized
by a constructor.  In this case, the static initialization and destruction
code for the object is emitted in each translation defining the object,
but the calls to the constructor and destructor are protected by a
link-once guard variable.

The @code{selectany} attribute is only available on Microsoft Windows
targets.  You can use @code{__declspec (selectany)} as a synonym for
@code{__attribute__ ((selectany))} for compatibility with other
compilers.

@cindex @code{shared} variable attribute
@item shared
On Microsoft Windows, in addition to putting variable definitions in a named
section, the section can also be shared among all running copies of an
executable or DLL@.  For example, this small program defines shared data
by putting it in a named section @code{shared} and marking the section
shareable:

@smallexample
int foo __attribute__((section ("shared"), shared)) = 0;

int
main()
@{
  /* @r{Read and write foo.  All running
     copies see the same value.}  */
  return 0;
@}
@end smallexample

@noindent
You may only use the @code{shared} attribute along with @code{section}
attribute with a fully-initialized global definition because of the way
linkers work.  See @code{section} attribute for more information.

The @code{shared} attribute is only available on Microsoft Windows@.

@end table

@node MSP430 Variable Attributes
@subsection MSP430 Variable Attributes

@table @code
@cindex @code{upper} variable attribute, MSP430 
@cindex @code{either} variable attribute, MSP430 
@item upper
@itemx either
These attributes are the same as the MSP430 function attributes of the
same name (@pxref{MSP430 Function Attributes}).  

@cindex @code{lower} variable attribute, MSP430
@item lower
This option behaves mostly the same as the MSP430 function attribute of the
same name (@pxref{MSP430 Function Attributes}), but it has some additional
functionality.

If @option{-mdata-region=}@{@code{upper,either,none}@} has been passed, or
the @code{section} attribute is applied to a variable, the compiler will
generate 430X instructions to handle it.  This is because the compiler has
to assume that the variable could get placed in the upper memory region
(above address 0xFFFF).  Marking the variable with the @code{lower} attribute
informs the compiler that the variable will be placed in lower memory so it
is safe to use 430 instructions to handle it.

In the case of the @code{section} attribute, the section name given
will be used, and the @code{.lower} prefix will not be added.

@end table

@node Nvidia PTX Variable Attributes
@subsection Nvidia PTX Variable Attributes

These variable attributes are supported by the Nvidia PTX back end:

@table @code
@cindex @code{shared} attribute, Nvidia PTX
@item shared
Use this attribute to place a variable in the @code{.shared} memory space.
This memory space is private to each cooperative thread array; only threads
within one thread block refer to the same instance of the variable.
The runtime does not initialize variables in this memory space.
@end table

@node PowerPC Variable Attributes
@subsection PowerPC Variable Attributes

Three attributes currently are defined for PowerPC configurations:
@code{altivec}, @code{ms_struct} and @code{gcc_struct}.

@cindex @code{ms_struct} variable attribute, PowerPC
@cindex @code{gcc_struct} variable attribute, PowerPC
For full documentation of the struct attributes please see the
documentation in @ref{x86 Variable Attributes}.

@cindex @code{altivec} variable attribute, PowerPC
For documentation of @code{altivec} attribute please see the
documentation in @ref{PowerPC Type Attributes}.

@node RL78 Variable Attributes
@subsection RL78 Variable Attributes

@cindex @code{saddr} variable attribute, RL78
The RL78 back end supports the @code{saddr} variable attribute.  This
specifies placement of the corresponding variable in the SADDR area,
which can be accessed more efficiently than the default memory region.

@node V850 Variable Attributes
@subsection V850 Variable Attributes

These variable attributes are supported by the V850 back end:

@table @code

@cindex @code{sda} variable attribute, V850
@item sda
Use this attribute to explicitly place a variable in the small data area,
which can hold up to 64 kilobytes.

@cindex @code{tda} variable attribute, V850
@item tda
Use this attribute to explicitly place a variable in the tiny data area,
which can hold up to 256 bytes in total.

@cindex @code{zda} variable attribute, V850
@item zda
Use this attribute to explicitly place a variable in the first 32 kilobytes
of memory.
@end table

@node x86 Variable Attributes
@subsection x86 Variable Attributes

Two attributes are currently defined for x86 configurations:
@code{ms_struct} and @code{gcc_struct}.

@table @code
@cindex @code{ms_struct} variable attribute, x86
@cindex @code{gcc_struct} variable attribute, x86
@item ms_struct
@itemx gcc_struct

If @code{packed} is used on a structure, or if bit-fields are used,
it may be that the Microsoft ABI lays out the structure differently
than the way GCC normally does.  Particularly when moving packed
data between functions compiled with GCC and the native Microsoft compiler
(either via function call or as data in a file), it may be necessary to access
either format.

The @code{ms_struct} and @code{gcc_struct} attributes correspond
to the @option{-mms-bitfields} and @option{-mno-ms-bitfields}
command-line options, respectively;
see @ref{x86 Options}, for details of how structure layout is affected.
@xref{x86 Type Attributes}, for information about the corresponding
attributes on types.

@end table

@node Xstormy16 Variable Attributes
@subsection Xstormy16 Variable Attributes

One attribute is currently defined for xstormy16 configurations:
@code{below100}.

@table @code
@cindex @code{below100} variable attribute, Xstormy16
@item below100

If a variable has the @code{below100} attribute (@code{BELOW100} is
allowed also), GCC places the variable in the first 0x100 bytes of
memory and use special opcodes to access it.  Such variables are
placed in either the @code{.bss_below100} section or the
@code{.data_below100} section.

@end table

@node Type Attributes
@section Specifying Attributes of Types
@cindex attribute of types
@cindex type attributes

You can use attributes to specify various special
properties of types.  Some type attributes apply only to structure and
union types, and in C++, also class types, while others can apply to
any type defined via a @code{typedef} declaration.  Unless otherwise
specified, the same restrictions and effects apply to attributes regardless
of whether a type is a trivial structure or a C++ class with user-defined
constructors, destructors, or a copy assignment.

Other attributes are defined for functions (@pxref{Function Attributes}),
labels (@pxref{Label  Attributes}), enumerators (@pxref{Enumerator
Attributes}), statements (@pxref{Statement Attributes}), and for variables
(@pxref{Variable Attributes}).

GCC provides two different ways to specify attributes: the traditional
GNU syntax using @samp{__attribute__ ((...))} annotations, and the
newer standard C and C++ syntax using @samp{[[...]]} with the
@samp{gnu::} prefix on attribute names.  Note that the exact rules for
placement of attributes in your source code are different depending on
which syntax you use.  @xref{Attribute Syntax}, for details.

You may specify type attributes in an enum, struct or union type
declaration or definition by placing them immediately after the
@code{struct}, @code{union} or @code{enum} keyword.  You can also place
them just past the closing curly brace of the definition, but this is less
preferred because logically the type should be fully defined at 
the closing brace.  You can also include type attributes in a
@code{typedef} declaration.

@menu
* Common Type Attributes::
* ARC Type Attributes::
* ARM Type Attributes::
* BPF Type Attributes::
* PowerPC Type Attributes::
* x86 Type Attributes::
@end menu

@node Common Type Attributes
@subsection Common Type Attributes

The following type attributes are supported on most targets.

@table @code
@c Keep this table alphabetized by attribute name.  Treat _ as space.

@cindex @code{aligned} type attribute
@item aligned
@itemx aligned (@var{alignment})
The @code{aligned} attribute specifies a minimum alignment (in bytes) for
variables of the specified type.  When specified, @var{alignment} must be
a power of 2.  Specifying no @var{alignment} argument implies the maximum
alignment for the target, which is often, but by no means always, 8 or 16
bytes.  For example, the declarations:

@smallexample
struct __attribute__ ((aligned (8))) S @{ short f[3]; @};
typedef int more_aligned_int __attribute__ ((aligned (8)));
@end smallexample

@noindent
force the compiler to ensure (as far as it can) that each variable whose
type is @code{struct S} or @code{more_aligned_int} is allocated and
aligned @emph{at least} on a 8-byte boundary.  On a SPARC, having all
variables of type @code{struct S} aligned to 8-byte boundaries allows
the compiler to use the @code{ldd} and @code{std} (doubleword load and
store) instructions when copying one variable of type @code{struct S} to
another, thus improving run-time efficiency.

Note that the alignment of any given @code{struct} or @code{union} type
is required by the ISO C standard to be at least a perfect multiple of
the lowest common multiple of the alignments of all of the members of
the @code{struct} or @code{union} in question.  This means that you @emph{can}
effectively adjust the alignment of a @code{struct} or @code{union}
type by attaching an @code{aligned} attribute to any one of the members
of such a type, but the notation illustrated in the example above is a
more obvious, intuitive, and readable way to request the compiler to
adjust the alignment of an entire @code{struct} or @code{union} type.

As in the preceding example, you can explicitly specify the alignment
(in bytes) that you wish the compiler to use for a given @code{struct}
or @code{union} type.  Alternatively, you can leave out the alignment factor
and just ask the compiler to align a type to the maximum
useful alignment for the target machine you are compiling for.  For
example, you could write:

@smallexample
struct __attribute__ ((aligned)) S @{ short f[3]; @};
@end smallexample

Whenever you leave out the alignment factor in an @code{aligned}
attribute specification, the compiler automatically sets the alignment
for the type to the largest alignment that is ever used for any data
type on the target machine you are compiling for.  Doing this can often
make copy operations more efficient, because the compiler can use
whatever instructions copy the biggest chunks of memory when performing
copies to or from the variables that have types that you have aligned
this way.

In the example above, if the size of each @code{short} is 2 bytes, then
the size of the entire @code{struct S} type is 6 bytes.  The smallest
power of two that is greater than or equal to that is 8, so the
compiler sets the alignment for the entire @code{struct S} type to 8
bytes.

Note that although you can ask the compiler to select a time-efficient
alignment for a given type and then declare only individual stand-alone
objects of that type, the compiler's ability to select a time-efficient
alignment is primarily useful only when you plan to create arrays of
variables having the relevant (efficiently aligned) type.  If you
declare or use arrays of variables of an efficiently-aligned type, then
it is likely that your program also does pointer arithmetic (or
subscripting, which amounts to the same thing) on pointers to the
relevant type, and the code that the compiler generates for these
pointer arithmetic operations is often more efficient for
efficiently-aligned types than for other types.

Note that the effectiveness of @code{aligned} attributes may be limited
by inherent limitations in your linker.  On many systems, the linker is
only able to arrange for variables to be aligned up to a certain maximum
alignment.  (For some linkers, the maximum supported alignment may
be very very small.)  If your linker is only able to align variables
up to a maximum of 8-byte alignment, then specifying @code{aligned (16)}
in an @code{__attribute__} still only provides you with 8-byte
alignment.  See your linker documentation for further information.

When used on a struct, or struct member, the @code{aligned} attribute can
only increase the alignment; in order to decrease it, the @code{packed}
attribute must be specified as well.  When used as part of a typedef, the
@code{aligned} attribute can both increase and decrease alignment, and
specifying the @code{packed} attribute generates a warning.

@cindex @code{alloc_size} type attribute
@item alloc_size (@var{position})
@itemx alloc_size (@var{position-1}, @var{position-2})
The @code{alloc_size} type attribute may be applied to the definition
of a type of a function that returns a pointer and takes at least one
argument of an integer type.  It indicates that the returned pointer
points to an object whose size is given by the function argument at
@var{position-1}, or by the product of the arguments at @var{position-1}
and @var{position-2}.  Meaningful sizes are positive values less than
@code{PTRDIFF_MAX}.  Other sizes are disagnosed when detected.  GCC uses
this information to improve the results of @code{__builtin_object_size}.

For instance, the following declarations

@smallexample
typedef __attribute__ ((alloc_size (1, 2))) void*
  calloc_type (size_t, size_t);
typedef __attribute__ ((alloc_size (1))) void*
  malloc_type (size_t);
@end smallexample

@noindent
specify that @code{calloc_type} is a type of a function that, like
the standard C function @code{calloc}, returns an object whose size
is given by the product of arguments 1 and 2, and that
@code{malloc_type}, like the standard C function @code{malloc},
returns an object whose size is given by argument 1 to the function.

@cindex @code{copy} type attribute
@item copy
@itemx copy (@var{expression})
The @code{copy} attribute applies the set of attributes with which
the type of the @var{expression} has been declared to the declaration
of the type to which the attribute is applied.  The attribute is
designed for libraries that define aliases that are expected to
specify the same set of attributes as the aliased symbols.
The @code{copy} attribute can be used with types, variables, or
functions.  However, the kind of symbol to which the attribute is
applied (either varible or function) must match the kind of symbol
to which the argument refers.
The @code{copy} attribute copies only syntactic and semantic attributes
but not attributes that affect a symbol's linkage or visibility such as
@code{alias}, @code{visibility}, or @code{weak}.  The @code{deprecated}
attribute is also not copied.  @xref{Common Function Attributes}.
@xref{Common Variable Attributes}.

For example, suppose @code{struct A} below is defined in some third
party library header to have the alignment requirement @code{N} and
to force a warning whenever a variable of the type is not so aligned
due to attribute @code{packed}.  Specifying the @code{copy} attribute
on the definition on the unrelated @code{struct B} has the effect of
copying all relevant attributes from the type referenced by the pointer
expression to @code{struct B}.

@smallexample
struct __attribute__ ((aligned (N), warn_if_not_aligned (N)))
A @{ /* @r{@dots{}} */ @};
struct __attribute__ ((copy ( (struct A *)0)) B @{ /* @r{@dots{}} */ @};
@end smallexample

@cindex @code{deprecated} type attribute
@item deprecated
@itemx deprecated (@var{msg})
The @code{deprecated} attribute results in a warning if the type
is used anywhere in the source file.  This is useful when identifying
types that are expected to be removed in a future version of a program.
If possible, the warning also includes the location of the declaration
of the deprecated type, to enable users to easily find further
information about why the type is deprecated, or what they should do
instead.  Note that the warnings only occur for uses and then only
if the type is being applied to an identifier that itself is not being
declared as deprecated.

@smallexample
typedef int T1 __attribute__ ((deprecated));
T1 x;
typedef T1 T2;
T2 y;
typedef T1 T3 __attribute__ ((deprecated));
T3 z __attribute__ ((deprecated));
@end smallexample

@noindent
results in a warning on line 2 and 3 but not lines 4, 5, or 6.  No
warning is issued for line 4 because T2 is not explicitly
deprecated.  Line 5 has no warning because T3 is explicitly
deprecated.  Similarly for line 6.  The optional @var{msg}
argument, which must be a string, is printed in the warning if
present.  Control characters in the string will be replaced with
escape sequences, and if the @option{-fmessage-length} option is set
to 0 (its default value) then any newline characters will be ignored.

The @code{deprecated} attribute can also be used for functions and
variables (@pxref{Function Attributes}, @pxref{Variable Attributes}.)

The message attached to the attribute is affected by the setting of
the @option{-fmessage-length} option.

@cindex @code{designated_init} type attribute
@item designated_init
This attribute may only be applied to structure types.  It indicates
that any initialization of an object of this type must use designated
initializers rather than positional initializers.  The intent of this
attribute is to allow the programmer to indicate that a structure's
layout may change, and that therefore relying on positional
initialization will result in future breakage.

GCC emits warnings based on this attribute by default; use
@option{-Wno-designated-init} to suppress them.

@cindex @code{hardbool} type attribute
@item hardbool
@itemx hardbool (@var{false_value})
@itemx hardbool (@var{false_value}, @var{true_value})
This attribute may only be applied to integral types in C, to introduce
hardened boolean types.  It turns the integral type into a boolean-like
type with the same size and precision, that uses the specified values as
representations for @code{false} and @code{true}.  Underneath, it is
actually an enumerated type, but its observable behavior is like that of
@code{_Bool}, except for the strict internal representations, verified
by runtime checks.

If @var{true_value} is omitted, the bitwise negation of
@var{false_value} is used.  If @var{false_value} is omitted, zero is
used.  The named representation values must be different when converted
to the original integral type.  Narrower bitfields are rejected if the
representations become indistinguishable.

Values of such types automatically decay to @code{_Bool}, at which
point, the selected representation values are mapped to the
corresponding @code{_Bool} values.  When the represented value is not
determined, at compile time, to be either @var{false_value} or
@var{true_value}, runtime verification calls @code{__builtin_trap} if it
is neither.  This is what makes them hardened boolean types.

When converting scalar types to such hardened boolean types, implicitly
or explicitly, behavior corresponds to a conversion to @code{_Bool},
followed by a mapping from @code{false} and @code{true} to
@var{false_value} and @var{true_value}, respectively.

@smallexample
typedef char __attribute__ ((__hardbool__ (0x5a))) hbool;
hbool first = 0;       /* False, stored as (char)0x5a.  */
hbool second = !first; /* True, stored as ~(char)0x5a.  */

static hbool zeroinit; /* False, stored as (char)0x5a.  */
auto hbool uninit;     /* Undefined, may trap.  */
@end smallexample

When zero-initializing a variable or field of hardened boolean type
(presumably held in static storage) the implied zero initializer gets
converted to @code{_Bool}, and then to the hardened boolean type, so
that the initial value is the hardened representation for @code{false}.
Using that value is well defined.  This is @emph{not} the case when
variables and fields of such types are uninitialized (presumably held in
automatic or dynamic storage): their values are indeterminate, and using
them invokes undefined behavior.  Using them may trap or not, depending
on the bits held in the storage (re)used for the variable, if any, and
on optimizations the compiler may perform on the grounds that using
uninitialized values invokes undefined behavior.

Users of @option{-ftrivial-auto-var-init} should be aware that the bit
patterns used as initializers are @emph{not} converted to
@code{hardbool} types, so using a @code{hardbool} variable that is
implicitly initialized by the @option{-ftrivial-auto-var-init} may trap
if the representations values chosen for @code{false} and @code{true} do
not match the initializer.

Since this is a language extension only available in C, interoperation
with other languages may pose difficulties.  It should interoperate with
Ada Booleans defined with the same size and equivalent representation
clauses, and with enumerations or other languages' integral types that
correspond to C's chosen integral type.


@cindex @code{may_alias} type attribute
@item may_alias
Accesses through pointers to types with this attribute are not subject
to type-based alias analysis, but are instead assumed to be able to alias
any other type of objects.
In the context of section 6.5 paragraph 7 of the C99 standard,
an lvalue expression
dereferencing such a pointer is treated like having a character type.
See @option{-fstrict-aliasing} for more information on aliasing issues.
This extension exists to support some vector APIs, in which pointers to
one vector type are permitted to alias pointers to a different vector type.

Note that an object of a type with this attribute does not have any
special semantics.

Example of use:

@smallexample
typedef short __attribute__ ((__may_alias__)) short_a;

int
main (void)
@{
  int a = 0x12345678;
  short_a *b = (short_a *) &a;

  b[1] = 0;

  if (a == 0x12345678)
    abort();

  exit(0);
@}
@end smallexample

@noindent
If you replaced @code{short_a} with @code{short} in the variable
declaration, the above program would abort when compiled with
@option{-fstrict-aliasing}, which is on by default at @option{-O2} or
above.

@cindex @code{mode} type attribute
@item mode (@var{mode})
This attribute specifies the data type for the declaration---whichever
type corresponds to the mode @var{mode}.  This in effect lets you
request an integer or floating-point type according to its width.

@xref{Machine Modes,,, gccint, GNU Compiler Collection (GCC) Internals},
for a list of the possible keywords for @var{mode}.
You may also specify a mode of @code{byte} or @code{__byte__} to
indicate the mode corresponding to a one-byte integer, @code{word} or
@code{__word__} for the mode of a one-word integer, and @code{pointer}
or @code{__pointer__} for the mode used to represent pointers.

@cindex @code{objc_root_class} type attribute
@item objc_root_class @r{(Objective-C and Objective-C++ only)}
This attribute marks a class as being a root class, and thus allows
the compiler to elide any warnings about a missing superclass and to
make additional checks for mandatory methods as needed.

@cindex @code{packed} type attribute
@item packed
This attribute, attached to a @code{struct}, @code{union}, or C++ @code{class}
type definition, specifies that each of its members (other than zero-width
bit-fields) is placed to minimize the memory required.  This is equivalent
to specifying the @code{packed} attribute on each of the members.

@opindex fshort-enums
When attached to an @code{enum} definition, the @code{packed} attribute
indicates that the smallest integral type should be used.
Specifying the @option{-fshort-enums} flag on the command line
is equivalent to specifying the @code{packed}
attribute on all @code{enum} definitions.

In the following example @code{struct my_packed_struct}'s members are
packed closely together, but the internal layout of its @code{s} member
is not packed---to do that, @code{struct my_unpacked_struct} needs to
be packed too.

@smallexample
struct my_unpacked_struct
 @{
    char c;
    int i;
 @};

struct __attribute__ ((__packed__)) my_packed_struct
  @{
     char c;
     int  i;
     struct my_unpacked_struct s;
  @};
@end smallexample

You may only specify the @code{packed} attribute on the definition
of an @code{enum}, @code{struct}, @code{union}, or @code{class}, 
not on a @code{typedef} that does not also define the enumerated type,
structure, union, or class.

@cindex @code{scalar_storage_order} type attribute
@item scalar_storage_order ("@var{endianness}")
When attached to a @code{union} or a @code{struct}, this attribute sets
the storage order, aka endianness, of the scalar fields of the type, as
well as the array fields whose component is scalar.  The supported
endiannesses are @code{big-endian} and @code{little-endian}.  The attribute
has no effects on fields which are themselves a @code{union}, a @code{struct}
or an array whose component is a @code{union} or a @code{struct}, and it is
possible for these fields to have a different scalar storage order than the
enclosing type.

Note that neither pointer nor vector fields are considered scalar fields in
this context, so the attribute has no effects on these fields.

This attribute is supported only for targets that use a uniform default
scalar storage order (fortunately, most of them), i.e.@: targets that store
the scalars either all in big-endian or all in little-endian.

Additional restrictions are enforced for types with the reverse scalar
storage order with regard to the scalar storage order of the target:

@itemize
@item Taking the address of a scalar field of a @code{union} or a
@code{struct} with reverse scalar storage order is not permitted and yields
an error.
@item Taking the address of an array field, whose component is scalar, of
a @code{union} or a @code{struct} with reverse scalar storage order is
permitted but yields a warning, unless @option{-Wno-scalar-storage-order}
is specified.
@item Taking the address of a @code{union} or a @code{struct} with reverse
scalar storage order is permitted.
@end itemize

These restrictions exist because the storage order attribute is lost when
the address of a scalar or the address of an array with scalar component is
taken, so storing indirectly through this address generally does not work.
The second case is nevertheless allowed to be able to perform a block copy
from or to the array.

Moreover, the use of type punning or aliasing to toggle the storage order
is not supported; that is to say, if a given scalar object can be accessed
through distinct types that assign a different storage order to it, then the
behavior is undefined.

@cindex @code{strub} type attribute
@item strub
This attribute defines stack-scrubbing properties of functions and
variables, so that functions that access sensitive data can have their
stack frames zeroed-out upon returning or propagating exceptions.  This
may be enabled explicitly, by selecting certain @code{strub} modes for
specific functions, or implicitly, by means of @code{strub} variables.

Being a type attribute, it attaches to types, even when specified in
function and variable declarations.  When applied to function types, it
takes an optional string argument.  When applied to a
pointer-to-function type, if the optional argument is given, it gets
propagated to the function type.

@smallexample
/* A strub variable.  */
int __attribute__ ((strub)) var;
/* A strub variable that happens to be a pointer.  */
__attribute__ ((strub)) int *strub_ptr_to_int;
/* A pointer type that may point to a strub variable.  */
typedef int __attribute__ ((strub)) *ptr_to_strub_int_type;

/* A declaration of a strub function.  */
extern int __attribute__ ((strub)) foo (void);
/* A pointer to that strub function.  */
int __attribute__ ((strub ("at-calls"))) (*ptr_to_strub_fn)(void) = foo;
@end smallexample

A function associated with @code{at-calls} @code{strub} mode
(@code{strub("at-calls")}, or just @code{strub}) undergoes interface
changes.  Its callers are adjusted to match the changes, and to scrub
(overwrite with zeros) the stack space used by the called function after
it returns.  The interface change makes the function type incompatible
with an unadorned but otherwise equivalent type, so @emph{every}
declaration and every type that may be used to call the function must be
associated with this strub mode.

A function associated with @code{internal} @code{strub} mode
(@code{strub("internal")}) retains an unmodified, type-compatible
interface, but it may be turned into a wrapper that calls the wrapped
body using a custom interface.  The wrapper then scrubs the stack space
used by the wrapped body.  Though the wrapped body has its stack space
scrubbed, the wrapper does not, so arguments and return values may
remain unscrubbed even when such a function is called by another
function that enables @code{strub}.  This is why, when compiling with
@option{-fstrub=strict}, a @code{strub} context is not allowed to call
@code{internal} @code{strub} functions.

@smallexample
/* A declaration of an internal-strub function.  */
extern int __attribute__ ((strub ("internal"))) bar (void);

int __attribute__ ((strub))
baz (void)
@{
  /* Ok, foo was declared above as an at-calls strub function.  */
  foo ();
  /* Not allowed in strict mode, otherwise allowed.  */
  bar ();
@}
@end smallexample

An automatically-allocated variable associated with the @code{strub}
attribute causes the (immediately) enclosing function to have
@code{strub} enabled.

A statically-allocated variable associated with the @code{strub}
attribute causes functions that @emph{read} it, through its @code{strub}
data type, to have @code{strub} enabled.  Reading data by dereferencing
a pointer to a @code{strub} data type has the same effect.  Note: The
attribute does not carry over from a composite type to the types of its
components, so the intended effect may not be obtained with non-scalar
types.

When selecting a @code{strub}-enabled mode for a function that is not
explicitly associated with one, because of @code{strub} variables or
data pointers, the function must satisfy @code{internal} mode viability
requirements (see below), even when @code{at-calls} mode is also viable
and, being more efficient, ends up selected as an optimization.

@smallexample
/* zapme is implicitly strub-enabled because of strub variables.
   Optimization may change its strub mode, but not the requirements.  */
static int
zapme (int i)
@{
  /* A local strub variable enables strub.  */
  int __attribute__ ((strub)) lvar;
  /* Reading strub data through a pointer-to-strub enables strub.  */
  lvar = * (ptr_to_strub_int_type) &i;
  /* Writing to a global strub variable does not enable strub.  */
  var = lvar;
  /* Reading from a global strub variable enables strub.  */
  return var;
@}
@end smallexample

A @code{strub} context is the body (as opposed to the interface) of a
function that has @code{strub} enabled, be it explicitly, by
@code{at-calls} or @code{internal} mode, or implicitly, due to
@code{strub} variables or command-line options.

A function of a type associated with the @code{disabled} @code{strub}
mode (@code{strub("disabled")} will not have its own stack space
scrubbed.  Such functions @emph{cannot} be called from within
@code{strub} contexts.

In order to enable a function to be called from within @code{strub}
contexts without having its stack space scrubbed, associate it with the
@code{callable} @code{strub} mode (@code{strub("callable")}).

When a function is not assigned a @code{strub} mode, explicitly or
implicitly, the mode defaults to @code{callable}, except when compiling
with @option{-fstrub=strict}, that causes @code{strub} mode to default
to @code{disabled}.

@example
extern int __attribute__ ((strub ("callable"))) bac (void);
extern int __attribute__ ((strub ("disabled"))) bad (void);
 /* Implicitly disabled with -fstrub=strict, otherwise callable.  */
extern int bah (void);

int __attribute__ ((strub))
bal (void)
@{
  /* Not allowed, bad is not strub-callable.  */
  bad ();
  /* Ok, bac is strub-callable.  */
  bac ();
  /* Not allowed with -fstrub=strict, otherwise allowed.  */
  bah ();
@}
@end example

Function types marked @code{callable} and @code{disabled} are not
mutually compatible types, but the underlying interfaces are compatible,
so it is safe to convert pointers between them, and to use such pointers
or alternate declarations to call them.  Interfaces are also
interchangeable between them and @code{internal} (but not
@code{at-calls}!), but adding @code{internal} to a pointer type will not
cause the pointed-to function to perform stack scrubbing.

@example
void __attribute__ ((strub))
bap (void)
@{
  /* Assign a callable function to pointer-to-disabled.
     Flagged as not quite compatible with -Wpedantic.  */
  int __attribute__ ((strub ("disabled"))) (*d_p) (void) = bac;
  /* Not allowed: calls disabled type in a strub context.  */
  d_p ();

  /* Assign a disabled function to pointer-to-callable.
     Flagged as not quite compatible with -Wpedantic.  */
  int __attribute__ ((strub ("callable"))) (*c_p) (void) = bad;
  /* Ok, safe.  */
  c_p ();

  /* Assign an internal function to pointer-to-callable.
     Flagged as not quite compatible with -Wpedantic.  */
  c_p = bar;
  /* Ok, safe.  */
  c_p ();

  /* Assign an at-calls function to pointer-to-callable.
     Flaggged as incompatible.  */
  c_p = bal;
  /* The call through an interface-incompatible type will not use the
     modified interface expected by the at-calls function, so it is
     likely to misbehave at runtime.  */
  c_p ();
@}
@end example

@code{Strub} contexts are never inlined into non-@code{strub} contexts.
When an @code{internal}-strub function is split up, the wrapper can
often be inlined, but the wrapped body @emph{never} is.  A function
marked as @code{always_inline}, even if explicitly assigned
@code{internal} strub mode, will not undergo wrapping, so its body gets
inlined as required.

@example
inline int __attribute__ ((strub ("at-calls")))
inl_atc (void)
@{
  /* This body may get inlined into strub contexts.  */
@}

inline int __attribute__ ((strub ("internal")))
inl_int (void)
@{
  /* This body NEVER gets inlined, though its wrapper may.  */
@}

inline int __attribute__ ((strub ("internal"), always_inline))
inl_int_ali (void)
@{
  /* No internal wrapper, so this body ALWAYS gets inlined,
     but it cannot be called from non-strub contexts.  */
@}

void __attribute__ ((strub ("disabled")))
bat (void)
@{
  /* Not allowed, cannot inline into a non-strub context.  */
  inl_int_ali ();
@}
@end example

@cindex strub eligibility and viability
Some @option{-fstrub=*} command-line options enable @code{strub} modes
implicitly where viable.  A @code{strub} mode is only viable for a
function if the function is eligible for that mode, and if other
conditions, detailed below, are satisfied.  If it's not eligible for a
mode, attempts to explicitly associate it with that mode are rejected
with an error message.  If it is eligible, that mode may be assigned
explicitly through this attribute, but implicit assignment through
command-line options may involve additional viability requirements.

A function is ineligible for @code{at-calls} @code{strub} mode if a
different @code{strub} mode is explicitly requested, if attribute
@code{noipa} is present, or if it calls @code{__builtin_apply_args}.
@code{At-calls} @code{strub} mode, if not requested through the function
type, is only viable for an eligible function if the function is not
visible to other translation units, if it doesn't have its address
taken, and if it is never called with a function type overrider.

@smallexample
/* bar is eligible for at-calls strub mode,
   but not viable for that mode because it is visible to other units.
   It is eligible and viable for internal strub mode.  */
void bav () @{@}

/* setp is eligible for at-calls strub mode,
   but not viable for that mode because its address is taken.
   It is eligible and viable for internal strub mode.  */
void setp (void) @{ static void (*p)(void); = setp; @}
@end smallexample

A function is ineligible for @code{internal} @code{strub} mode if a
different @code{strub} mode is explicitly requested, or if attribute
@code{noipa} is present.  For an @code{always_inline} function, meeting
these requirements is enough to make it eligible.  Any function that has
attribute @code{noclone}, that uses such extensions as non-local labels,
computed gotos, alternate variable argument passing interfaces,
@code{__builtin_next_arg}, or @code{__builtin_return_address}, or that
takes too many (about 64Ki) arguments is ineligible, unless it is
@code{always_inline}.  For @code{internal} @code{strub} mode, all
eligible functions are viable.

@smallexample
/* flop is not eligible, thus not viable, for at-calls strub mode.
   Likewise for internal strub mode.  */
__attribute__ ((noipa)) void flop (void) @{@}

/* flip is eligible and viable for at-calls strub mode.
   It would be ineligible for internal strub mode, because of noclone,
   if it weren't for always_inline.  With always_inline, noclone is not
   an obstacle, so it is also eligible and viable for internal strub mode.  */
inline __attribute__ ((noclone, always_inline)) void flip (void) @{@}
@end smallexample

@cindex @code{transparent_union} type attribute
@item transparent_union

This attribute, attached to a @code{union} type definition, indicates
that any function parameter having that union type causes calls to that
function to be treated in a special way.

First, the argument corresponding to a transparent union type can be of
any type in the union; no cast is required.  Also, if the union contains
a pointer type, the corresponding argument can be a null pointer
constant or a void pointer expression; and if the union contains a void
pointer type, the corresponding argument can be any pointer expression.
If the union member type is a pointer, qualifiers like @code{const} on
the referenced type must be respected, just as with normal pointer
conversions.

Second, the argument is passed to the function using the calling
conventions of the first member of the transparent union, not the calling
conventions of the union itself.  All members of the union must have the
same machine representation; this is necessary for this argument passing
to work properly.

Transparent unions are designed for library functions that have multiple
interfaces for compatibility reasons.  For example, suppose the
@code{wait} function must accept either a value of type @code{int *} to
comply with POSIX, or a value of type @code{union wait *} to comply with
the 4.1BSD interface.  If @code{wait}'s parameter were @code{void *},
@code{wait} would accept both kinds of arguments, but it would also
accept any other pointer type and this would make argument type checking
less useful.  Instead, @code{<sys/wait.h>} might define the interface
as follows:

@smallexample
typedef union __attribute__ ((__transparent_union__))
  @{
    int *__ip;
    union wait *__up;
  @} wait_status_ptr_t;

pid_t wait (wait_status_ptr_t);
@end smallexample

@noindent
This interface allows either @code{int *} or @code{union wait *}
arguments to be passed, using the @code{int *} calling convention.
The program can call @code{wait} with arguments of either type:

@smallexample
int w1 () @{ int w; return wait (&w); @}
int w2 () @{ union wait w; return wait (&w); @}
@end smallexample

@noindent
With this interface, @code{wait}'s implementation might look like this:

@smallexample
pid_t wait (wait_status_ptr_t p)
@{
  return waitpid (-1, p.__ip, 0);
@}
@end smallexample

@cindex @code{unavailable} type attribute
@item unavailable
@itemx unavailable (@var{msg})
The @code{unavailable} attribute behaves in the same manner as the
@code{deprecated} one, but emits an error rather than a warning.  It is
used to indicate that a (perhaps previously @code{deprecated}) type is
no longer usable.

The @code{unavailable} attribute can also be used for functions and
variables (@pxref{Function Attributes}, @pxref{Variable Attributes}.)

@cindex @code{unused} type attribute
@item unused
When attached to a type (including a @code{union} or a @code{struct}),
this attribute means that variables of that type are meant to appear
possibly unused.  GCC does not produce a warning for any variables of
that type, even if the variable appears to do nothing.  This is often
the case with lock or thread classes, which are usually defined and then
not referenced, but contain constructors and destructors that have
nontrivial bookkeeping functions.

@cindex @code{vector_size} type attribute
@item vector_size (@var{bytes})
This attribute specifies the vector size for the type, measured in bytes.
The type to which it applies is known as the @dfn{base type}.  The @var{bytes}
argument must be a positive power-of-two multiple of the base type size.  For
example, the following declarations:

@smallexample
typedef __attribute__ ((vector_size (32))) int int_vec32_t ;
typedef __attribute__ ((vector_size (32))) int* int_vec32_ptr_t;
typedef __attribute__ ((vector_size (32))) int int_vec32_arr3_t[3];
@end smallexample

@noindent
define @code{int_vec32_t} to be a 32-byte vector type composed of @code{int}
sized units.  With @code{int} having a size of 4 bytes, the type defines
a vector of eight units, four bytes each.  The mode of variables of type
@code{int_vec32_t} is @code{V8SI}.  @code{int_vec32_ptr_t} is then defined
to be a pointer to such a vector type, and @code{int_vec32_arr3_t} to be
an array of three such vectors.  @xref{Vector Extensions}, for details of
manipulating objects of vector types.

This attribute is only applicable to integral and floating scalar types.
In function declarations the attribute applies to the function return
type.

For example, the following:
@smallexample
__attribute__ ((vector_size (16))) float get_flt_vec16 (void);
@end smallexample
declares @code{get_flt_vec16} to be a function returning a 16-byte vector
with the base type @code{float}.

@cindex @code{visibility} type attribute
@item visibility
In C++, attribute visibility (@pxref{Function Attributes}) can also be
applied to class, struct, union and enum types.  Unlike other type
attributes, the attribute must appear between the initial keyword and
the name of the type; it cannot appear after the body of the type.

Note that the type visibility is applied to vague linkage entities
associated with the class (vtable, typeinfo node, etc.).  In
particular, if a class is thrown as an exception in one shared object
and caught in another, the class must have default visibility.
Otherwise the two shared objects are unable to use the same
typeinfo node and exception handling will break.

@cindex @code{warn_if_not_aligned} type attribute
@item warn_if_not_aligned (@var{alignment})
This attribute specifies a threshold for the structure field, measured
in bytes.  If the structure field is aligned below the threshold, a
warning will be issued.  For example, the declaration:

@smallexample
typedef unsigned long long __u64
   __attribute__((aligned (4), warn_if_not_aligned (8)));

struct foo
@{
  int i1;
  int i2;
  __u64 x;
@};
@end smallexample

@noindent
causes the compiler to issue an warning on @code{struct foo}, like
@samp{warning: alignment 4 of 'struct foo' is less than 8}.
It is used to define @code{struct foo} in such a way that
@code{struct foo} has the same layout and the structure field @code{x}
has the same alignment when @code{__u64} is aligned at either 4 or
8 bytes.  Align @code{struct foo} to 8 bytes:

@smallexample
struct __attribute__ ((aligned (8))) foo
@{
  int i1;
  int i2;
  __u64 x;
@};
@end smallexample

@noindent
silences the warning.  The compiler also issues a warning, like
@samp{warning: 'x' offset 12 in 'struct foo' isn't aligned to 8},
when the structure field has the misaligned offset:

@smallexample
struct __attribute__ ((aligned (8))) foo
@{
  int i1;
  int i2;
  int i3;
  __u64 x;
@};
@end smallexample

This warning can be disabled by @option{-Wno-if-not-aligned}.

@end table

To specify multiple attributes, separate them by commas within the
double parentheses: for example, @samp{__attribute__ ((aligned (16),
packed))}.

@node ARC Type Attributes
@subsection ARC Type Attributes

@cindex @code{uncached} type attribute, ARC
Declaring objects with @code{uncached} allows you to exclude
data-cache participation in load and store operations on those objects
without involving the additional semantic implications of
@code{volatile}.  The @code{.di} instruction suffix is used for all
loads and stores of data declared @code{uncached}.

@node ARM Type Attributes
@subsection ARM Type Attributes

@cindex @code{notshared} type attribute, ARM
On those ARM targets that support @code{dllimport} (such as Symbian
OS), you can use the @code{notshared} attribute to indicate that the
virtual table and other similar data for a class should not be
exported from a DLL@.  For example:

@smallexample
class __declspec(notshared) C @{
public:
  __declspec(dllimport) C();
  virtual void f();
@}

__declspec(dllexport)
C::C() @{@}
@end smallexample

@noindent
In this code, @code{C::C} is exported from the current DLL, but the
virtual table for @code{C} is not exported.  (You can use
@code{__attribute__} instead of @code{__declspec} if you prefer, but
most Symbian OS code uses @code{__declspec}.)

@node BPF Type Attributes
@subsection BPF Type Attributes

@cindex @code{preserve_access_index} type attribute, BPF
BPF Compile Once - Run Everywhere (CO-RE) support. When attached to a
@code{struct} or @code{union} type definition, indicates that CO-RE
relocation information should be generated for any access to a variable
of that type. The behavior is equivalent to the programmer manually
wrapping every such access with @code{__builtin_preserve_access_index}.


@node PowerPC Type Attributes
@subsection PowerPC Type Attributes

Three attributes currently are defined for PowerPC configurations:
@code{altivec}, @code{ms_struct} and @code{gcc_struct}.

@cindex @code{ms_struct} type attribute, PowerPC
@cindex @code{gcc_struct} type attribute, PowerPC
For full documentation of the @code{ms_struct} and @code{gcc_struct}
attributes please see the documentation in @ref{x86 Type Attributes}.

@cindex @code{altivec} type attribute, PowerPC
The @code{altivec} attribute allows one to declare AltiVec vector data
types supported by the AltiVec Programming Interface Manual.  The
attribute requires an argument to specify one of three vector types:
@code{vector__}, @code{pixel__} (always followed by unsigned short),
and @code{bool__} (always followed by unsigned).

@smallexample
__attribute__((altivec(vector__)))
__attribute__((altivec(pixel__))) unsigned short
__attribute__((altivec(bool__))) unsigned
@end smallexample

These attributes mainly are intended to support the @code{__vector},
@code{__pixel}, and @code{__bool} AltiVec keywords.

@node x86 Type Attributes
@subsection x86 Type Attributes

Two attributes are currently defined for x86 configurations:
@code{ms_struct} and @code{gcc_struct}.

@table @code

@cindex @code{ms_struct} type attribute, x86
@cindex @code{gcc_struct} type attribute, x86
@item ms_struct
@itemx gcc_struct

If @code{packed} is used on a structure, or if bit-fields are used
it may be that the Microsoft ABI packs them differently
than GCC normally packs them.  Particularly when moving packed
data between functions compiled with GCC and the native Microsoft compiler
(either via function call or as data in a file), it may be necessary to access
either format.

The @code{ms_struct} and @code{gcc_struct} attributes correspond
to the @option{-mms-bitfields} and @option{-mno-ms-bitfields}
command-line options, respectively;
see @ref{x86 Options}, for details of how structure layout is affected.
@xref{x86 Variable Attributes}, for information about the corresponding
attributes on variables.

@end table

@node Label Attributes
@section Label Attributes
@cindex Label Attributes

GCC allows attributes to be set on C labels.  @xref{Attribute Syntax}, for 
details of the exact syntax for using attributes.  Other attributes are 
available for functions (@pxref{Function Attributes}), variables 
(@pxref{Variable Attributes}), enumerators (@pxref{Enumerator Attributes}),
statements (@pxref{Statement Attributes}), and for types
(@pxref{Type Attributes}). A label attribute followed
by a declaration appertains to the label and not the declaration.

This example uses the @code{cold} label attribute to indicate the 
@code{ErrorHandling} branch is unlikely to be taken and that the
@code{ErrorHandling} label is unused:

@smallexample

   asm goto ("some asm" : : : : NoError);

/* This branch (the fall-through from the asm) is less commonly used */
ErrorHandling: 
   __attribute__((cold, unused)); /* Semi-colon is required here */
   printf("error\n");
   return 0;

NoError:
   printf("no error\n");
   return 1;
@end smallexample

@table @code
@cindex @code{unused} label attribute
@item unused
This feature is intended for program-generated code that may contain 
unused labels, but which is compiled with @option{-Wall}.  It is
not normally appropriate to use in it human-written code, though it
could be useful in cases where the code that jumps to the label is
contained within an @code{#ifdef} conditional.

@cindex @code{hot} label attribute
@item hot
The @code{hot} attribute on a label is used to inform the compiler that
the path following the label is more likely than paths that are not so
annotated.  This attribute is used in cases where @code{__builtin_expect}
cannot be used, for instance with computed goto or @code{asm goto}.

@cindex @code{cold} label attribute
@item cold
The @code{cold} attribute on labels is used to inform the compiler that
the path following the label is unlikely to be executed.  This attribute
is used in cases where @code{__builtin_expect} cannot be used, for instance
with computed goto or @code{asm goto}.

@end table

@node Enumerator Attributes
@section Enumerator Attributes
@cindex Enumerator Attributes

GCC allows attributes to be set on enumerators.  @xref{Attribute Syntax}, for
details of the exact syntax for using attributes.  Other attributes are
available for functions (@pxref{Function Attributes}), variables
(@pxref{Variable Attributes}), labels (@pxref{Label Attributes}), statements
(@pxref{Statement Attributes}), and for types (@pxref{Type Attributes}).

This example uses the @code{deprecated} enumerator attribute to indicate the
@code{oldval} enumerator is deprecated:

@smallexample
enum E @{
  oldval __attribute__((deprecated)),
  newval
@};

int
fn (void)
@{
  return oldval;
@}
@end smallexample

@table @code
@cindex @code{deprecated} enumerator attribute
@item deprecated
The @code{deprecated} attribute results in a warning if the enumerator
is used anywhere in the source file.  This is useful when identifying
enumerators that are expected to be removed in a future version of a
program.  The warning also includes the location of the declaration
of the deprecated enumerator, to enable users to easily find further
information about why the enumerator is deprecated, or what they should
do instead.  Note that the warnings only occurs for uses.

@cindex @code{unavailable} enumerator attribute
@item unavailable
The @code{unavailable} attribute results in an error if the enumerator
is used anywhere in the source file.  In other respects it behaves in the
same manner as the @code{deprecated} attribute.

@end table

@node Statement Attributes
@section Statement Attributes
@cindex Statement Attributes

GCC allows attributes to be set on null statements.  @xref{Attribute Syntax},
for details of the exact syntax for using attributes.  Other attributes are
available for functions (@pxref{Function Attributes}), variables
(@pxref{Variable Attributes}), labels (@pxref{Label Attributes}), enumerators
(@pxref{Enumerator Attributes}), and for types (@pxref{Type Attributes}).

@table @code
@cindex @code{fallthrough} statement attribute
@item fallthrough
The @code{fallthrough} attribute with a null statement serves as a
fallthrough statement.  It hints to the compiler that a statement
that falls through to another case label, or user-defined label
in a switch statement is intentional and thus the
@option{-Wimplicit-fallthrough} warning must not trigger.  The
fallthrough attribute may appear at most once in each attribute
list, and may not be mixed with other attributes.  It can only
be used in a switch statement (the compiler will issue an error
otherwise), after a preceding statement and before a logically
succeeding case label, or user-defined label.

This example uses the @code{fallthrough} statement attribute to indicate that
the @option{-Wimplicit-fallthrough} warning should not be emitted:

@smallexample
switch (cond)
  @{
  case 1:
    bar (1);
    __attribute__((fallthrough));
  case 2:
    @dots{}
  @}
@end smallexample

@cindex @code{assume} statement attribute
@item assume
The @code{assume} attribute with a null statement serves as portable
assumption.  It should have a single argument, a conditional expression,
which is not evaluated.  If the argument would evaluate to true
at the point where it appears, it has no effect, otherwise there
is undefined behavior.  This is a GNU variant of the ISO C++23
standard @code{assume} attribute, but it can be used in any version of
both C and C++.

@smallexample
int
foo (int x, int y)
@{
  __attribute__((assume(x == 42)));
  __attribute__((assume(++y == 43)));
  return x + y;
@}
@end smallexample

@code{y} is not actually incremented and the compiler can but does not
have to optimize it to just @code{return 42 + 42;}.

@end table

@node Attribute Syntax
@section Attribute Syntax
@cindex attribute syntax
@cindex C standard attributes
@cindex C++ standard attributes
@cindex standard attribute syntax
@cindex GNU attribute syntax

GCC provides two different ways to specify attributes: the standard C
and C++ syntax using double square brackets, and the older GNU
extension syntax using the @code{@w{__attribute__}} keyword, which predates
the adoption of the standard syntax and is still widely used in older
code.

The standard @samp{[[]]} attribute syntax is recognized by GCC's
default language dialect for both C and C++.  More specifically, this
syntax was first introduced in the C++11 language standard
(@pxref{Standards}), and is supported by GCC in C++ code with
@option{-std=c++11} or @option{-std=gnu++11} or later.  It is also
part of the C23 language standard and is supported when compiling C
code with @option{-std=c23} or @option{-std=gnu17} or later.

When using GNU-specific attributes in the standard syntax, you must
prefix their names with @samp{gnu::}, such as @code{gnu::section}.
Refer to the relevant language standards for exact details on the
placement of @samp{[[]]} attributes within your code, as they differ
in some details from the rules for the GNU attribute syntax.

The remainder of this section describes the details of the GNU extension
@code{__attribute__} syntax,
and the constructs to which attribute specifiers bind, for the C
language.  Some details may vary for C++ and Objective-C@.  Because of
limitations in the grammar for attributes, some forms described here
may not be successfully parsed in all cases.

There are some problems with the semantics of attributes in C++.  For
example, there are no manglings for attributes, although they may affect
code generation, so problems may arise when attributed types are used in
conjunction with templates or overloading.  Similarly, @code{typeid}
does not distinguish between types with different attributes.  Support
for attributes in C++ may be restricted in future to attributes on
declarations only, but not on nested declarators.

@xref{Function Attributes}, for details of the semantics of attributes
applying to functions.  @xref{Variable Attributes}, for details of the
semantics of attributes applying to variables.  @xref{Type Attributes},
for details of the semantics of attributes applying to structure, union
and enumerated types.
@xref{Label Attributes}, for details of the semantics of attributes 
applying to labels.
@xref{Enumerator Attributes}, for details of the semantics of attributes
applying to enumerators.
@xref{Statement Attributes}, for details of the semantics of attributes
applying to statements.

An @dfn{attribute specifier} is of the form
@code{__attribute__ ((@var{attribute-list}))}.  An @dfn{attribute list}
is a possibly empty comma-separated sequence of @dfn{attributes}, where
each attribute is one of the following:

@itemize @bullet
@item
Empty.  Empty attributes are ignored.

@item
An attribute name
(which may be an identifier such as @code{unused}, or a reserved
word such as @code{const}).

@item
An attribute name followed by a parenthesized list of
parameters for the attribute.
These parameters take one of the following forms:

@itemize @bullet
@item
An identifier.  For example, @code{mode} attributes use this form.

@item
An identifier followed by a comma and a non-empty comma-separated list
of expressions.  For example, @code{format} attributes use this form.

@item
A possibly empty comma-separated list of expressions.  For example,
@code{format_arg} attributes use this form with the list being a single
integer constant expression, and @code{alias} attributes use this form
with the list being a single string constant.
@end itemize
@end itemize

An @dfn{attribute specifier list} is a sequence of one or more attribute
specifiers, not separated by any other tokens.

You may optionally specify attribute names with @samp{__}
preceding and following the name.
This allows you to use them in header files without
being concerned about a possible macro of the same name.  For example,
you may use the attribute name @code{__noreturn__} instead of @code{noreturn}.


@subsubheading Label Attributes

In GNU C, an attribute specifier list may appear after the colon following a
label, other than a @code{case} or @code{default} label.  GNU C++ only permits
attributes on labels if the attribute specifier is immediately
followed by a semicolon (i.e., the label applies to an empty
statement).  If the semicolon is missing, C++ label attributes are
ambiguous, as it is permissible for a declaration, which could begin
with an attribute list, to be labelled in C++.  Declarations cannot be
labelled in C90 or C99, so the ambiguity does not arise there.

@subsubheading Enumerator Attributes

In GNU C, an attribute specifier list may appear as part of an enumerator.
The attribute goes after the enumeration constant, before @samp{=}, if
present.  The optional attribute in the enumerator appertains to the
enumeration constant.  It is not possible to place the attribute after
the constant expression, if present.

@subsubheading Statement Attributes
In GNU C, an attribute specifier list may appear as part of a null
statement.  The attribute goes before the semicolon.

@subsubheading Type Attributes

An attribute specifier list may appear as part of a @code{struct},
@code{union} or @code{enum} specifier.  It may go either immediately
after the @code{struct}, @code{union} or @code{enum} keyword, or after
the closing brace.  The former syntax is preferred.
Where attribute specifiers follow the closing brace, they are considered
to relate to the structure, union or enumerated type defined, not to any
enclosing declaration the type specifier appears in, and the type
defined is not complete until after the attribute specifiers.
@c Otherwise, there would be the following problems: a shift/reduce
@c conflict between attributes binding the struct/union/enum and
@c binding to the list of specifiers/qualifiers; and "aligned"
@c attributes could use sizeof for the structure, but the size could be
@c changed later by "packed" attributes.


@subsubheading All other attributes

Otherwise, an attribute specifier appears as part of a declaration,
counting declarations of unnamed parameters and type names, and relates
to that declaration (which may be nested in another declaration, for
example in the case of a parameter declaration), or to a particular declarator
within a declaration.  Where an
attribute specifier is applied to a parameter declared as a function or
an array, it should apply to the function or array rather than the
pointer to which the parameter is implicitly converted, but this is not
yet correctly implemented.

Any list of specifiers and qualifiers at the start of a declaration may
contain attribute specifiers, whether or not such a list may in that
context contain storage class specifiers.  (Some attributes, however,
are essentially in the nature of storage class specifiers, and only make
sense where storage class specifiers may be used; for example,
@code{section}.)  There is one necessary limitation to this syntax: the
first old-style parameter declaration in a function definition cannot
begin with an attribute specifier, because such an attribute applies to
the function instead by syntax described below (which, however, is not
yet implemented in this case).  In some other cases, attribute
specifiers are permitted by this grammar but not yet supported by the
compiler.  All attribute specifiers in this place relate to the
declaration as a whole.  In the obsolescent usage where a type of
@code{int} is implied by the absence of type specifiers, such a list of
specifiers and qualifiers may be an attribute specifier list with no
other specifiers or qualifiers.

At present, the first parameter in a function prototype must have some
type specifier that is not an attribute specifier; this resolves an
ambiguity in the interpretation of @code{void f(int
(__attribute__((foo)) x))}, but is subject to change.  At present, if
the parentheses of a function declarator contain only attributes then
those attributes are ignored, rather than yielding an error or warning
or implying a single parameter of type int, but this is subject to
change.

An attribute specifier list may appear immediately before a declarator
(other than the first) in a comma-separated list of declarators in a
declaration of more than one identifier using a single list of
specifiers and qualifiers.  Such attribute specifiers apply
only to the identifier before whose declarator they appear.  For
example, in

@smallexample
__attribute__((noreturn)) void d0 (void),
    __attribute__((format(printf, 1, 2))) d1 (const char *, ...),
     d2 (void);
@end smallexample

@noindent
the @code{noreturn} attribute applies to all the functions
declared; the @code{format} attribute only applies to @code{d1}.

An attribute specifier list may appear immediately before the comma,
@samp{=}, or semicolon terminating the declaration of an identifier other
than a function definition.  Such attribute specifiers apply
to the declared object or function.  Where an
assembler name for an object or function is specified (@pxref{Asm
Labels}), the attribute must follow the @code{asm}
specification.

An attribute specifier list may, in future, be permitted to appear after
the declarator in a function definition (before any old-style parameter
declarations or the function body).

Attribute specifiers may be mixed with type qualifiers appearing inside
the @code{[]} of a parameter array declarator, in the C99 construct by
which such qualifiers are applied to the pointer to which the array is
implicitly converted.  Such attribute specifiers apply to the pointer,
not to the array, but at present this is not implemented and they are
ignored.

An attribute specifier list may appear at the start of a nested
declarator.  At present, there are some limitations in this usage: the
attributes correctly apply to the declarator, but for most individual
attributes the semantics this implies are not implemented.
When attribute specifiers follow the @code{*} of a pointer
declarator, they may be mixed with any type qualifiers present.
The following describes the formal semantics of this syntax.  It makes the
most sense if you are familiar with the formal specification of
declarators in the ISO C standard.

Consider (as in C99 subclause 6.7.5 paragraph 4) a declaration @code{T
D1}, where @code{T} contains declaration specifiers that specify a type
@var{Type} (such as @code{int}) and @code{D1} is a declarator that
contains an identifier @var{ident}.  The type specified for @var{ident}
for derived declarators whose type does not include an attribute
specifier is as in the ISO C standard.

If @code{D1} has the form @code{( @var{attribute-specifier-list} D )},
and the declaration @code{T D} specifies the type
``@var{derived-declarator-type-list} @var{Type}'' for @var{ident}, then
@code{T D1} specifies the type ``@var{derived-declarator-type-list}
@var{attribute-specifier-list} @var{Type}'' for @var{ident}.

If @code{D1} has the form @code{*
@var{type-qualifier-and-attribute-specifier-list} D}, and the
declaration @code{T D} specifies the type
``@var{derived-declarator-type-list} @var{Type}'' for @var{ident}, then
@code{T D1} specifies the type ``@var{derived-declarator-type-list}
@var{type-qualifier-and-attribute-specifier-list} pointer to @var{Type}'' for
@var{ident}.

For example,

@smallexample
void (__attribute__((noreturn)) ****f) (void);
@end smallexample

@noindent
specifies the type ``pointer to pointer to pointer to pointer to
non-returning function returning @code{void}''.  As another example,

@smallexample
char *__attribute__((aligned(8))) *f;
@end smallexample

@noindent
specifies the type ``pointer to 8-byte-aligned pointer to @code{char}''.
Note again that this does not work with most attributes; for example,
the usage of @samp{aligned} and @samp{noreturn} attributes given above
is not yet supported.

For compatibility with existing code written for compiler versions that
did not implement attributes on nested declarators, some laxity is
allowed in the placing of attributes.  If an attribute that only applies
to types is applied to a declaration, it is treated as applying to
the type of that declaration.  If an attribute that only applies to
declarations is applied to the type of a declaration, it is treated
as applying to that declaration; and, for compatibility with code
placing the attributes immediately before the identifier declared, such
an attribute applied to a function return type is treated as
applying to the function type, and such an attribute applied to an array
element type is treated as applying to the array type.  If an
attribute that only applies to function types is applied to a
pointer-to-function type, it is treated as applying to the pointer
target type; if such an attribute is applied to a function return type
that is not a pointer-to-function type, it is treated as applying
to the function type.

@node Function Prototypes
@section Prototypes and Old-Style Function Definitions
@cindex function prototype declarations
@cindex old-style function definitions
@cindex promotion of formal parameters

GNU C extends ISO C to allow a function prototype to override a later
old-style non-prototype definition.  Consider the following example:

@smallexample
/* @r{Use prototypes unless the compiler is old-fashioned.}  */
#ifdef __STDC__
#define P(x) x
#else
#define P(x) ()
#endif

/* @r{Prototype function declaration.}  */
int isroot P((uid_t));

/* @r{Old-style function definition.}  */
int
isroot (x)   /* @r{??? lossage here ???} */
     uid_t x;
@{
  return x == 0;
@}
@end smallexample

Suppose the type @code{uid_t} happens to be @code{short}.  ISO C does
not allow this example, because subword arguments in old-style
non-prototype definitions are promoted.  Therefore in this example the
function definition's argument is really an @code{int}, which does not
match the prototype argument type of @code{short}.

This restriction of ISO C makes it hard to write code that is portable
to traditional C compilers, because the programmer does not know
whether the @code{uid_t} type is @code{short}, @code{int}, or
@code{long}.  Therefore, in cases like these GNU C allows a prototype
to override a later old-style definition.  More precisely, in GNU C, a
function prototype argument type overrides the argument type specified
by a later old-style definition if the former type is the same as the
latter type before promotion.  Thus in GNU C the above example is
equivalent to the following:

@smallexample
int isroot (uid_t);

int
isroot (uid_t x)
@{
  return x == 0;
@}
@end smallexample

@noindent
GNU C++ does not support old-style function definitions, so this
extension is irrelevant.

@node C++ Comments
@section C++ Style Comments
@cindex @code{//}
@cindex C++ comments
@cindex comments, C++ style

In GNU C, you may use C++ style comments, which start with @samp{//} and
continue until the end of the line.  Many other C implementations allow
such comments, and they are included in the 1999 C standard.  However,
C++ style comments are not recognized if you specify an @option{-std}
option specifying a version of ISO C before C99, or @option{-ansi}
(equivalent to @option{-std=c90}).

@node Dollar Signs
@section Dollar Signs in Identifier Names
@cindex $
@cindex dollar signs in identifier names
@cindex identifier names, dollar signs in

In GNU C, you may normally use dollar signs in identifier names.
This is because many traditional C implementations allow such identifiers.
However, dollar signs in identifiers are not supported on a few target
machines, typically because the target assembler does not allow them.

@node Character Escapes
@section The Character @key{ESC} in Constants

You can use the sequence @samp{\e} in a string or character constant to
stand for the ASCII character @key{ESC}.

@node Alignment
@section Determining the Alignment of Functions, Types or Variables
@cindex alignment
@cindex type alignment
@cindex variable alignment

The keyword @code{__alignof__} determines the alignment requirement of
a function, object, or a type, or the minimum alignment usually required
by a type.  Its syntax is just like @code{sizeof} and C11 @code{_Alignof}.

For example, if the target machine requires a @code{double} value to be
aligned on an 8-byte boundary, then @code{__alignof__ (double)} is 8.
This is true on many RISC machines.  On more traditional machine
designs, @code{__alignof__ (double)} is 4 or even 2.

Some machines never actually require alignment; they allow references to any
data type even at an odd address.  For these machines, @code{__alignof__}
reports the smallest alignment that GCC gives the data type, usually as
mandated by the target ABI.

If the operand of @code{__alignof__} is an lvalue rather than a type,
its value is the required alignment for its type, taking into account
any minimum alignment specified by attribute @code{aligned}
(@pxref{Common Variable Attributes}).  For example, after this
declaration:

@smallexample
struct foo @{ int x; char y; @} foo1;
@end smallexample

@noindent
the value of @code{__alignof__ (foo1.y)} is 1, even though its actual
alignment is probably 2 or 4, the same as @code{__alignof__ (int)}.
It is an error to ask for the alignment of an incomplete type other
than @code{void}.

If the operand of the @code{__alignof__} expression is a function,
the expression evaluates to the alignment of the function which may
be specified by attribute @code{aligned} (@pxref{Common Function Attributes}).

@node Inline
@section An Inline Function is As Fast As a Macro
@cindex inline functions
@cindex integrating function code
@cindex open coding
@cindex macros, inline alternative

By declaring a function inline, you can direct GCC to make
calls to that function faster.  One way GCC can achieve this is to
integrate that function's code into the code for its callers.  This
makes execution faster by eliminating the function-call overhead; in
addition, if any of the actual argument values are constant, their
known values may permit simplifications at compile time so that not
all of the inline function's code needs to be included.  The effect on
code size is less predictable; object code may be larger or smaller
with function inlining, depending on the particular case.  You can
also direct GCC to try to integrate all ``simple enough'' functions
into their callers with the option @option{-finline-functions}.

GCC implements three different semantics of declaring a function
inline.  One is available with @option{-std=gnu89} or
@option{-fgnu89-inline} or when @code{gnu_inline} attribute is present
on all inline declarations, another when
@option{-std=c99},
@option{-std=gnu99} or an option for a later C version is used
(without @option{-fgnu89-inline}), and the third
is used when compiling C++.

To declare a function inline, use the @code{inline} keyword in its
declaration, like this:

@smallexample
static inline int
inc (int *a)
@{
  return (*a)++;
@}
@end smallexample

If you are writing a header file to be included in ISO C90 programs, write
@code{__inline__} instead of @code{inline}.  @xref{Alternate Keywords}.

The three types of inlining behave similarly in two important cases:
when the @code{inline} keyword is used on a @code{static} function,
like the example above, and when a function is first declared without
using the @code{inline} keyword and then is defined with
@code{inline}, like this:

@smallexample
extern int inc (int *a);
inline int
inc (int *a)
@{
  return (*a)++;
@}
@end smallexample

In both of these common cases, the program behaves the same as if you
had not used the @code{inline} keyword, except for its speed.

@cindex inline functions, omission of
@opindex fkeep-inline-functions
When a function is both inline and @code{static}, if all calls to the
function are integrated into the caller, and the function's address is
never used, then the function's own assembler code is never referenced.
In this case, GCC does not actually output assembler code for the
function, unless you specify the option @option{-fkeep-inline-functions}.
If there is a nonintegrated call, then the function is compiled to
assembler code as usual.  The function must also be compiled as usual if
the program refers to its address, because that cannot be inlined.

@opindex Winline
Note that certain usages in a function definition can make it unsuitable
for inline substitution.  Among these usages are: variadic functions,
use of @code{alloca}, use of computed goto (@pxref{Labels as Values}),
use of nonlocal goto, use of nested functions, use of @code{setjmp}, use
of @code{__builtin_longjmp} and use of @code{__builtin_return} or
@code{__builtin_apply_args}.  Using @option{-Winline} warns when a
function marked @code{inline} could not be substituted, and gives the
reason for the failure.

@cindex automatic @code{inline} for C++ member fns
@cindex @code{inline} automatic for C++ member fns
@cindex member fns, automatically @code{inline}
@cindex C++ member fns, automatically @code{inline}
@opindex fno-default-inline
As required by ISO C++, GCC considers member functions defined within
the body of a class to be marked inline even if they are
not explicitly declared with the @code{inline} keyword.  You can
override this with @option{-fno-default-inline}; @pxref{C++ Dialect
Options,,Options Controlling C++ Dialect}.

GCC does not inline any functions when not optimizing unless you specify
the @samp{always_inline} attribute for the function, like this:

@smallexample
/* @r{Prototype.}  */
inline void foo (const char) __attribute__((always_inline));
@end smallexample

The remainder of this section is specific to GNU C90 inlining.

@cindex non-static inline function
When an inline function is not @code{static}, then the compiler must assume
that there may be calls from other source files; since a global symbol can
be defined only once in any program, the function must not be defined in
the other source files, so the calls therein cannot be integrated.
Therefore, a non-@code{static} inline function is always compiled on its
own in the usual fashion.

If you specify both @code{inline} and @code{extern} in the function
definition, then the definition is used only for inlining.  In no case
is the function compiled on its own, not even if you refer to its
address explicitly.  Such an address becomes an external reference, as
if you had only declared the function, and had not defined it.

This combination of @code{inline} and @code{extern} has almost the
effect of a macro.  The way to use it is to put a function definition in
a header file with these keywords, and put another copy of the
definition (lacking @code{inline} and @code{extern}) in a library file.
The definition in the header file causes most calls to the function
to be inlined.  If any uses of the function remain, they refer to
the single copy in the library.

@node Const and Volatile Functions
@section Const and Volatile Functions
@cindex @code{const} applied to function
@cindex @code{volatile} applied to function

The C standard explicitly leaves the behavior of the @code{const} and
@code{volatile} type qualifiers applied to functions undefined; these
constructs can only arise through the use of @code{typedef}.  As an extension,
GCC defines this use of the @code{const} qualifier to have the same meaning
as the GCC @code{const} function attribute, and the @code{volatile} qualifier
to be equivalent to the @code{noreturn} attribute.
@xref{Common Function Attributes}, for more information.

As examples of this usage,

@smallexample

/* @r{Equivalent to:}
   void fatal () __attribute__ ((noreturn));  */
typedef void voidfn ();
volatile voidfn fatal;

/* @r{Equivalent to:}
   extern int square (int) __attribute__ ((const));  */
typedef int intfn (int);
extern const intfn square;
@end smallexample

In general, using function attributes instead is preferred, since the
attributes make both the intent of the code and its reliance on a GNU
extension explicit.  Additionally, using @code{const} and
@code{volatile} in this way is specific to GNU C and does not work in
GNU C++.

@node Volatiles
@section When is a Volatile Object Accessed?
@cindex accessing volatiles
@cindex volatile read
@cindex volatile write
@cindex volatile access

C has the concept of volatile objects.  These are normally accessed by
pointers and used for accessing hardware or inter-thread
communication.  The standard encourages compilers to refrain from
optimizations concerning accesses to volatile objects, but leaves it
implementation defined as to what constitutes a volatile access.  The
minimum requirement is that at a sequence point all previous accesses
to volatile objects have stabilized and no subsequent accesses have
occurred.  Thus an implementation is free to reorder and combine
volatile accesses that occur between sequence points, but cannot do
so for accesses across a sequence point.  The use of volatile does
not allow you to violate the restriction on updating objects multiple
times between two sequence points.

Accesses to non-volatile objects are not ordered with respect to
volatile accesses.  You cannot use a volatile object as a memory
barrier to order a sequence of writes to non-volatile memory.  For
instance:

@smallexample
int *ptr = @var{something};
volatile int vobj;
*ptr = @var{something};
vobj = 1;
@end smallexample

@noindent
Unless @var{*ptr} and @var{vobj} can be aliased, it is not guaranteed
that the write to @var{*ptr} occurs by the time the update
of @var{vobj} happens.  If you need this guarantee, you must use
a stronger memory barrier such as:

@smallexample
int *ptr = @var{something};
volatile int vobj;
*ptr = @var{something};
asm volatile ("" : : : "memory");
vobj = 1;
@end smallexample

A scalar volatile object is read when it is accessed in a void context:

@smallexample
volatile int *src = @var{somevalue};
*src;
@end smallexample

Such expressions are rvalues, and GCC implements this as a
read of the volatile object being pointed to.

Assignments are also expressions and have an rvalue.  However when
assigning to a scalar volatile, the volatile object is not reread,
regardless of whether the assignment expression's rvalue is used or
not.  If the assignment's rvalue is used, the value is that assigned
to the volatile object.  For instance, there is no read of @var{vobj}
in all the following cases:

@smallexample
int obj;
volatile int vobj;
vobj = @var{something};
obj = vobj = @var{something};
obj ? vobj = @var{onething} : vobj = @var{anotherthing};
obj = (@var{something}, vobj = @var{anotherthing});
@end smallexample

If you need to read the volatile object after an assignment has
occurred, you must use a separate expression with an intervening
sequence point.

As bit-fields are not individually addressable, volatile bit-fields may
be implicitly read when written to, or when adjacent bit-fields are
accessed.  Bit-field operations may be optimized such that adjacent
bit-fields are only partially accessed, if they straddle a storage unit
boundary.  For these reasons it is unwise to use volatile bit-fields to
access hardware.

@node Using Assembly Language with C
@section How to Use Inline Assembly Language in C Code
@cindex @code{asm} keyword
@cindex assembly language in C
@cindex inline assembly language
@cindex mixing assembly language and C

The @code{asm} keyword allows you to embed assembler instructions
within C code.  GCC provides two forms of inline @code{asm}
statements.  A @dfn{basic @code{asm}} statement is one with no
operands (@pxref{Basic Asm}), while an @dfn{extended @code{asm}}
statement (@pxref{Extended Asm}) includes one or more operands.  
The extended form is preferred for mixing C and assembly language
within a function, but to include assembly language at
top level you must use basic @code{asm}.

You can also use the @code{asm} keyword to override the assembler name
for a C symbol, or to place a C variable in a specific register.

@menu
* Basic Asm::          Inline assembler without operands.
* Extended Asm::       Inline assembler with operands.
* Constraints::        Constraints for @code{asm} operands
* Asm Labels::         Specifying the assembler name to use for a C symbol.
* Explicit Register Variables::  Defining variables residing in specified 
                       registers.
* Size of an asm::     How GCC calculates the size of an @code{asm} block.
@end menu

@node Basic Asm
@subsection Basic Asm --- Assembler Instructions Without Operands
@cindex basic @code{asm}
@cindex assembly language in C, basic

A basic @code{asm} statement has the following syntax:

@example
asm @var{asm-qualifiers} ( @var{AssemblerInstructions} )
@end example

For the C language, the @code{asm} keyword is a GNU extension.
When writing C code that can be compiled with @option{-ansi} and the
@option{-std} options that select C dialects without GNU extensions, use
@code{__asm__} instead of @code{asm} (@pxref{Alternate Keywords}).  For
the C++ language, @code{asm} is a standard keyword, but @code{__asm__}
can be used for code compiled with @option{-fno-asm}.

@subsubheading Qualifiers
@table @code
@item volatile
The optional @code{volatile} qualifier has no effect. 
All basic @code{asm} blocks are implicitly volatile.

@item inline
If you use the @code{inline} qualifier, then for inlining purposes the size
of the @code{asm} statement is taken as the smallest size possible (@pxref{Size
of an asm}).
@end table

@subsubheading Parameters
@table @var

@item AssemblerInstructions
This is a literal string that specifies the assembler code. The string can 
contain any instructions recognized by the assembler, including directives. 
GCC does not parse the assembler instructions themselves and 
does not know what they mean or even whether they are valid assembler input. 

You may place multiple assembler instructions together in a single @code{asm}
string, separated by the characters normally used in assembly code for the
system. A combination that works in most places is a newline to break the
line, plus a tab character (written as @samp{\n\t}).
Some assemblers allow semicolons as a line separator. However,
note that some assembler dialects use semicolons to start a comment.
@end table

@node asm constexprs
With gnu++11 or later the string can also be a compile time constant expression
inside parens.  The constant expression can return a string or a container
with data and size members, following similar rules as C++26 @code{static_assert}
message. Any string is converted to the character set of the source code.
When this feature is available the @code{__GXX_CONSTEXPR_ASM__} cpp symbol is defined.

@example
#include <string>
constexpr std::string_view genfoo() @{ return "foo"; @}

void function()
@{
  asm((genfoo()));
@}
@end example

@subsubheading Remarks
Using extended @code{asm} (@pxref{Extended Asm}) typically produces
smaller, safer, and more efficient code, and in most cases it is a
better solution than basic @code{asm}.  However, there are two
situations where only basic @code{asm} can be used:

@itemize @bullet
@item
Extended @code{asm} statements have to be inside a C
function, so to write inline assembly language at file scope (``top-level''),
outside of C functions, you must use basic @code{asm}.
You can use this technique to emit assembler directives,
define assembly language macros that can be invoked elsewhere in the file,
or write entire functions in assembly language.
Basic @code{asm} statements outside of functions may not use any
qualifiers.

@item
Functions declared
with the @code{naked} attribute also require basic @code{asm}
(@pxref{Function Attributes}).
@end itemize

Safely accessing C data and calling functions from basic @code{asm} is more 
complex than it may appear. To access C data, it is better to use extended 
@code{asm}.

Do not expect a sequence of @code{asm} statements to remain perfectly 
consecutive after compilation. If certain instructions need to remain 
consecutive in the output, put them in a single multi-instruction @code{asm}
statement. Note that GCC's optimizers can move @code{asm} statements 
relative to other code, including across jumps.

@code{asm} statements may not perform jumps into other @code{asm} statements. 
GCC does not know about these jumps, and therefore cannot take 
account of them when deciding how to optimize. Jumps from @code{asm} to C 
labels are only supported in extended @code{asm}.

Under certain circumstances, GCC may duplicate (or remove duplicates of) your 
assembly code when optimizing. This can lead to unexpected duplicate 
symbol errors during compilation if your assembly code defines symbols or 
labels.

@strong{Warning:} The C standards do not specify semantics for @code{asm},
making it a potential source of incompatibilities between compilers.  These
incompatibilities may not produce compiler warnings/errors.

GCC does not parse basic @code{asm}'s @var{AssemblerInstructions}, which
means there is no way to communicate to the compiler what is happening
inside them.  GCC has no visibility of symbols in the @code{asm} and may
discard them as unreferenced.  It also does not know about side effects of
the assembler code, such as modifications to memory or registers.  Unlike
some compilers, GCC assumes that no changes to general purpose registers
occur.  This assumption may change in a future release.

To avoid complications from future changes to the semantics and the
compatibility issues between compilers, consider replacing basic @code{asm}
with extended @code{asm}.  See
@uref{https://gcc.gnu.org/wiki/ConvertBasicAsmToExtended, How to convert
from basic asm to extended asm} for information about how to perform this
conversion.

The compiler copies the assembler instructions in a basic @code{asm} 
verbatim to the assembly language output file, without 
processing dialects or any of the @samp{%} operators that are available with
extended @code{asm}. This results in minor differences between basic 
@code{asm} strings and extended @code{asm} templates. For example, to refer to 
registers you might use @samp{%eax} in basic @code{asm} and
@samp{%%eax} in extended @code{asm}.

On targets such as x86 that support multiple assembler dialects,
all basic @code{asm} blocks use the assembler dialect specified by the 
@option{-masm} command-line option (@pxref{x86 Options}).  
Basic @code{asm} provides no
mechanism to provide different assembler strings for different dialects.

For basic @code{asm} with non-empty assembler string GCC assumes
the assembler block does not change any general purpose registers,
but it may read or write any globally accessible variable.

Here is an example of basic @code{asm} for i386:

@example
/* Note that this code will not compile with -masm=intel */
#define DebugBreak() asm("int $3")
@end example

@node Extended Asm
@subsection Extended Asm - Assembler Instructions with C Expression Operands
@cindex extended @code{asm}
@cindex assembly language in C, extended

With extended @code{asm} you can read and write C variables from 
assembler and perform jumps from assembler code to C labels.  
Extended @code{asm} syntax uses colons (@samp{:}) to delimit
the operand parameters after the assembler template:

@example
asm @var{asm-qualifiers} ( @var{AssemblerTemplate} 
                 : @var{OutputOperands} 
                 @r{[} : @var{InputOperands}
                 @r{[} : @var{Clobbers} @r{]} @r{]})

asm @var{asm-qualifiers} ( @var{AssemblerTemplate} 
                      : @var{OutputOperands}
                      : @var{InputOperands}
                      : @var{Clobbers}
                      : @var{GotoLabels})
@end example
where in the last form, @var{asm-qualifiers} contains @code{goto} (and in the
first form, not).

The @code{asm} keyword is a GNU extension.
When writing code that can be compiled with @option{-ansi} and the
various @option{-std} options, use @code{__asm__} instead of 
@code{asm} (@pxref{Alternate Keywords}).

@subsubheading Qualifiers
@table @code

@item volatile
The typical use of extended @code{asm} statements is to manipulate input 
values to produce output values. However, your @code{asm} statements may 
also produce side effects. If so, you may need to use the @code{volatile} 
qualifier to disable certain optimizations. @xref{Volatile}.

@item inline
If you use the @code{inline} qualifier, then for inlining purposes the size
of the @code{asm} statement is taken as the smallest size possible
(@pxref{Size of an asm}).

@item goto
This qualifier informs the compiler that the @code{asm} statement may 
perform a jump to one of the labels listed in the @var{GotoLabels}.
@xref{GotoLabels}.
@end table

@subsubheading Parameters
@table @var
@item AssemblerTemplate
This is a literal string that is the template for the assembler code. It is a 
combination of fixed text and tokens that refer to the input, output, 
and goto parameters. @xref{AssemblerTemplate}. With gnu++11 or later it can
also be a constant expression inside parens (see @ref{asm constexprs}).

@item OutputOperands
A comma-separated list of the C variables modified by the instructions in the 
@var{AssemblerTemplate}.  An empty list is permitted.  @xref{OutputOperands}.
With gnu++11 or later the strings can also be constant expressions inside parens
(see @ref{asm constexprs})

@item InputOperands
A comma-separated list of C expressions read by the instructions in the 
@var{AssemblerTemplate}.  An empty list is permitted.  @xref{InputOperands}.
With gnu++11 or later the strings can also be constant expressions inside parens
(see @ref{asm constexprs})

@item Clobbers
A comma-separated list of registers or other values changed by the 
@var{AssemblerTemplate}, beyond those listed as outputs.
An empty list is permitted.  @xref{Clobbers and Scratch Registers}.
With gnu++11 or later the strings can also be constant expressions inside parens
(see @ref{asm constexprs})

@item GotoLabels
When you are using the @code{goto} form of @code{asm}, this section contains 
the list of all C labels to which the code in the 
@var{AssemblerTemplate} may jump. 
@xref{GotoLabels}.

@code{asm} statements may not perform jumps into other @code{asm} statements,
only to the listed @var{GotoLabels}.
GCC's optimizers do not know about other jumps; therefore they cannot take 
account of them when deciding how to optimize.
@end table

The total number of input + output + goto operands is limited to 30.

@subsubheading Remarks
The @code{asm} statement allows you to include assembly instructions directly 
within C code. This may help you to maximize performance in time-sensitive 
code or to access assembly instructions that are not readily available to C 
programs.

Note that extended @code{asm} statements must be inside a function. Only 
basic @code{asm} may be outside functions (@pxref{Basic Asm}).
Functions declared with the @code{naked} attribute also require basic 
@code{asm} (@pxref{Function Attributes}).

While the uses of @code{asm} are many and varied, it may help to think of an 
@code{asm} statement as a series of low-level instructions that convert input 
parameters to output parameters. So a simple (if not particularly useful) 
example for i386 using @code{asm} might look like this:

@example
int src = 1;
int dst;   

asm ("mov %1, %0\n\t"
    "add $1, %0"
    : "=r" (dst) 
    : "r" (src));

printf("%d\n", dst);
@end example

This code copies @code{src} to @code{dst} and add 1 to @code{dst}.

@anchor{Volatile}
@subsubsection Volatile
@cindex volatile @code{asm}
@cindex @code{asm} volatile

GCC's optimizers sometimes discard @code{asm} statements if they determine 
there is no need for the output variables. Also, the optimizers may move 
code out of loops if they believe that the code will always return the same 
result (i.e.@: none of its input values change between calls). Using the 
@code{volatile} qualifier disables these optimizations. @code{asm} statements 
that have no output operands and @code{asm goto} statements, 
are implicitly volatile.

This i386 code demonstrates a case that does not use (or require) the 
@code{volatile} qualifier. If it is performing assertion checking, this code 
uses @code{asm} to perform the validation. Otherwise, @code{dwRes} is 
unreferenced by any code. As a result, the optimizers can discard the 
@code{asm} statement, which in turn removes the need for the entire 
@code{DoCheck} routine. By omitting the @code{volatile} qualifier when it 
isn't needed you allow the optimizers to produce the most efficient code 
possible.

@example
void DoCheck(uint32_t dwSomeValue)
@{
   uint32_t dwRes;

   // Assumes dwSomeValue is not zero.
   asm ("bsfl %1,%0"
     : "=r" (dwRes)
     : "r" (dwSomeValue)
     : "cc");

   assert(dwRes > 3);
@}
@end example

The next example shows a case where the optimizers can recognize that the input 
(@code{dwSomeValue}) never changes during the execution of the function and can 
therefore move the @code{asm} outside the loop to produce more efficient code. 
Again, using the @code{volatile} qualifier disables this type of optimization.

@example
void do_print(uint32_t dwSomeValue)
@{
   uint32_t dwRes;

   for (uint32_t x=0; x < 5; x++)
   @{
      // Assumes dwSomeValue is not zero.
      asm ("bsfl %1,%0"
        : "=r" (dwRes)
        : "r" (dwSomeValue)
        : "cc");

      printf("%u: %u %u\n", x, dwSomeValue, dwRes);
   @}
@}
@end example

The following example demonstrates a case where you need to use the 
@code{volatile} qualifier. 
It uses the x86 @code{rdtsc} instruction, which reads 
the computer's time-stamp counter. Without the @code{volatile} qualifier, 
the optimizers might assume that the @code{asm} block will always return the 
same value and therefore optimize away the second call.

@example
uint64_t msr;

asm volatile ( "rdtsc\n\t"    // Returns the time in EDX:EAX.
        "shl $32, %%rdx\n\t"  // Shift the upper bits left.
        "or %%rdx, %0"        // 'Or' in the lower bits.
        : "=a" (msr)
        : 
        : "rdx");

printf("msr: %llx\n", msr);

// Do other work...

// Reprint the timestamp
asm volatile ( "rdtsc\n\t"    // Returns the time in EDX:EAX.
        "shl $32, %%rdx\n\t"  // Shift the upper bits left.
        "or %%rdx, %0"        // 'Or' in the lower bits.
        : "=a" (msr)
        : 
        : "rdx");

printf("msr: %llx\n", msr);
@end example

GCC's optimizers do not treat this code like the non-volatile code in the 
earlier examples. They do not move it out of loops or omit it on the 
assumption that the result from a previous call is still valid.

Note that the compiler can move even @code{volatile asm} instructions relative
to other code, including across jump instructions. For example, on many 
targets there is a system register that controls the rounding mode of 
floating-point operations. Setting it with a @code{volatile asm} statement,
as in the following PowerPC example, does not work reliably.

@example
asm volatile("mtfsf 255, %0" : : "f" (fpenv));
sum = x + y;
@end example

The compiler may move the addition back before the @code{volatile asm}
statement. To make it work as expected, add an artificial dependency to
the @code{asm} by referencing a variable in the subsequent code, for
example:

@example
asm volatile ("mtfsf 255,%1" : "=X" (sum) : "f" (fpenv));
sum = x + y;
@end example

Under certain circumstances, GCC may duplicate (or remove duplicates of) your 
assembly code when optimizing. This can lead to unexpected duplicate symbol 
errors during compilation if your @code{asm} code defines symbols or labels. 
Using @samp{%=} 
(@pxref{AssemblerTemplate}) may help resolve this problem.

@anchor{AssemblerTemplate}
@subsubsection Assembler Template
@cindex @code{asm} assembler template

An assembler template is a literal string containing assembler instructions.
The compiler replaces tokens in the template that refer 
to inputs, outputs, and goto labels,
and then outputs the resulting string to the assembler. The 
string can contain any instructions recognized by the assembler, including 
directives. GCC does not parse the assembler instructions 
themselves and does not know what they mean or even whether they are valid 
assembler input. However, it does count the statements 
(@pxref{Size of an asm}).

You may place multiple assembler instructions together in a single @code{asm} 
string, separated by the characters normally used in assembly code for the 
system. A combination that works in most places is a newline to break the 
line, plus a tab character to move to the instruction field (written as 
@samp{\n\t}). 
Some assemblers allow semicolons as a line separator. However, note 
that some assembler dialects use semicolons to start a comment. 

Do not expect a sequence of @code{asm} statements to remain perfectly 
consecutive after compilation, even when you are using the @code{volatile} 
qualifier. If certain instructions need to remain consecutive in the output, 
put them in a single multi-instruction @code{asm} statement.

Accessing data from C programs without using input/output operands (such as 
by using global symbols directly from the assembler template) may not work as 
expected. Similarly, calling functions directly from an assembler template 
requires a detailed understanding of the target assembler and ABI.

Since GCC does not parse the assembler template,
it has no visibility of any 
symbols it references. This may result in GCC discarding those symbols as 
unreferenced unless they are also listed as input, output, or goto operands.

@subsubheading Special format strings

In addition to the tokens described by the input, output, and goto operands, 
these tokens have special meanings in the assembler template:

@table @samp
@item %% 
Outputs a single @samp{%} into the assembler code.

@item %= 
Outputs a number that is unique to each instance of the @code{asm} 
statement in the entire compilation. This option is useful when creating local 
labels and referring to them multiple times in a single template that 
generates multiple assembler instructions. 

@item %@{
@itemx %|
@itemx %@}
Outputs @samp{@{}, @samp{|}, and @samp{@}} characters (respectively)
into the assembler code.  When unescaped, these characters have special
meaning to indicate multiple assembler dialects, as described below.
@end table

@subsubheading Multiple assembler dialects in @code{asm} templates

On targets such as x86, GCC supports multiple assembler dialects.
The @option{-masm} option controls which dialect GCC uses as its 
default for inline assembler. The target-specific documentation for the 
@option{-masm} option contains the list of supported dialects, as well as the 
default dialect if the option is not specified. This information may be 
important to understand, since assembler code that works correctly when 
compiled using one dialect will likely fail if compiled using another.
@xref{x86 Options}.

If your code needs to support multiple assembler dialects (for example, if 
you are writing public headers that need to support a variety of compilation 
options), use constructs of this form:

@example
@{ dialect0 | dialect1 | dialect2... @}
@end example

This construct outputs @code{dialect0} 
when using dialect #0 to compile the code, 
@code{dialect1} for dialect #1, etc. If there are fewer alternatives within the 
braces than the number of dialects the compiler supports, the construct 
outputs nothing.

For example, if an x86 compiler supports two dialects
(@samp{att}, @samp{intel}), an 
assembler template such as this:

@example
"bt@{l %[Offset],%[Base] | %[Base],%[Offset]@}; jc %l2"
@end example

@noindent
is equivalent to one of

@example
"btl %[Offset],%[Base] ; jc %l2"   @r{/* att dialect */}
"bt %[Base],%[Offset]; jc %l2"     @r{/* intel dialect */}
@end example

Using that same compiler, this code:

@example
"xchg@{l@}\t@{%%@}ebx, %1"
@end example

@noindent
corresponds to either

@example
"xchgl\t%%ebx, %1"                 @r{/* att dialect */}
"xchg\tebx, %1"                    @r{/* intel dialect */}
@end example

There is no support for nesting dialect alternatives.

@anchor{OutputOperands}
@subsubsection Output Operands
@cindex @code{asm} output operands

An @code{asm} statement has zero or more output operands indicating the names
of C variables modified by the assembler code.

In this i386 example, @code{old} (referred to in the template string as 
@code{%0}) and @code{*Base} (as @code{%1}) are outputs and @code{Offset} 
(@code{%2}) is an input:

@example
bool old;

__asm__ ("btsl %2,%1\n\t" // Turn on zero-based bit #Offset in Base.
         "sbb %0,%0"      // Use the CF to calculate old.
   : "=r" (old), "+rm" (*Base)
   : "Ir" (Offset)
   : "cc");

return old;
@end example

Operands are separated by commas.  Each operand has this format:

@example
@r{[} [@var{asmSymbolicName}] @r{]} @var{constraint} (@var{cvariablename})
@end example

@table @var
@item asmSymbolicName
Specifies a symbolic name for the operand.
Reference the name in the assembler template 
by enclosing it in square brackets 
(i.e.@: @samp{%[Value]}). The scope of the name is the @code{asm} statement 
that contains the definition. Any valid C variable name is acceptable, 
including names already defined in the surrounding code. No two operands 
within the same @code{asm} statement can use the same symbolic name.

When not using an @var{asmSymbolicName}, use the (zero-based) position
of the operand 
in the list of operands in the assembler template. For example if there are 
three output operands, use @samp{%0} in the template to refer to the first, 
@samp{%1} for the second, and @samp{%2} for the third. 

@item constraint
A string constant specifying constraints on the placement of the operand; 
@xref{Constraints}, for details.

Output constraints must begin with either @samp{=} (a variable overwriting an 
existing value) or @samp{+} (when reading and writing). When using 
@samp{=}, do not assume the location contains the existing value
on entry to the @code{asm}, except 
when the operand is tied to an input; @pxref{InputOperands,,Input Operands}.

After the prefix, there must be one or more additional constraints 
(@pxref{Constraints}) that describe where the value resides. Common 
constraints include @samp{r} for register and @samp{m} for memory. 
When you list more than one possible location (for example, @code{"=rm"}),
the compiler chooses the most efficient one based on the current context. 
If you list as many alternates as the @code{asm} statement allows, you permit 
the optimizers to produce the best possible code. 
If you must use a specific register, but your Machine Constraints do not
provide sufficient control to select the specific register you want, 
local register variables may provide a solution (@pxref{Local Register 
Variables}).

@item cvariablename
Specifies a C lvalue expression to hold the output, typically a variable name.
The enclosing parentheses are a required part of the syntax.

@end table

When the compiler selects the registers to use to 
represent the output operands, it does not use any of the clobbered registers 
(@pxref{Clobbers and Scratch Registers}).

Output operand expressions must be lvalues. The compiler cannot check whether 
the operands have data types that are reasonable for the instruction being 
executed. For output expressions that are not directly addressable (for 
example a bit-field), the constraint must allow a register. In that case, GCC 
uses the register as the output of the @code{asm}, and then stores that 
register into the output. 

Operands using the @samp{+} constraint modifier count as two operands 
(that is, both as input and output) towards the total maximum of 30 operands
per @code{asm} statement.

Use the @samp{&} constraint modifier (@pxref{Modifiers}) on all output
operands that must not overlap an input.  Otherwise, 
GCC may allocate the output operand in the same register as an unrelated 
input operand, on the assumption that the assembler code consumes its 
inputs before producing outputs. This assumption may be false if the assembler 
code actually consists of more than one instruction.

The same problem can occur if one output parameter (@var{a}) allows a register 
constraint and another output parameter (@var{b}) allows a memory constraint.
The code generated by GCC to access the memory address in @var{b} can contain
registers which @emph{might} be shared by @var{a}, and GCC considers those 
registers to be inputs to the asm. As above, GCC assumes that such input
registers are consumed before any outputs are written. This assumption may 
result in incorrect behavior if the @code{asm} statement writes to @var{a}
before using
@var{b}. Combining the @samp{&} modifier with the register constraint on @var{a}
ensures that modifying @var{a} does not affect the address referenced by 
@var{b}. Otherwise, the location of @var{b} 
is undefined if @var{a} is modified before using @var{b}.

@code{asm} supports operand modifiers on operands (for example @samp{%k2} 
instead of simply @samp{%2}). @ref{GenericOperandmodifiers,
Generic Operand modifiers} lists the modifiers that are available
on all targets.  Other modifiers are hardware dependent.
For example, the list of supported modifiers for x86 is found at
@ref{x86Operandmodifiers,x86 Operand modifiers}.

If the C code that follows the @code{asm} makes no use of any of the output 
operands, use @code{volatile} for the @code{asm} statement to prevent the 
optimizers from discarding the @code{asm} statement as unneeded 
(see @ref{Volatile}).

This code makes no use of the optional @var{asmSymbolicName}. Therefore it 
references the first output operand as @code{%0} (were there a second, it 
would be @code{%1}, etc). The number of the first input operand is one greater 
than that of the last output operand. In this i386 example, that makes 
@code{Mask} referenced as @code{%1}:

@example
uint32_t Mask = 1234;
uint32_t Index;

  asm ("bsfl %1, %0"
     : "=r" (Index)
     : "r" (Mask)
     : "cc");
@end example

That code overwrites the variable @code{Index} (@samp{=}),
placing the value in a register (@samp{r}).
Using the generic @samp{r} constraint instead of a constraint for a specific 
register allows the compiler to pick the register to use, which can result 
in more efficient code. This may not be possible if an assembler instruction 
requires a specific register.

The following i386 example uses the @var{asmSymbolicName} syntax.
It produces the 
same result as the code above, but some may consider it more readable or more 
maintainable since reordering index numbers is not necessary when adding or 
removing operands. The names @code{aIndex} and @code{aMask}
are only used in this example to emphasize which 
names get used where.
It is acceptable to reuse the names @code{Index} and @code{Mask}.

@example
uint32_t Mask = 1234;
uint32_t Index;

  asm ("bsfl %[aMask], %[aIndex]"
     : [aIndex] "=r" (Index)
     : [aMask] "r" (Mask)
     : "cc");
@end example

Here are some more examples of output operands.

@example
uint32_t c = 1;
uint32_t d;
uint32_t *e = &c;

asm ("mov %[e], %[d]"
   : [d] "=rm" (d)
   : [e] "rm" (*e));
@end example

Here, @code{d} may either be in a register or in memory. Since the compiler 
might already have the current value of the @code{uint32_t} location
pointed to by @code{e}
in a register, you can enable it to choose the best location
for @code{d} by specifying both constraints.

@anchor{FlagOutputOperands}
@subsubsection Flag Output Operands
@cindex @code{asm} flag output operands

Some targets have a special register that holds the ``flags'' for the
result of an operation or comparison.  Normally, the contents of that
register are either unmodifed by the asm, or the @code{asm} statement is
considered to clobber the contents.

On some targets, a special form of output operand exists by which
conditions in the flags register may be outputs of the asm.  The set of
conditions supported are target specific, but the general rule is that
the output variable must be a scalar integer, and the value is boolean.
When supported, the target defines the preprocessor symbol
@code{__GCC_ASM_FLAG_OUTPUTS__}.

Because of the special nature of the flag output operands, the constraint
may not include alternatives.

Most often, the target has only one flags register, and thus is an implied
operand of many instructions.  In this case, the operand should not be
referenced within the assembler template via @code{%0} etc, as there's
no corresponding text in the assembly language.

@table @asis
@item ARM
@itemx AArch64
The flag output constraints for the ARM family are of the form
@samp{=@@cc@var{cond}} where @var{cond} is one of the standard
conditions defined in the ARM ARM for @code{ConditionHolds}.

@table @code
@item eq
Z flag set, or equal
@item ne
Z flag clear or not equal
@item cs
@itemx hs
C flag set or unsigned greater than equal
@item cc
@itemx lo
C flag clear or unsigned less than
@item mi
N flag set or ``minus''
@item pl
N flag clear or ``plus''
@item vs
V flag set or signed overflow
@item vc
V flag clear
@item hi
unsigned greater than
@item ls
unsigned less than equal
@item ge
signed greater than equal
@item lt
signed less than
@item gt
signed greater than
@item le
signed less than equal
@end table

The flag output constraints are not supported in thumb1 mode.

@item x86 family
The flag output constraints for the x86 family are of the form
@samp{=@@cc@var{cond}} where @var{cond} is one of the standard
conditions defined in the ISA manual for @code{j@var{cc}} or
@code{set@var{cc}}.

@table @code
@item a
``above'' or unsigned greater than
@item ae
``above or equal'' or unsigned greater than or equal
@item b
``below'' or unsigned less than
@item be
``below or equal'' or unsigned less than or equal
@item c
carry flag set
@item e
@itemx z
``equal'' or zero flag set
@item g
signed greater than
@item ge
signed greater than or equal
@item l
signed less than
@item le
signed less than or equal
@item o
overflow flag set
@item p
parity flag set
@item s
sign flag set
@item na
@itemx nae
@itemx nb
@itemx nbe
@itemx nc
@itemx ne
@itemx ng
@itemx nge
@itemx nl
@itemx nle
@itemx no
@itemx np
@itemx ns
@itemx nz
``not'' @var{flag}, or inverted versions of those above
@end table

@item s390
The flag output constraint for s390 is @samp{=@@cc}.  Only one such
constraint is allowed.  The variable has to be stored in a @samp{int}
variable.

@end table

@anchor{InputOperands}
@subsubsection Input Operands
@cindex @code{asm} input operands
@cindex @code{asm} expressions

Input operands make values from C variables and expressions available to the 
assembly code.

Operands are separated by commas.  Each operand has this format:

@example
@r{[} [@var{asmSymbolicName}] @r{]} @var{constraint} (@var{cexpression})
@end example

@table @var
@item asmSymbolicName
Specifies a symbolic name for the operand.
Reference the name in the assembler template 
by enclosing it in square brackets 
(i.e.@: @samp{%[Value]}). The scope of the name is the @code{asm} statement 
that contains the definition. Any valid C variable name is acceptable, 
including names already defined in the surrounding code. No two operands 
within the same @code{asm} statement can use the same symbolic name.

When not using an @var{asmSymbolicName}, use the (zero-based) position
of the operand 
in the list of operands in the assembler template. For example if there are
two output operands and three inputs,
use @samp{%2} in the template to refer to the first input operand,
@samp{%3} for the second, and @samp{%4} for the third. 

@item constraint
A string constant specifying constraints on the placement of the operand; 
@xref{Constraints}, for details.

Input constraint strings may not begin with either @samp{=} or @samp{+}.
When you list more than one possible location (for example, @samp{"irm"}), 
the compiler chooses the most efficient one based on the current context.
If you must use a specific register, but your Machine Constraints do not
provide sufficient control to select the specific register you want, 
local register variables may provide a solution (@pxref{Local Register 
Variables}).

Input constraints can also be digits (for example, @code{"0"}). This indicates 
that the specified input must be in the same place as the output constraint 
at the (zero-based) index in the output constraint list. 
When using @var{asmSymbolicName} syntax for the output operands,
you may use these names (enclosed in brackets @samp{[]}) instead of digits.

@item cexpression
This is the C variable or expression being passed to the @code{asm} statement 
as input.  The enclosing parentheses are a required part of the syntax.

@end table

When the compiler selects the registers to use to represent the input 
operands, it does not use any of the clobbered registers
(@pxref{Clobbers and Scratch Registers}).

If there are no output operands but there are input operands, place two 
consecutive colons where the output operands would go:

@example
__asm__ ("some instructions"
   : /* No outputs. */
   : "r" (Offset / 8));
@end example

@strong{Warning:} Do @emph{not} modify the contents of input-only operands 
(except for inputs tied to outputs). The compiler assumes that on exit from 
the @code{asm} statement these operands contain the same values as they 
had before executing the statement. 
It is @emph{not} possible to use clobbers
to inform the compiler that the values in these inputs are changing. One 
common work-around is to tie the changing input variable to an output variable 
that never gets used. Note, however, that if the code that follows the 
@code{asm} statement makes no use of any of the output operands, the GCC 
optimizers may discard the @code{asm} statement as unneeded 
(see @ref{Volatile}).

@code{asm} supports operand modifiers on operands (for example @samp{%k2} 
instead of simply @samp{%2}). @ref{GenericOperandmodifiers,
Generic Operand modifiers} lists the modifiers that are available
on all targets.  Other modifiers are hardware dependent.
For example, the list of supported modifiers for x86 is found at
@ref{x86Operandmodifiers,x86 Operand modifiers}.

In this example using the fictitious @code{combine} instruction, the 
constraint @code{"0"} for input operand 1 says that it must occupy the same 
location as output operand 0. Only input operands may use numbers in 
constraints, and they must each refer to an output operand. Only a number (or 
the symbolic assembler name) in the constraint can guarantee that one operand 
is in the same place as another. The mere fact that @code{foo} is the value of 
both operands is not enough to guarantee that they are in the same place in 
the generated assembler code.

@example
asm ("combine %2, %0" 
   : "=r" (foo) 
   : "0" (foo), "g" (bar));
@end example

Here is an example using symbolic names.

@example
asm ("cmoveq %1, %2, %[result]" 
   : [result] "=r"(result) 
   : "r" (test), "r" (new), "[result]" (old));
@end example

@anchor{Clobbers and Scratch Registers}
@subsubsection Clobbers and Scratch Registers
@cindex @code{asm} clobbers
@cindex @code{asm} scratch registers

While the compiler is aware of changes to entries listed in the output 
operands, the inline @code{asm} code may modify more than just the outputs. For 
example, calculations may require additional registers, or the processor may 
overwrite a register as a side effect of a particular assembler instruction. 
In order to inform the compiler of these changes, list them in the clobber 
list. Clobber list items are either register names or the special clobbers 
(listed below). Each clobber list item is a string constant 
enclosed in double quotes and separated by commas.

Clobber descriptions may not in any way overlap with an input or output 
operand. For example, you may not have an operand describing a register class 
with one member when listing that register in the clobber list. Variables 
declared to live in specific registers (@pxref{Explicit Register 
Variables}) and used 
as @code{asm} input or output operands must have no part mentioned in the 
clobber description. In particular, there is no way to specify that input 
operands get modified without also specifying them as output operands.

When the compiler selects which registers to use to represent input and output 
operands, it does not use any of the clobbered registers. As a result, 
clobbered registers are available for any use in the assembler code.

Another restriction is that the clobber list should not contain the
stack pointer register.  This is because the compiler requires the
value of the stack pointer to be the same after an @code{asm}
statement as it was on entry to the statement.  However, previous
versions of GCC did not enforce this rule and allowed the stack
pointer to appear in the list, with unclear semantics.  This behavior
is deprecated and listing the stack pointer may become an error in
future versions of GCC@.

Here is a realistic example for the VAX showing the use of clobbered 
registers: 

@example
asm volatile ("movc3 %0, %1, %2"
                   : /* No outputs. */
                   : "g" (from), "g" (to), "g" (count)
                   : "r0", "r1", "r2", "r3", "r4", "r5", "memory");
@end example

Also, there are two special clobber arguments:

@table @code
@item "cc"
The @code{"cc"} clobber indicates that the assembler code modifies the flags 
register. On some machines, GCC represents the condition codes as a specific 
hardware register; @code{"cc"} serves to name this register.
On other machines, condition code handling is different, 
and specifying @code{"cc"} has no effect. But 
it is valid no matter what the target.

@item "memory"
The @code{"memory"} clobber tells the compiler that the assembly code
performs memory 
reads or writes to items other than those listed in the input and output 
operands (for example, accessing the memory pointed to by one of the input 
parameters). To ensure memory contains correct values, GCC may need to flush 
specific register values to memory before executing the @code{asm}. Further, 
the compiler does not assume that any values read from memory before an 
@code{asm} remain unchanged after that @code{asm}; it reloads them as 
needed.  
Using the @code{"memory"} clobber effectively forms a read/write
memory barrier for the compiler.

Note that this clobber does not prevent the @emph{processor} from doing 
speculative reads past the @code{asm} statement. To prevent that, you need 
processor-specific fence instructions.

@end table

Flushing registers to memory has performance implications and may be
an issue for time-sensitive code.  You can provide better information
to GCC to avoid this, as shown in the following examples.  At a
minimum, aliasing rules allow GCC to know what memory @emph{doesn't}
need to be flushed.

Here is a fictitious sum of squares instruction, that takes two
pointers to floating point values in memory and produces a floating
point register output.
Notice that @code{x}, and @code{y} both appear twice in the @code{asm}
parameters, once to specify memory accessed, and once to specify a
base register used by the @code{asm}.  You won't normally be wasting a
register by doing this as GCC can use the same register for both
purposes.  However, it would be foolish to use both @code{%1} and
@code{%3} for @code{x} in this @code{asm} and expect them to be the
same.  In fact, @code{%3} may well not be a register.  It might be a
symbolic memory reference to the object pointed to by @code{x}.

@smallexample
asm ("sumsq %0, %1, %2"
     : "+f" (result)
     : "r" (x), "r" (y), "m" (*x), "m" (*y));
@end smallexample

Here is a fictitious @code{*z++ = *x++ * *y++} instruction.
Notice that the @code{x}, @code{y} and @code{z} pointer registers
must be specified as input/output because the @code{asm} modifies
them.

@smallexample
asm ("vecmul %0, %1, %2"
     : "+r" (z), "+r" (x), "+r" (y), "=m" (*z)
     : "m" (*x), "m" (*y));
@end smallexample

An x86 example where the string memory argument is of unknown length.

@smallexample
asm("repne scasb"
    : "=c" (count), "+D" (p)
    : "m" (*(const char (*)[]) p), "0" (-1), "a" (0));
@end smallexample

If you know the above will only be reading a ten byte array then you
could instead use a memory input like:
@code{"m" (*(const char (*)[10]) p)}.

Here is an example of a PowerPC vector scale implemented in assembly,
complete with vector and condition code clobbers, and some initialized
offset registers that are unchanged by the @code{asm}.

@smallexample
void
dscal (size_t n, double *x, double alpha)
@{
  asm ("/* lots of asm here */"
       : "+m" (*(double (*)[n]) x), "+&r" (n), "+b" (x)
       : "d" (alpha), "b" (32), "b" (48), "b" (64),
         "b" (80), "b" (96), "b" (112)
       : "cr0",
         "vs32","vs33","vs34","vs35","vs36","vs37","vs38","vs39",
         "vs40","vs41","vs42","vs43","vs44","vs45","vs46","vs47");
@}
@end smallexample

Rather than allocating fixed registers via clobbers to provide scratch
registers for an @code{asm} statement, an alternative is to define a
variable and make it an early-clobber output as with @code{a2} and
@code{a3} in the example below.  This gives the compiler register
allocator more freedom.  You can also define a variable and make it an
output tied to an input as with @code{a0} and @code{a1}, tied
respectively to @code{ap} and @code{lda}.  Of course, with tied
outputs your @code{asm} can't use the input value after modifying the
output register since they are one and the same register.  What's
more, if you omit the early-clobber on the output, it is possible that
GCC might allocate the same register to another of the inputs if GCC
could prove they had the same value on entry to the @code{asm}.  This
is why @code{a1} has an early-clobber.  Its tied input, @code{lda}
might conceivably be known to have the value 16 and without an
early-clobber share the same register as @code{%11}.  On the other
hand, @code{ap} can't be the same as any of the other inputs, so an
early-clobber on @code{a0} is not needed.  It is also not desirable in
this case.  An early-clobber on @code{a0} would cause GCC to allocate
a separate register for the @code{"m" (*(const double (*)[]) ap)}
input.  Note that tying an input to an output is the way to set up an
initialized temporary register modified by an @code{asm} statement.
An input not tied to an output is assumed by GCC to be unchanged, for
example @code{"b" (16)} below sets up @code{%11} to 16, and GCC might
use that register in following code if the value 16 happened to be
needed.  You can even use a normal @code{asm} output for a scratch if
all inputs that might share the same register are consumed before the
scratch is used.  The VSX registers clobbered by the @code{asm}
statement could have used this technique except for GCC's limit on the
number of @code{asm} parameters.

@smallexample
static void
dgemv_kernel_4x4 (long n, const double *ap, long lda,
                  const double *x, double *y, double alpha)
@{
  double *a0;
  double *a1;
  double *a2;
  double *a3;

  __asm__
    (
     /* lots of asm here */
     "#n=%1 ap=%8=%12 lda=%13 x=%7=%10 y=%0=%2 alpha=%9 o16=%11\n"
     "#a0=%3 a1=%4 a2=%5 a3=%6"
     :
       "+m" (*(double (*)[n]) y),
       "+&r" (n),	// 1
       "+b" (y),	// 2
       "=b" (a0),	// 3
       "=&b" (a1),	// 4
       "=&b" (a2),	// 5
       "=&b" (a3)	// 6
     :
       "m" (*(const double (*)[n]) x),
       "m" (*(const double (*)[]) ap),
       "d" (alpha),	// 9
       "r" (x),		// 10
       "b" (16),	// 11
       "3" (ap),	// 12
       "4" (lda)	// 13
     :
       "cr0",
       "vs32","vs33","vs34","vs35","vs36","vs37",
       "vs40","vs41","vs42","vs43","vs44","vs45","vs46","vs47"
     );
@}
@end smallexample

@anchor{GotoLabels}
@subsubsection Goto Labels
@cindex @code{asm} goto labels

@code{asm goto} allows assembly code to jump to one or more C labels.  The
@var{GotoLabels} section in an @code{asm goto} statement contains 
a comma-separated 
list of all C labels to which the assembler code may jump. GCC assumes that 
@code{asm} execution falls through to the next statement (if this is not the 
case, consider using the @code{__builtin_unreachable} intrinsic after the 
@code{asm} statement). Optimization of @code{asm goto} may be improved by 
using the @code{hot} and @code{cold} label attributes (@pxref{Label 
Attributes}).

If the assembler code does modify anything, use the @code{"memory"} clobber 
to force the 
optimizers to flush all register values to memory and reload them if 
necessary after the @code{asm} statement.

Also note that an @code{asm goto} statement is always implicitly
considered volatile.

Be careful when you set output operands inside @code{asm goto} only on
some possible control flow paths.  If you don't set up the output on
given path and never use it on this path, it is okay.  Otherwise, you
should use @samp{+} constraint modifier meaning that the operand is
input and output one.  With this modifier you will have the correct
values on all possible paths from the @code{asm goto}.

To reference a label in the assembler template, prefix it with
@samp{%l} (lowercase @samp{L}) followed by its (zero-based) position
in @var{GotoLabels} plus the number of input and output operands.
Output operand with constraint modifier @samp{+} is counted as two
operands because it is considered as one output and one input operand.
For example, if the @code{asm} has three inputs, one output operand
with constraint modifier @samp{+} and one output operand with
constraint modifier @samp{=} and references two labels, refer to the
first label as @samp{%l6} and the second as @samp{%l7}).

Alternately, you can reference labels using the actual C label name
enclosed in brackets.  For example, to reference a label named
@code{carry}, you can use @samp{%l[carry]}.  The label must still be
listed in the @var{GotoLabels} section when using this approach.  It
is better to use the named references for labels as in this case you
can avoid counting input and output operands and special treatment of
output operands with constraint modifier @samp{+}.

Here is an example of @code{asm goto} for i386:

@example
asm goto (
    "btl %1, %0\n\t"
    "jc %l2"
    : /* No outputs. */
    : "r" (p1), "r" (p2) 
    : "cc" 
    : carry);

return 0;

carry:
return 1;
@end example

The following example shows an @code{asm goto} that uses a memory clobber.

@example
int frob(int x)
@{
  int y;
  asm goto ("frob %%r5, %1; jc %l[error]; mov (%2), %%r5"
            : /* No outputs. */
            : "r"(x), "r"(&y)
            : "r5", "memory" 
            : error);
  return y;
error:
  return -1;
@}
@end example

The following example shows an @code{asm goto} that uses an output.

@example
int foo(int count)
@{
  asm goto ("dec %0; jb %l[stop]"
            : "+r" (count)
            :
            :
            : stop);
  return count;
stop:
  return 0;
@}
@end example

The following artificial example shows an @code{asm goto} that sets
up an output only on one path inside the @code{asm goto}.  Usage of
constraint modifier @samp{=} instead of @samp{+} would be wrong as
@code{factor} is used on all paths from the @code{asm goto}.

@example
int foo(int inp)
@{
  int factor = 0;
  asm goto ("cmp %1, 10; jb %l[lab]; mov 2, %0"
            : "+r" (factor)
            : "r" (inp)
            :
            : lab);
lab:
  return inp * factor; /* return 2 * inp or 0 if inp < 10 */
@}
@end example

@anchor{GenericOperandmodifiers}
@subsubsection Generic Operand Modifiers
@noindent
The following table shows the modifiers supported by all targets and their effects:

@multitable @columnfractions 0.15 0.7 0.15
@headitem Modifier @tab Description @tab Example
@item @code{c}
@tab Require a constant operand and print the constant expression with no punctuation.
@tab @code{%c0}
@item @code{n}
@tab Like @samp{%c} except that the value of the constant is negated before printing.
@tab @code{%n0}
@item @code{a}
@tab Substitute a memory reference, with the actual operand treated as the address.
This may be useful when outputting a ``load address'' instruction, because
often the assembler syntax for such an instruction requires you to write the
operand as if it were a memory reference.
@tab @code{%a0}
@item @code{l}
@tab Print the label name with no punctuation.
@tab @code{%l0}
@end multitable

@anchor{aarch64Operandmodifiers}
@subsubsection AArch64 Operand Modifiers

The following table shows the modifiers supported by AArch64 and their effects:

@multitable @columnfractions .10 .90
@headitem Modifier @tab Description
@item @code{w} @tab Print a 32-bit general-purpose register name or, given a
constant zero operand, the 32-bit zero register (@code{wzr}).
@item @code{x} @tab Print a 64-bit general-purpose register name or, given a
constant zero operand, the 64-bit zero register (@code{xzr}).
@item @code{b} @tab Print an FP/SIMD register name with a @code{b} (byte, 8-bit)
prefix.
@item @code{h} @tab Print an FP/SIMD register name with an @code{h} (halfword,
16-bit) prefix.
@item @code{s} @tab Print an FP/SIMD register name with an @code{s} (single
word, 32-bit) prefix.
@item @code{d} @tab Print an FP/SIMD register name with a @code{d} (doubleword,
64-bit) prefix.
@item @code{q} @tab Print an FP/SIMD register name with a @code{q} (quadword,
128-bit) prefix.
@item @code{Z} @tab Print an FP/SIMD register name as an SVE register (i.e. with
a @code{z} prefix).  This is a no-op for SVE register operands.
@end multitable

@anchor{x86Operandmodifiers}
@subsubsection x86 Operand Modifiers

References to input, output, and goto operands in the assembler template
of extended @code{asm} statements can use 
modifiers to affect the way the operands are formatted in 
the code output to the assembler. For example, the 
following code uses the @samp{h} and @samp{b} modifiers for x86:

@example
uint16_t  num;
asm volatile ("xchg %h0, %b0" : "+a" (num) );
@end example

@noindent
These modifiers generate this assembler code:

@example
xchg %ah, %al
@end example

The rest of this discussion uses the following code for illustrative purposes.

@example
int main()
@{
   int iInt = 1;

top:

   asm volatile goto ("some assembler instructions here"
   : /* No outputs. */
   : "q" (iInt), "X" (sizeof(unsigned char) + 1), "i" (42)
   : /* No clobbers. */
   : top);
@}
@end example

With no modifiers, this is what the output from the operands would be
for the @samp{att} and @samp{intel} dialects of assembler:

@multitable {Operand} {$.L2} {OFFSET FLAT:.L2}
@headitem Operand @tab @samp{att} @tab @samp{intel}
@item @code{%0}
@tab @code{%eax}
@tab @code{eax}
@item @code{%1}
@tab @code{$2}
@tab @code{2}
@item @code{%3}
@tab @code{$.L3}
@tab @code{OFFSET FLAT:.L3}
@item @code{%4}
@tab @code{$8}
@tab @code{8}
@item @code{%5}
@tab @code{%xmm0}
@tab @code{xmm0}
@item @code{%7}
@tab @code{$0}
@tab @code{0}
@end multitable

The table below shows the list of supported modifiers and their effects.

@multitable {Modifier} {Print the opcode suffix for the size of th} {Operand} {@samp{att}} {@samp{intel}}
@headitem Modifier @tab Description @tab Operand @tab @samp{att} @tab @samp{intel}
@item @code{A}
@tab Print an absolute memory reference.
@tab @code{%A0}
@tab @code{*%rax}
@tab @code{rax}
@item @code{b}
@tab Print the QImode name of the register.
@tab @code{%b0}
@tab @code{%al}
@tab @code{al}
@item @code{B}
@tab print the opcode suffix of b.
@tab @code{%B0}
@tab @code{b}
@tab
@item @code{c}
@tab Require a constant operand and print the constant expression with no punctuation.
@tab @code{%c1}
@tab @code{2}
@tab @code{2}
@item @code{d}
@tab print duplicated register operand for AVX instruction.
@tab @code{%d5}
@tab @code{%xmm0, %xmm0}
@tab @code{xmm0, xmm0}
@item @code{E}
@tab Print the address in Double Integer (DImode) mode (8 bytes) when the target is 64-bit.
Otherwise mode is unspecified (VOIDmode).
@tab @code{%E1}
@tab @code{%(rax)}
@tab @code{[rax]}
@item @code{g}
@tab Print the V16SFmode name of the register.
@tab @code{%g0}
@tab @code{%zmm0}
@tab @code{zmm0}
@item @code{h}
@tab Print the QImode name for a ``high'' register.
@tab @code{%h0}
@tab @code{%ah}
@tab @code{ah}
@item @code{H}
@tab Add 8 bytes to an offsettable memory reference. Useful when accessing the
high 8 bytes of SSE values. For a memref in (%rax), it generates
@tab @code{%H0}
@tab @code{8(%rax)}
@tab @code{8[rax]}
@item @code{k}
@tab Print the SImode name of the register.
@tab @code{%k0}
@tab @code{%eax}
@tab @code{eax}
@item @code{l}
@tab Print the label name with no punctuation.
@tab @code{%l3}
@tab @code{.L3}
@tab @code{.L3}
@item @code{L}
@tab print the opcode suffix of l.
@tab @code{%L0}
@tab @code{l}
@tab
@item @code{N}
@tab print maskz.
@tab @code{%N7}
@tab @code{@{z@}}
@tab @code{@{z@}}
@item @code{p}
@tab Print raw symbol name (without syntax-specific prefixes).
@tab @code{%p2}
@tab @code{42}
@tab @code{42}
@item @code{P}
@tab If used for a function, print the PLT suffix and generate PIC code.
For example, emit @code{foo@@PLT} instead of 'foo' for the function
foo(). If used for a constant, drop all syntax-specific prefixes and
issue the bare constant. See @code{p} above.
@item @code{q}
@tab Print the DImode name of the register.
@tab @code{%q0}
@tab @code{%rax}
@tab @code{rax}
@item @code{Q}
@tab print the opcode suffix of q.
@tab @code{%Q0}
@tab @code{q}
@tab
@item @code{R}
@tab print embedded rounding and sae.
@tab @code{%R4}
@tab @code{@{rn-sae@}, }
@tab @code{, @{rn-sae@}}
@item @code{r}
@tab print only sae.
@tab @code{%r4}
@tab @code{@{sae@}, }
@tab @code{, @{sae@}}
@item @code{s}
@tab print a shift double count, followed by the assemblers argument
delimiterprint the opcode suffix of s.
@tab @code{%s1}
@tab @code{$2, }
@tab @code{2, }
@item @code{S}
@tab print the opcode suffix of s.
@tab @code{%S0}
@tab @code{s}
@tab
@item @code{t}
@tab print the V8SFmode name of the register.
@tab @code{%t5}
@tab @code{%ymm0}
@tab @code{ymm0}
@item @code{T}
@tab print the opcode suffix of t.
@tab @code{%T0}
@tab @code{t}
@tab
@item @code{V}
@tab print naked full integer register name without %.
@tab @code{%V0}
@tab @code{eax}
@tab @code{eax}
@item @code{w}
@tab Print the HImode name of the register.
@tab @code{%w0}
@tab @code{%ax}
@tab @code{ax}
@item @code{W}
@tab print the opcode suffix of w.
@tab @code{%W0}
@tab @code{w}
@tab
@item @code{x}
@tab print the V4SFmode name of the register.
@tab @code{%x5}
@tab @code{%xmm0}
@tab @code{xmm0}
@item @code{y}
@tab print "st(0)" instead of "st" as a register.
@tab @code{%y6}
@tab @code{%st(0)}
@tab @code{st(0)}
@item @code{z}
@tab Print the opcode suffix for the size of the current integer operand (one of @code{b}/@code{w}/@code{l}/@code{q}).
@tab @code{%z0}
@tab @code{l}
@tab 
@item @code{Z}
@tab Like @code{z}, with special suffixes for x87 instructions.
@end multitable


@anchor{x86floatingpointasmoperands}
@subsubsection x86 Floating-Point @code{asm} Operands

On x86 targets, there are several rules on the usage of stack-like registers
in the operands of an @code{asm}.  These rules apply only to the operands
that are stack-like registers:

@enumerate
@item
Given a set of input registers that die in an @code{asm}, it is
necessary to know which are implicitly popped by the @code{asm}, and
which must be explicitly popped by GCC@.

An input register that is implicitly popped by the @code{asm} must be
explicitly clobbered, unless it is constrained to match an
output operand.

@item
For any input register that is implicitly popped by an @code{asm}, it is
necessary to know how to adjust the stack to compensate for the pop.
If any non-popped input is closer to the top of the reg-stack than
the implicitly popped register, it would not be possible to know what the
stack looked like---it's not clear how the rest of the stack ``slides
up''.

All implicitly popped input registers must be closer to the top of
the reg-stack than any input that is not implicitly popped.

It is possible that if an input dies in an @code{asm}, the compiler might
use the input register for an output reload.  Consider this example:

@smallexample
asm ("foo" : "=t" (a) : "f" (b));
@end smallexample

@noindent
This code says that input @code{b} is not popped by the @code{asm}, and that
the @code{asm} pushes a result onto the reg-stack, i.e., the stack is one
deeper after the @code{asm} than it was before.  But, it is possible that
reload may think that it can use the same register for both the input and
the output.

To prevent this from happening,
if any input operand uses the @samp{f} constraint, all output register
constraints must use the @samp{&} early-clobber modifier.

The example above is correctly written as:

@smallexample
asm ("foo" : "=&t" (a) : "f" (b));
@end smallexample

@item
Some operands need to be in particular places on the stack.  All
output operands fall in this category---GCC has no other way to
know which registers the outputs appear in unless you indicate
this in the constraints.

Output operands must specifically indicate which register an output
appears in after an @code{asm}.  @samp{=f} is not allowed: the operand
constraints must select a class with a single register.

@item
Output operands may not be ``inserted'' between existing stack registers.
Since no 387 opcode uses a read/write operand, all output operands
are dead before the @code{asm}, and are pushed by the @code{asm}.
It makes no sense to push anywhere but the top of the reg-stack.

Output operands must start at the top of the reg-stack: output
operands may not ``skip'' a register.

@item
Some @code{asm} statements may need extra stack space for internal
calculations.  This can be guaranteed by clobbering stack registers
unrelated to the inputs and outputs.

@end enumerate

This @code{asm}
takes one input, which is internally popped, and produces two outputs.

@smallexample
asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
@end smallexample

@noindent
This @code{asm} takes two inputs, which are popped by the @code{fyl2xp1} opcode,
and replaces them with one output.  The @code{st(1)} clobber is necessary 
for the compiler to know that @code{fyl2xp1} pops both inputs.

@smallexample
asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
@end smallexample

@anchor{msp430Operandmodifiers}
@subsubsection MSP430 Operand Modifiers

The list below describes the supported modifiers and their effects for MSP430.

@multitable @columnfractions .10 .90
@headitem Modifier @tab Description
@item @code{A} @tab Select low 16-bits of the constant/register/memory operand.
@item @code{B} @tab Select high 16-bits of the constant/register/memory
operand.
@item @code{C} @tab Select bits 32-47 of the constant/register/memory operand.
@item @code{D} @tab Select bits 48-63 of the constant/register/memory operand.
@item @code{H} @tab Equivalent to @code{B} (for backwards compatibility).
@item @code{I} @tab Print the inverse (logical @code{NOT}) of the constant
value.
@item @code{J} @tab Print an integer without a @code{#} prefix.
@item @code{L} @tab Equivalent to @code{A} (for backwards compatibility).
@item @code{O} @tab Offset of the current frame from the top of the stack.
@item @code{Q} @tab Use the @code{A} instruction postfix.
@item @code{R} @tab Inverse of condition code, for unsigned comparisons.
@item @code{W} @tab Subtract 16 from the constant value.
@item @code{X} @tab Use the @code{X} instruction postfix.
@item @code{Y} @tab Subtract 4 from the constant value.
@item @code{Z} @tab Subtract 1 from the constant value.
@item @code{b} @tab Append @code{.B}, @code{.W} or @code{.A} to the
instruction, depending on the mode.
@item @code{d} @tab Offset 1 byte of a memory reference or constant value.
@item @code{e} @tab Offset 3 bytes of a memory reference or constant value.
@item @code{f} @tab Offset 5 bytes of a memory reference or constant value.
@item @code{g} @tab Offset 7 bytes of a memory reference or constant value.
@item @code{p} @tab Print the value of 2, raised to the power of the given
constant.  Used to select the specified bit position.
@item @code{r} @tab Inverse of condition code, for signed comparisons.
@item @code{x} @tab Equivialent to @code{X}, but only for pointers.
@end multitable

@anchor{loongarchOperandmodifiers}
@subsubsection LoongArch Operand Modifiers

The list below describes the supported modifiers and their effects for LoongArch.

@multitable @columnfractions .10 .90
@headitem Modifier @tab Description
@item @code{d} @tab Same as @code{c}.
@item @code{i} @tab Print the character ''@code{i}'' if the operand is not a register.
@item @code{m} @tab Same as @code{c}, but the printed value is @code{operand - 1}.
@item @code{u} @tab Print a LASX register.
@item @code{w} @tab Print a LSX register.
@item @code{X} @tab Print a constant integer operand in hexadecimal.
@item @code{z} @tab Print the operand in its unmodified form, followed by a comma.
@end multitable

References to input and output operands in the assembler template of extended
asm statements can use modifiers to affect the way the operands are formatted
in the code output to the assembler.  For example, the following code uses the
'w' modifier for LoongArch:

@example
test-asm.c:

#include <lsxintrin.h>

__m128i foo (void)
@{
__m128i  a,b,c;
__asm__ ("vadd.d %w0,%w1,%w2\n\t"
   :"=f" (c)
   :"f" (a),"f" (b));

return c;
@}

@end example

@noindent
The compile command for the test case is as follows:

@example
gcc test-asm.c -mlsx -S -o test-asm.s
@end example

@noindent
The assembly statement produces the following assembly code:

@example
vadd.d $vr0,$vr0,$vr1
@end example

This is a 128-bit vector addition instruction, @code{c} (referred to in the
template string as %0) is the output, and @code{a} (%1) and @code{b} (%2) are
the inputs.  @code{__m128i} is a vector data type defined in the  file
@code{lsxintrin.h} (@xref{LoongArch SX Vector Intrinsics}).  The symbol '=f'
represents a constraint using a floating-point register as an output type, and
the 'f' in the input operand represents a constraint using a floating-point
register operand, which can refer to the definition of a constraint
(@xref{Constraints}) in gcc.

@anchor{riscvOperandmodifiers}
@subsubsection RISC-V Operand Modifiers

The list below describes the supported modifiers and their effects for RISC-V.

@multitable @columnfractions .10 .90
@headitem Modifier @tab Description
@item @code{z} @tab Print ''@code{zero}'' instead of 0 if the operand is an immediate with a value of zero.
@item @code{i} @tab Print the character ''@code{i}'' if the operand is an immediate.
@end multitable

@lowersections
@include md.texi
@raisesections

@node Asm Labels
@subsection Controlling Names Used in Assembler Code
@cindex assembler names for identifiers
@cindex names used in assembler code
@cindex identifiers, names in assembler code

You can specify the name to be used in the assembler code for a C
function or variable by writing the @code{asm} (or @code{__asm__})
keyword after the declarator.
It is up to you to make sure that the assembler names you choose do not
conflict with any other assembler symbols, or reference registers.

@subsubheading Assembler names for data

This sample shows how to specify the assembler name for data:

@smallexample
int foo asm ("myfoo") = 2;
@end smallexample

@noindent
This specifies that the name to be used for the variable @code{foo} in
the assembler code should be @samp{myfoo} rather than the usual
@samp{_foo}.

On systems where an underscore is normally prepended to the name of a C
variable, this feature allows you to define names for the
linker that do not start with an underscore.

GCC does not support using this feature with a non-static local variable 
since such variables do not have assembler names.  If you are
trying to put the variable in a particular register, see 
@ref{Explicit Register Variables}.

@subsubheading Assembler names for functions

To specify the assembler name for functions, write a declaration for the 
function before its definition and put @code{asm} there, like this:

@smallexample
int func (int x, int y) asm ("MYFUNC");
     
int func (int x, int y)
@{
   /* @r{@dots{}} */
@end smallexample

@noindent
This specifies that the name to be used for the function @code{func} in
the assembler code should be @code{MYFUNC}.

@node Explicit Register Variables
@subsection Variables in Specified Registers
@anchor{Explicit Reg Vars}
@cindex explicit register variables
@cindex variables in specified registers
@cindex specified registers

GNU C allows you to associate specific hardware registers with C 
variables.  In almost all cases, allowing the compiler to assign
registers produces the best code.  However under certain unusual
circumstances, more precise control over the variable storage is 
required.

Both global and local variables can be associated with a register.  The
consequences of performing this association are very different between
the two, as explained in the sections below.

@menu
* Global Register Variables::   Variables declared at global scope.
* Local Register Variables::    Variables declared within a function.
@end menu

@node Global Register Variables
@subsubsection Defining Global Register Variables
@anchor{Global Reg Vars}
@cindex global register variables
@cindex registers, global variables in
@cindex registers, global allocation

You can define a global register variable and associate it with a specified 
register like this:

@smallexample
register int *foo asm ("r12");
@end smallexample

@noindent
Here @code{r12} is the name of the register that should be used. Note that 
this is the same syntax used for defining local register variables, but for 
a global variable the declaration appears outside a function. The 
@code{register} keyword is required, and cannot be combined with 
@code{static}. The register name must be a valid register name for the
target platform.

Do not use type qualifiers such as @code{const} and @code{volatile}, as
the outcome may be contrary to expectations.  In  particular, using the
@code{volatile} qualifier does not fully prevent the compiler from
optimizing accesses to the register.

Registers are a scarce resource on most systems and allowing the 
compiler to manage their usage usually results in the best code. However, 
under special circumstances it can make sense to reserve some globally.
For example this may be useful in programs such as programming language 
interpreters that have a couple of global variables that are accessed 
very often.

After defining a global register variable, for the current compilation
unit:

@itemize @bullet
@item If the register is a call-saved register, call ABI is affected:
the register will not be restored in function epilogue sequences after
the variable has been assigned.  Therefore, functions cannot safely
return to callers that assume standard ABI.
@item Conversely, if the register is a call-clobbered register, making
calls to functions that use standard ABI may lose contents of the variable.
Such calls may be created by the compiler even if none are evident in
the original program, for example when libgcc functions are used to
make up for unavailable instructions.
@item Accesses to the variable may be optimized as usual and the register
remains available for allocation and use in any computations, provided that
observable values of the variable are not affected.
@item If the variable is referenced in inline assembly, the type of access
must be provided to the compiler via constraints (@pxref{Constraints}).
Accesses from basic asms are not supported.
@end itemize

Note that these points @emph{only} apply to code that is compiled with the
definition. The behavior of code that is merely linked in (for example 
code from libraries) is not affected.

If you want to recompile source files that do not actually use your global 
register variable so they do not use the specified register for any other 
purpose, you need not actually add the global register declaration to 
their source code. It suffices to specify the compiler option 
@option{-ffixed-@var{reg}} (@pxref{Code Gen Options}) to reserve the 
register.

@subsubheading Declaring the variable

Global register variables cannot have initial values, because an
executable file has no means to supply initial contents for a register.

When selecting a register, choose one that is normally saved and 
restored by function calls on your machine. This ensures that code
which is unaware of this reservation (such as library routines) will 
restore it before returning.

On machines with register windows, be sure to choose a global
register that is not affected magically by the function call mechanism.

@subsubheading Using the variable

@cindex @code{qsort}, and global register variables
When calling routines that are not aware of the reservation, be 
cautious if those routines call back into code which uses them. As an 
example, if you call the system library version of @code{qsort}, it may 
clobber your registers during execution, but (if you have selected 
appropriate registers) it will restore them before returning. However 
it will @emph{not} restore them before calling @code{qsort}'s comparison 
function. As a result, global values will not reliably be available to 
the comparison function unless the @code{qsort} function itself is rebuilt.

Similarly, it is not safe to access the global register variables from signal
handlers or from more than one thread of control. Unless you recompile 
them specially for the task at hand, the system library routines may 
temporarily use the register for other things.  Furthermore, since the register
is not reserved exclusively for the variable, accessing it from handlers of
asynchronous signals may observe unrelated temporary values residing in the
register.

@cindex register variable after @code{longjmp}
@cindex global register after @code{longjmp}
@cindex value after @code{longjmp}
@findex longjmp
@findex setjmp
On most machines, @code{longjmp} restores to each global register
variable the value it had at the time of the @code{setjmp}. On some
machines, however, @code{longjmp} does not change the value of global
register variables. To be portable, the function that called @code{setjmp}
should make other arrangements to save the values of the global register
variables, and to restore them in a @code{longjmp}. This way, the same
thing happens regardless of what @code{longjmp} does.

@node Local Register Variables
@subsubsection Specifying Registers for Local Variables
@anchor{Local Reg Vars}
@cindex local variables, specifying registers
@cindex specifying registers for local variables
@cindex registers for local variables

You can define a local register variable and associate it with a specified 
register like this:

@smallexample
register int *foo asm ("r12");
@end smallexample

@noindent
Here @code{r12} is the name of the register that should be used.  Note
that this is the same syntax used for defining global register variables, 
but for a local variable the declaration appears within a function.  The 
@code{register} keyword is required, and cannot be combined with 
@code{static}.  The register name must be a valid register name for the
target platform.

Do not use type qualifiers such as @code{const} and @code{volatile}, as
the outcome may be contrary to expectations. In particular, when the
@code{const} qualifier is used, the compiler may substitute the
variable with its initializer in @code{asm} statements, which may cause
the corresponding operand to appear in a different register.

As with global register variables, it is recommended that you choose 
a register that is normally saved and restored by function calls on your 
machine, so that calls to library routines will not clobber it.

The only supported use for this feature is to specify registers
for input and output operands when calling Extended @code{asm} 
(@pxref{Extended Asm}).  This may be necessary if the constraints for a 
particular machine don't provide sufficient control to select the desired 
register.  To force an operand into a register, create a local variable 
and specify the register name after the variable's declaration.  Then use 
the local variable for the @code{asm} operand and specify any constraint 
letter that matches the register:

@smallexample
register int *p1 asm ("r0") = @dots{};
register int *p2 asm ("r1") = @dots{};
register int *result asm ("r0");
asm ("sysint" : "=r" (result) : "0" (p1), "r" (p2));
@end smallexample

@emph{Warning:} In the above example, be aware that a register (for example 
@code{r0}) can be call-clobbered by subsequent code, including function 
calls and library calls for arithmetic operators on other variables (for 
example the initialization of @code{p2}).  In this case, use temporary 
variables for expressions between the register assignments:

@smallexample
int t1 = @dots{};
register int *p1 asm ("r0") = @dots{};
register int *p2 asm ("r1") = t1;
register int *result asm ("r0");
asm ("sysint" : "=r" (result) : "0" (p1), "r" (p2));
@end smallexample

Defining a register variable does not reserve the register.  Other than
when invoking the Extended @code{asm}, the contents of the specified 
register are not guaranteed.  For this reason, the following uses 
are explicitly @emph{not} supported.  If they appear to work, it is only 
happenstance, and may stop working as intended due to (seemingly) 
unrelated changes in surrounding code, or even minor changes in the 
optimization of a future version of gcc:

@itemize @bullet
@item Passing parameters to or from Basic @code{asm}
@item Passing parameters to or from Extended @code{asm} without using input 
or output operands.
@item Passing parameters to or from routines written in assembler (or
other languages) using non-standard calling conventions.
@end itemize

Some developers use Local Register Variables in an attempt to improve 
gcc's allocation of registers, especially in large functions.  In this 
case the register name is essentially a hint to the register allocator.
While in some instances this can generate better code, improvements are
subject to the whims of the allocator/optimizers.  Since there are no
guarantees that your improvements won't be lost, this usage of Local
Register Variables is discouraged.

On the MIPS platform, there is related use for local register variables 
with slightly different characteristics (@pxref{MIPS Coprocessors,, 
Defining coprocessor specifics for MIPS targets, gccint, 
GNU Compiler Collection (GCC) Internals}).

@node Size of an asm
@subsection Size of an @code{asm}

Some targets require that GCC track the size of each instruction used
in order to generate correct code.  Because the final length of the
code produced by an @code{asm} statement is only known by the
assembler, GCC must make an estimate as to how big it will be.  It
does this by counting the number of instructions in the pattern of the
@code{asm} and multiplying that by the length of the longest
instruction supported by that processor.  (When working out the number
of instructions, it assumes that any occurrence of a newline or of
whatever statement separator character is supported by the assembler ---
typically @samp{;} --- indicates the end of an instruction.)

Normally, GCC's estimate is adequate to ensure that correct
code is generated, but it is possible to confuse the compiler if you use
pseudo instructions or assembler macros that expand into multiple real
instructions, or if you use assembler directives that expand to more
space in the object file than is needed for a single instruction.
If this happens then the assembler may produce a diagnostic saying that
a label is unreachable.

@cindex @code{asm inline}
This size is also used for inlining decisions.  If you use @code{asm inline}
instead of just @code{asm}, then for inlining purposes the size of the asm
is taken as the minimum size, ignoring how many instructions GCC thinks it is.

@node Alternate Keywords
@section Alternate Keywords
@cindex alternate keywords
@cindex keywords, alternate

@option{-ansi} and the various @option{-std} options disable certain
keywords.  This causes trouble when you want to use GNU C extensions, or
a general-purpose header file that should be usable by all programs,
including ISO C programs.  The keywords @code{asm}, @code{typeof} and
@code{inline} are not available in programs compiled with
@option{-ansi} or @option{-std} (although @code{inline} can be used in a
program compiled with @option{-std=c99} or a later standard).  The
ISO C99 keyword
@code{restrict} is only available when @option{-std=gnu99} (which will
eventually be the default) or @option{-std=c99} (or the equivalent
@option{-std=iso9899:1999}), or an option for a later standard
version, is used.

The way to solve these problems is to put @samp{__} at the beginning and
end of each problematical keyword.  For example, use @code{__asm__}
instead of @code{asm}, and @code{__inline__} instead of @code{inline}.

Other C compilers won't accept these alternative keywords; if you want to
compile with another compiler, you can define the alternate keywords as
macros to replace them with the customary keywords.  It looks like this:

@smallexample
#ifndef __GNUC__
#define __asm__ asm
#endif
@end smallexample

@findex __extension__
@opindex pedantic
@option{-pedantic} and other options cause warnings for many GNU C extensions.
You can suppress such warnings using the keyword @code{__extension__}.
Specifically:

@itemize @bullet
@item
Writing @code{__extension__} before an expression prevents warnings
about extensions within that expression.

@item
In C, writing:

@smallexample
[[__extension__ @dots{}]]
@end smallexample

suppresses warnings about using @samp{[[]]} attributes in C versions
that predate C23@.
@end itemize

@code{__extension__} has no effect aside from this.

@node Incomplete Enums
@section Incomplete @code{enum} Types

You can define an @code{enum} tag without specifying its possible values.
This results in an incomplete type, much like what you get if you write
@code{struct foo} without describing the elements.  A later declaration
that does specify the possible values completes the type.

You cannot allocate variables or storage using the type while it is
incomplete.  However, you can work with pointers to that type.

This extension may not be very useful, but it makes the handling of
@code{enum} more consistent with the way @code{struct} and @code{union}
are handled.

This extension is not supported by GNU C++.

@node Function Names
@section Function Names as Strings
@cindex @code{__func__} identifier
@cindex @code{__FUNCTION__} identifier
@cindex @code{__PRETTY_FUNCTION__} identifier

GCC provides three magic constants that hold the name of the current
function as a string.  In C++11 and later modes, all three are treated
as constant expressions and can be used in @code{constexpr} constexts.
The first of these constants is @code{__func__}, which is part of
the C99 standard:

The identifier @code{__func__} is implicitly declared by the translator
as if, immediately following the opening brace of each function
definition, the declaration

@smallexample
static const char __func__[] = "function-name";
@end smallexample

@noindent
appeared, where function-name is the name of the lexically-enclosing
function.  This name is the unadorned name of the function.  As an
extension, at file (or, in C++, namespace scope), @code{__func__}
evaluates to the empty string.

@code{__FUNCTION__} is another name for @code{__func__}, provided for
backward compatibility with old versions of GCC.

In C, @code{__PRETTY_FUNCTION__} is yet another name for
@code{__func__}, except that at file scope (or, in C++, namespace scope),
it evaluates to the string @code{"top level"}.  In addition, in C++,
@code{__PRETTY_FUNCTION__} contains the signature of the function as
well as its bare name.  For example, this program:

@smallexample
extern "C" int printf (const char *, ...);

class a @{
 public:
  void sub (int i)
    @{
      printf ("__FUNCTION__ = %s\n", __FUNCTION__);
      printf ("__PRETTY_FUNCTION__ = %s\n", __PRETTY_FUNCTION__);
    @}
@};

int
main (void)
@{
  a ax;
  ax.sub (0);
  return 0;
@}
@end smallexample

@noindent
gives this output:

@smallexample
__FUNCTION__ = sub
__PRETTY_FUNCTION__ = void a::sub(int)
@end smallexample

These identifiers are variables, not preprocessor macros, and may not
be used to initialize @code{char} arrays or be concatenated with string
literals.

@node Return Address
@section Getting the Return or Frame Address of a Function

These functions may be used to get information about the callers of a
function.

@defbuiltin{{void *} __builtin_return_address (unsigned int @var{level})}
This function returns the return address of the current function, or of
one of its callers.  The @var{level} argument is number of frames to
scan up the call stack.  A value of @code{0} yields the return address
of the current function, a value of @code{1} yields the return address
of the caller of the current function, and so forth.  When inlining
the expected behavior is that the function returns the address of
the function that is returned to.  To work around this behavior use
the @code{noinline} function attribute.

The @var{level} argument must be a constant integer.

On some machines it may be impossible to determine the return address of
any function other than the current one; in such cases, or when the top
of the stack has been reached, this function returns an unspecified
value.  In addition, @code{__builtin_frame_address} may be used
to determine if the top of the stack has been reached.

Additional post-processing of the returned value may be needed, see
@code{__builtin_extract_return_addr}.

The stored representation of the return address in memory may be different
from the address returned by @code{__builtin_return_address}.  For example,
on AArch64 the stored address may be mangled with return address signing
whereas the address returned by @code{__builtin_return_address} is not.

Calling this function with a nonzero argument can have unpredictable
effects, including crashing the calling program.  As a result, calls
that are considered unsafe are diagnosed when the @option{-Wframe-address}
option is in effect.  Such calls should only be made in debugging
situations.

On targets where code addresses are representable as @code{void *},
@smallexample
void *addr = __builtin_extract_return_addr (__builtin_return_address (0));
@end smallexample
gives the code address where the current function would return.  For example,
such an address may be used with @code{dladdr} or other interfaces that work
with code addresses.
@enddefbuiltin

@defbuiltin{{void *} __builtin_extract_return_addr (void *@var{addr})}
The address as returned by @code{__builtin_return_address} may have to be fed
through this function to get the actual encoded address.  For example, on the
31-bit S/390 platform the highest bit has to be masked out, or on SPARC
platforms an offset has to be added for the true next instruction to be
executed.

If no fixup is needed, this function simply passes through @var{addr}.
@enddefbuiltin

@defbuiltin{{void *} __builtin_frob_return_addr (void *@var{addr})}
This function does the reverse of @code{__builtin_extract_return_addr}.
@enddefbuiltin

@defbuiltin{{void *} __builtin_frame_address (unsigned int @var{level})}
This function is similar to @code{__builtin_return_address}, but it
returns the address of the function frame rather than the return address
of the function.  Calling @code{__builtin_frame_address} with a value of
@code{0} yields the frame address of the current function, a value of
@code{1} yields the frame address of the caller of the current function,
and so forth.

The frame is the area on the stack that holds local variables and saved
registers.  The frame address is normally the address of the first word
pushed on to the stack by the function.  However, the exact definition
depends upon the processor and the calling convention.  If the processor
has a dedicated frame pointer register, and the function has a frame,
then @code{__builtin_frame_address} returns the value of the frame
pointer register.

On some machines it may be impossible to determine the frame address of
any function other than the current one; in such cases, or when the top
of the stack has been reached, this function returns @code{0} if
the first frame pointer is properly initialized by the startup code.

Calling this function with a nonzero argument can have unpredictable
effects, including crashing the calling program.  As a result, calls
that are considered unsafe are diagnosed when the @option{-Wframe-address}
option is in effect.  Such calls should only be made in debugging
situations.
@enddefbuiltin

@deftypefn {Built-in Function} {void *} __builtin_stack_address ()
This function returns the stack pointer register, offset by
@code{STACK_ADDRESS_OFFSET} if that's defined.

Conceptually, the returned address returned by this built-in function is
the boundary between the stack area allocated for use by its caller, and
the area that could be modified by a function call, that the caller
could safely zero-out before or after (but not during) the call
sequence.

Arguments for a callee may be preallocated as part of the caller's stack
frame, or allocated on a per-call basis, depending on the target, so
they may be on either side of this boundary.

Even if the stack pointer is biased, the result is not.  The register
save area on SPARC is regarded as modifiable by calls, rather than as
allocated for use by the caller function, since it is never in use while
the caller function itself is running.

Red zones that only leaf functions could use are also regarded as
modifiable by calls, rather than as allocated for use by the caller.
This is only theoretical, since leaf functions do not issue calls, but a
constant offset makes this built-in function more predictable.
@end deftypefn

@node Stack Scrubbing
@section Stack scrubbing internal interfaces

Stack scrubbing involves cooperation between a @code{strub} context,
i.e., a function whose stack frame is to be zeroed-out, and its callers.
The caller initializes a stack watermark, the @code{strub} context
updates the watermark according to its stack use, and the caller zeroes
it out once it regains control, whether by the callee's returning or by
an exception.

Each of these steps is performed by a different builtin function call.
Calls to these builtins are introduced automatically, in response to
@code{strub} attributes and command-line options; they are not expected
to be explicitly called by source code.

The functions that implement the builtins are available in libgcc but,
depending on optimization levels, they are expanded internally, adjusted
to account for inlining, and sometimes combined/deferred (e.g. passing
the caller-supplied watermark on to callees, refraining from erasing
stack areas that the caller will) to enable tail calls and to optimize
for code size.

@deftypefn {Built-in Function} {void} __builtin___strub_enter (void **@var{wmptr})
This function initializes a stack @var{watermark} variable with the
current top of the stack.  A call to this builtin function is introduced
before entering a @code{strub} context.  It remains as a function call
if optimization is not enabled.
@end deftypefn

@deftypefn {Built-in Function} {void} __builtin___strub_update (void **@var{wmptr})
This function updates a stack @var{watermark} variable with the current
top of the stack, if it tops the previous watermark.  A call to this
builtin function is inserted within @code{strub} contexts, whenever
additional stack space may have been used.  It remains as a function
call at optimization levels lower than 2.
@end deftypefn

@deftypefn {Built-in Function} {void} __builtin___strub_leave (void **@var{wmptr})
This function overwrites the memory area between the current top of the
stack, and the @var{watermark}ed address.  A call to this builtin
function is inserted after leaving a @code{strub} context.  It remains
as a function call at optimization levels lower than 3, and it is guarded by
a condition at level 2.
@end deftypefn

@node Vector Extensions
@section Using Vector Instructions through Built-in Functions

On some targets, the instruction set contains SIMD vector instructions which
operate on multiple values contained in one large register at the same time.
For example, on the x86 the MMX, 3DNow!@: and SSE extensions can be used
this way.

The first step in using these extensions is to provide the necessary data
types.  This should be done using an appropriate @code{typedef}:

@smallexample
typedef int v4si __attribute__ ((vector_size (16)));
@end smallexample

@noindent
The @code{int} type specifies the @dfn{base type} (which can be a
@code{typedef}), while the attribute specifies the vector size for the
variable, measured in bytes. For example, the declaration above causes
the compiler to set the mode for the @code{v4si} type to be 16 bytes wide
and divided into @code{int} sized units.  For a 32-bit @code{int} this
means a vector of 4 units of 4 bytes, and the corresponding mode of
@code{foo} is @acronym{V4SI}.

The @code{vector_size} attribute is only applicable to integral and
floating scalars, although arrays, pointers, and function return values
are allowed in conjunction with this construct. Only sizes that are
positive power-of-two multiples of the base type size are currently allowed.

All the basic integer types can be used as base types, both as signed
and as unsigned: @code{char}, @code{short}, @code{int}, @code{long},
@code{long long}.  In addition, @code{float} and @code{double} can be
used to build floating-point vector types.

Specifying a combination that is not valid for the current architecture
causes GCC to synthesize the instructions using a narrower mode.
For example, if you specify a variable of type @code{V4SI} and your
architecture does not allow for this specific SIMD type, GCC
produces code that uses 4 @code{SIs}.

The types defined in this manner can be used with a subset of normal C
operations.  Currently, GCC allows using the following operators
on these types: @code{+, -, *, /, unary minus, ^, |, &, ~, %}@.

The operations behave like C++ @code{valarrays}.  Addition is defined as
the addition of the corresponding elements of the operands.  For
example, in the code below, each of the 4 elements in @var{a} is
added to the corresponding 4 elements in @var{b} and the resulting
vector is stored in @var{c}.

@smallexample
typedef int v4si __attribute__ ((vector_size (16)));

v4si a, b, c;

c = a + b;
@end smallexample

Subtraction, multiplication, division, and the logical operations
operate in a similar manner.  Likewise, the result of using the unary
minus or complement operators on a vector type is a vector whose
elements are the negative or complemented values of the corresponding
elements in the operand.

It is possible to use shifting operators @code{<<}, @code{>>} on
integer-type vectors. The operation is defined as following: @code{@{a0,
a1, @dots{}, an@} >> @{b0, b1, @dots{}, bn@} == @{a0 >> b0, a1 >> b1,
@dots{}, an >> bn@}}@.  Unlike OpenCL, values of @code{b} are not
implicitly taken modulo bit width of the base type @code{B}, and the behavior
is undefined if any @code{bi} is greater than or equal to @code{B}.

In contrast to scalar operations in C and C++, operands of integer vector
operations do not undergo integer promotions.

Operands of binary vector operations must have the same number of
elements. 

For convenience, it is allowed to use a binary vector operation
where one operand is a scalar. In that case the compiler transforms
the scalar operand into a vector where each element is the scalar from
the operation. The transformation happens only if the scalar could be
safely converted to the vector-element type.
Consider the following code.

@smallexample
typedef int v4si __attribute__ ((vector_size (16)));

v4si a, b, c;
long l;

a = b + 1;    /* a = b + @{1,1,1,1@}; */
a = 2 * b;    /* a = @{2,2,2,2@} * b; */

a = l + a;    /* Error, cannot convert long to int. */
@end smallexample

Vectors can be subscripted as if the vector were an array with
the same number of elements and base type.  Out of bound accesses
invoke undefined behavior at run time.  Warnings for out of bound
accesses for vector subscription can be enabled with
@option{-Warray-bounds}.

Vector comparison is supported with standard comparison
operators: @code{==, !=, <, <=, >, >=}. Comparison operands can be
vector expressions of integer-type or real-type. Comparison between
integer-type vectors and real-type vectors are not supported.  The
result of the comparison is a vector of the same width and number of
elements as the comparison operands with a signed integral element
type.

Vectors are compared element-wise producing 0 when comparison is false
and -1 (constant of the appropriate type where all bits are set)
otherwise. Consider the following example.

@smallexample
typedef int v4si __attribute__ ((vector_size (16)));

v4si a = @{1,2,3,4@};
v4si b = @{3,2,1,4@};
v4si c;

c = a >  b;     /* The result would be @{0, 0,-1, 0@}  */
c = a == b;     /* The result would be @{0,-1, 0,-1@}  */
@end smallexample

In C++, the ternary operator @code{?:} is available. @code{a?b:c}, where
@code{b} and @code{c} are vectors of the same type and @code{a} is an
integer vector with the same number of elements of the same size as @code{b}
and @code{c}, computes all three arguments and creates a vector
@code{@{a[0]?b[0]:c[0], a[1]?b[1]:c[1], @dots{}@}}.  Note that unlike in
OpenCL, @code{a} is thus interpreted as @code{a != 0} and not @code{a < 0}.
As in the case of binary operations, this syntax is also accepted when
one of @code{b} or @code{c} is a scalar that is then transformed into a
vector. If both @code{b} and @code{c} are scalars and the type of
@code{true?b:c} has the same size as the element type of @code{a}, then
@code{b} and @code{c} are converted to a vector type whose elements have
this type and with the same number of elements as @code{a}.

In C++, the logic operators @code{!, &&, ||} are available for vectors.
@code{!v} is equivalent to @code{v == 0}, @code{a && b} is equivalent to
@code{a!=0 & b!=0} and @code{a || b} is equivalent to @code{a!=0 | b!=0}.
For mixed operations between a scalar @code{s} and a vector @code{v},
@code{s && v} is equivalent to @code{s?v!=0:0} (the evaluation is
short-circuit) and @code{v && s} is equivalent to @code{v!=0 & (s?-1:0)}.

@findex __builtin_shuffle
Vector shuffling is available using functions
@code{__builtin_shuffle (vec, mask)} and
@code{__builtin_shuffle (vec0, vec1, mask)}.
Both functions construct a permutation of elements from one or two
vectors and return a vector of the same type as the input vector(s).
The @var{mask} is an integral vector with the same width (@var{W})
and element count (@var{N}) as the output vector.

The elements of the input vectors are numbered in memory ordering of
@var{vec0} beginning at 0 and @var{vec1} beginning at @var{N}.  The
elements of @var{mask} are considered modulo @var{N} in the single-operand
case and modulo @math{2*@var{N}} in the two-operand case.

Consider the following example,

@smallexample
typedef int v4si __attribute__ ((vector_size (16)));

v4si a = @{1,2,3,4@};
v4si b = @{5,6,7,8@};
v4si mask1 = @{0,1,1,3@};
v4si mask2 = @{0,4,2,5@};
v4si res;

res = __builtin_shuffle (a, mask1);       /* res is @{1,2,2,4@}  */
res = __builtin_shuffle (a, b, mask2);    /* res is @{1,5,3,6@}  */
@end smallexample

Note that @code{__builtin_shuffle} is intentionally semantically
compatible with the OpenCL @code{shuffle} and @code{shuffle2} functions.

You can declare variables and use them in function calls and returns, as
well as in assignments and some casts.  You can specify a vector type as
a return type for a function.  Vector types can also be used as function
arguments.  It is possible to cast from one vector type to another,
provided they are of the same size (in fact, you can also cast vectors
to and from other datatypes of the same size).

You cannot operate between vectors of different lengths or different
signedness without a cast.

@findex __builtin_shufflevector
Vector shuffling is available using the
@code{__builtin_shufflevector (vec1, vec2, index...)}
function.  @var{vec1} and @var{vec2} must be expressions with
vector type with a compatible element type.  The result of
@code{__builtin_shufflevector} is a vector with the same element type
as @var{vec1} and @var{vec2} but that has an element count equal to
the number of indices specified.

The @var{index} arguments are a list of integers that specify the
elements indices of the first two vectors that should be extracted and
returned in a new vector. These element indices are numbered sequentially
starting with the first vector, continuing into the second vector.
An index of -1 can be used to indicate that the corresponding element in
the returned vector is a don't care and can be freely chosen to optimized
the generated code sequence performing the shuffle operation.

Consider the following example,
@smallexample
typedef int v4si __attribute__ ((vector_size (16)));
typedef int v8si __attribute__ ((vector_size (32)));

v8si a = @{1,-2,3,-4,5,-6,7,-8@};
v4si b = __builtin_shufflevector (a, a, 0, 2, 4, 6); /* b is @{1,3,5,7@} */
v4si c = @{-2,-4,-6,-8@};
v8si d = __builtin_shufflevector (c, b, 4, 0, 5, 1, 6, 2, 7, 3); /* d is a */
@end smallexample

@findex __builtin_convertvector
Vector conversion is available using the
@code{__builtin_convertvector (vec, vectype)}
function.  @var{vec} must be an expression with integral or floating
vector type and @var{vectype} an integral or floating vector type with the
same number of elements.  The result has @var{vectype} type and value of
a C cast of every element of @var{vec} to the element type of @var{vectype}.

Consider the following example,
@smallexample
typedef int v4si __attribute__ ((vector_size (16)));
typedef float v4sf __attribute__ ((vector_size (16)));
typedef double v4df __attribute__ ((vector_size (32)));
typedef unsigned long long v4di __attribute__ ((vector_size (32)));

v4si a = @{1,-2,3,-4@};
v4sf b = @{1.5f,-2.5f,3.f,7.f@};
v4di c = @{1ULL,5ULL,0ULL,10ULL@};
v4sf d = __builtin_convertvector (a, v4sf); /* d is @{1.f,-2.f,3.f,-4.f@} */
/* Equivalent of:
   v4sf d = @{ (float)a[0], (float)a[1], (float)a[2], (float)a[3] @}; */
v4df e = __builtin_convertvector (a, v4df); /* e is @{1.,-2.,3.,-4.@} */
v4df f = __builtin_convertvector (b, v4df); /* f is @{1.5,-2.5,3.,7.@} */
v4si g = __builtin_convertvector (f, v4si); /* g is @{1,-2,3,7@} */
v4si h = __builtin_convertvector (c, v4si); /* h is @{1,5,0,10@} */
@end smallexample

@cindex vector types, using with x86 intrinsics
Sometimes it is desirable to write code using a mix of generic vector
operations (for clarity) and machine-specific vector intrinsics (to
access vector instructions that are not exposed via generic built-ins).
On x86, intrinsic functions for integer vectors typically use the same
vector type @code{__m128i} irrespective of how they interpret the vector,
making it necessary to cast their arguments and return values from/to
other vector types.  In C, you can make use of a @code{union} type:
@c In C++ such type punning via a union is not allowed by the language
@smallexample
#include <immintrin.h>

typedef unsigned char u8x16 __attribute__ ((vector_size (16)));
typedef unsigned int  u32x4 __attribute__ ((vector_size (16)));

typedef union @{
        __m128i mm;
        u8x16   u8;
        u32x4   u32;
@} v128;
@end smallexample

@noindent
for variables that can be used with both built-in operators and x86
intrinsics:

@smallexample
v128 x, y = @{ 0 @};
memcpy (&x, ptr, sizeof x);
y.u8  += 0x80;
x.mm  = _mm_adds_epu8 (x.mm, y.mm);
x.u32 &= 0xffffff;

/* Instead of a variable, a compound literal may be used to pass the
   return value of an intrinsic call to a function expecting the union: */
v128 foo (v128);
x = foo ((v128) @{_mm_adds_epu8 (x.mm, y.mm)@});
@c This could be done implicitly with __attribute__((transparent_union)),
@c but GCC does not accept it for unions of vector types (PR 88955).
@end smallexample

@node Offsetof
@section Support for @code{offsetof}
@findex __builtin_offsetof

GCC implements for both C and C++ a syntactic extension to implement
the @code{offsetof} macro.

@smallexample
primary:
        "__builtin_offsetof" "(" @code{typename} "," offsetof_member_designator ")"

offsetof_member_designator:
          @code{identifier}
        | offsetof_member_designator "." @code{identifier}
        | offsetof_member_designator "[" @code{expr} "]"
@end smallexample

This extension is sufficient such that

@smallexample
#define offsetof(@var{type}, @var{member})  __builtin_offsetof (@var{type}, @var{member})
@end smallexample

@noindent
is a suitable definition of the @code{offsetof} macro.  In C++, @var{type}
may be dependent.  In either case, @var{member} may consist of a single
identifier, or a sequence of member accesses and array references.

@node __sync Builtins
@section Legacy @code{__sync} Built-in Functions for Atomic Memory Access

The following built-in functions
are intended to be compatible with those described
in the @cite{Intel Itanium Processor-specific Application Binary Interface},
section 7.4.  As such, they depart from normal GCC practice by not using
the @samp{__builtin_} prefix and also by being overloaded so that they
work on multiple types.

The definition given in the Intel documentation allows only for the use of
the types @code{int}, @code{long}, @code{long long} or their unsigned
counterparts.  GCC allows any scalar type that is 1, 2, 4 or 8 bytes in
size other than the C type @code{_Bool} or the C++ type @code{bool}.
Operations on pointer arguments are performed as if the operands were
of the @code{uintptr_t} type.  That is, they are not scaled by the size
of the type to which the pointer points.

These functions are implemented in terms of the @samp{__atomic}
builtins (@pxref{__atomic Builtins}).  They should not be used for new
code which should use the @samp{__atomic} builtins instead.

Not all operations are supported by all target processors.  If a particular
operation cannot be implemented on the target processor, a warning is
generated and a call to an external function is generated.  The external
function carries the same name as the built-in version,
with an additional suffix
@samp{_@var{n}} where @var{n} is the size of the data type.

@c ??? Should we have a mechanism to suppress this warning?  This is almost
@c useful for implementing the operation under the control of an external
@c mutex.

In most cases, these built-in functions are considered a @dfn{full barrier}.
That is,
no memory operand is moved across the operation, either forward or
backward.  Further, instructions are issued as necessary to prevent the
processor from speculating loads across the operation and from queuing stores
after the operation.

All of the routines are described in the Intel documentation to take
``an optional list of variables protected by the memory barrier''.  It's
not clear what is meant by that; it could mean that @emph{only} the
listed variables are protected, or it could mean a list of additional
variables to be protected.  The list is ignored by GCC which treats it as
empty.  GCC interprets an empty list as meaning that all globally
accessible variables should be protected.

@defbuiltin{@var{type} __sync_fetch_and_add (@var{type} *@var{ptr}, @var{type} @var{value}, ...)}
@defbuiltinx{@var{type} __sync_fetch_and_sub (@var{type} *@var{ptr}, @var{type} @var{value}, ...)}
@defbuiltinx{@var{type} __sync_fetch_and_or (@var{type} *@var{ptr}, @var{type} @var{value}, ...)}
@defbuiltinx{@var{type} __sync_fetch_and_and (@var{type} *@var{ptr}, @var{type} @var{value}, ...)}
@defbuiltinx{@var{type} __sync_fetch_and_xor (@var{type} *@var{ptr}, @var{type} @var{value}, ...)}
@defbuiltinx{@var{type} __sync_fetch_and_nand (@var{type} *@var{ptr}, @var{type} @var{value}, ...)}
These built-in functions perform the operation suggested by the name, and
returns the value that had previously been in memory.  That is, operations
on integer operands have the following semantics.  Operations on pointer
arguments are performed as if the operands were of the @code{uintptr_t}
type.  That is, they are not scaled by the size of the type to which
the pointer points.

@smallexample
@{ tmp = *ptr; *ptr @var{op}= value; return tmp; @}
@{ tmp = *ptr; *ptr = ~(tmp & value); return tmp; @}   // nand
@end smallexample

The object pointed to by the first argument must be of integer or pointer
type.  It must not be a boolean type.

@emph{Note:} GCC 4.4 and later implement @code{__sync_fetch_and_nand}
as @code{*ptr = ~(tmp & value)} instead of @code{*ptr = ~tmp & value}.
@enddefbuiltin

@defbuiltin{@var{type} __sync_add_and_fetch (@var{type} *@var{ptr}, @
                                             @var{type} @var{value}, ...)}
@defbuiltinx{@var{type} __sync_sub_and_fetch (@var{type} *@var{ptr}, @var{type} @var{value}, ...)}
@defbuiltinx{@var{type} __sync_or_and_fetch (@var{type} *@var{ptr}, @var{type} @var{value}, ...)}
@defbuiltinx{@var{type} __sync_and_and_fetch (@var{type} *@var{ptr}, @var{type} @var{value}, ...)}
@defbuiltinx{@var{type} __sync_xor_and_fetch (@var{type} *@var{ptr}, @var{type} @var{value}, ...)}
@defbuiltinx{@var{type} __sync_nand_and_fetch (@var{type} *@var{ptr}, @var{type} @var{value}, ...)}
These built-in functions perform the operation suggested by the name, and
return the new value.  That is, operations on integer operands have
the following semantics.  Operations on pointer operands are performed as
if the operand's type were @code{uintptr_t}.

@smallexample
@{ *ptr @var{op}= value; return *ptr; @}
@{ *ptr = ~(*ptr & value); return *ptr; @}   // nand
@end smallexample

The same constraints on arguments apply as for the corresponding
@code{__sync_op_and_fetch} built-in functions.

@emph{Note:} GCC 4.4 and later implement @code{__sync_nand_and_fetch}
as @code{*ptr = ~(*ptr & value)} instead of
@code{*ptr = ~*ptr & value}.
@enddefbuiltin

@defbuiltin{bool __sync_bool_compare_and_swap (@var{type} *@var{ptr}, @var{type} @var{oldval}, @var{type} @var{newval}, ...)}
@defbuiltinx{@var{type} __sync_val_compare_and_swap (@var{type} *@var{ptr}, @var{type} @var{oldval}, @var{type} @var{newval}, ...)}
These built-in functions perform an atomic compare and swap.
That is, if the current
value of @code{*@var{ptr}} is @var{oldval}, then write @var{newval} into
@code{*@var{ptr}}.

The ``bool'' version returns @code{true} if the comparison is successful and
@var{newval} is written.  The ``val'' version returns the contents
of @code{*@var{ptr}} before the operation.
@enddefbuiltin

@defbuiltin{void __sync_synchronize (...)}
This built-in function issues a full memory barrier.
@enddefbuiltin

@defbuiltin{@var{type} __sync_lock_test_and_set (@var{type} *@var{ptr}, @var{type} @var{value}, ...)}
This built-in function, as described by Intel, is not a traditional test-and-set
operation, but rather an atomic exchange operation.  It writes @var{value}
into @code{*@var{ptr}}, and returns the previous contents of
@code{*@var{ptr}}.

Many targets have only minimal support for such locks, and do not support
a full exchange operation.  In this case, a target may support reduced
functionality here by which the @emph{only} valid value to store is the
immediate constant 1.  The exact value actually stored in @code{*@var{ptr}}
is implementation defined.

This built-in function is not a full barrier,
but rather an @dfn{acquire barrier}.
This means that references after the operation cannot move to (or be
speculated to) before the operation, but previous memory stores may not
be globally visible yet, and previous memory loads may not yet be
satisfied.
@enddefbuiltin

@defbuiltin{void __sync_lock_release (@var{type} *@var{ptr}, ...)}
This built-in function releases the lock acquired by
@code{__sync_lock_test_and_set}.
Normally this means writing the constant 0 to @code{*@var{ptr}}.

This built-in function is not a full barrier,
but rather a @dfn{release barrier}.
This means that all previous memory stores are globally visible, and all
previous memory loads have been satisfied, but following memory reads
are not prevented from being speculated to before the barrier.
@enddefbuiltin

@node __atomic Builtins
@section Built-in Functions for Memory Model Aware Atomic Operations

The following built-in functions approximately match the requirements
for the C++11 memory model.  They are all
identified by being prefixed with @samp{__atomic} and most are
overloaded so that they work with multiple types.

These functions are intended to replace the legacy @samp{__sync}
builtins.  The main difference is that the memory order that is requested
is a parameter to the functions.  New code should always use the
@samp{__atomic} builtins rather than the @samp{__sync} builtins.

Note that the @samp{__atomic} builtins assume that programs will
conform to the C++11 memory model.  In particular, they assume
that programs are free of data races.  See the C++11 standard for
detailed requirements.

The @samp{__atomic} builtins can be used with any integral scalar or
pointer type that is 1, 2, 4, or 8 bytes in length.  16-byte integral
types are also allowed if @samp{__int128} (@pxref{__int128}) is
supported by the architecture.

The four non-arithmetic functions (load, store, exchange, and 
compare_exchange) all have a generic version as well.  This generic
version works on any data type.  It uses the lock-free built-in function
if the specific data type size makes that possible; otherwise, an
external call is left to be resolved at run time.  This external call is
the same format with the addition of a @samp{size_t} parameter inserted
as the first parameter indicating the size of the object being pointed to.
All objects must be the same size.

There are 6 different memory orders that can be specified.  These map
to the C++11 memory orders with the same names, see the C++11 standard
or the @uref{https://gcc.gnu.org/wiki/Atomic/GCCMM/AtomicSync,GCC wiki
on atomic synchronization} for detailed definitions.  Individual
targets may also support additional memory orders for use on specific
architectures.  Refer to the target documentation for details of
these.

An atomic operation can both constrain code motion and
be mapped to hardware instructions for synchronization between threads
(e.g., a fence).  To which extent this happens is controlled by the
memory orders, which are listed here in approximately ascending order of
strength.  The description of each memory order is only meant to roughly
illustrate the effects and is not a specification; see the C++11
memory model for precise semantics.

@table  @code
@item __ATOMIC_RELAXED
Implies no inter-thread ordering constraints.
@item __ATOMIC_CONSUME
This is currently implemented using the stronger @code{__ATOMIC_ACQUIRE}
memory order because of a deficiency in C++11's semantics for
@code{memory_order_consume}.
@item __ATOMIC_ACQUIRE
Creates an inter-thread happens-before constraint from the release (or
stronger) semantic store to this acquire load.  Can prevent hoisting
of code to before the operation.
@item __ATOMIC_RELEASE
Creates an inter-thread happens-before constraint to acquire (or stronger)
semantic loads that read from this release store.  Can prevent sinking
of code to after the operation.
@item __ATOMIC_ACQ_REL
Combines the effects of both @code{__ATOMIC_ACQUIRE} and
@code{__ATOMIC_RELEASE}.
@item __ATOMIC_SEQ_CST
Enforces total ordering with all other @code{__ATOMIC_SEQ_CST} operations.
@end table

Note that in the C++11 memory model, @emph{fences} (e.g.,
@samp{__atomic_thread_fence}) take effect in combination with other
atomic operations on specific memory locations (e.g., atomic loads);
operations on specific memory locations do not necessarily affect other
operations in the same way.

Target architectures are encouraged to provide their own patterns for
each of the atomic built-in functions.  If no target is provided, the original
non-memory model set of @samp{__sync} atomic built-in functions are
used, along with any required synchronization fences surrounding it in
order to achieve the proper behavior.  Execution in this case is subject
to the same restrictions as those built-in functions.

If there is no pattern or mechanism to provide a lock-free instruction
sequence, a call is made to an external routine with the same parameters
to be resolved at run time.

When implementing patterns for these built-in functions, the memory order
parameter can be ignored as long as the pattern implements the most
restrictive @code{__ATOMIC_SEQ_CST} memory order.  Any of the other memory
orders execute correctly with this memory order but they may not execute as
efficiently as they could with a more appropriate implementation of the
relaxed requirements.

Note that the C++11 standard allows for the memory order parameter to be
determined at run time rather than at compile time.  These built-in
functions map any run-time value to @code{__ATOMIC_SEQ_CST} rather
than invoke a runtime library call or inline a switch statement.  This is
standard compliant, safe, and the simplest approach for now.

The memory order parameter is a signed int, but only the lower 16 bits are
reserved for the memory order.  The remainder of the signed int is reserved
for target use and should be 0.  Use of the predefined atomic values
ensures proper usage.

@defbuiltin{@var{type} __atomic_load_n (@var{type} *@var{ptr}, int @var{memorder})}
This built-in function implements an atomic load operation.  It returns the
contents of @code{*@var{ptr}}.

The valid memory order variants are
@code{__ATOMIC_RELAXED}, @code{__ATOMIC_SEQ_CST}, @code{__ATOMIC_ACQUIRE},
and @code{__ATOMIC_CONSUME}.

@enddefbuiltin

@defbuiltin{void __atomic_load (@var{type} *@var{ptr}, @var{type} *@var{ret}, int @var{memorder})}
This is the generic version of an atomic load.  It returns the
contents of @code{*@var{ptr}} in @code{*@var{ret}}.

@enddefbuiltin

@defbuiltin{void __atomic_store_n (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
This built-in function implements an atomic store operation.  It writes 
@code{@var{val}} into @code{*@var{ptr}}.  

The valid memory order variants are
@code{__ATOMIC_RELAXED}, @code{__ATOMIC_SEQ_CST}, and @code{__ATOMIC_RELEASE}.

@enddefbuiltin

@defbuiltin{void __atomic_store (@var{type} *@var{ptr}, @var{type} *@var{val}, int @var{memorder})}
This is the generic version of an atomic store.  It stores the value
of @code{*@var{val}} into @code{*@var{ptr}}.

@enddefbuiltin

@defbuiltin{@var{type} __atomic_exchange_n (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
This built-in function implements an atomic exchange operation.  It writes
@var{val} into @code{*@var{ptr}}, and returns the previous contents of
@code{*@var{ptr}}.

All memory order variants are valid.

@enddefbuiltin

@defbuiltin{void __atomic_exchange (@var{type} *@var{ptr}, @var{type} *@var{val}, @var{type} *@var{ret}, int @var{memorder})}
This is the generic version of an atomic exchange.  It stores the
contents of @code{*@var{val}} into @code{*@var{ptr}}. The original value
of @code{*@var{ptr}} is copied into @code{*@var{ret}}.

@enddefbuiltin

@defbuiltin{bool __atomic_compare_exchange_n (@var{type} *@var{ptr}, @var{type} *@var{expected}, @var{type} @var{desired}, bool @var{weak}, int @var{success_memorder}, int @var{failure_memorder})}
This built-in function implements an atomic compare and exchange operation.
This compares the contents of @code{*@var{ptr}} with the contents of
@code{*@var{expected}}. If equal, the operation is a @emph{read-modify-write}
operation that writes @var{desired} into @code{*@var{ptr}}.  If they are not
equal, the operation is a @emph{read} and the current contents of
@code{*@var{ptr}} are written into @code{*@var{expected}}.  @var{weak} is @code{true}
for weak compare_exchange, which may fail spuriously, and @code{false} for
the strong variation, which never fails spuriously.  Many targets
only offer the strong variation and ignore the parameter.  When in doubt, use
the strong variation.

If @var{desired} is written into @code{*@var{ptr}} then @code{true} is returned
and memory is affected according to the
memory order specified by @var{success_memorder}.  There are no
restrictions on what memory order can be used here.

Otherwise, @code{false} is returned and memory is affected according
to @var{failure_memorder}. This memory order cannot be
@code{__ATOMIC_RELEASE} nor @code{__ATOMIC_ACQ_REL}.  It also cannot be a
stronger order than that specified by @var{success_memorder}.

@enddefbuiltin

@defbuiltin{bool __atomic_compare_exchange (@var{type} *@var{ptr}, @var{type} *@var{expected}, @var{type} *@var{desired}, bool @var{weak}, int @var{success_memorder}, int @var{failure_memorder})}
This built-in function implements the generic version of
@code{__atomic_compare_exchange}.  The function is virtually identical to
@code{__atomic_compare_exchange_n}, except the desired value is also a
pointer.

@enddefbuiltin

@defbuiltin{@var{type} __atomic_add_fetch (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
@defbuiltinx{@var{type} __atomic_sub_fetch (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
@defbuiltinx{@var{type} __atomic_and_fetch (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
@defbuiltinx{@var{type} __atomic_xor_fetch (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
@defbuiltinx{@var{type} __atomic_or_fetch (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
@defbuiltinx{@var{type} __atomic_nand_fetch (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
These built-in functions perform the operation suggested by the name, and
return the result of the operation.  Operations on pointer arguments are
performed as if the operands were of the @code{uintptr_t} type.  That is,
they are not scaled by the size of the type to which the pointer points.

@smallexample
@{ *ptr @var{op}= val; return *ptr; @}
@{ *ptr = ~(*ptr & val); return *ptr; @} // nand
@end smallexample

The object pointed to by the first argument must be of integer or pointer
type.  It must not be a boolean type.  All memory orders are valid.

@enddefbuiltin

@defbuiltin{@var{type} __atomic_fetch_add (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
@defbuiltinx{@var{type} __atomic_fetch_sub (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
@defbuiltinx{@var{type} __atomic_fetch_and (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
@defbuiltinx{@var{type} __atomic_fetch_xor (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
@defbuiltinx{@var{type} __atomic_fetch_or (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
@defbuiltinx{@var{type} __atomic_fetch_nand (@var{type} *@var{ptr}, @var{type} @var{val}, int @var{memorder})}
These built-in functions perform the operation suggested by the name, and
return the value that had previously been in @code{*@var{ptr}}.  Operations
on pointer arguments are performed as if the operands were of
the @code{uintptr_t} type.  That is, they are not scaled by the size of
the type to which the pointer points.

@smallexample
@{ tmp = *ptr; *ptr @var{op}= val; return tmp; @}
@{ tmp = *ptr; *ptr = ~(*ptr & val); return tmp; @} // nand
@end smallexample

The same constraints on arguments apply as for the corresponding
@code{__atomic_op_fetch} built-in functions.  All memory orders are valid.

@enddefbuiltin

@defbuiltin{bool __atomic_test_and_set (void *@var{ptr}, int @var{memorder})}

This built-in function performs an atomic test-and-set operation on
the byte at @code{*@var{ptr}}.  The byte is set to some implementation
defined nonzero ``set'' value and the return value is @code{true} if and only
if the previous contents were ``set''.
It should be only used for operands of type @code{bool} or @code{char}. For 
other types only part of the value may be set.

All memory orders are valid.

@enddefbuiltin

@defbuiltin{void __atomic_clear (bool *@var{ptr}, int @var{memorder})}

This built-in function performs an atomic clear operation on
@code{*@var{ptr}}.  After the operation, @code{*@var{ptr}} contains 0.
It should be only used for operands of type @code{bool} or @code{char} and 
in conjunction with @code{__atomic_test_and_set}.
For other types it may only clear partially. If the type is not @code{bool}
prefer using @code{__atomic_store}.

The valid memory order variants are
@code{__ATOMIC_RELAXED}, @code{__ATOMIC_SEQ_CST}, and
@code{__ATOMIC_RELEASE}.

@enddefbuiltin

@defbuiltin{void __atomic_thread_fence (int @var{memorder})}

This built-in function acts as a synchronization fence between threads
based on the specified memory order.

All memory orders are valid.

@enddefbuiltin

@defbuiltin{void __atomic_signal_fence (int @var{memorder})}

This built-in function acts as a synchronization fence between a thread
and signal handlers based in the same thread.

All memory orders are valid.

@enddefbuiltin

@defbuiltin{bool __atomic_always_lock_free (size_t @var{size},  void *@var{ptr})}

This built-in function returns @code{true} if objects of @var{size} bytes always
generate lock-free atomic instructions for the target architecture.
@var{size} must resolve to a compile-time constant and the result also
resolves to a compile-time constant.

@var{ptr} is an optional pointer to the object that may be used to determine
alignment.  A value of 0 indicates typical alignment should be used.  The 
compiler may also ignore this parameter.

@smallexample
if (__atomic_always_lock_free (sizeof (long long), 0))
@end smallexample

@enddefbuiltin

@defbuiltin{bool __atomic_is_lock_free (size_t @var{size}, void *@var{ptr})}

This built-in function returns @code{true} if objects of @var{size} bytes always
generate lock-free atomic instructions for the target architecture.  If
the built-in function is not known to be lock-free, a call is made to a
runtime routine named @code{__atomic_is_lock_free}.

@var{ptr} is an optional pointer to the object that may be used to determine
alignment.  A value of 0 indicates typical alignment should be used.  The 
compiler may also ignore this parameter.
@enddefbuiltin

@node Integer Overflow Builtins
@section Built-in Functions to Perform Arithmetic with Overflow Checking

The following built-in functions allow performing simple arithmetic operations
together with checking whether the operations overflowed.

@defbuiltin{bool __builtin_add_overflow (@var{type1} @var{a}, @var{type2} @var{b}, @var{type3} *@var{res})}
@defbuiltinx{bool __builtin_sadd_overflow (int @var{a}, int @var{b}, int *@var{res})}
@defbuiltinx{bool __builtin_saddl_overflow (long int @var{a}, long int @var{b}, long int *@var{res})}
@defbuiltinx{bool __builtin_saddll_overflow (long long int @var{a}, long long int @var{b}, long long int *@var{res})}
@defbuiltinx{bool __builtin_uadd_overflow (unsigned int @var{a}, unsigned int @var{b}, unsigned int *@var{res})}
@defbuiltinx{bool __builtin_uaddl_overflow (unsigned long int @var{a}, unsigned long int @var{b}, unsigned long int *@var{res})}
@defbuiltinx{bool __builtin_uaddll_overflow (unsigned long long int @var{a}, unsigned long long int @var{b}, unsigned long long int *@var{res})}

These built-in functions promote the first two operands into infinite precision signed
type and perform addition on those promoted operands.  The result is then
cast to the type the third pointer argument points to and stored there.
If the stored result is equal to the infinite precision result, the built-in
functions return @code{false}, otherwise they return @code{true}.  As the addition is
performed in infinite signed precision, these built-in functions have fully defined
behavior for all argument values.

The first built-in function allows arbitrary integral types for operands and
the result type must be pointer to some integral type other than enumerated or
boolean type, the rest of the built-in functions have explicit integer types.

The compiler will attempt to use hardware instructions to implement
these built-in functions where possible, like conditional jump on overflow
after addition, conditional jump on carry etc.

@enddefbuiltin

@defbuiltin{bool __builtin_sub_overflow (@var{type1} @var{a}, @var{type2} @var{b}, @var{type3} *@var{res})}
@defbuiltinx{bool __builtin_ssub_overflow (int @var{a}, int @var{b}, int *@var{res})}
@defbuiltinx{bool __builtin_ssubl_overflow (long int @var{a}, long int @var{b}, long int *@var{res})}
@defbuiltinx{bool __builtin_ssubll_overflow (long long int @var{a}, long long int @var{b}, long long int *@var{res})}
@defbuiltinx{bool __builtin_usub_overflow (unsigned int @var{a}, unsigned int @var{b}, unsigned int *@var{res})}
@defbuiltinx{bool __builtin_usubl_overflow (unsigned long int @var{a}, unsigned long int @var{b}, unsigned long int *@var{res})}
@defbuiltinx{bool __builtin_usubll_overflow (unsigned long long int @var{a}, unsigned long long int @var{b}, unsigned long long int *@var{res})}

These built-in functions are similar to the add overflow checking built-in
functions above, except they perform subtraction, subtract the second argument
from the first one, instead of addition.

@enddefbuiltin

@defbuiltin{bool __builtin_mul_overflow (@var{type1} @var{a}, @var{type2} @var{b}, @var{type3} *@var{res})}
@defbuiltinx{bool __builtin_smul_overflow (int @var{a}, int @var{b}, int *@var{res})}
@defbuiltinx{bool __builtin_smull_overflow (long int @var{a}, long int @var{b}, long int *@var{res})}
@defbuiltinx{bool __builtin_smulll_overflow (long long int @var{a}, long long int @var{b}, long long int *@var{res})}
@defbuiltinx{bool __builtin_umul_overflow (unsigned int @var{a}, unsigned int @var{b}, unsigned int *@var{res})}
@defbuiltinx{bool __builtin_umull_overflow (unsigned long int @var{a}, unsigned long int @var{b}, unsigned long int *@var{res})}
@defbuiltinx{bool __builtin_umulll_overflow (unsigned long long int @var{a}, unsigned long long int @var{b}, unsigned long long int *@var{res})}

These built-in functions are similar to the add overflow checking built-in
functions above, except they perform multiplication, instead of addition.

@enddefbuiltin

The following built-in functions allow checking if simple arithmetic operation
would overflow.

@defbuiltin{bool __builtin_add_overflow_p (@var{type1} @var{a}, @var{type2} @var{b}, @var{type3} @var{c})}
@defbuiltinx{bool __builtin_sub_overflow_p (@var{type1} @var{a}, @var{type2} @var{b}, @var{type3} @var{c})}
@defbuiltinx{bool __builtin_mul_overflow_p (@var{type1} @var{a}, @var{type2} @var{b}, @var{type3} @var{c})}

These built-in functions are similar to @code{__builtin_add_overflow},
@code{__builtin_sub_overflow}, or @code{__builtin_mul_overflow}, except that
they don't store the result of the arithmetic operation anywhere and the
last argument is not a pointer, but some expression with integral type other
than enumerated or boolean type.

The built-in functions promote the first two operands into infinite precision signed type
and perform addition on those promoted operands. The result is then
cast to the type of the third argument.  If the cast result is equal to the infinite
precision result, the built-in functions return @code{false}, otherwise they return @code{true}.
The value of the third argument is ignored, just the side effects in the third argument
are evaluated, and no integral argument promotions are performed on the last argument.
If the third argument is a bit-field, the type used for the result cast has the
precision and signedness of the given bit-field, rather than precision and signedness
of the underlying type.

For example, the following macro can be used to portably check, at
compile-time, whether or not adding two constant integers will overflow,
and perform the addition only when it is known to be safe and not to trigger
a @option{-Woverflow} warning.

@smallexample
#define INT_ADD_OVERFLOW_P(a, b) \
   __builtin_add_overflow_p (a, b, (__typeof__ ((a) + (b))) 0)

enum @{
    A = INT_MAX, B = 3,
    C = INT_ADD_OVERFLOW_P (A, B) ? 0 : A + B,
    D = __builtin_add_overflow_p (1, SCHAR_MAX, (signed char) 0)
@};
@end smallexample

The compiler will attempt to use hardware instructions to implement
these built-in functions where possible, like conditional jump on overflow
after addition, conditional jump on carry etc.
 
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_addc (unsigned int @var{a}, unsigned int @var{b}, unsigned int @var{carry_in}, unsigned int *@var{carry_out})}
@defbuiltinx{{unsigned long int} __builtin_addcl (unsigned long int @var{a}, unsigned long int @var{b}, unsigned int @var{carry_in}, unsigned long int *@var{carry_out})}
@defbuiltinx{{unsigned long long int} __builtin_addcll (unsigned long long int @var{a}, unsigned long long int @var{b}, unsigned long long int @var{carry_in}, unsigned long long int *@var{carry_out})}

These built-in functions are equivalent to:
@smallexample
  (@{ __typeof__ (@var{a}) s; \
      __typeof__ (@var{a}) c1 = __builtin_add_overflow (@var{a}, @var{b}, &s); \
      __typeof__ (@var{a}) c2 = __builtin_add_overflow (s, @var{carry_in}, &s); \
      *(@var{carry_out}) = c1 | c2; \
      s; @})
@end smallexample

i.e.@: they add 3 unsigned values, set what the last argument
points to to 1 if any of the two additions overflowed (otherwise 0)
and return the sum of those 3 unsigned values.  Note, while all
the first 3 arguments can have arbitrary values, better code will be
emitted if one of them (preferrably the third one) has only values
0 or 1 (i.e.@: carry-in).

@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_subc (unsigned int @var{a}, unsigned int @var{b}, unsigned int @var{carry_in}, unsigned int *@var{carry_out})}
@defbuiltinx{{unsigned long int} __builtin_subcl (unsigned long int @var{a}, unsigned long int @var{b}, unsigned int @var{carry_in}, unsigned long int *@var{carry_out})}
@defbuiltinx{{unsigned long long int} __builtin_subcll (unsigned long long int @var{a}, unsigned long long int @var{b}, unsigned long long int @var{carry_in}, unsigned long long int *@var{carry_out})}

These built-in functions are equivalent to:
@smallexample
  (@{ __typeof__ (@var{a}) s; \
      __typeof__ (@var{a}) c1 = __builtin_sub_overflow (@var{a}, @var{b}, &s); \
      __typeof__ (@var{a}) c2 = __builtin_sub_overflow (s, @var{carry_in}, &s); \
      *(@var{carry_out}) = c1 | c2; \
      s; @})
@end smallexample

i.e.@: they subtract 2 unsigned values from the first unsigned value,
set what the last argument points to to 1 if any of the two subtractions
overflowed (otherwise 0) and return the result of the subtractions.
Note, while all the first 3 arguments can have arbitrary values, better code
will be emitted if one of them (preferrably the third one) has only values
0 or 1 (i.e.@: carry-in).

@enddefbuiltin

@node x86 specific memory model extensions for transactional memory
@section x86-Specific Memory Model Extensions for Transactional Memory

The x86 architecture supports additional memory ordering flags
to mark critical sections for hardware lock elision. 
These must be specified in addition to an existing memory order to
atomic intrinsics.

@table @code
@item __ATOMIC_HLE_ACQUIRE
Start lock elision on a lock variable.
Memory order must be @code{__ATOMIC_ACQUIRE} or stronger.
@item __ATOMIC_HLE_RELEASE
End lock elision on a lock variable.
Memory order must be @code{__ATOMIC_RELEASE} or stronger.
@end table

When a lock acquire fails, it is required for good performance to abort
the transaction quickly. This can be done with a @code{_mm_pause}.

@smallexample
#include <immintrin.h> // For _mm_pause

int lockvar;

/* Acquire lock with lock elision */
while (__atomic_exchange_n(&lockvar, 1, __ATOMIC_ACQUIRE|__ATOMIC_HLE_ACQUIRE))
    _mm_pause(); /* Abort failed transaction */
...
/* Free lock with lock elision */
__atomic_store_n(&lockvar, 0, __ATOMIC_RELEASE|__ATOMIC_HLE_RELEASE);
@end smallexample

@node Object Size Checking
@section Object Size Checking

@subsection Object Size Checking Built-in Functions
@findex __builtin___memcpy_chk
@findex __builtin___mempcpy_chk
@findex __builtin___memmove_chk
@findex __builtin___memset_chk
@findex __builtin___strcpy_chk
@findex __builtin___stpcpy_chk
@findex __builtin___strncpy_chk
@findex __builtin___strcat_chk
@findex __builtin___strncat_chk

GCC implements a limited buffer overflow protection mechanism that can
prevent some buffer overflow attacks by determining the sizes of objects
into which data is about to be written and preventing the writes when
the size isn't sufficient.  The built-in functions described below yield
the best results when used together and when optimization is enabled.
For example, to detect object sizes across function boundaries or to
follow pointer assignments through non-trivial control flow they rely
on various optimization passes enabled with @option{-O2}.  However, to
a limited extent, they can be used without optimization as well.

@defbuiltin{size_t __builtin_object_size (const void * @var{ptr}, int @var{type})}
is a built-in construct that returns a constant number of bytes from
@var{ptr} to the end of the object @var{ptr} pointer points to
(if known at compile time).  To determine the sizes of dynamically allocated
objects the function relies on the allocation functions called to obtain
the storage to be declared with the @code{alloc_size} attribute (@pxref{Common
Function Attributes}).  @code{__builtin_object_size} never evaluates
its arguments for side effects.  If there are any side effects in them, it
returns @code{(size_t) -1} for @var{type} 0 or 1 and @code{(size_t) 0}
for @var{type} 2 or 3.  If there are multiple objects @var{ptr} can
point to and all of them are known at compile time, the returned number
is the maximum of remaining byte counts in those objects if @var{type} & 2 is
0 and minimum if nonzero.  If it is not possible to determine which objects
@var{ptr} points to at compile time, @code{__builtin_object_size} should
return @code{(size_t) -1} for @var{type} 0 or 1 and @code{(size_t) 0}
for @var{type} 2 or 3.

@var{type} is an integer constant from 0 to 3.  If the least significant
bit is clear, objects are whole variables, if it is set, a closest
surrounding subobject is considered the object a pointer points to.
The second bit determines if maximum or minimum of remaining bytes
is computed.

@smallexample
struct V @{ char buf1[10]; int b; char buf2[10]; @} var;
char *p = &var.buf1[1], *q = &var.b;

/* Here the object p points to is var.  */
assert (__builtin_object_size (p, 0) == sizeof (var) - 1);
/* The subobject p points to is var.buf1.  */
assert (__builtin_object_size (p, 1) == sizeof (var.buf1) - 1);
/* The object q points to is var.  */
assert (__builtin_object_size (q, 0)
        == (char *) (&var + 1) - (char *) &var.b);
/* The subobject q points to is var.b.  */
assert (__builtin_object_size (q, 1) == sizeof (var.b));
@end smallexample
@enddefbuiltin

@defbuiltin{{size_t} __builtin_dynamic_object_size (const void * @var{ptr}, int @var{type})}
is similar to @code{__builtin_object_size} in that it returns a number of bytes
from @var{ptr} to the end of the object @var{ptr} pointer points to, except
that the size returned may not be a constant.  This results in successful
evaluation of object size estimates in a wider range of use cases and can be
more precise than @code{__builtin_object_size}, but it incurs a performance
penalty since it may add a runtime overhead on size computation.  Semantics of
@var{type} as well as return values in case it is not possible to determine
which objects @var{ptr} points to at compile time are the same as in the case
of @code{__builtin_object_size}.
@enddefbuiltin

@subsection Object Size Checking and Source Fortification

Hardening of function calls using the @code{_FORTIFY_SOURCE} macro is
one of the key uses of the object size checking built-in functions.  To
make implementation of these features more convenient and improve
optimization and diagnostics, there are built-in functions added for
many common string operation functions, e.g., for @code{memcpy}
@code{__builtin___memcpy_chk} built-in is provided.  This built-in has
an additional last argument, which is the number of bytes remaining in
the object the @var{dest} argument points to or @code{(size_t) -1} if
the size is not known.

The built-in functions are optimized into the normal string functions
like @code{memcpy} if the last argument is @code{(size_t) -1} or if
it is known at compile time that the destination object will not
be overflowed.  If the compiler can determine at compile time that the
object will always be overflowed, it issues a warning.

The intended use can be e.g.@:

@smallexample
#undef memcpy
#define bos0(dest) __builtin_object_size (dest, 0)
#define memcpy(dest, src, n) \
  __builtin___memcpy_chk (dest, src, n, bos0 (dest))

char *volatile p;
char buf[10];
/* It is unknown what object p points to, so this is optimized
   into plain memcpy - no checking is possible.  */
memcpy (p, "abcde", n);
/* Destination is known and length too.  It is known at compile
   time there will be no overflow.  */
memcpy (&buf[5], "abcde", 5);
/* Destination is known, but the length is not known at compile time.
   This will result in __memcpy_chk call that can check for overflow
   at run time.  */
memcpy (&buf[5], "abcde", n);
/* Destination is known and it is known at compile time there will
   be overflow.  There will be a warning and __memcpy_chk call that
   will abort the program at run time.  */
memcpy (&buf[6], "abcde", 5);
@end smallexample

Such built-in functions are provided for @code{memcpy}, @code{mempcpy},
@code{memmove}, @code{memset}, @code{strcpy}, @code{stpcpy}, @code{strncpy},
@code{strcat} and @code{strncat}.

@subsubsection Formatted Output Function Checking
@defbuiltin{int __builtin___sprintf_chk @
            (char *@var{s}, int @var{flag}, size_t @var{os}, @
            const char *@var{fmt}, ...)}
@defbuiltinx{int __builtin___snprintf_chk @
             (char *@var{s}, size_t @var{maxlen}, int @var{flag}, @
             size_t @var{os}, const char *@var{fmt}, ...)}
@defbuiltinx{int __builtin___vsprintf_chk @
             (char *@var{s}, int @var{flag}, size_t @var{os}, @
             const char *@var{fmt}, va_list @var{ap})}
@defbuiltinx{int __builtin___vsnprintf_chk @
             (char *@var{s}, size_t @var{maxlen}, int @var{flag}, @
             size_t @var{os}, const char *@var{fmt}, @
             va_list @var{ap})}

The added @var{flag} argument is passed unchanged to @code{__sprintf_chk}
etc.@: functions and can contain implementation specific flags on what
additional security measures the checking function might take, such as
handling @code{%n} differently.

The @var{os} argument is the object size @var{s} points to, like in the
other built-in functions.  There is a small difference in the behavior
though, if @var{os} is @code{(size_t) -1}, the built-in functions are
optimized into the non-checking functions only if @var{flag} is 0, otherwise
the checking function is called with @var{os} argument set to
@code{(size_t) -1}.

In addition to this, there are checking built-in functions
@code{__builtin___printf_chk}, @code{__builtin___vprintf_chk},
@code{__builtin___fprintf_chk} and @code{__builtin___vfprintf_chk}.
These have just one additional argument, @var{flag}, right before
format string @var{fmt}.  If the compiler is able to optimize them to
@code{fputc} etc.@: functions, it does, otherwise the checking function
is called and the @var{flag} argument passed to it.
@enddefbuiltin

@node Other Builtins
@section Other Built-in Functions Provided by GCC
@cindex built-in functions
@findex __builtin_iseqsig
@findex __builtin_isfinite
@findex __builtin_isnormal
@findex __builtin_isgreater
@findex __builtin_isgreaterequal
@findex __builtin_isunordered
@findex __builtin_speculation_safe_value
@findex _Exit
@findex _exit
@findex abort
@findex abs
@findex acos
@findex acosf
@findex acosh
@findex acoshf
@findex acoshl
@findex acosl
@findex alloca
@findex asin
@findex asinf
@findex asinh
@findex asinhf
@findex asinhl
@findex asinl
@findex atan
@findex atan2
@findex atan2f
@findex atan2l
@findex atanf
@findex atanh
@findex atanhf
@findex atanhl
@findex atanl
@findex bcmp
@findex bzero
@findex cabs
@findex cabsf
@findex cabsl
@findex cacos
@findex cacosf
@findex cacosh
@findex cacoshf
@findex cacoshl
@findex cacosl
@findex calloc
@findex carg
@findex cargf
@findex cargl
@findex casin
@findex casinf
@findex casinh
@findex casinhf
@findex casinhl
@findex casinl
@findex catan
@findex catanf
@findex catanh
@findex catanhf
@findex catanhl
@findex catanl
@findex cbrt
@findex cbrtf
@findex cbrtl
@findex ccos
@findex ccosf
@findex ccosh
@findex ccoshf
@findex ccoshl
@findex ccosl
@findex ceil
@findex ceilf
@findex ceill
@findex cexp
@findex cexpf
@findex cexpl
@findex cimag
@findex cimagf
@findex cimagl
@findex clog
@findex clogf
@findex clogl
@findex clog10
@findex clog10f
@findex clog10l
@findex conj
@findex conjf
@findex conjl
@findex copysign
@findex copysignf
@findex copysignl
@findex cos
@findex cosf
@findex cosh
@findex coshf
@findex coshl
@findex cosl
@findex cpow
@findex cpowf
@findex cpowl
@findex cproj
@findex cprojf
@findex cprojl
@findex creal
@findex crealf
@findex creall
@findex csin
@findex csinf
@findex csinh
@findex csinhf
@findex csinhl
@findex csinl
@findex csqrt
@findex csqrtf
@findex csqrtl
@findex ctan
@findex ctanf
@findex ctanh
@findex ctanhf
@findex ctanhl
@findex ctanl
@findex dcgettext
@findex dgettext
@findex drem
@findex dremf
@findex dreml
@findex erf
@findex erfc
@findex erfcf
@findex erfcl
@findex erff
@findex erfl
@findex exit
@findex exp
@findex exp10
@findex exp10f
@findex exp10l
@findex exp2
@findex exp2f
@findex exp2l
@findex expf
@findex expl
@findex expm1
@findex expm1f
@findex expm1l
@findex fabs
@findex fabsf
@findex fabsl
@findex fdim
@findex fdimf
@findex fdiml
@findex ffs
@findex floor
@findex floorf
@findex floorl
@findex fma
@findex fmaf
@findex fmal
@findex fmax
@findex fmaxf
@findex fmaxl
@findex fmin
@findex fminf
@findex fminl
@findex fmod
@findex fmodf
@findex fmodl
@findex fprintf
@findex fprintf_unlocked
@findex fputs
@findex fputs_unlocked
@findex free
@findex frexp
@findex frexpf
@findex frexpl
@findex fscanf
@findex gamma
@findex gammaf
@findex gammal
@findex gamma_r
@findex gammaf_r
@findex gammal_r
@findex gettext
@findex hypot
@findex hypotf
@findex hypotl
@findex ilogb
@findex ilogbf
@findex ilogbl
@findex imaxabs
@findex index
@findex isalnum
@findex isalpha
@findex isascii
@findex isblank
@findex iscntrl
@findex isdigit
@findex isgraph
@findex islower
@findex isprint
@findex ispunct
@findex isspace
@findex isupper
@findex iswalnum
@findex iswalpha
@findex iswblank
@findex iswcntrl
@findex iswdigit
@findex iswgraph
@findex iswlower
@findex iswprint
@findex iswpunct
@findex iswspace
@findex iswupper
@findex iswxdigit
@findex isxdigit
@findex j0
@findex j0f
@findex j0l
@findex j1
@findex j1f
@findex j1l
@findex jn
@findex jnf
@findex jnl
@findex labs
@findex ldexp
@findex ldexpf
@findex ldexpl
@findex lgamma
@findex lgammaf
@findex lgammal
@findex lgamma_r
@findex lgammaf_r
@findex lgammal_r
@findex llabs
@findex llrint
@findex llrintf
@findex llrintl
@findex llround
@findex llroundf
@findex llroundl
@findex log
@findex log10
@findex log10f
@findex log10l
@findex log1p
@findex log1pf
@findex log1pl
@findex log2
@findex log2f
@findex log2l
@findex logb
@findex logbf
@findex logbl
@findex logf
@findex logl
@findex lrint
@findex lrintf
@findex lrintl
@findex lround
@findex lroundf
@findex lroundl
@findex malloc
@findex memchr
@findex memcmp
@findex memcpy
@findex mempcpy
@findex memset
@findex modf
@findex modff
@findex modfl
@findex nearbyint
@findex nearbyintf
@findex nearbyintl
@findex nextafter
@findex nextafterf
@findex nextafterl
@findex nexttoward
@findex nexttowardf
@findex nexttowardl
@findex pow
@findex pow10
@findex pow10f
@findex pow10l
@findex powf
@findex powl
@findex printf
@findex printf_unlocked
@findex putchar
@findex puts
@findex realloc
@findex remainder
@findex remainderf
@findex remainderl
@findex remquo
@findex remquof
@findex remquol
@findex rindex
@findex rint
@findex rintf
@findex rintl
@findex round
@findex roundf
@findex roundl
@findex scalb
@findex scalbf
@findex scalbl
@findex scalbln
@findex scalblnf
@findex scalblnf
@findex scalbn
@findex scalbnf
@findex scanfnl
@findex signbit
@findex signbitf
@findex signbitl
@findex signbitd32
@findex signbitd64
@findex signbitd128
@findex significand
@findex significandf
@findex significandl
@findex sin
@findex sincos
@findex sincosf
@findex sincosl
@findex sinf
@findex sinh
@findex sinhf
@findex sinhl
@findex sinl
@findex snprintf
@findex sprintf
@findex sqrt
@findex sqrtf
@findex sqrtl
@findex sscanf
@findex stpcpy
@findex stpncpy
@findex strcasecmp
@findex strcat
@findex strchr
@findex strcmp
@findex strcpy
@findex strcspn
@findex strdup
@findex strfmon
@findex strftime
@findex strlen
@findex strncasecmp
@findex strncat
@findex strncmp
@findex strncpy
@findex strndup
@findex strnlen
@findex strpbrk
@findex strrchr
@findex strspn
@findex strstr
@findex tan
@findex tanf
@findex tanh
@findex tanhf
@findex tanhl
@findex tanl
@findex tgamma
@findex tgammaf
@findex tgammal
@findex toascii
@findex tolower
@findex toupper
@findex towlower
@findex towupper
@findex trunc
@findex truncf
@findex truncl
@findex vfprintf
@findex vfscanf
@findex vprintf
@findex vscanf
@findex vsnprintf
@findex vsprintf
@findex vsscanf
@findex y0
@findex y0f
@findex y0l
@findex y1
@findex y1f
@findex y1l
@findex yn
@findex ynf
@findex ynl

GCC provides a large number of built-in functions other than the ones
mentioned above.  Some of these are for internal use in the processing
of exceptions or variable-length argument lists and are not
documented here because they may change from time to time; we do not
recommend general use of these functions.

The remaining functions are provided for optimization purposes.

With the exception of built-ins that have library equivalents such as
the standard C library functions discussed below, or that expand to
library calls, GCC built-in functions are always expanded inline and
thus do not have corresponding entry points and their address cannot
be obtained.  Attempting to use them in an expression other than
a function call results in a compile-time error.

@opindex fno-builtin
GCC includes built-in versions of many of the functions in the standard
C library.  These functions come in two forms: one whose names start with
the @code{__builtin_} prefix, and the other without.  Both forms have the
same type (including prototype), the same address (when their address is
taken), and the same meaning as the C library functions even if you specify
the @option{-fno-builtin} option @pxref{C Dialect Options}).  Many of these
functions are only optimized in certain cases; if they are not optimized in
a particular case, a call to the library function is emitted.

@opindex ansi
@opindex std
Outside strict ISO C mode (@option{-ansi}, @option{-std=c90},
@option{-std=c99} or @option{-std=c11}), the functions
@code{_exit}, @code{alloca}, @code{bcmp}, @code{bzero},
@code{dcgettext}, @code{dgettext}, @code{dremf}, @code{dreml},
@code{drem}, @code{exp10f}, @code{exp10l}, @code{exp10}, @code{ffsll},
@code{ffsl}, @code{ffs}, @code{fprintf_unlocked},
@code{fputs_unlocked}, @code{gammaf}, @code{gammal}, @code{gamma},
@code{gammaf_r}, @code{gammal_r}, @code{gamma_r}, @code{gettext},
@code{index}, @code{isascii}, @code{j0f}, @code{j0l}, @code{j0},
@code{j1f}, @code{j1l}, @code{j1}, @code{jnf}, @code{jnl}, @code{jn},
@code{lgammaf_r}, @code{lgammal_r}, @code{lgamma_r}, @code{mempcpy},
@code{pow10f}, @code{pow10l}, @code{pow10}, @code{printf_unlocked},
@code{rindex}, @code{roundeven}, @code{roundevenf}, @code{roundevenl},
@code{scalbf}, @code{scalbl}, @code{scalb},
@code{signbit}, @code{signbitf}, @code{signbitl}, @code{signbitd32},
@code{signbitd64}, @code{signbitd128}, @code{significandf},
@code{significandl}, @code{significand}, @code{sincosf},
@code{sincosl}, @code{sincos}, @code{stpcpy}, @code{stpncpy},
@code{strcasecmp}, @code{strdup}, @code{strfmon}, @code{strncasecmp},
@code{strndup}, @code{strnlen}, @code{toascii}, @code{y0f}, @code{y0l},
@code{y0}, @code{y1f}, @code{y1l}, @code{y1}, @code{ynf}, @code{ynl} and
@code{yn}
may be handled as built-in functions.
All these functions have corresponding versions
prefixed with @code{__builtin_}, which may be used even in strict C90
mode.

The ISO C99 functions
@code{_Exit}, @code{acoshf}, @code{acoshl}, @code{acosh}, @code{asinhf},
@code{asinhl}, @code{asinh}, @code{atanhf}, @code{atanhl}, @code{atanh},
@code{cabsf}, @code{cabsl}, @code{cabs}, @code{cacosf}, @code{cacoshf},
@code{cacoshl}, @code{cacosh}, @code{cacosl}, @code{cacos},
@code{cargf}, @code{cargl}, @code{carg}, @code{casinf}, @code{casinhf},
@code{casinhl}, @code{casinh}, @code{casinl}, @code{casin},
@code{catanf}, @code{catanhf}, @code{catanhl}, @code{catanh},
@code{catanl}, @code{catan}, @code{cbrtf}, @code{cbrtl}, @code{cbrt},
@code{ccosf}, @code{ccoshf}, @code{ccoshl}, @code{ccosh}, @code{ccosl},
@code{ccos}, @code{cexpf}, @code{cexpl}, @code{cexp}, @code{cimagf},
@code{cimagl}, @code{cimag}, @code{clogf}, @code{clogl}, @code{clog},
@code{conjf}, @code{conjl}, @code{conj}, @code{copysignf}, @code{copysignl},
@code{copysign}, @code{cpowf}, @code{cpowl}, @code{cpow}, @code{cprojf},
@code{cprojl}, @code{cproj}, @code{crealf}, @code{creall}, @code{creal},
@code{csinf}, @code{csinhf}, @code{csinhl}, @code{csinh}, @code{csinl},
@code{csin}, @code{csqrtf}, @code{csqrtl}, @code{csqrt}, @code{ctanf},
@code{ctanhf}, @code{ctanhl}, @code{ctanh}, @code{ctanl}, @code{ctan},
@code{erfcf}, @code{erfcl}, @code{erfc}, @code{erff}, @code{erfl},
@code{erf}, @code{exp2f}, @code{exp2l}, @code{exp2}, @code{expm1f},
@code{expm1l}, @code{expm1}, @code{fdimf}, @code{fdiml}, @code{fdim},
@code{fmaf}, @code{fmal}, @code{fmaxf}, @code{fmaxl}, @code{fmax},
@code{fma}, @code{fminf}, @code{fminl}, @code{fmin}, @code{hypotf},
@code{hypotl}, @code{hypot}, @code{ilogbf}, @code{ilogbl}, @code{ilogb},
@code{imaxabs}, @code{isblank}, @code{iswblank}, @code{lgammaf},
@code{lgammal}, @code{lgamma}, @code{llabs}, @code{llrintf}, @code{llrintl},
@code{llrint}, @code{llroundf}, @code{llroundl}, @code{llround},
@code{log1pf}, @code{log1pl}, @code{log1p}, @code{log2f}, @code{log2l},
@code{log2}, @code{logbf}, @code{logbl}, @code{logb}, @code{lrintf},
@code{lrintl}, @code{lrint}, @code{lroundf}, @code{lroundl},
@code{lround}, @code{nearbyintf}, @code{nearbyintl}, @code{nearbyint},
@code{nextafterf}, @code{nextafterl}, @code{nextafter},
@code{nexttowardf}, @code{nexttowardl}, @code{nexttoward},
@code{remainderf}, @code{remainderl}, @code{remainder}, @code{remquof},
@code{remquol}, @code{remquo}, @code{rintf}, @code{rintl}, @code{rint},
@code{roundf}, @code{roundl}, @code{round}, @code{scalblnf},
@code{scalblnl}, @code{scalbln}, @code{scalbnf}, @code{scalbnl},
@code{scalbn}, @code{snprintf}, @code{tgammaf}, @code{tgammal},
@code{tgamma}, @code{truncf}, @code{truncl}, @code{trunc},
@code{vfscanf}, @code{vscanf}, @code{vsnprintf} and @code{vsscanf}
are handled as built-in functions
except in strict ISO C90 mode (@option{-ansi} or @option{-std=c90}).

There are also built-in versions of the ISO C99 functions
@code{acosf}, @code{acosl}, @code{asinf}, @code{asinl}, @code{atan2f},
@code{atan2l}, @code{atanf}, @code{atanl}, @code{ceilf}, @code{ceill},
@code{cosf}, @code{coshf}, @code{coshl}, @code{cosl}, @code{expf},
@code{expl}, @code{fabsf}, @code{fabsl}, @code{floorf}, @code{floorl},
@code{fmodf}, @code{fmodl}, @code{frexpf}, @code{frexpl}, @code{ldexpf},
@code{ldexpl}, @code{log10f}, @code{log10l}, @code{logf}, @code{logl},
@code{modfl}, @code{modff}, @code{powf}, @code{powl}, @code{sinf},
@code{sinhf}, @code{sinhl}, @code{sinl}, @code{sqrtf}, @code{sqrtl},
@code{tanf}, @code{tanhf}, @code{tanhl} and @code{tanl}
that are recognized in any mode since ISO C90 reserves these names for
the purpose to which ISO C99 puts them.  All these functions have
corresponding versions prefixed with @code{__builtin_}.

There are also built-in functions @code{__builtin_fabsf@var{n}},
@code{__builtin_fabsf@var{n}x}, @code{__builtin_copysignf@var{n}} and
@code{__builtin_copysignf@var{n}x}, corresponding to the TS 18661-3
functions @code{fabsf@var{n}}, @code{fabsf@var{n}x},
@code{copysignf@var{n}} and @code{copysignf@var{n}x}, for supported
types @code{_Float@var{n}} and @code{_Float@var{n}x}.

There are also GNU extension functions @code{clog10}, @code{clog10f} and
@code{clog10l} which names are reserved by ISO C99 for future use.
All these functions have versions prefixed with @code{__builtin_}.

The ISO C94 functions
@code{iswalnum}, @code{iswalpha}, @code{iswcntrl}, @code{iswdigit},
@code{iswgraph}, @code{iswlower}, @code{iswprint}, @code{iswpunct},
@code{iswspace}, @code{iswupper}, @code{iswxdigit}, @code{towlower} and
@code{towupper}
are handled as built-in functions
except in strict ISO C90 mode (@option{-ansi} or @option{-std=c90}).

The ISO C90 functions
@code{abort}, @code{abs}, @code{acos}, @code{asin}, @code{atan2},
@code{atan}, @code{calloc}, @code{ceil}, @code{cosh}, @code{cos},
@code{exit}, @code{exp}, @code{fabs}, @code{floor}, @code{fmod},
@code{fprintf}, @code{fputs}, @code{free}, @code{frexp}, @code{fscanf},
@code{isalnum}, @code{isalpha}, @code{iscntrl}, @code{isdigit},
@code{isgraph}, @code{islower}, @code{isprint}, @code{ispunct},
@code{isspace}, @code{isupper}, @code{isxdigit}, @code{tolower},
@code{toupper}, @code{labs}, @code{ldexp}, @code{log10}, @code{log},
@code{malloc}, @code{memchr}, @code{memcmp}, @code{memcpy},
@code{memset}, @code{modf}, @code{pow}, @code{printf}, @code{putchar},
@code{puts}, @code{realloc}, @code{scanf}, @code{sinh}, @code{sin},
@code{snprintf}, @code{sprintf}, @code{sqrt}, @code{sscanf}, @code{strcat},
@code{strchr}, @code{strcmp}, @code{strcpy}, @code{strcspn},
@code{strlen}, @code{strncat}, @code{strncmp}, @code{strncpy},
@code{strpbrk}, @code{strrchr}, @code{strspn}, @code{strstr},
@code{tanh}, @code{tan}, @code{vfprintf}, @code{vprintf} and @code{vsprintf}
are all recognized as built-in functions unless
@option{-fno-builtin} is specified (or @option{-fno-builtin-@var{function}}
is specified for an individual function).  All of these functions have
corresponding versions prefixed with @code{__builtin_}.

GCC provides built-in versions of the ISO C99 floating-point comparison
macros that avoid raising exceptions for unordered operands.  They have
the same names as the standard macros ( @code{isgreater},
@code{isgreaterequal}, @code{isless}, @code{islessequal},
@code{islessgreater}, and @code{isunordered}) , with @code{__builtin_}
prefixed.  We intend for a library implementor to be able to simply
@code{#define} each standard macro to its built-in equivalent.
In the same fashion, GCC provides @code{fpclassify}, @code{iseqsig},
@code{isfinite}, @code{isinf_sign}, @code{isnormal} and @code{signbit} built-ins
used with @code{__builtin_} prefixed.  The @code{isinf} and @code{isnan}
built-in functions appear both with and without the @code{__builtin_} prefix.
With @code{-ffinite-math-only} option the @code{isinf} and @code{isnan}
built-in functions will always return 0.

GCC provides built-in versions of the ISO C99 floating-point rounding and
exceptions handling functions @code{fegetround}, @code{feclearexcept} and
@code{feraiseexcept}.  They may not be available for all targets, and because
they need close interaction with libc internal values, they may not be available
for all target libcs, but in all cases they will gracefully fallback to libc
calls.  These built-in functions appear both with and without the
@code{__builtin_} prefix.

@defbuiltin{{void *} __builtin_alloca (size_t @var{size})}
The @code{__builtin_alloca} function must be called at block scope.
The function allocates an object @var{size} bytes large on the stack
of the calling function.  The object is aligned on the default stack
alignment boundary for the target determined by the
@code{__BIGGEST_ALIGNMENT__} macro.  The @code{__builtin_alloca}
function returns a pointer to the first byte of the allocated object.
The lifetime of the allocated object ends just before the calling
function returns to its caller.   This is so even when
@code{__builtin_alloca} is called within a nested block.

For example, the following function allocates eight objects of @code{n}
bytes each on the stack, storing a pointer to each in consecutive elements
of the array @code{a}.  It then passes the array to function @code{g}
which can safely use the storage pointed to by each of the array elements.

@smallexample
void f (unsigned n)
@{
  void *a [8];
  for (int i = 0; i != 8; ++i)
    a [i] = __builtin_alloca (n);

  g (a, n);   // @r{safe}
@}
@end smallexample

Since the @code{__builtin_alloca} function doesn't validate its argument
it is the responsibility of its caller to make sure the argument doesn't
cause it to exceed the stack size limit.
The @code{__builtin_alloca} function is provided to make it possible to
allocate on the stack arrays of bytes with an upper bound that may be
computed at run time.  Since C99 Variable Length Arrays offer
similar functionality under a portable, more convenient, and safer
interface they are recommended instead, in both C99 and C++ programs
where GCC provides them as an extension.
@xref{Variable Length}, for details.

@enddefbuiltin

@defbuiltin{{void *} __builtin_alloca_with_align (size_t @var{size}, size_t @var{alignment})}
The @code{__builtin_alloca_with_align} function must be called at block
scope.  The function allocates an object @var{size} bytes large on
the stack of the calling function.  The allocated object is aligned on
the boundary specified by the argument @var{alignment} whose unit is given
in bits (not bytes).  The @var{size} argument must be positive and not
exceed the stack size limit.  The @var{alignment} argument must be a constant
integer expression that evaluates to a power of 2 greater than or equal to
@code{CHAR_BIT} and less than some unspecified maximum.  Invocations
with other values are rejected with an error indicating the valid bounds.
The function returns a pointer to the first byte of the allocated object.
The lifetime of the allocated object ends at the end of the block in which
the function was called.  The allocated storage is released no later than
just before the calling function returns to its caller, but may be released
at the end of the block in which the function was called.

For example, in the following function the call to @code{g} is unsafe
because when @code{overalign} is non-zero, the space allocated by
@code{__builtin_alloca_with_align} may have been released at the end
of the @code{if} statement in which it was called.

@smallexample
void f (unsigned n, bool overalign)
@{
  void *p;
  if (overalign)
    p = __builtin_alloca_with_align (n, 64 /* bits */);
  else
    p = __builtin_alloc (n);

  g (p, n);   // @r{unsafe}
@}
@end smallexample

Since the @code{__builtin_alloca_with_align} function doesn't validate its
@var{size} argument it is the responsibility of its caller to make sure
the argument doesn't cause it to exceed the stack size limit.
The @code{__builtin_alloca_with_align} function is provided to make
it possible to allocate on the stack overaligned arrays of bytes with
an upper bound that may be computed at run time.  Since C99
Variable Length Arrays offer the same functionality under
a portable, more convenient, and safer interface they are recommended
instead, in both C99 and C++ programs where GCC provides them as
an extension.  @xref{Variable Length}, for details.

@enddefbuiltin

@defbuiltin{{void *} __builtin_alloca_with_align_and_max (size_t @var{size}, size_t @var{alignment}, size_t @var{max_size})}
Similar to @code{__builtin_alloca_with_align} but takes an extra argument
specifying an upper bound for @var{size} in case its value cannot be computed
at compile time, for use by @option{-fstack-usage}, @option{-Wstack-usage}
and @option{-Walloca-larger-than}.  @var{max_size} must be a constant integer
expression, it has no effect on code generation and no attempt is made to
check its compatibility with @var{size}.

@enddefbuiltin

@defbuiltin{bool __builtin_has_attribute (@var{type-or-expression}, @var{attribute})}
The @code{__builtin_has_attribute} function evaluates to an integer constant
expression equal to @code{true} if the symbol or type referenced by
the @var{type-or-expression} argument has been declared with
the @var{attribute} referenced by the second argument.  For
an @var{type-or-expression} argument that does not reference a symbol,
since attributes do not apply to expressions the built-in consider
the type of the argument.  Neither argument is evaluated.
The @var{type-or-expression} argument is subject to the same
restrictions as the argument to @code{typeof} (@pxref{Typeof}).  The
@var{attribute} argument is an attribute name optionally followed by
a comma-separated list of arguments enclosed in parentheses.  Both forms
of attribute names---with and without double leading and trailing
underscores---are recognized.  @xref{Attribute Syntax}, for details.
When no attribute arguments are specified for an attribute that expects
one or more arguments the function returns @code{true} if
@var{type-or-expression} has been declared with the attribute regardless
of the attribute argument values.  Arguments provided for an attribute
that expects some are validated and matched up to the provided number.
The function returns @code{true} if all provided arguments match.  For
example, the first call to the function below evaluates to @code{true}
because @code{x} is declared with the @code{aligned} attribute but
the second call evaluates to @code{false} because @code{x} is declared
@code{aligned (8)} and not @code{aligned (4)}.

@smallexample
__attribute__ ((aligned (8))) int x;
_Static_assert (__builtin_has_attribute (x, aligned), "aligned");
_Static_assert (!__builtin_has_attribute (x, aligned (4)), "aligned (4)");
@end smallexample

Due to a limitation the @code{__builtin_has_attribute} function returns
@code{false} for the @code{mode} attribute even if the type or variable
referenced by the @var{type-or-expression} argument was declared with one.
The function is also not supported with labels, and in C with enumerators.

Note that unlike the @code{__has_attribute} preprocessor operator which
is suitable for use in @code{#if} preprocessing directives
@code{__builtin_has_attribute} is an intrinsic function that is not
recognized in such contexts.

@enddefbuiltin

@defbuiltin{@var{type} __builtin_speculation_safe_value (@var{type} @var{val}, @var{type} @var{failval})}

This built-in function can be used to help mitigate against unsafe
speculative execution.  @var{type} may be any integral type or any
pointer type.

@enumerate
@item
If the CPU is not speculatively executing the code, then @var{val}
is returned.
@item
If the CPU is executing speculatively then either:
@itemize
@item
The function may cause execution to pause until it is known that the
code is no-longer being executed speculatively (in which case
@var{val} can be returned, as above); or
@item
The function may use target-dependent speculation tracking state to cause
@var{failval} to be returned when it is known that speculative
execution has incorrectly predicted a conditional branch operation.
@end itemize
@end enumerate

The second argument, @var{failval}, is optional and defaults to zero
if omitted.

GCC defines the preprocessor macro
@code{__HAVE_BUILTIN_SPECULATION_SAFE_VALUE} for targets that have been
updated to support this builtin.

The built-in function can be used where a variable appears to be used in a
safe way, but the CPU, due to speculative execution may temporarily ignore
the bounds checks.  Consider, for example, the following function:

@smallexample
int array[500];
int f (unsigned untrusted_index)
@{
  if (untrusted_index < 500)
    return array[untrusted_index];
  return 0;
@}
@end smallexample

If the function is called repeatedly with @code{untrusted_index} less
than the limit of 500, then a branch predictor will learn that the
block of code that returns a value stored in @code{array} will be
executed.  If the function is subsequently called with an
out-of-range value it will still try to execute that block of code
first until the CPU determines that the prediction was incorrect
(the CPU will unwind any incorrect operations at that point).
However, depending on how the result of the function is used, it might be
possible to leave traces in the cache that can reveal what was stored
at the out-of-bounds location.  The built-in function can be used to
provide some protection against leaking data in this way by changing
the code to:

@smallexample
int array[500];
int f (unsigned untrusted_index)
@{
  if (untrusted_index < 500)
    return array[__builtin_speculation_safe_value (untrusted_index)];
  return 0;
@}
@end smallexample

The built-in function will either cause execution to stall until the
conditional branch has been fully resolved, or it may permit
speculative execution to continue, but using 0 instead of
@code{untrusted_value} if that exceeds the limit.

If accessing any memory location is potentially unsafe when speculative
execution is incorrect, then the code can be rewritten as

@smallexample
int array[500];
int f (unsigned untrusted_index)
@{
  if (untrusted_index < 500)
    return *__builtin_speculation_safe_value (&array[untrusted_index], NULL);
  return 0;
@}
@end smallexample

which will cause a @code{NULL} pointer to be used for the unsafe case.

@enddefbuiltin

@defbuiltin{int __builtin_types_compatible_p (@var{type1}, @var{type2})}

You can use the built-in function @code{__builtin_types_compatible_p} to
determine whether two types are the same.

This built-in function returns 1 if the unqualified versions of the
types @var{type1} and @var{type2} (which are types, not expressions) are
compatible, 0 otherwise.  The result of this built-in function can be
used in integer constant expressions.

This built-in function ignores top level qualifiers (e.g., @code{const},
@code{volatile}).  For example, @code{int} is equivalent to @code{const
int}.

The type @code{int[]} and @code{int[5]} are compatible.  On the other
hand, @code{int} and @code{char *} are not compatible, even if the size
of their types, on the particular architecture are the same.  Also, the
amount of pointer indirection is taken into account when determining
similarity.  Consequently, @code{short *} is not similar to
@code{short **}.  Furthermore, two types that are typedefed are
considered compatible if their underlying types are compatible.

An @code{enum} type is not considered to be compatible with another
@code{enum} type even if both are compatible with the same integer
type; this is what the C standard specifies.
For example, @code{enum @{foo, bar@}} is not similar to
@code{enum @{hot, dog@}}.

You typically use this function in code whose execution varies
depending on the arguments' types.  For example:

@smallexample
#define foo(x)                                                  \
  (@{                                                           \
    typeof (x) tmp = (x);                                       \
    if (__builtin_types_compatible_p (typeof (x), long double)) \
      tmp = foo_long_double (tmp);                              \
    else if (__builtin_types_compatible_p (typeof (x), double)) \
      tmp = foo_double (tmp);                                   \
    else if (__builtin_types_compatible_p (typeof (x), float))  \
      tmp = foo_float (tmp);                                    \
    else                                                        \
      abort ();                                                 \
    tmp;                                                        \
  @})
@end smallexample

@emph{Note:} This construct is only available for C@.

@enddefbuiltin

@defbuiltin{@var{type} __builtin_call_with_static_chain (@var{call_exp}, @var{pointer_exp})}

The @var{call_exp} expression must be a function call, and the
@var{pointer_exp} expression must be a pointer.  The @var{pointer_exp}
is passed to the function call in the target's static chain location.
The result of builtin is the result of the function call.

@emph{Note:} This builtin is only available for C@.
This builtin can be used to call Go closures from C.

@enddefbuiltin

@defbuiltin{@var{type} __builtin_choose_expr (@var{const_exp}, @var{exp1}, @var{exp2})}

You can use the built-in function @code{__builtin_choose_expr} to
evaluate code depending on the value of a constant expression.  This
built-in function returns @var{exp1} if @var{const_exp}, which is an
integer constant expression, is nonzero.  Otherwise it returns @var{exp2}.

This built-in function is analogous to the @samp{? :} operator in C,
except that the expression returned has its type unaltered by promotion
rules.  Also, the built-in function does not evaluate the expression
that is not chosen.  For example, if @var{const_exp} evaluates to @code{true},
@var{exp2} is not evaluated even if it has side effects.

This built-in function can return an lvalue if the chosen argument is an
lvalue.

If @var{exp1} is returned, the return type is the same as @var{exp1}'s
type.  Similarly, if @var{exp2} is returned, its return type is the same
as @var{exp2}.

Example:

@smallexample
#define foo(x)                                                    \
  __builtin_choose_expr (                                         \
    __builtin_types_compatible_p (typeof (x), double),            \
    foo_double (x),                                               \
    __builtin_choose_expr (                                       \
      __builtin_types_compatible_p (typeof (x), float),           \
      foo_float (x),                                              \
      /* @r{The void expression results in a compile-time error}  \
         @r{when assigning the result to something.}  */          \
      (void)0))
@end smallexample

@emph{Note:} This construct is only available for C@.  Furthermore, the
unused expression (@var{exp1} or @var{exp2} depending on the value of
@var{const_exp}) may still generate syntax errors.  This may change in
future revisions.

@enddefbuiltin

@defbuiltin{@var{type} __builtin_tgmath (@var{functions}, @var{arguments})}

The built-in function @code{__builtin_tgmath}, available only for C
and Objective-C, calls a function determined according to the rules of
@code{<tgmath.h>} macros.  It is intended to be used in
implementations of that header, so that expansions of macros from that
header only expand each of their arguments once, to avoid problems
when calls to such macros are nested inside the arguments of other
calls to such macros; in addition, it results in better diagnostics
for invalid calls to @code{<tgmath.h>} macros than implementations
using other GNU C language features.  For example, the @code{pow}
type-generic macro might be defined as:

@smallexample
#define pow(a, b) __builtin_tgmath (powf, pow, powl, \
                                    cpowf, cpow, cpowl, a, b)
@end smallexample

The arguments to @code{__builtin_tgmath} are at least two pointers to
functions, followed by the arguments to the type-generic macro (which
will be passed as arguments to the selected function).  All the
pointers to functions must be pointers to prototyped functions, none
of which may have variable arguments, and all of which must have the
same number of parameters; the number of parameters of the first
function determines how many arguments to @code{__builtin_tgmath} are
interpreted as function pointers, and how many as the arguments to the
called function.

The types of the specified functions must all be different, but
related to each other in the same way as a set of functions that may
be selected between by a macro in @code{<tgmath.h>}.  This means that
the functions are parameterized by a floating-point type @var{t},
different for each such function.  The function return types may all
be the same type, or they may be @var{t} for each function, or they
may be the real type corresponding to @var{t} for each function (if
some of the types @var{t} are complex).  Likewise, for each parameter
position, the type of the parameter in that position may always be the
same type, or may be @var{t} for each function (this case must apply
for at least one parameter position), or may be the real type
corresponding to @var{t} for each function.

The standard rules for @code{<tgmath.h>} macros are used to find a
common type @var{u} from the types of the arguments for parameters
whose types vary between the functions; complex integer types (a GNU
extension) are treated like the complex type corresponding to the real
floating type that would be chosen for the corresponding real integer type.
If the function return types vary, or are all the same integer type,
the function called is the one for which @var{t} is @var{u}, and it is
an error if there is no such function.  If the function return types
are all the same floating-point type, the type-generic macro is taken
to be one of those from TS 18661 that rounds the result to a narrower
type; if there is a function for which @var{t} is @var{u}, it is
called, and otherwise the first function, if any, for which @var{t}
has at least the range and precision of @var{u} is called, and it is
an error if there is no such function.

@enddefbuiltin

@defbuiltin{int __builtin_constant_p (@var{exp})}
You can use the built-in function @code{__builtin_constant_p} to
determine if the expression @var{exp} is known to be constant at
compile time and hence that GCC can perform constant-folding on expressions
involving that value.  The argument of the function is the expression to test.
The expression is not evaluated, side-effects are discarded.  The function
returns the integer 1 if the argument is known to be a compile-time
constant and 0 if it is not known to be a compile-time constant.
Any expression that has side-effects makes the function return 0.
A return of 0 does not indicate that the expression is @emph{not} a constant,
but merely that GCC cannot prove it is a constant within the constraints
of the active set of optimization options.

You typically use this function in an embedded application where
memory is a critical resource.  If you have some complex calculation,
you may want it to be folded if it involves constants, but need to call
a function if it does not.  For example:

@smallexample
#define Scale_Value(X)      \
  (__builtin_constant_p (X) \
  ? ((X) * SCALE + OFFSET) : Scale (X))
@end smallexample

You may use this built-in function in either a macro or an inline
function.  However, if you use it in an inlined function and pass an
argument of the function as the argument to the built-in, GCC 
never returns 1 when you call the inline function with a string constant
or compound literal (@pxref{Compound Literals}) and does not return 1
when you pass a constant numeric value to the inline function unless you
specify the @option{-O} option.

You may also use @code{__builtin_constant_p} in initializers for static
data.  For instance, you can write

@smallexample
static const int table[] = @{
   __builtin_constant_p (EXPRESSION) ? (EXPRESSION) : -1,
   /* @r{@dots{}} */
@};
@end smallexample

@noindent
This is an acceptable initializer even if @var{EXPRESSION} is not a
constant expression, including the case where
@code{__builtin_constant_p} returns 1 because @var{EXPRESSION} can be
folded to a constant but @var{EXPRESSION} contains operands that are
not otherwise permitted in a static initializer (for example,
@code{0 && foo ()}).  GCC must be more conservative about evaluating the
built-in in this case, because it has no opportunity to perform
optimization.
@enddefbuiltin

@defbuiltin{bool __builtin_is_constant_evaluated (void)}
The @code{__builtin_is_constant_evaluated} function is available only
in C++.  The built-in is intended to be used by implementations of
the @code{std::is_constant_evaluated} C++ function.  Programs should make
use of the latter function rather than invoking the built-in directly.

The main use case of the built-in is to determine whether a @code{constexpr}
function is being called in a @code{constexpr} context.  A call to
the function evaluates to a core constant expression with the value
@code{true} if and only if it occurs within the evaluation of an expression
or conversion that is manifestly constant-evaluated as defined in the C++
standard.  Manifestly constant-evaluated contexts include constant-expressions,
the conditions of @code{constexpr if} statements, constraint-expressions, and
initializers of variables usable in constant expressions.   For more details
refer to the latest revision of the C++ standard.
@enddefbuiltin

@defbuiltin{void __builtin_clear_padding (@var{ptr})}
The built-in function @code{__builtin_clear_padding} function clears
padding bits inside of the object representation of object pointed by
@var{ptr}, which has to be a pointer.  The value representation of the
object is not affected.  The type of the object is assumed to be the type
the pointer points to.  Inside of a union, the only cleared bits are
bits that are padding bits for all the union members.

This built-in-function is useful if the padding bits of an object might
have intederminate values and the object representation needs to be
bitwise compared to some other object, for example for atomic operations.

For C++, @var{ptr} argument type should be pointer to trivially-copyable
type, unless the argument is address of a variable or parameter, because
otherwise it isn't known if the type isn't just a base class whose padding
bits are reused or laid out differently in a derived class.
@enddefbuiltin

@defbuiltin{@var{type} __builtin_bit_cast (@var{type}, @var{arg})}
The @code{__builtin_bit_cast} function is available only
in C++.  The built-in is intended to be used by implementations of
the @code{std::bit_cast} C++ template function.  Programs should make
use of the latter function rather than invoking the built-in directly.

This built-in function allows reinterpreting the bits of the @var{arg}
argument as if it had type @var{type}.  @var{type} and the type of the
@var{arg} argument need to be trivially copyable types with the same size.
When manifestly constant-evaluated, it performs extra diagnostics required
for @code{std::bit_cast} and returns a constant expression if @var{arg}
is a constant expression.  For more details
refer to the latest revision of the C++ standard.
@enddefbuiltin

@defbuiltin{long __builtin_expect (long @var{exp}, long @var{c})}
@opindex fprofile-arcs
You may use @code{__builtin_expect} to provide the compiler with
branch prediction information.  In general, you should prefer to
use actual profile feedback for this (@option{-fprofile-arcs}), as
programmers are notoriously bad at predicting how their programs
actually perform.  However, there are applications in which this
data is hard to collect.

The return value is the value of @var{exp}, which should be an integral
expression.  The semantics of the built-in are that it is expected that
@var{exp} == @var{c}.  For example:

@smallexample
if (__builtin_expect (x, 0))
  foo ();
@end smallexample

@noindent
indicates that we do not expect to call @code{foo}, since
we expect @code{x} to be zero.  Since you are limited to integral
expressions for @var{exp}, you should use constructions such as

@smallexample
if (__builtin_expect (ptr != NULL, 1))
  foo (*ptr);
@end smallexample

@noindent
when testing pointer or floating-point values.

For the purposes of branch prediction optimizations, the probability that
a @code{__builtin_expect} expression is @code{true} is controlled by GCC's
@code{builtin-expect-probability} parameter, which defaults to 90%.  

You can also use @code{__builtin_expect_with_probability} to explicitly 
assign a probability value to individual expressions.  If the built-in
is used in a loop construct, the provided probability will influence
the expected number of iterations made by loop optimizations.
@enddefbuiltin

@defbuiltin{long __builtin_expect_with_probability}
(long @var{exp}, long @var{c}, double @var{probability})

This function has the same semantics as @code{__builtin_expect},
but the caller provides the expected probability that @var{exp} == @var{c}.
The last argument, @var{probability}, is a floating-point value in the
range 0.0 to 1.0, inclusive.  The @var{probability} argument must be
constant floating-point expression.
@enddefbuiltin

@defbuiltin{void __builtin_trap (void)}
This function causes the program to exit abnormally.  GCC implements
this function by using a target-dependent mechanism (such as
intentionally executing an illegal instruction) or by calling
@code{abort}.  The mechanism used may vary from release to release so
you should not rely on any particular implementation.
@enddefbuiltin

@defbuiltin{void __builtin_unreachable (void)}
If control flow reaches the point of the @code{__builtin_unreachable},
the program is undefined.  It is useful in situations where the
compiler cannot deduce the unreachability of the code.

One such case is immediately following an @code{asm} statement that
either never terminates, or one that transfers control elsewhere
and never returns.  In this example, without the
@code{__builtin_unreachable}, GCC issues a warning that control
reaches the end of a non-void function.  It also generates code
to return after the @code{asm}.

@smallexample
int f (int c, int v)
@{
  if (c)
    @{
      return v;
    @}
  else
    @{
      asm("jmp error_handler");
      __builtin_unreachable ();
    @}
@}
@end smallexample

@noindent
Because the @code{asm} statement unconditionally transfers control out
of the function, control never reaches the end of the function
body.  The @code{__builtin_unreachable} is in fact unreachable and
communicates this fact to the compiler.

Another use for @code{__builtin_unreachable} is following a call a
function that never returns but that is not declared
@code{__attribute__((noreturn))}, as in this example:

@smallexample
void function_that_never_returns (void);

int g (int c)
@{
  if (c)
    @{
      return 1;
    @}
  else
    @{
      function_that_never_returns ();
      __builtin_unreachable ();
    @}
@}
@end smallexample

@enddefbuiltin

@defbuiltin{@var{type} __builtin_assoc_barrier (@var{type} @var{expr})}
This built-in inhibits re-association of the floating-point expression
@var{expr} with expressions consuming the return value of the built-in. The
expression @var{expr} itself can be reordered, and the whole expression
@var{expr} can be reordered with operands after the barrier. The barrier is
only relevant when @code{-fassociative-math} is active, since otherwise
floating-point is not treated as associative.

@smallexample
float x0 = a + b - b;
float x1 = __builtin_assoc_barrier(a + b) - b;
@end smallexample

@noindent
means that, with @code{-fassociative-math}, @code{x0} can be optimized to
@code{x0 = a} but @code{x1} cannot.
@enddefbuiltin

@defbuiltin{{void *} __builtin_assume_aligned (const void *@var{exp}, size_t @var{align}, ...)}
This function returns its first argument, and allows the compiler
to assume that the returned pointer is at least @var{align} bytes
aligned.  This built-in can have either two or three arguments,
if it has three, the third argument should have integer type, and
if it is nonzero means misalignment offset.  For example:

@smallexample
void *x = __builtin_assume_aligned (arg, 16);
@end smallexample

@noindent
means that the compiler can assume @code{x}, set to @code{arg}, is at least
16-byte aligned, while:

@smallexample
void *x = __builtin_assume_aligned (arg, 32, 8);
@end smallexample

@noindent
means that the compiler can assume for @code{x}, set to @code{arg}, that
@code{(char *) x - 8} is 32-byte aligned.
@enddefbuiltin

@defbuiltin{int __builtin_LINE ()}
This function is the equivalent of the preprocessor @code{__LINE__}
macro and returns a constant integer expression that evaluates to
the line number of the invocation of the built-in.  When used as a C++
default argument for a function @var{F}, it returns the line number
of the call to @var{F}.
@enddefbuiltin

@defbuiltin{{const char *} __builtin_FUNCTION ()}
This function is the equivalent of the @code{__FUNCTION__} symbol
and returns an address constant pointing to the name of the function
from which the built-in was invoked, or the empty string if
the invocation is not at function scope.  When used as a C++ default
argument for a function @var{F}, it returns the name of @var{F}'s
caller or the empty string if the call was not made at function
scope.
@enddefbuiltin

@defbuiltin{{const char *} __builtin_FILE ()}
This function is the equivalent of the preprocessor @code{__FILE__}
macro and returns an address constant pointing to the file name
containing the invocation of the built-in, or the empty string if
the invocation is not at function scope.  When used as a C++ default
argument for a function @var{F}, it returns the file name of the call
to @var{F} or the empty string if the call was not made at function
scope.

For example, in the following, each call to function @code{foo} will
print a line similar to @code{"file.c:123: foo: message"} with the name
of the file and the line number of the @code{printf} call, the name of
the function @code{foo}, followed by the word @code{message}.

@smallexample
const char*
function (const char *func = __builtin_FUNCTION ())
@{
  return func;
@}

void foo (void)
@{
  printf ("%s:%i: %s: message\n", file (), line (), function ());
@}
@end smallexample

@enddefbuiltin

@defbuiltin{void __builtin___clear_cache (void *@var{begin}, void *@var{end})}
This function is used to flush the processor's instruction cache for
the region of memory between @var{begin} inclusive and @var{end}
exclusive.  Some targets require that the instruction cache be
flushed, after modifying memory containing code, in order to obtain
deterministic behavior.

If the target does not require instruction cache flushes,
@code{__builtin___clear_cache} has no effect.  Otherwise either
instructions are emitted in-line to clear the instruction cache or a
call to the @code{__clear_cache} function in libgcc is made.
@enddefbuiltin

@defbuiltin{void __builtin_prefetch (const void *@var{addr}, ...)}
This function is used to minimize cache-miss latency by moving data into
a cache before it is accessed.
You can insert calls to @code{__builtin_prefetch} into code for which
you know addresses of data in memory that is likely to be accessed soon.
If the target supports them, data prefetch instructions are generated.
If the prefetch is done early enough before the access then the data will
be in the cache by the time it is accessed.

The value of @var{addr} is the address of the memory to prefetch.
There are two optional arguments, @var{rw} and @var{locality}.
The value of @var{rw} is a compile-time constant one or zero; one
means that the prefetch is preparing for a write to the memory address
and zero, the default, means that the prefetch is preparing for a read.
The value @var{locality} must be a compile-time constant integer between
zero and three.  A value of zero means that the data has no temporal
locality, so it need not be left in the cache after the access.  A value
of three means that the data has a high degree of temporal locality and
should be left in all levels of cache possible.  Values of one and two
mean, respectively, a low or moderate degree of temporal locality.  The
default is three.

@smallexample
for (i = 0; i < n; i++)
  @{
    a[i] = a[i] + b[i];
    __builtin_prefetch (&a[i+j], 1, 1);
    __builtin_prefetch (&b[i+j], 0, 1);
    /* @r{@dots{}} */
  @}
@end smallexample

Data prefetch does not generate faults if @var{addr} is invalid, but
the address expression itself must be valid.  For example, a prefetch
of @code{p->next} does not fault if @code{p->next} is not a valid
address, but evaluation faults if @code{p} is not a valid address.

If the target does not support data prefetch, the address expression
is evaluated if it includes side effects but no other code is generated
and GCC does not issue a warning.
@enddefbuiltin

@defbuiltin{{size_t} __builtin_object_size (const void * @var{ptr}, int @var{type})}
Returns a constant size estimate of an object pointed to by @var{ptr}.
@xref{Object Size Checking}, for a detailed description of the function.
@enddefbuiltin

@defbuiltin{{size_t} __builtin_dynamic_object_size (const void * @var{ptr}, int @var{type})}
Similar to @code{__builtin_object_size} except that the return value
need not be a constant.  @xref{Object Size Checking}, for a detailed
description of the function.
@enddefbuiltin

@defbuiltin{int __builtin_classify_type (@var{arg})}
@defbuiltinx{int __builtin_classify_type (@var{type})}
The @code{__builtin_classify_type} returns a small integer with a category
of @var{arg} argument's type, like void type, integer type, enumeral type,
boolean type, pointer type, reference type, offset type, real type, complex
type, function type, method type, record type, union type, array type,
string type, bit-precise integer type, vector type, etc.  When the argument
is an expression, for backwards compatibility reason the argument is promoted
like arguments passed to @code{...} in varargs function, so some classes are
never returned in certain languages.  Alternatively, the argument of the
built-in function can be a typename, such as the @code{typeof} specifier.

@smallexample
int a[2];
__builtin_classify_type (a) == __builtin_classify_type (int[5]);
__builtin_classify_type (a) == __builtin_classify_type (void*);
__builtin_classify_type (typeof (a)) == __builtin_classify_type (int[5]);
@end smallexample

The first comparison will never be true, as @var{a} is implicitly converted
to pointer.  The last two comparisons will be true as they classify
pointers in the second case and arrays in the last case.
@enddefbuiltin

@defbuiltin{double __builtin_huge_val (void)}
Returns a positive infinity, if supported by the floating-point format,
else @code{DBL_MAX}.  This function is suitable for implementing the
ISO C macro @code{HUGE_VAL}.
@enddefbuiltin

@defbuiltin{float __builtin_huge_valf (void)}
Similar to @code{__builtin_huge_val}, except the return type is @code{float}.
@enddefbuiltin

@defbuiltin{{long double} __builtin_huge_vall (void)}
Similar to @code{__builtin_huge_val}, except the return
type is @code{long double}.
@enddefbuiltin

@defbuiltin{_Float@var{n} __builtin_huge_valf@var{n} (void)}
Similar to @code{__builtin_huge_val}, except the return type is
@code{_Float@var{n}}.
@enddefbuiltin

@defbuiltin{_Float@var{n}x __builtin_huge_valf@var{n}x (void)}
Similar to @code{__builtin_huge_val}, except the return type is
@code{_Float@var{n}x}.
@enddefbuiltin

@defbuiltin{int __builtin_fpclassify (int, int, int, int, int, ...)}
This built-in implements the C99 fpclassify functionality.  The first
five int arguments should be the target library's notion of the
possible FP classes and are used for return values.  They must be
constant values and they must appear in this order: @code{FP_NAN},
@code{FP_INFINITE}, @code{FP_NORMAL}, @code{FP_SUBNORMAL} and
@code{FP_ZERO}.  The ellipsis is for exactly one floating-point value
to classify.  GCC treats the last argument as type-generic, which
means it does not do default promotion from float to double.
@enddefbuiltin

@defbuiltin{double __builtin_inf (void)}
Similar to @code{__builtin_huge_val}, except a warning is generated
if the target floating-point format does not support infinities.
@enddefbuiltin

@defbuiltin{_Decimal32 __builtin_infd32 (void)}
Similar to @code{__builtin_inf}, except the return type is @code{_Decimal32}.
@enddefbuiltin

@defbuiltin{_Decimal64 __builtin_infd64 (void)}
Similar to @code{__builtin_inf}, except the return type is @code{_Decimal64}.
@enddefbuiltin

@defbuiltin{_Decimal128 __builtin_infd128 (void)}
Similar to @code{__builtin_inf}, except the return type is @code{_Decimal128}.
@enddefbuiltin

@defbuiltin{float __builtin_inff (void)}
Similar to @code{__builtin_inf}, except the return type is @code{float}.
This function is suitable for implementing the ISO C99 macro @code{INFINITY}.
@enddefbuiltin

@defbuiltin{{long double} __builtin_infl (void)}
Similar to @code{__builtin_inf}, except the return
type is @code{long double}.
@enddefbuiltin

@defbuiltin{_Float@var{n} __builtin_inff@var{n} (void)}
Similar to @code{__builtin_inf}, except the return
type is @code{_Float@var{n}}.
@enddefbuiltin

@defbuiltin{_Float@var{n} __builtin_inff@var{n}x (void)}
Similar to @code{__builtin_inf}, except the return
type is @code{_Float@var{n}x}.
@enddefbuiltin

@defbuiltin{int __builtin_isinf_sign (...)}
Similar to @code{isinf}, except the return value is -1 for
an argument of @code{-Inf} and 1 for an argument of @code{+Inf}.
Note while the parameter list is an
ellipsis, this function only accepts exactly one floating-point
argument.  GCC treats this parameter as type-generic, which means it
does not do default promotion from float to double.
@enddefbuiltin

@defbuiltin{double __builtin_nan (const char *@var{str})}
This is an implementation of the ISO C99 function @code{nan}.

Since ISO C99 defines this function in terms of @code{strtod}, which we
do not implement, a description of the parsing is in order.  The string
is parsed as by @code{strtol}; that is, the base is recognized by
leading @samp{0} or @samp{0x} prefixes.  The number parsed is placed
in the significand such that the least significant bit of the number
is at the least significant bit of the significand.  The number is
truncated to fit the significand field provided.  The significand is
forced to be a quiet NaN@.

This function, if given a string literal all of which would have been
consumed by @code{strtol}, is evaluated early enough that it is considered a
compile-time constant.
@enddefbuiltin

@defbuiltin{_Decimal32 __builtin_nand32 (const char *@var{str})}
Similar to @code{__builtin_nan}, except the return type is @code{_Decimal32}.
@enddefbuiltin

@defbuiltin{_Decimal64 __builtin_nand64 (const char *@var{str})}
Similar to @code{__builtin_nan}, except the return type is @code{_Decimal64}.
@enddefbuiltin

@defbuiltin{_Decimal128 __builtin_nand128 (const char *@var{str})}
Similar to @code{__builtin_nan}, except the return type is @code{_Decimal128}.
@enddefbuiltin

@defbuiltin{float __builtin_nanf (const char *@var{str})}
Similar to @code{__builtin_nan}, except the return type is @code{float}.
@enddefbuiltin

@defbuiltin{{long double} __builtin_nanl (const char *@var{str})}
Similar to @code{__builtin_nan}, except the return type is @code{long double}.
@enddefbuiltin

@defbuiltin{_Float@var{n} __builtin_nanf@var{n} (const char *@var{str})}
Similar to @code{__builtin_nan}, except the return type is
@code{_Float@var{n}}.
@enddefbuiltin

@defbuiltin{_Float@var{n}x __builtin_nanf@var{n}x (const char *@var{str})}
Similar to @code{__builtin_nan}, except the return type is
@code{_Float@var{n}x}.
@enddefbuiltin

@defbuiltin{double __builtin_nans (const char *@var{str})}
Similar to @code{__builtin_nan}, except the significand is forced
to be a signaling NaN@.  The @code{nans} function is proposed by
@uref{https://www.open-std.org/jtc1/sc22/wg14/www/docs/n965.htm,,WG14 N965}.
@enddefbuiltin

@defbuiltin{_Decimal32 __builtin_nansd32 (const char *@var{str})}
Similar to @code{__builtin_nans}, except the return type is @code{_Decimal32}.
@enddefbuiltin

@defbuiltin{_Decimal64 __builtin_nansd64 (const char *@var{str})}
Similar to @code{__builtin_nans}, except the return type is @code{_Decimal64}.
@enddefbuiltin

@defbuiltin{_Decimal128 __builtin_nansd128 (const char *@var{str})}
Similar to @code{__builtin_nans}, except the return type is @code{_Decimal128}.
@enddefbuiltin

@defbuiltin{float __builtin_nansf (const char *@var{str})}
Similar to @code{__builtin_nans}, except the return type is @code{float}.
@enddefbuiltin

@defbuiltin{{long double} __builtin_nansl (const char *@var{str})}
Similar to @code{__builtin_nans}, except the return type is @code{long double}.
@enddefbuiltin

@defbuiltin{_Float@var{n} __builtin_nansf@var{n} (const char *@var{str})}
Similar to @code{__builtin_nans}, except the return type is
@code{_Float@var{n}}.
@enddefbuiltin

@defbuiltin{_Float@var{n}x __builtin_nansf@var{n}x (const char *@var{str})}
Similar to @code{__builtin_nans}, except the return type is
@code{_Float@var{n}x}.
@enddefbuiltin

@defbuiltin{int __builtin_issignaling (...)}
Return non-zero if the argument is a signaling NaN and zero otherwise.
Note while the parameter list is an
ellipsis, this function only accepts exactly one floating-point
argument.  GCC treats this parameter as type-generic, which means it
does not do default promotion from float to double.
This built-in function can work even without the non-default
@code{-fsignaling-nans} option, although if a signaling NaN is computed,
stored or passed as argument to some function other than this built-in
in the current translation unit, it is safer to use @code{-fsignaling-nans}.
With @code{-ffinite-math-only} option this built-in function will always
return 0.
@enddefbuiltin

@defbuiltin{int __builtin_ffs (int @var{x})}
Returns one plus the index of the least significant 1-bit of @var{x}, or
if @var{x} is zero, returns zero.
@enddefbuiltin

@defbuiltin{int __builtin_clz (unsigned int @var{x})}
Returns the number of leading 0-bits in @var{x}, starting at the most
significant bit position.  If @var{x} is 0, the result is undefined.
@enddefbuiltin

@defbuiltin{int __builtin_ctz (unsigned int @var{x})}
Returns the number of trailing 0-bits in @var{x}, starting at the least
significant bit position.  If @var{x} is 0, the result is undefined.
@enddefbuiltin

@defbuiltin{int __builtin_clrsb (int @var{x})}
Returns the number of leading redundant sign bits in @var{x}, i.e.@: the
number of bits following the most significant bit that are identical
to it.  There are no special cases for 0 or other values. 
@enddefbuiltin

@defbuiltin{int __builtin_popcount (unsigned int @var{x})}
Returns the number of 1-bits in @var{x}.
@enddefbuiltin

@defbuiltin{int __builtin_parity (unsigned int @var{x})}
Returns the parity of @var{x}, i.e.@: the number of 1-bits in @var{x}
modulo 2.
@enddefbuiltin

@defbuiltin{int __builtin_ffsl (long)}
Similar to @code{__builtin_ffs}, except the argument type is
@code{long}.
@enddefbuiltin

@defbuiltin{int __builtin_clzl (unsigned long)}
Similar to @code{__builtin_clz}, except the argument type is
@code{unsigned long}.
@enddefbuiltin

@defbuiltin{int __builtin_ctzl (unsigned long)}
Similar to @code{__builtin_ctz}, except the argument type is
@code{unsigned long}.
@enddefbuiltin

@defbuiltin{int __builtin_clrsbl (long)}
Similar to @code{__builtin_clrsb}, except the argument type is
@code{long}.
@enddefbuiltin

@defbuiltin{int __builtin_popcountl (unsigned long)}
Similar to @code{__builtin_popcount}, except the argument type is
@code{unsigned long}.
@enddefbuiltin

@defbuiltin{int __builtin_parityl (unsigned long)}
Similar to @code{__builtin_parity}, except the argument type is
@code{unsigned long}.
@enddefbuiltin

@defbuiltin{int __builtin_ffsll (long long)}
Similar to @code{__builtin_ffs}, except the argument type is
@code{long long}.
@enddefbuiltin

@defbuiltin{int __builtin_clzll (unsigned long long)}
Similar to @code{__builtin_clz}, except the argument type is
@code{unsigned long long}.
@enddefbuiltin

@defbuiltin{int __builtin_ctzll (unsigned long long)}
Similar to @code{__builtin_ctz}, except the argument type is
@code{unsigned long long}.
@enddefbuiltin

@defbuiltin{int __builtin_clrsbll (long long)}
Similar to @code{__builtin_clrsb}, except the argument type is
@code{long long}.
@enddefbuiltin

@defbuiltin{int __builtin_popcountll (unsigned long long)}
Similar to @code{__builtin_popcount}, except the argument type is
@code{unsigned long long}.
@enddefbuiltin

@defbuiltin{int __builtin_parityll (unsigned long long)}
Similar to @code{__builtin_parity}, except the argument type is
@code{unsigned long long}.
@enddefbuiltin

@defbuiltin{int __builtin_ffsg (...)}
Similar to @code{__builtin_ffs}, except the argument is type-generic
signed integer (standard, extended or bit-precise).  No integral argument
promotions are performed on the argument.
@enddefbuiltin

@defbuiltin{int __builtin_clzg (...)}
Similar to @code{__builtin_clz}, except the argument is type-generic
unsigned integer (standard, extended or bit-precise) and there is
optional second argument with int type.  No integral argument promotions
are performed on the first argument.  If two arguments are specified,
and first argument is 0, the result is the second argument.  If only
one argument is specified and it is 0, the result is undefined.
@enddefbuiltin

@defbuiltin{int __builtin_ctzg (...)}
Similar to @code{__builtin_ctz}, except the argument is type-generic
unsigned integer (standard, extended or bit-precise) and there is
optional second argument with int type.  No integral argument promotions
are performed on the first argument.  If two arguments are specified,
and first argument is 0, the result is the second argument.  If only
one argument is specified and it is 0, the result is undefined.
@enddefbuiltin

@defbuiltin{int __builtin_clrsbg (...)}
Similar to @code{__builtin_clrsb}, except the argument is type-generic
signed integer (standard, extended or bit-precise).  No integral argument
promotions are performed on the argument.
@enddefbuiltin

@defbuiltin{int __builtin_popcountg (...)}
Similar to @code{__builtin_popcount}, except the argument is type-generic
unsigned integer (standard, extended or bit-precise).  No integral argument
promotions are performed on the argument.
@enddefbuiltin

@defbuiltin{int __builtin_parityg (...)}
Similar to @code{__builtin_parity}, except the argument is type-generic
unsigned integer (standard, extended or bit-precise).  No integral argument
promotions are performed on the argument.
@enddefbuiltin

@defbuiltin{@var{type} __builtin_stdc_bit_ceil (@var{type} @var{arg})}
The @code{__builtin_stdc_bit_ceil} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{@var{arg} <= 1 ? (@var{type}) 1
: (@var{type}) 2 << (@var{prec} - 1 - __builtin_clzg ((@var{type}) (@var{arg} - 1)))}
where @var{prec} is bit width of @var{type}, except that side-effects
in @var{arg} are evaluated just once.
@enddefbuiltin

@defbuiltin{@var{type} __builtin_stdc_bit_floor (@var{type} @var{arg})}
The @code{__builtin_stdc_bit_floor} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{@var{arg} == 0 ? (@var{type}) 0
: (@var{type}) 1 << (@var{prec} - 1 - __builtin_clzg (@var{arg}))}
where @var{prec} is bit width of @var{type}, except that side-effects
in @var{arg} are evaluated just once.
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_stdc_bit_width (@var{type} @var{arg})}
The @code{__builtin_stdc_bit_width} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{(unsigned int) (@var{prec} - __builtin_clzg (@var{arg}, @var{prec}))}
where @var{prec} is bit width of @var{type}.
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_stdc_count_ones (@var{type} @var{arg})}
The @code{__builtin_stdc_count_ones} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{(unsigned int) __builtin_popcountg (@var{arg})}
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_stdc_count_zeros (@var{type} @var{arg})}
The @code{__builtin_stdc_count_zeros} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{(unsigned int) __builtin_popcountg ((@var{type}) ~@var{arg})}
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_stdc_first_leading_one (@var{type} @var{arg})}
The @code{__builtin_stdc_first_leading_one} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{__builtin_clzg (@var{arg}, -1) + 1U}
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_stdc_first_leading_zero (@var{type} @var{arg})}
The @code{__builtin_stdc_first_leading_zero} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{__builtin_clzg ((@var{type}) ~@var{arg}, -1) + 1U}
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_stdc_first_trailing_one (@var{type} @var{arg})}
The @code{__builtin_stdc_first_trailing_one} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{__builtin_ctzg (@var{arg}, -1) + 1U}
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_stdc_first_trailing_zero (@var{type} @var{arg})}
The @code{__builtin_stdc_first_trailing_zero} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{__builtin_ctzg ((@var{type}) ~@var{arg}, -1) + 1U}
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_stdc_has_single_bit (@var{type} @var{arg})}
The @code{__builtin_stdc_has_single_bit} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{(_Bool) (__builtin_popcountg (@var{arg}) == 1)}
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_stdc_leading_ones (@var{type} @var{arg})}
The @code{__builtin_stdc_leading_ones} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{(unsigned int) __builtin_clzg ((@var{type}) ~@var{arg}, @var{prec})}
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_stdc_leading_zeros (@var{type} @var{arg})}
The @code{__builtin_stdc_leading_zeros} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{(unsigned int) __builtin_clzg (@var{arg}, @var{prec})}
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_stdc_trailing_ones (@var{type} @var{arg})}
The @code{__builtin_stdc_trailing_ones} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{(unsigned int) __builtin_ctzg ((@var{type}) ~@var{arg}, @var{prec})}
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_stdc_trailing_zeros (@var{type} @var{arg})}
The @code{__builtin_stdc_trailing_zeros} function is available only
in C.  It is type-generic, the argument can be any unsigned integer
(standard, extended or bit-precise).  No integral argument promotions are
performed on the argument.  It is equivalent to
@code{(unsigned int) __builtin_ctzg (@var{arg}, @var{prec})}
@enddefbuiltin

@defbuiltin{double __builtin_powi (double, int)}
@defbuiltinx{float __builtin_powif (float, int)}
@defbuiltinx{{long double} __builtin_powil (long double, int)}
Returns the first argument raised to the power of the second.  Unlike the
@code{pow} function no guarantees about precision and rounding are made.
@enddefbuiltin

@defbuiltin{uint16_t __builtin_bswap16 (uint16_t @var{x})}
Returns @var{x} with the order of the bytes reversed; for example,
@code{0xaabb} becomes @code{0xbbaa}.  Byte here always means
exactly 8 bits.
@enddefbuiltin

@defbuiltin{uint32_t __builtin_bswap32 (uint32_t @var{x})}
Similar to @code{__builtin_bswap16}, except the argument and return types
are 32-bit.
@enddefbuiltin

@defbuiltin{uint64_t __builtin_bswap64 (uint64_t @var{x})}
Similar to @code{__builtin_bswap32}, except the argument and return types
are 64-bit.
@enddefbuiltin

@defbuiltin{uint128_t __builtin_bswap128 (uint128_t @var{x})}
Similar to @code{__builtin_bswap64}, except the argument and return types
are 128-bit.  Only supported on targets when 128-bit types are supported.
@enddefbuiltin


@defbuiltin{Pmode __builtin_extend_pointer (void * @var{x})}
On targets where the user visible pointer size is smaller than the size
of an actual hardware address this function returns the extended user
pointer.  Targets where this is true included ILP32 mode on x86_64 or
Aarch64.  This function is mainly useful when writing inline assembly
code.
@enddefbuiltin

@defbuiltin{int __builtin_goacc_parlevel_id (int @var{x})}
Returns the openacc gang, worker or vector id depending on whether @var{x} is
0, 1 or 2.
@enddefbuiltin

@defbuiltin{int __builtin_goacc_parlevel_size (int @var{x})}
Returns the openacc gang, worker or vector size depending on whether @var{x} is
0, 1 or 2.
@enddefbuiltin

@node Target Builtins
@section Built-in Functions Specific to Particular Target Machines

On some target machines, GCC supports many built-in functions specific
to those machines.  Generally these generate calls to specific machine
instructions, but allow the compiler to schedule those calls.

@menu
* AArch64 Built-in Functions::
* Alpha Built-in Functions::
* Altera Nios II Built-in Functions::
* ARC Built-in Functions::
* ARC SIMD Built-in Functions::
* ARM iWMMXt Built-in Functions::
* ARM C Language Extensions (ACLE)::
* ARM Floating Point Status and Control Intrinsics::
* ARM ARMv8-M Security Extensions::
* AVR Built-in Functions::
* Blackfin Built-in Functions::
* BPF Built-in Functions::
* FR-V Built-in Functions::
* LoongArch Base Built-in Functions::
* LoongArch SX Vector Intrinsics::
* LoongArch ASX Vector Intrinsics::
* MIPS DSP Built-in Functions::
* MIPS Paired-Single Support::
* MIPS Loongson Built-in Functions::
* MIPS SIMD Architecture (MSA) Support::
* Other MIPS Built-in Functions::
* MSP430 Built-in Functions::
* NDS32 Built-in Functions::
* Nvidia PTX Built-in Functions::
* Basic PowerPC Built-in Functions::
* PowerPC AltiVec/VSX Built-in Functions::
* PowerPC Hardware Transactional Memory Built-in Functions::
* PowerPC Atomic Memory Operation Functions::
* PowerPC Matrix-Multiply Assist Built-in Functions::
* PRU Built-in Functions::
* RISC-V Built-in Functions::
* RISC-V Vector Intrinsics::
* CORE-V Built-in Functions::
* RX Built-in Functions::
* S/390 System z Built-in Functions::
* SH Built-in Functions::
* SPARC VIS Built-in Functions::
* TI C6X Built-in Functions::
* x86 Built-in Functions::
* x86 transactional memory intrinsics::
* x86 control-flow protection intrinsics::
@end menu

@node AArch64 Built-in Functions
@subsection AArch64 Built-in Functions

These built-in functions are available for the AArch64 family of
processors.
@smallexample
unsigned int __builtin_aarch64_get_fpcr ();
void __builtin_aarch64_set_fpcr (unsigned int);
unsigned int __builtin_aarch64_get_fpsr ();
void __builtin_aarch64_set_fpsr (unsigned int);

unsigned long long __builtin_aarch64_get_fpcr64 ();
void __builtin_aarch64_set_fpcr64 (unsigned long long);
unsigned long long __builtin_aarch64_get_fpsr64 ();
void __builtin_aarch64_set_fpsr64 (unsigned long long);
@end smallexample

@node Alpha Built-in Functions
@subsection Alpha Built-in Functions

These built-in functions are available for the Alpha family of
processors, depending on the command-line switches used.

The following built-in functions are always available.  They
all generate the machine instruction that is part of the name.

@smallexample
long __builtin_alpha_implver (void);
long __builtin_alpha_rpcc (void);
long __builtin_alpha_amask (long);
long __builtin_alpha_cmpbge (long, long);
long __builtin_alpha_extbl (long, long);
long __builtin_alpha_extwl (long, long);
long __builtin_alpha_extll (long, long);
long __builtin_alpha_extql (long, long);
long __builtin_alpha_extwh (long, long);
long __builtin_alpha_extlh (long, long);
long __builtin_alpha_extqh (long, long);
long __builtin_alpha_insbl (long, long);
long __builtin_alpha_inswl (long, long);
long __builtin_alpha_insll (long, long);
long __builtin_alpha_insql (long, long);
long __builtin_alpha_inswh (long, long);
long __builtin_alpha_inslh (long, long);
long __builtin_alpha_insqh (long, long);
long __builtin_alpha_mskbl (long, long);
long __builtin_alpha_mskwl (long, long);
long __builtin_alpha_mskll (long, long);
long __builtin_alpha_mskql (long, long);
long __builtin_alpha_mskwh (long, long);
long __builtin_alpha_msklh (long, long);
long __builtin_alpha_mskqh (long, long);
long __builtin_alpha_umulh (long, long);
long __builtin_alpha_zap (long, long);
long __builtin_alpha_zapnot (long, long);
@end smallexample

The following built-in functions are always with @option{-mmax}
or @option{-mcpu=@var{cpu}} where @var{cpu} is @code{pca56} or
later.  They all generate the machine instruction that is part
of the name.

@smallexample
long __builtin_alpha_pklb (long);
long __builtin_alpha_pkwb (long);
long __builtin_alpha_unpkbl (long);
long __builtin_alpha_unpkbw (long);
long __builtin_alpha_minub8 (long, long);
long __builtin_alpha_minsb8 (long, long);
long __builtin_alpha_minuw4 (long, long);
long __builtin_alpha_minsw4 (long, long);
long __builtin_alpha_maxub8 (long, long);
long __builtin_alpha_maxsb8 (long, long);
long __builtin_alpha_maxuw4 (long, long);
long __builtin_alpha_maxsw4 (long, long);
long __builtin_alpha_perr (long, long);
@end smallexample

The following built-in functions are always with @option{-mcix}
or @option{-mcpu=@var{cpu}} where @var{cpu} is @code{ev67} or
later.  They all generate the machine instruction that is part
of the name.

@smallexample
long __builtin_alpha_cttz (long);
long __builtin_alpha_ctlz (long);
long __builtin_alpha_ctpop (long);
@end smallexample

The following built-in functions are available on systems that use the OSF/1
PALcode.  Normally they invoke the @code{rduniq} and @code{wruniq}
PAL calls, but when invoked with @option{-mtls-kernel}, they invoke
@code{rdval} and @code{wrval}.

@smallexample
void *__builtin_thread_pointer (void);
void __builtin_set_thread_pointer (void *);
@end smallexample

@node Altera Nios II Built-in Functions
@subsection Altera Nios II Built-in Functions

These built-in functions are available for the Altera Nios II
family of processors.

The following built-in functions are always available.  They
all generate the machine instruction that is part of the name.

@example
int __builtin_ldbio (volatile const void *);
int __builtin_ldbuio (volatile const void *);
int __builtin_ldhio (volatile const void *);
int __builtin_ldhuio (volatile const void *);
int __builtin_ldwio (volatile const void *);
void __builtin_stbio (volatile void *, int);
void __builtin_sthio (volatile void *, int);
void __builtin_stwio (volatile void *, int);
void __builtin_sync (void);
int __builtin_rdctl (int);
int __builtin_rdprs (int, int);
void __builtin_wrctl (int, int);
void __builtin_flushd (volatile void *);
void __builtin_flushda (volatile void *);
int __builtin_wrpie (int);
void __builtin_eni (int);
int __builtin_ldex (volatile const void *);
int __builtin_stex (volatile void *, int);
int __builtin_ldsex (volatile const void *);
int __builtin_stsex (volatile void *, int);
@end example

The following built-in functions are always available.  They
all generate a Nios II Custom Instruction. The name of the
function represents the types that the function takes and
returns. The letter before the @code{n} is the return type
or void if absent. The @code{n} represents the first parameter
to all the custom instructions, the custom instruction number.
The two letters after the @code{n} represent the up to two
parameters to the function.

The letters represent the following data types:
@table @code
@item <no letter>
@code{void} for return type and no parameter for parameter types.

@item i
@code{int} for return type and parameter type

@item f
@code{float} for return type and parameter type

@item p
@code{void *} for return type and parameter type

@end table

And the function names are:
@example
void __builtin_custom_n (void);
void __builtin_custom_ni (int);
void __builtin_custom_nf (float);
void __builtin_custom_np (void *);
void __builtin_custom_nii (int, int);
void __builtin_custom_nif (int, float);
void __builtin_custom_nip (int, void *);
void __builtin_custom_nfi (float, int);
void __builtin_custom_nff (float, float);
void __builtin_custom_nfp (float, void *);
void __builtin_custom_npi (void *, int);
void __builtin_custom_npf (void *, float);
void __builtin_custom_npp (void *, void *);
int __builtin_custom_in (void);
int __builtin_custom_ini (int);
int __builtin_custom_inf (float);
int __builtin_custom_inp (void *);
int __builtin_custom_inii (int, int);
int __builtin_custom_inif (int, float);
int __builtin_custom_inip (int, void *);
int __builtin_custom_infi (float, int);
int __builtin_custom_inff (float, float);
int __builtin_custom_infp (float, void *);
int __builtin_custom_inpi (void *, int);
int __builtin_custom_inpf (void *, float);
int __builtin_custom_inpp (void *, void *);
float __builtin_custom_fn (void);
float __builtin_custom_fni (int);
float __builtin_custom_fnf (float);
float __builtin_custom_fnp (void *);
float __builtin_custom_fnii (int, int);
float __builtin_custom_fnif (int, float);
float __builtin_custom_fnip (int, void *);
float __builtin_custom_fnfi (float, int);
float __builtin_custom_fnff (float, float);
float __builtin_custom_fnfp (float, void *);
float __builtin_custom_fnpi (void *, int);
float __builtin_custom_fnpf (void *, float);
float __builtin_custom_fnpp (void *, void *);
void * __builtin_custom_pn (void);
void * __builtin_custom_pni (int);
void * __builtin_custom_pnf (float);
void * __builtin_custom_pnp (void *);
void * __builtin_custom_pnii (int, int);
void * __builtin_custom_pnif (int, float);
void * __builtin_custom_pnip (int, void *);
void * __builtin_custom_pnfi (float, int);
void * __builtin_custom_pnff (float, float);
void * __builtin_custom_pnfp (float, void *);
void * __builtin_custom_pnpi (void *, int);
void * __builtin_custom_pnpf (void *, float);
void * __builtin_custom_pnpp (void *, void *);
@end example

@node ARC Built-in Functions
@subsection ARC Built-in Functions

The following built-in functions are provided for ARC targets.  The
built-ins generate the corresponding assembly instructions.  In the
examples given below, the generated code often requires an operand or
result to be in a register.  Where necessary further code will be
generated to ensure this is true, but for brevity this is not
described in each case.

@emph{Note:} Using a built-in to generate an instruction not supported
by a target may cause problems. At present the compiler is not
guaranteed to detect such misuse, and as a result an internal compiler
error may be generated.

@defbuiltin{int __builtin_arc_aligned (void *@var{val}, int @var{alignval})}
Return 1 if @var{val} is known to have the byte alignment given
by @var{alignval}, otherwise return 0.
Note that this is different from
@smallexample
__alignof__(*(char *)@var{val}) >= alignval
@end smallexample
because __alignof__ sees only the type of the dereference, whereas
__builtin_arc_align uses alignment information from the pointer
as well as from the pointed-to type.
The information available will depend on optimization level.
@enddefbuiltin

@defbuiltin{void __builtin_arc_brk (void)}
Generates
@example
brk
@end example
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_arc_core_read (unsigned int @var{regno})}
The operand is the number of a register to be read.  Generates:
@example
mov  @var{dest}, r@var{regno}
@end example
where the value in @var{dest} will be the result returned from the
built-in.
@enddefbuiltin

@defbuiltin{void __builtin_arc_core_write (unsigned int @var{regno}, unsigned int @var{val})}
The first operand is the number of a register to be written, the
second operand is a compile time constant to write into that
register.  Generates:
@example
mov  r@var{regno}, @var{val}
@end example
@enddefbuiltin

@defbuiltin{int __builtin_arc_divaw (int @var{a}, int @var{b})}
Only available if either @option{-mcpu=ARC700} or @option{-meA} is set.
Generates:
@example
divaw  @var{dest}, @var{a}, @var{b}
@end example
where the value in @var{dest} will be the result returned from the
built-in.
@enddefbuiltin

@defbuiltin{void __builtin_arc_flag (unsigned int @var{a})}
Generates
@example
flag  @var{a}
@end example
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_arc_lr (unsigned int @var{auxr})}
The operand, @var{auxv}, is the address of an auxiliary register and
must be a compile time constant.  Generates:
@example
lr  @var{dest}, [@var{auxr}]
@end example
Where the value in @var{dest} will be the result returned from the
built-in.
@enddefbuiltin

@defbuiltin{void __builtin_arc_mul64 (int @var{a}, int @var{b})}
Only available with @option{-mmul64}.  Generates:
@example
mul64  @var{a}, @var{b}
@end example
@enddefbuiltin

@defbuiltin{void __builtin_arc_mulu64 (unsigned int @var{a}, unsigned int @var{b})}
Only available with @option{-mmul64}.  Generates:
@example
mulu64  @var{a}, @var{b}
@end example
@enddefbuiltin

@defbuiltin{void __builtin_arc_nop (void)}
Generates:
@example
nop
@end example
@enddefbuiltin

@defbuiltin{int __builtin_arc_norm (int @var{src})}
Only valid if the @samp{norm} instruction is available through the
@option{-mnorm} option or by default with @option{-mcpu=ARC700}.
Generates:
@example
norm  @var{dest}, @var{src}
@end example
Where the value in @var{dest} will be the result returned from the
built-in.
@enddefbuiltin

@defbuiltin{{short int} __builtin_arc_normw (short int @var{src})}
Only valid if the @samp{normw} instruction is available through the
@option{-mnorm} option or by default with @option{-mcpu=ARC700}.
Generates:
@example
normw  @var{dest}, @var{src}
@end example
Where the value in @var{dest} will be the result returned from the
built-in.
@enddefbuiltin

@defbuiltin{void __builtin_arc_rtie (void)}
Generates:
@example
rtie
@end example
@enddefbuiltin

@defbuiltin{void __builtin_arc_sleep (int @var{a}}
Generates:
@example
sleep  @var{a}
@end example
@enddefbuiltin

@defbuiltin{void __builtin_arc_sr (unsigned int @var{val}, unsigned int @var{auxr})}
The first argument, @var{val}, is a compile time constant to be
written to the register, the second argument, @var{auxr}, is the
address of an auxiliary register.  Generates:
@example
sr  @var{val}, [@var{auxr}]
@end example
@enddefbuiltin

@defbuiltin{int __builtin_arc_swap (int @var{src})}
Only valid with @option{-mswap}.  Generates:
@example
swap  @var{dest}, @var{src}
@end example
Where the value in @var{dest} will be the result returned from the
built-in.
@enddefbuiltin

@defbuiltin{void __builtin_arc_swi (void)}
Generates:
@example
swi
@end example
@enddefbuiltin

@defbuiltin{void __builtin_arc_sync (void)}
Only available with @option{-mcpu=ARC700}.  Generates:
@example
sync
@end example
@enddefbuiltin

@defbuiltin{void __builtin_arc_trap_s (unsigned int @var{c})}
Only available with @option{-mcpu=ARC700}.  Generates:
@example
trap_s  @var{c}
@end example
@enddefbuiltin

@defbuiltin{void __builtin_arc_unimp_s (void)}
Only available with @option{-mcpu=ARC700}.  Generates:
@example
unimp_s
@end example
@enddefbuiltin

The instructions generated by the following builtins are not
considered as candidates for scheduling.  They are not moved around by
the compiler during scheduling, and thus can be expected to appear
where they are put in the C code:
@example
__builtin_arc_brk()
__builtin_arc_core_read()
__builtin_arc_core_write()
__builtin_arc_flag()
__builtin_arc_lr()
__builtin_arc_sleep()
__builtin_arc_sr()
__builtin_arc_swi()
@end example

The following built-in functions are available for the ARCv2 family of
processors.

@example
int __builtin_arc_clri ();
void __builtin_arc_kflag (unsigned);
void __builtin_arc_seti (int);
@end example

The following built-in functions are available for the ARCv2 family
and uses @option{-mnorm}.

@example
int __builtin_arc_ffs (int);
int __builtin_arc_fls (int);
@end example

@node ARC SIMD Built-in Functions
@subsection ARC SIMD Built-in Functions

SIMD builtins provided by the compiler can be used to generate the
vector instructions.  This section describes the available builtins
and their usage in programs.  With the @option{-msimd} option, the
compiler provides 128-bit vector types, which can be specified using
the @code{vector_size} attribute.  The header file @file{arc-simd.h}
can be included to use the following predefined types:
@example
typedef int __v4si   __attribute__((vector_size(16)));
typedef short __v8hi __attribute__((vector_size(16)));
@end example

These types can be used to define 128-bit variables.  The built-in
functions listed in the following section can be used on these
variables to generate the vector operations.

For all builtins, @code{__builtin_arc_@var{someinsn}}, the header file
@file{arc-simd.h} also provides equivalent macros called
@code{_@var{someinsn}} that can be used for programming ease and
improved readability.  The following macros for DMA control are also
provided:
@example
#define _setup_dma_in_channel_reg _vdiwr
#define _setup_dma_out_channel_reg _vdowr
@end example

The following is a complete list of all the SIMD built-ins provided
for ARC, grouped by calling signature.

The following take two @code{__v8hi} arguments and return a
@code{__v8hi} result:
@example
__v8hi __builtin_arc_vaddaw (__v8hi, __v8hi);
__v8hi __builtin_arc_vaddw (__v8hi, __v8hi);
__v8hi __builtin_arc_vand (__v8hi, __v8hi);
__v8hi __builtin_arc_vandaw (__v8hi, __v8hi);
__v8hi __builtin_arc_vavb (__v8hi, __v8hi);
__v8hi __builtin_arc_vavrb (__v8hi, __v8hi);
__v8hi __builtin_arc_vbic (__v8hi, __v8hi);
__v8hi __builtin_arc_vbicaw (__v8hi, __v8hi);
__v8hi __builtin_arc_vdifaw (__v8hi, __v8hi);
__v8hi __builtin_arc_vdifw (__v8hi, __v8hi);
__v8hi __builtin_arc_veqw (__v8hi, __v8hi);
__v8hi __builtin_arc_vh264f (__v8hi, __v8hi);
__v8hi __builtin_arc_vh264ft (__v8hi, __v8hi);
__v8hi __builtin_arc_vh264fw (__v8hi, __v8hi);
__v8hi __builtin_arc_vlew (__v8hi, __v8hi);
__v8hi __builtin_arc_vltw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmaxaw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmaxw (__v8hi, __v8hi);
__v8hi __builtin_arc_vminaw (__v8hi, __v8hi);
__v8hi __builtin_arc_vminw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr1aw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr1w (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr2aw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr2w (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr3aw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr3w (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr4aw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr4w (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr5aw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr5w (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr6aw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr6w (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr7aw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmr7w (__v8hi, __v8hi);
__v8hi __builtin_arc_vmrb (__v8hi, __v8hi);
__v8hi __builtin_arc_vmulaw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmulfaw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmulfw (__v8hi, __v8hi);
__v8hi __builtin_arc_vmulw (__v8hi, __v8hi);
__v8hi __builtin_arc_vnew (__v8hi, __v8hi);
__v8hi __builtin_arc_vor (__v8hi, __v8hi);
__v8hi __builtin_arc_vsubaw (__v8hi, __v8hi);
__v8hi __builtin_arc_vsubw (__v8hi, __v8hi);
__v8hi __builtin_arc_vsummw (__v8hi, __v8hi);
__v8hi __builtin_arc_vvc1f (__v8hi, __v8hi);
__v8hi __builtin_arc_vvc1ft (__v8hi, __v8hi);
__v8hi __builtin_arc_vxor (__v8hi, __v8hi);
__v8hi __builtin_arc_vxoraw (__v8hi, __v8hi);
@end example

The following take one @code{__v8hi} and one @code{int} argument and return a
@code{__v8hi} result:

@example
__v8hi __builtin_arc_vbaddw (__v8hi, int);
__v8hi __builtin_arc_vbmaxw (__v8hi, int);
__v8hi __builtin_arc_vbminw (__v8hi, int);
__v8hi __builtin_arc_vbmulaw (__v8hi, int);
__v8hi __builtin_arc_vbmulfw (__v8hi, int);
__v8hi __builtin_arc_vbmulw (__v8hi, int);
__v8hi __builtin_arc_vbrsubw (__v8hi, int);
__v8hi __builtin_arc_vbsubw (__v8hi, int);
@end example

The following take one @code{__v8hi} argument and one @code{int} argument which
must be a 3-bit compile time constant indicating a register number
I0-I7.  They return a @code{__v8hi} result.
@example
__v8hi __builtin_arc_vasrw (__v8hi, const int);
__v8hi __builtin_arc_vsr8 (__v8hi, const int);
__v8hi __builtin_arc_vsr8aw (__v8hi, const int);
@end example

The following take one @code{__v8hi} argument and one @code{int}
argument which must be a 6-bit compile time constant.  They return a
@code{__v8hi} result.
@example
__v8hi __builtin_arc_vasrpwbi (__v8hi, const int);
__v8hi __builtin_arc_vasrrpwbi (__v8hi, const int);
__v8hi __builtin_arc_vasrrwi (__v8hi, const int);
__v8hi __builtin_arc_vasrsrwi (__v8hi, const int);
__v8hi __builtin_arc_vasrwi (__v8hi, const int);
__v8hi __builtin_arc_vsr8awi (__v8hi, const int);
__v8hi __builtin_arc_vsr8i (__v8hi, const int);
@end example

The following take one @code{__v8hi} argument and one @code{int} argument which
must be a 8-bit compile time constant.  They return a @code{__v8hi}
result.
@example
__v8hi __builtin_arc_vd6tapf (__v8hi, const int);
__v8hi __builtin_arc_vmvaw (__v8hi, const int);
__v8hi __builtin_arc_vmvw (__v8hi, const int);
__v8hi __builtin_arc_vmvzw (__v8hi, const int);
@end example

The following take two @code{int} arguments, the second of which which
must be a 8-bit compile time constant.  They return a @code{__v8hi}
result:
@example
__v8hi __builtin_arc_vmovaw (int, const int);
__v8hi __builtin_arc_vmovw (int, const int);
__v8hi __builtin_arc_vmovzw (int, const int);
@end example

The following take a single @code{__v8hi} argument and return a
@code{__v8hi} result:
@example
__v8hi __builtin_arc_vabsaw (__v8hi);
__v8hi __builtin_arc_vabsw (__v8hi);
__v8hi __builtin_arc_vaddsuw (__v8hi);
__v8hi __builtin_arc_vexch1 (__v8hi);
__v8hi __builtin_arc_vexch2 (__v8hi);
__v8hi __builtin_arc_vexch4 (__v8hi);
__v8hi __builtin_arc_vsignw (__v8hi);
__v8hi __builtin_arc_vupbaw (__v8hi);
__v8hi __builtin_arc_vupbw (__v8hi);
__v8hi __builtin_arc_vupsbaw (__v8hi);
__v8hi __builtin_arc_vupsbw (__v8hi);
@end example

The following take two @code{int} arguments and return no result:
@example
void __builtin_arc_vdirun (int, int);
void __builtin_arc_vdorun (int, int);
@end example

The following take two @code{int} arguments and return no result.  The
first argument must a 3-bit compile time constant indicating one of
the DR0-DR7 DMA setup channels:
@example
void __builtin_arc_vdiwr (const int, int);
void __builtin_arc_vdowr (const int, int);
@end example

The following take an @code{int} argument and return no result:
@example
void __builtin_arc_vendrec (int);
void __builtin_arc_vrec (int);
void __builtin_arc_vrecrun (int);
void __builtin_arc_vrun (int);
@end example

The following take a @code{__v8hi} argument and two @code{int}
arguments and return a @code{__v8hi} result.  The second argument must
be a 3-bit compile time constants, indicating one the registers I0-I7,
and the third argument must be an 8-bit compile time constant.

@emph{Note:} Although the equivalent hardware instructions do not take
an SIMD register as an operand, these builtins overwrite the relevant
bits of the @code{__v8hi} register provided as the first argument with
the value loaded from the @code{[Ib, u8]} location in the SDM.

@example
__v8hi __builtin_arc_vld32 (__v8hi, const int, const int);
__v8hi __builtin_arc_vld32wh (__v8hi, const int, const int);
__v8hi __builtin_arc_vld32wl (__v8hi, const int, const int);
__v8hi __builtin_arc_vld64 (__v8hi, const int, const int);
@end example

The following take two @code{int} arguments and return a @code{__v8hi}
result.  The first argument must be a 3-bit compile time constants,
indicating one the registers I0-I7, and the second argument must be an
8-bit compile time constant.

@example
__v8hi __builtin_arc_vld128 (const int, const int);
__v8hi __builtin_arc_vld64w (const int, const int);
@end example

The following take a @code{__v8hi} argument and two @code{int}
arguments and return no result.  The second argument must be a 3-bit
compile time constants, indicating one the registers I0-I7, and the
third argument must be an 8-bit compile time constant.

@example
void __builtin_arc_vst128 (__v8hi, const int, const int);
void __builtin_arc_vst64 (__v8hi, const int, const int);
@end example

The following take a @code{__v8hi} argument and three @code{int}
arguments and return no result.  The second argument must be a 3-bit
compile-time constant, identifying the 16-bit sub-register to be
stored, the third argument must be a 3-bit compile time constants,
indicating one the registers I0-I7, and the fourth argument must be an
8-bit compile time constant.

@example
void __builtin_arc_vst16_n (__v8hi, const int, const int, const int);
void __builtin_arc_vst32_n (__v8hi, const int, const int, const int);
@end example

The following built-in functions are available on systems that uses
@option{-mmpy-option=6} or higher.

@example
__v2hi __builtin_arc_dmach (__v2hi, __v2hi);
__v2hi __builtin_arc_dmachu (__v2hi, __v2hi);
__v2hi __builtin_arc_dmpyh (__v2hi, __v2hi);
__v2hi __builtin_arc_dmpyhu (__v2hi, __v2hi);
__v2hi __builtin_arc_vaddsub2h (__v2hi, __v2hi);
__v2hi __builtin_arc_vsubadd2h (__v2hi, __v2hi);
@end example

The following built-in functions are available on systems that uses
@option{-mmpy-option=7} or higher.

@example
__v2si __builtin_arc_vmac2h (__v2hi, __v2hi);
__v2si __builtin_arc_vmac2hu (__v2hi, __v2hi);
__v2si __builtin_arc_vmpy2h (__v2hi, __v2hi);
__v2si __builtin_arc_vmpy2hu (__v2hi, __v2hi);
@end example

The following built-in functions are available on systems that uses
@option{-mmpy-option=8} or higher.

@example
long long __builtin_arc_qmach (__v4hi, __v4hi);
long long __builtin_arc_qmachu (__v4hi, __v4hi);
long long __builtin_arc_qmpyh (__v4hi, __v4hi);
long long __builtin_arc_qmpyhu (__v4hi, __v4hi);
long long __builtin_arc_dmacwh (__v2si, __v2hi);
long long __builtin_arc_dmacwhu (__v2si, __v2hi);
_v2si __builtin_arc_vaddsub (__v2si, __v2si);
_v2si __builtin_arc_vsubadd (__v2si, __v2si);
_v4hi __builtin_arc_vaddsub4h (__v4hi, __v4hi);
_v4hi __builtin_arc_vsubadd4h (__v4hi, __v4hi);
@end example

@node ARM iWMMXt Built-in Functions
@subsection ARM iWMMXt Built-in Functions

These built-in functions are available for the ARM family of
processors when the @option{-mcpu=iwmmxt} switch is used:

@smallexample
typedef int v2si __attribute__ ((vector_size (8)));
typedef short v4hi __attribute__ ((vector_size (8)));
typedef char v8qi __attribute__ ((vector_size (8)));

int __builtin_arm_getwcgr0 (void);
void __builtin_arm_setwcgr0 (int);
int __builtin_arm_getwcgr1 (void);
void __builtin_arm_setwcgr1 (int);
int __builtin_arm_getwcgr2 (void);
void __builtin_arm_setwcgr2 (int);
int __builtin_arm_getwcgr3 (void);
void __builtin_arm_setwcgr3 (int);
int __builtin_arm_textrmsb (v8qi, int);
int __builtin_arm_textrmsh (v4hi, int);
int __builtin_arm_textrmsw (v2si, int);
int __builtin_arm_textrmub (v8qi, int);
int __builtin_arm_textrmuh (v4hi, int);
int __builtin_arm_textrmuw (v2si, int);
v8qi __builtin_arm_tinsrb (v8qi, int, int);
v4hi __builtin_arm_tinsrh (v4hi, int, int);
v2si __builtin_arm_tinsrw (v2si, int, int);
long long __builtin_arm_tmia (long long, int, int);
long long __builtin_arm_tmiabb (long long, int, int);
long long __builtin_arm_tmiabt (long long, int, int);
long long __builtin_arm_tmiaph (long long, int, int);
long long __builtin_arm_tmiatb (long long, int, int);
long long __builtin_arm_tmiatt (long long, int, int);
int __builtin_arm_tmovmskb (v8qi);
int __builtin_arm_tmovmskh (v4hi);
int __builtin_arm_tmovmskw (v2si);
long long __builtin_arm_waccb (v8qi);
long long __builtin_arm_wacch (v4hi);
long long __builtin_arm_waccw (v2si);
v8qi __builtin_arm_waddb (v8qi, v8qi);
v8qi __builtin_arm_waddbss (v8qi, v8qi);
v8qi __builtin_arm_waddbus (v8qi, v8qi);
v4hi __builtin_arm_waddh (v4hi, v4hi);
v4hi __builtin_arm_waddhss (v4hi, v4hi);
v4hi __builtin_arm_waddhus (v4hi, v4hi);
v2si __builtin_arm_waddw (v2si, v2si);
v2si __builtin_arm_waddwss (v2si, v2si);
v2si __builtin_arm_waddwus (v2si, v2si);
v8qi __builtin_arm_walign (v8qi, v8qi, int);
long long __builtin_arm_wand(long long, long long);
long long __builtin_arm_wandn (long long, long long);
v8qi __builtin_arm_wavg2b (v8qi, v8qi);
v8qi __builtin_arm_wavg2br (v8qi, v8qi);
v4hi __builtin_arm_wavg2h (v4hi, v4hi);
v4hi __builtin_arm_wavg2hr (v4hi, v4hi);
v8qi __builtin_arm_wcmpeqb (v8qi, v8qi);
v4hi __builtin_arm_wcmpeqh (v4hi, v4hi);
v2si __builtin_arm_wcmpeqw (v2si, v2si);
v8qi __builtin_arm_wcmpgtsb (v8qi, v8qi);
v4hi __builtin_arm_wcmpgtsh (v4hi, v4hi);
v2si __builtin_arm_wcmpgtsw (v2si, v2si);
v8qi __builtin_arm_wcmpgtub (v8qi, v8qi);
v4hi __builtin_arm_wcmpgtuh (v4hi, v4hi);
v2si __builtin_arm_wcmpgtuw (v2si, v2si);
long long __builtin_arm_wmacs (long long, v4hi, v4hi);
long long __builtin_arm_wmacsz (v4hi, v4hi);
long long __builtin_arm_wmacu (long long, v4hi, v4hi);
long long __builtin_arm_wmacuz (v4hi, v4hi);
v4hi __builtin_arm_wmadds (v4hi, v4hi);
v4hi __builtin_arm_wmaddu (v4hi, v4hi);
v8qi __builtin_arm_wmaxsb (v8qi, v8qi);
v4hi __builtin_arm_wmaxsh (v4hi, v4hi);
v2si __builtin_arm_wmaxsw (v2si, v2si);
v8qi __builtin_arm_wmaxub (v8qi, v8qi);
v4hi __builtin_arm_wmaxuh (v4hi, v4hi);
v2si __builtin_arm_wmaxuw (v2si, v2si);
v8qi __builtin_arm_wminsb (v8qi, v8qi);
v4hi __builtin_arm_wminsh (v4hi, v4hi);
v2si __builtin_arm_wminsw (v2si, v2si);
v8qi __builtin_arm_wminub (v8qi, v8qi);
v4hi __builtin_arm_wminuh (v4hi, v4hi);
v2si __builtin_arm_wminuw (v2si, v2si);
v4hi __builtin_arm_wmulsm (v4hi, v4hi);
v4hi __builtin_arm_wmulul (v4hi, v4hi);
v4hi __builtin_arm_wmulum (v4hi, v4hi);
long long __builtin_arm_wor (long long, long long);
v2si __builtin_arm_wpackdss (long long, long long);
v2si __builtin_arm_wpackdus (long long, long long);
v8qi __builtin_arm_wpackhss (v4hi, v4hi);
v8qi __builtin_arm_wpackhus (v4hi, v4hi);
v4hi __builtin_arm_wpackwss (v2si, v2si);
v4hi __builtin_arm_wpackwus (v2si, v2si);
long long __builtin_arm_wrord (long long, long long);
long long __builtin_arm_wrordi (long long, int);
v4hi __builtin_arm_wrorh (v4hi, long long);
v4hi __builtin_arm_wrorhi (v4hi, int);
v2si __builtin_arm_wrorw (v2si, long long);
v2si __builtin_arm_wrorwi (v2si, int);
v2si __builtin_arm_wsadb (v2si, v8qi, v8qi);
v2si __builtin_arm_wsadbz (v8qi, v8qi);
v2si __builtin_arm_wsadh (v2si, v4hi, v4hi);
v2si __builtin_arm_wsadhz (v4hi, v4hi);
v4hi __builtin_arm_wshufh (v4hi, int);
long long __builtin_arm_wslld (long long, long long);
long long __builtin_arm_wslldi (long long, int);
v4hi __builtin_arm_wsllh (v4hi, long long);
v4hi __builtin_arm_wsllhi (v4hi, int);
v2si __builtin_arm_wsllw (v2si, long long);
v2si __builtin_arm_wsllwi (v2si, int);
long long __builtin_arm_wsrad (long long, long long);
long long __builtin_arm_wsradi (long long, int);
v4hi __builtin_arm_wsrah (v4hi, long long);
v4hi __builtin_arm_wsrahi (v4hi, int);
v2si __builtin_arm_wsraw (v2si, long long);
v2si __builtin_arm_wsrawi (v2si, int);
long long __builtin_arm_wsrld (long long, long long);
long long __builtin_arm_wsrldi (long long, int);
v4hi __builtin_arm_wsrlh (v4hi, long long);
v4hi __builtin_arm_wsrlhi (v4hi, int);
v2si __builtin_arm_wsrlw (v2si, long long);
v2si __builtin_arm_wsrlwi (v2si, int);
v8qi __builtin_arm_wsubb (v8qi, v8qi);
v8qi __builtin_arm_wsubbss (v8qi, v8qi);
v8qi __builtin_arm_wsubbus (v8qi, v8qi);
v4hi __builtin_arm_wsubh (v4hi, v4hi);
v4hi __builtin_arm_wsubhss (v4hi, v4hi);
v4hi __builtin_arm_wsubhus (v4hi, v4hi);
v2si __builtin_arm_wsubw (v2si, v2si);
v2si __builtin_arm_wsubwss (v2si, v2si);
v2si __builtin_arm_wsubwus (v2si, v2si);
v4hi __builtin_arm_wunpckehsb (v8qi);
v2si __builtin_arm_wunpckehsh (v4hi);
long long __builtin_arm_wunpckehsw (v2si);
v4hi __builtin_arm_wunpckehub (v8qi);
v2si __builtin_arm_wunpckehuh (v4hi);
long long __builtin_arm_wunpckehuw (v2si);
v4hi __builtin_arm_wunpckelsb (v8qi);
v2si __builtin_arm_wunpckelsh (v4hi);
long long __builtin_arm_wunpckelsw (v2si);
v4hi __builtin_arm_wunpckelub (v8qi);
v2si __builtin_arm_wunpckeluh (v4hi);
long long __builtin_arm_wunpckeluw (v2si);
v8qi __builtin_arm_wunpckihb (v8qi, v8qi);
v4hi __builtin_arm_wunpckihh (v4hi, v4hi);
v2si __builtin_arm_wunpckihw (v2si, v2si);
v8qi __builtin_arm_wunpckilb (v8qi, v8qi);
v4hi __builtin_arm_wunpckilh (v4hi, v4hi);
v2si __builtin_arm_wunpckilw (v2si, v2si);
long long __builtin_arm_wxor (long long, long long);
long long __builtin_arm_wzero ();
@end smallexample


@node ARM C Language Extensions (ACLE)
@subsection ARM C Language Extensions (ACLE)

GCC implements extensions for C as described in the ARM C Language
Extensions (ACLE) specification, which can be found at
@uref{https://developer.arm.com/documentation/ihi0053/latest/}.

As a part of ACLE, GCC implements extensions for Advanced SIMD as described in
the ARM C Language Extensions Specification.  The complete list of Advanced SIMD
intrinsics can be found at
@uref{https://developer.arm.com/documentation/ihi0073/latest/}.
The built-in intrinsics for the Advanced SIMD extension are available when
NEON is enabled.

Currently, ARM and AArch64 back ends do not support ACLE 2.0 fully.  Both
back ends support CRC32 intrinsics and the ARM back end supports the
Coprocessor intrinsics, all from @file{arm_acle.h}.  The ARM back end's 16-bit
floating-point Advanced SIMD intrinsics currently comply to ACLE v1.1.
AArch64's back end does not have support for 16-bit floating point Advanced SIMD
intrinsics yet.

See @ref{ARM Options} and @ref{AArch64 Options} for more information on the
availability of extensions.

@node ARM Floating Point Status and Control Intrinsics
@subsection ARM Floating Point Status and Control Intrinsics

These built-in functions are available for the ARM family of
processors with floating-point unit.

@smallexample
unsigned int __builtin_arm_get_fpscr ();
void __builtin_arm_set_fpscr (unsigned int);
@end smallexample

@node ARM ARMv8-M Security Extensions
@subsection ARM ARMv8-M Security Extensions

GCC implements the ARMv8-M Security Extensions as described in the ARMv8-M
Security Extensions: Requirements on Development Tools Engineering
Specification, which can be found at
@uref{https://developer.arm.com/documentation/ecm0359818/latest/}.

As part of the Security Extensions GCC implements two new function attributes:
@code{cmse_nonsecure_entry} and @code{cmse_nonsecure_call}.

As part of the Security Extensions GCC implements the intrinsics below.  FPTR
is used here to mean any function pointer type.

@smallexample
cmse_address_info_t cmse_TT (void *);
cmse_address_info_t cmse_TT_fptr (FPTR);
cmse_address_info_t cmse_TTT (void *);
cmse_address_info_t cmse_TTT_fptr (FPTR);
cmse_address_info_t cmse_TTA (void *);
cmse_address_info_t cmse_TTA_fptr (FPTR);
cmse_address_info_t cmse_TTAT (void *);
cmse_address_info_t cmse_TTAT_fptr (FPTR);
void * cmse_check_address_range (void *, size_t, int);
typeof(p) cmse_nsfptr_create (FPTR p);
intptr_t cmse_is_nsfptr (FPTR);
int cmse_nonsecure_caller (void);
@end smallexample

@node AVR Built-in Functions
@subsection AVR Built-in Functions

For each built-in function for AVR, there is an equally named,
uppercase built-in macro defined. That way users can easily query if
or if not a specific built-in is implemented or not. For example, if
@code{__builtin_avr_nop} is available the macro
@code{__BUILTIN_AVR_NOP} is defined to @code{1} and undefined otherwise.

@defbuiltin{void __builtin_avr_nop (void)}
@defbuiltinx{void __builtin_avr_sei (void)}
@defbuiltinx{void __builtin_avr_cli (void)}
@defbuiltinx{void __builtin_avr_sleep (void)}
@defbuiltinx{void __builtin_avr_wdr (void)}
@defbuiltinx{uint8_t __builtin_avr_swap (uint8_t)}
@defbuiltinx{uint16_t __builtin_avr_fmul (uint8_t, uint8_t)}
@defbuiltinx{int16_t __builtin_avr_fmuls (int8_t, int8_t)}
@defbuiltinx{int16_t __builtin_avr_fmulsu (int8_t, uint8_t)}

These built-in functions map to the respective machine
instruction, i.e.@: @code{nop}, @code{sei}, @code{cli}, @code{sleep},
@code{wdr}, @code{swap}, @code{fmul}, @code{fmuls}
resp. @code{fmulsu}. The three @code{fmul*} built-ins are implemented
as library call if no hardware multiplier is available.
@enddefbuiltin

@defbuiltin{void __builtin_avr_delay_cycles (uint32_t @var{ticks})}
Delay execution for @var{ticks} cycles. Note that this
built-in does not take into account the effect of interrupts that
might increase delay time. @var{ticks} must be a compile-time
integer constant; delays with a variable number of cycles are not supported.
@enddefbuiltin

@defbuiltin{int8_t __builtin_avr_flash_segment (const __memx void*)}
This built-in takes a byte address to the 24-bit
@ref{AVR Named Address Spaces,address space} @code{__memx} and returns
the number of the flash segment (the 64 KiB chunk) where the address
points to.  Counting starts at @code{0}.
If the address does not point to flash memory, return @code{-1}.
@enddefbuiltin

@defbuiltin{uint8_t __builtin_avr_insert_bits (uint32_t @var{map}, uint8_t @var{bits}, uint8_t @var{val})}
Insert bits from @var{bits} into @var{val} and return the resulting
value. The nibbles of @var{map} determine how the insertion is
performed: Let @var{X} be the @var{n}-th nibble of @var{map}
@enumerate
@item If @var{X} is @code{0xf},
then the @var{n}-th bit of @var{val} is returned unaltered.

@item If X is in the range 0@dots{}7,
then the @var{n}-th result bit is set to the @var{X}-th bit of @var{bits}

@item If X is in the range 8@dots{}@code{0xe},
then the @var{n}-th result bit is undefined.
@end enumerate

@noindent
One typical use case for this built-in is adjusting input and
output values to non-contiguous port layouts. Some examples:

@smallexample
// same as val, bits is unused
__builtin_avr_insert_bits (0xffffffff, bits, val);
@end smallexample

@smallexample
// same as bits, val is unused
__builtin_avr_insert_bits (0x76543210, bits, val);
@end smallexample

@smallexample
// same as rotating bits by 4
__builtin_avr_insert_bits (0x32107654, bits, 0);
@end smallexample

@smallexample
// high nibble of result is the high nibble of val
// low nibble of result is the low nibble of bits
__builtin_avr_insert_bits (0xffff3210, bits, val);
@end smallexample

@smallexample
// reverse the bit order of bits
__builtin_avr_insert_bits (0x01234567, bits, 0);
@end smallexample
@enddefbuiltin

@defbuiltin{uint8_t __builtin_avr_mask1 (uint8_t @var{mask}, uint8_t @var{offs})}
Rotate the 8-bit constant value @var{mask} by an offset of @var{offs},
where @var{mask} is in @{ 0x01, 0xfe, 0x7f, 0x80 @}.
This built-in can be use as an alternative to 8-bit expressions like
@code{1 << offs} when their computation consumes too much
time, and @var{offs} is known to be in the range 0@dots{}7.
@example
__builtin_avr_mask1 (1, offs)      // same like  1 << offs
__builtin_avr_mask1 (~1, offs)     // same like  ~(1 << offs)
__builtin_avr_mask1 (0x80, offs)   // same like  0x80 >> offs
__builtin_avr_mask1 (~0x80, offs)  // same like  ~(0x80 >> offs)
@end example
The open coded C versions take at least @code{5 + 4 * @var{offs}} cycles
(and 5 instructions), whereas the built-in takes 7 cycles and instructions
(8 cycles and instructions in the case of @code{@var{mask} = 0x7f}).
@enddefbuiltin

@defbuiltin{void __builtin_avr_nops (uint16_t @var{count})}
Insert @var{count} @code{NOP} instructions.
The number of instructions must be a compile-time integer constant.
@enddefbuiltin

@noindent
There are many more AVR-specific built-in functions that are used to
implement the ISO/IEC TR 18037 ``Embedded C'' fixed-point functions of
section 7.18a.6.  You don't need to use these built-ins directly.
Instead, use the declarations as supplied by the @code{stdfix.h} header
with GNU-C99:

@smallexample
#include <stdfix.h>

// Re-interpret the bit representation of unsigned 16-bit
// integer @var{uval} as Q-format 0.16 value.
unsigned fract get_bits (uint_ur_t uval)
@{
    return urbits (uval);
@}
@end smallexample

@node Blackfin Built-in Functions
@subsection Blackfin Built-in Functions

Currently, there are two Blackfin-specific built-in functions.  These are
used for generating @code{CSYNC} and @code{SSYNC} machine insns without
using inline assembly; by using these built-in functions the compiler can
automatically add workarounds for hardware errata involving these
instructions.  These functions are named as follows:

@smallexample
void __builtin_bfin_csync (void);
void __builtin_bfin_ssync (void);
@end smallexample

@node BPF Built-in Functions
@subsection BPF Built-in Functions

The following built-in functions are available for eBPF targets.

@defbuiltin{{unsigned long long} __builtin_bpf_load_byte (unsigned long long @var{offset})}
Load a byte from the @code{struct sk_buff} packet data pointed to by the
register @code{%r6}, and return it.
@enddefbuiltin

@defbuiltin{{unsigned long long} __builtin_bpf_load_half (unsigned long long @var{offset})}
Load 16 bits from the @code{struct sk_buff} packet data pointed to by the
register @code{%r6}, and return it.
@enddefbuiltin

@defbuiltin{{unsigned long long} __builtin_bpf_load_word (unsigned long long @var{offset})}
Load 32 bits from the @code{struct sk_buff} packet data pointed to by the
register @code{%r6}, and return it.
@enddefbuiltin

@defbuiltin{@var{type} __builtin_preserve_access_index (@var{type} @var{expr})}
BPF Compile Once-Run Everywhere (CO-RE) support.  Instruct GCC to
generate CO-RE relocation records for any accesses to aggregate
data structures (struct, union, array types) in @var{expr}.  This builtin
is otherwise transparent; @var{expr} may have any type and its value is
returned.  This builtin has no effect if @code{-mco-re} is not in effect
(either specified or implied).
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_preserve_field_info (@var{expr}, unsigned int @var{kind})}
BPF Compile Once-Run Everywhere (CO-RE) support. This builtin is used to
extract information to aid in struct/union relocations.  @var{expr} is
an access to a field of a struct or union. Depending on @var{kind}, different
information is returned to the program. A CO-RE relocation for the access in
@var{expr} with kind @var{kind} is recorded if @code{-mco-re} is in effect.

The following values are supported for @var{kind}:
@table @code
@item FIELD_BYTE_OFFSET = 0
The returned value is the offset, in bytes, of the field from the
beginning of the containing structure. For bit-fields, this is the byte offset
of the containing word.

@item FIELD_BYTE_SIZE = 1
The returned value is the size, in bytes, of the field. For bit-fields,
this is the size in bytes of the containing word.

@item FIELD_EXISTENCE = 2
The returned value is 1 if the field exists, 0 otherwise. Always 1 at
compile time.

@item FIELD_SIGNEDNESS = 3
The returned value is 1 if the field is signed, 0 otherwise.

@item FIELD_LSHIFT_U64 = 4
@itemx FIELD_RSHIFT_U64 = 5
The returned value is the number of bits of left- or right-shifting
(respectively) needed in order to recover the original value of the field,
after it has been loaded by a read of @code{FIELD_BYTE_SIZE} bytes into an
unsigned 64-bit value. Primarily useful for reading bit-field values
from structures that may change between kernel versions.

@end table

Note that the return value is a constant which is known at
compile time. If the field has a variable offset then
@code{FIELD_BYTE_OFFSET}, @code{FIELD_LSHIFT_U64},
and @code{FIELD_RSHIFT_U64} are not supported.
Similarly, if the field has a variable size then
@code{FIELD_BYTE_SIZE}, @code{FIELD_LSHIFT_U64},
and @code{FIELD_RSHIFT_U64} are not supported.

For example, @code{__builtin_preserve_field_info} can be used to reliably
extract bit-field values from a structure that may change between
kernel versions:

@smallexample
struct S
@{
  short a;
  int x:7;
  int y:5;
@};

int
read_y (struct S *arg)
@{
  unsigned long long val;
  unsigned int offset
    = __builtin_preserve_field_info (arg->y, FIELD_BYTE_OFFSET);
  unsigned int size
    = __builtin_preserve_field_info (arg->y, FIELD_BYTE_SIZE);

  /* Read size bytes from arg + offset into val.  */
  bpf_probe_read (&val, size, arg + offset);

  val <<= __builtin_preserve_field_info (arg->y, FIELD_LSHIFT_U64);

  if (__builtin_preserve_field_info (arg->y, FIELD_SIGNEDNESS))
    val = ((long long) val
           >> __builtin_preserve_field_info (arg->y, FIELD_RSHIFT_U64));
  else
    val >>= __builtin_preserve_field_info (arg->y, FIELD_RSHIFT_U64);

  return val;
@}

@end smallexample
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_preserve_enum_value (@var{type}, @var{enum}, unsigned int @var{kind})}
BPF Compile Once-Run Everywhere (CO-RE) support. This builtin collects enum
information and creates a CO-RE relocation relative to @var{enum} that should
be of @var{type}.  The @var{kind} specifies the action performed.

The following values are supported for @var{kind}:
@table @code
@item ENUM_VALUE_EXISTS = 0
The return value is either 0 or 1 depending if the enum value exists in the
target.

@item ENUM_VALUE = 1
The return value is the enum value in the target kernel.
@end table
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_btf_type_id (@var{type}, unsigned int @var{kind})}
BPF Compile Once-Run Everywhere (CO-RE) support. This builtin is used to get
the BTF type ID of a specified @var{type}.
Depending on the @var{kind} argument, it
either returns the ID of the local BTF information, or the BTF type ID in
the target kernel.

The following values are supported for @var{kind}:
@table @code
@item BTF_TYPE_ID_LOCAL = 0
Return the local BTF type ID.  Always succeeds.

@item BTF_TYPE_ID_TARGET = 1
Return the target BTF type ID.  If @var{type} does not exist in the target,
returns 0.
@end table
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_preserve_type_info (@var{type}, unsigned int @var{kind})}
BPF Compile Once-Run Everywhere (CO-RE) support. This builtin performs named
type (struct/union/enum/typedef) verifications. The type of verification
depends on the @var{kind} argument provided.  This builtin always
returns 0 if @var{type} does not exist in the target kernel.

The following values are supported for @var{kind}:
@table @code
@item BTF_TYPE_EXISTS = 0
Checks if @var{type} exists in the target.

@item BTF_TYPE_MATCHES = 1
Checks if @var{type} matches the local definition in the target kernel.

@item BTF_TYPE_SIZE = 2
Returns the size of the @var{type} within the target.
@end table
@enddefbuiltin

@node FR-V Built-in Functions
@subsection FR-V Built-in Functions

GCC provides many FR-V-specific built-in functions.  In general,
these functions are intended to be compatible with those described
by @cite{FR-V Family, Softune C/C++ Compiler Manual (V6), Fujitsu
Semiconductor}.  The two exceptions are @code{__MDUNPACKH} and
@code{__MBTOHE}, the GCC forms of which pass 128-bit values by
pointer rather than by value.

Most of the functions are named after specific FR-V instructions.
Such functions are said to be ``directly mapped'' and are summarized
here in tabular form.

@menu
* Argument Types::
* Directly-mapped Integer Functions::
* Directly-mapped Media Functions::
* Raw read/write Functions::
* Other Built-in Functions::
@end menu

@node Argument Types
@subsubsection Argument Types

The arguments to the built-in functions can be divided into three groups:
register numbers, compile-time constants and run-time values.  In order
to make this classification clear at a glance, the arguments and return
values are given the following pseudo types:

@multitable @columnfractions .20 .30 .15 .35
@headitem Pseudo type @tab Real C type @tab Constant? @tab Description
@item @code{uh} @tab @code{unsigned short} @tab No @tab an unsigned halfword
@item @code{uw1} @tab @code{unsigned int} @tab No @tab an unsigned word
@item @code{sw1} @tab @code{int} @tab No @tab a signed word
@item @code{uw2} @tab @code{unsigned long long} @tab No
@tab an unsigned doubleword
@item @code{sw2} @tab @code{long long} @tab No @tab a signed doubleword
@item @code{const} @tab @code{int} @tab Yes @tab an integer constant
@item @code{acc} @tab @code{int} @tab Yes @tab an ACC register number
@item @code{iacc} @tab @code{int} @tab Yes @tab an IACC register number
@end multitable

These pseudo types are not defined by GCC, they are simply a notational
convenience used in this manual.

Arguments of type @code{uh}, @code{uw1}, @code{sw1}, @code{uw2}
and @code{sw2} are evaluated at run time.  They correspond to
register operands in the underlying FR-V instructions.

@code{const} arguments represent immediate operands in the underlying
FR-V instructions.  They must be compile-time constants.

@code{acc} arguments are evaluated at compile time and specify the number
of an accumulator register.  For example, an @code{acc} argument of 2
selects the ACC2 register.

@code{iacc} arguments are similar to @code{acc} arguments but specify the
number of an IACC register.  See @pxref{Other Built-in Functions}
for more details.

@node Directly-mapped Integer Functions
@subsubsection Directly-Mapped Integer Functions

The functions listed below map directly to FR-V I-type instructions.

@multitable @columnfractions .45 .32 .23
@headitem Function prototype @tab Example usage @tab Assembly output
@item @code{sw1 __ADDSS (sw1, sw1)}
@tab @code{@var{c} = __ADDSS (@var{a}, @var{b})}
@tab @code{ADDSS @var{a},@var{b},@var{c}}
@item @code{sw1 __SCAN (sw1, sw1)}
@tab @code{@var{c} = __SCAN (@var{a}, @var{b})}
@tab @code{SCAN @var{a},@var{b},@var{c}}
@item @code{sw1 __SCUTSS (sw1)}
@tab @code{@var{b} = __SCUTSS (@var{a})}
@tab @code{SCUTSS @var{a},@var{b}}
@item @code{sw1 __SLASS (sw1, sw1)}
@tab @code{@var{c} = __SLASS (@var{a}, @var{b})}
@tab @code{SLASS @var{a},@var{b},@var{c}}
@item @code{void __SMASS (sw1, sw1)}
@tab @code{__SMASS (@var{a}, @var{b})}
@tab @code{SMASS @var{a},@var{b}}
@item @code{void __SMSSS (sw1, sw1)}
@tab @code{__SMSSS (@var{a}, @var{b})}
@tab @code{SMSSS @var{a},@var{b}}
@item @code{void __SMU (sw1, sw1)}
@tab @code{__SMU (@var{a}, @var{b})}
@tab @code{SMU @var{a},@var{b}}
@item @code{sw2 __SMUL (sw1, sw1)}
@tab @code{@var{c} = __SMUL (@var{a}, @var{b})}
@tab @code{SMUL @var{a},@var{b},@var{c}}
@item @code{sw1 __SUBSS (sw1, sw1)}
@tab @code{@var{c} = __SUBSS (@var{a}, @var{b})}
@tab @code{SUBSS @var{a},@var{b},@var{c}}
@item @code{uw2 __UMUL (uw1, uw1)}
@tab @code{@var{c} = __UMUL (@var{a}, @var{b})}
@tab @code{UMUL @var{a},@var{b},@var{c}}
@end multitable

@node Directly-mapped Media Functions
@subsubsection Directly-Mapped Media Functions

The functions listed below map directly to FR-V M-type instructions.

@multitable @columnfractions .45 .32 .23
@headitem Function prototype @tab Example usage @tab Assembly output
@item @code{uw1 __MABSHS (sw1)}
@tab @code{@var{b} = __MABSHS (@var{a})}
@tab @code{MABSHS @var{a},@var{b}}
@item @code{void __MADDACCS (acc, acc)}
@tab @code{__MADDACCS (@var{b}, @var{a})}
@tab @code{MADDACCS @var{a},@var{b}}
@item @code{sw1 __MADDHSS (sw1, sw1)}
@tab @code{@var{c} = __MADDHSS (@var{a}, @var{b})}
@tab @code{MADDHSS @var{a},@var{b},@var{c}}
@item @code{uw1 __MADDHUS (uw1, uw1)}
@tab @code{@var{c} = __MADDHUS (@var{a}, @var{b})}
@tab @code{MADDHUS @var{a},@var{b},@var{c}}
@item @code{uw1 __MAND (uw1, uw1)}
@tab @code{@var{c} = __MAND (@var{a}, @var{b})}
@tab @code{MAND @var{a},@var{b},@var{c}}
@item @code{void __MASACCS (acc, acc)}
@tab @code{__MASACCS (@var{b}, @var{a})}
@tab @code{MASACCS @var{a},@var{b}}
@item @code{uw1 __MAVEH (uw1, uw1)}
@tab @code{@var{c} = __MAVEH (@var{a}, @var{b})}
@tab @code{MAVEH @var{a},@var{b},@var{c}}
@item @code{uw2 __MBTOH (uw1)}
@tab @code{@var{b} = __MBTOH (@var{a})}
@tab @code{MBTOH @var{a},@var{b}}
@item @code{void __MBTOHE (uw1 *, uw1)}
@tab @code{__MBTOHE (&@var{b}, @var{a})}
@tab @code{MBTOHE @var{a},@var{b}}
@item @code{void __MCLRACC (acc)}
@tab @code{__MCLRACC (@var{a})}
@tab @code{MCLRACC @var{a}}
@item @code{void __MCLRACCA (void)}
@tab @code{__MCLRACCA ()}
@tab @code{MCLRACCA}
@item @code{uw1 __Mcop1 (uw1, uw1)}
@tab @code{@var{c} = __Mcop1 (@var{a}, @var{b})}
@tab @code{Mcop1 @var{a},@var{b},@var{c}}
@item @code{uw1 __Mcop2 (uw1, uw1)}
@tab @code{@var{c} = __Mcop2 (@var{a}, @var{b})}
@tab @code{Mcop2 @var{a},@var{b},@var{c}}
@item @code{uw1 __MCPLHI (uw2, const)}
@tab @code{@var{c} = __MCPLHI (@var{a}, @var{b})}
@tab @code{MCPLHI @var{a},#@var{b},@var{c}}
@item @code{uw1 __MCPLI (uw2, const)}
@tab @code{@var{c} = __MCPLI (@var{a}, @var{b})}
@tab @code{MCPLI @var{a},#@var{b},@var{c}}
@item @code{void __MCPXIS (acc, sw1, sw1)}
@tab @code{__MCPXIS (@var{c}, @var{a}, @var{b})}
@tab @code{MCPXIS @var{a},@var{b},@var{c}}
@item @code{void __MCPXIU (acc, uw1, uw1)}
@tab @code{__MCPXIU (@var{c}, @var{a}, @var{b})}
@tab @code{MCPXIU @var{a},@var{b},@var{c}}
@item @code{void __MCPXRS (acc, sw1, sw1)}
@tab @code{__MCPXRS (@var{c}, @var{a}, @var{b})}
@tab @code{MCPXRS @var{a},@var{b},@var{c}}
@item @code{void __MCPXRU (acc, uw1, uw1)}
@tab @code{__MCPXRU (@var{c}, @var{a}, @var{b})}
@tab @code{MCPXRU @var{a},@var{b},@var{c}}
@item @code{uw1 __MCUT (acc, uw1)}
@tab @code{@var{c} = __MCUT (@var{a}, @var{b})}
@tab @code{MCUT @var{a},@var{b},@var{c}}
@item @code{uw1 __MCUTSS (acc, sw1)}
@tab @code{@var{c} = __MCUTSS (@var{a}, @var{b})}
@tab @code{MCUTSS @var{a},@var{b},@var{c}}
@item @code{void __MDADDACCS (acc, acc)}
@tab @code{__MDADDACCS (@var{b}, @var{a})}
@tab @code{MDADDACCS @var{a},@var{b}}
@item @code{void __MDASACCS (acc, acc)}
@tab @code{__MDASACCS (@var{b}, @var{a})}
@tab @code{MDASACCS @var{a},@var{b}}
@item @code{uw2 __MDCUTSSI (acc, const)}
@tab @code{@var{c} = __MDCUTSSI (@var{a}, @var{b})}
@tab @code{MDCUTSSI @var{a},#@var{b},@var{c}}
@item @code{uw2 __MDPACKH (uw2, uw2)}
@tab @code{@var{c} = __MDPACKH (@var{a}, @var{b})}
@tab @code{MDPACKH @var{a},@var{b},@var{c}}
@item @code{uw2 __MDROTLI (uw2, const)}
@tab @code{@var{c} = __MDROTLI (@var{a}, @var{b})}
@tab @code{MDROTLI @var{a},#@var{b},@var{c}}
@item @code{void __MDSUBACCS (acc, acc)}
@tab @code{__MDSUBACCS (@var{b}, @var{a})}
@tab @code{MDSUBACCS @var{a},@var{b}}
@item @code{void __MDUNPACKH (uw1 *, uw2)}
@tab @code{__MDUNPACKH (&@var{b}, @var{a})}
@tab @code{MDUNPACKH @var{a},@var{b}}
@item @code{uw2 __MEXPDHD (uw1, const)}
@tab @code{@var{c} = __MEXPDHD (@var{a}, @var{b})}
@tab @code{MEXPDHD @var{a},#@var{b},@var{c}}
@item @code{uw1 __MEXPDHW (uw1, const)}
@tab @code{@var{c} = __MEXPDHW (@var{a}, @var{b})}
@tab @code{MEXPDHW @var{a},#@var{b},@var{c}}
@item @code{uw1 __MHDSETH (uw1, const)}
@tab @code{@var{c} = __MHDSETH (@var{a}, @var{b})}
@tab @code{MHDSETH @var{a},#@var{b},@var{c}}
@item @code{sw1 __MHDSETS (const)}
@tab @code{@var{b} = __MHDSETS (@var{a})}
@tab @code{MHDSETS #@var{a},@var{b}}
@item @code{uw1 __MHSETHIH (uw1, const)}
@tab @code{@var{b} = __MHSETHIH (@var{b}, @var{a})}
@tab @code{MHSETHIH #@var{a},@var{b}}
@item @code{sw1 __MHSETHIS (sw1, const)}
@tab @code{@var{b} = __MHSETHIS (@var{b}, @var{a})}
@tab @code{MHSETHIS #@var{a},@var{b}}
@item @code{uw1 __MHSETLOH (uw1, const)}
@tab @code{@var{b} = __MHSETLOH (@var{b}, @var{a})}
@tab @code{MHSETLOH #@var{a},@var{b}}
@item @code{sw1 __MHSETLOS (sw1, const)}
@tab @code{@var{b} = __MHSETLOS (@var{b}, @var{a})}
@tab @code{MHSETLOS #@var{a},@var{b}}
@item @code{uw1 __MHTOB (uw2)}
@tab @code{@var{b} = __MHTOB (@var{a})}
@tab @code{MHTOB @var{a},@var{b}}
@item @code{void __MMACHS (acc, sw1, sw1)}
@tab @code{__MMACHS (@var{c}, @var{a}, @var{b})}
@tab @code{MMACHS @var{a},@var{b},@var{c}}
@item @code{void __MMACHU (acc, uw1, uw1)}
@tab @code{__MMACHU (@var{c}, @var{a}, @var{b})}
@tab @code{MMACHU @var{a},@var{b},@var{c}}
@item @code{void __MMRDHS (acc, sw1, sw1)}
@tab @code{__MMRDHS (@var{c}, @var{a}, @var{b})}
@tab @code{MMRDHS @var{a},@var{b},@var{c}}
@item @code{void __MMRDHU (acc, uw1, uw1)}
@tab @code{__MMRDHU (@var{c}, @var{a}, @var{b})}
@tab @code{MMRDHU @var{a},@var{b},@var{c}}
@item @code{void __MMULHS (acc, sw1, sw1)}
@tab @code{__MMULHS (@var{c}, @var{a}, @var{b})}
@tab @code{MMULHS @var{a},@var{b},@var{c}}
@item @code{void __MMULHU (acc, uw1, uw1)}
@tab @code{__MMULHU (@var{c}, @var{a}, @var{b})}
@tab @code{MMULHU @var{a},@var{b},@var{c}}
@item @code{void __MMULXHS (acc, sw1, sw1)}
@tab @code{__MMULXHS (@var{c}, @var{a}, @var{b})}
@tab @code{MMULXHS @var{a},@var{b},@var{c}}
@item @code{void __MMULXHU (acc, uw1, uw1)}
@tab @code{__MMULXHU (@var{c}, @var{a}, @var{b})}
@tab @code{MMULXHU @var{a},@var{b},@var{c}}
@item @code{uw1 __MNOT (uw1)}
@tab @code{@var{b} = __MNOT (@var{a})}
@tab @code{MNOT @var{a},@var{b}}
@item @code{uw1 __MOR (uw1, uw1)}
@tab @code{@var{c} = __MOR (@var{a}, @var{b})}
@tab @code{MOR @var{a},@var{b},@var{c}}
@item @code{uw1 __MPACKH (uh, uh)}
@tab @code{@var{c} = __MPACKH (@var{a}, @var{b})}
@tab @code{MPACKH @var{a},@var{b},@var{c}}
@item @code{sw2 __MQADDHSS (sw2, sw2)}
@tab @code{@var{c} = __MQADDHSS (@var{a}, @var{b})}
@tab @code{MQADDHSS @var{a},@var{b},@var{c}}
@item @code{uw2 __MQADDHUS (uw2, uw2)}
@tab @code{@var{c} = __MQADDHUS (@var{a}, @var{b})}
@tab @code{MQADDHUS @var{a},@var{b},@var{c}}
@item @code{void __MQCPXIS (acc, sw2, sw2)}
@tab @code{__MQCPXIS (@var{c}, @var{a}, @var{b})}
@tab @code{MQCPXIS @var{a},@var{b},@var{c}}
@item @code{void __MQCPXIU (acc, uw2, uw2)}
@tab @code{__MQCPXIU (@var{c}, @var{a}, @var{b})}
@tab @code{MQCPXIU @var{a},@var{b},@var{c}}
@item @code{void __MQCPXRS (acc, sw2, sw2)}
@tab @code{__MQCPXRS (@var{c}, @var{a}, @var{b})}
@tab @code{MQCPXRS @var{a},@var{b},@var{c}}
@item @code{void __MQCPXRU (acc, uw2, uw2)}
@tab @code{__MQCPXRU (@var{c}, @var{a}, @var{b})}
@tab @code{MQCPXRU @var{a},@var{b},@var{c}}
@item @code{sw2 __MQLCLRHS (sw2, sw2)}
@tab @code{@var{c} = __MQLCLRHS (@var{a}, @var{b})}
@tab @code{MQLCLRHS @var{a},@var{b},@var{c}}
@item @code{sw2 __MQLMTHS (sw2, sw2)}
@tab @code{@var{c} = __MQLMTHS (@var{a}, @var{b})}
@tab @code{MQLMTHS @var{a},@var{b},@var{c}}
@item @code{void __MQMACHS (acc, sw2, sw2)}
@tab @code{__MQMACHS (@var{c}, @var{a}, @var{b})}
@tab @code{MQMACHS @var{a},@var{b},@var{c}}
@item @code{void __MQMACHU (acc, uw2, uw2)}
@tab @code{__MQMACHU (@var{c}, @var{a}, @var{b})}
@tab @code{MQMACHU @var{a},@var{b},@var{c}}
@item @code{void __MQMACXHS (acc, sw2, sw2)}
@tab @code{__MQMACXHS (@var{c}, @var{a}, @var{b})}
@tab @code{MQMACXHS @var{a},@var{b},@var{c}}
@item @code{void __MQMULHS (acc, sw2, sw2)}
@tab @code{__MQMULHS (@var{c}, @var{a}, @var{b})}
@tab @code{MQMULHS @var{a},@var{b},@var{c}}
@item @code{void __MQMULHU (acc, uw2, uw2)}
@tab @code{__MQMULHU (@var{c}, @var{a}, @var{b})}
@tab @code{MQMULHU @var{a},@var{b},@var{c}}
@item @code{void __MQMULXHS (acc, sw2, sw2)}
@tab @code{__MQMULXHS (@var{c}, @var{a}, @var{b})}
@tab @code{MQMULXHS @var{a},@var{b},@var{c}}
@item @code{void __MQMULXHU (acc, uw2, uw2)}
@tab @code{__MQMULXHU (@var{c}, @var{a}, @var{b})}
@tab @code{MQMULXHU @var{a},@var{b},@var{c}}
@item @code{sw2 __MQSATHS (sw2, sw2)}
@tab @code{@var{c} = __MQSATHS (@var{a}, @var{b})}
@tab @code{MQSATHS @var{a},@var{b},@var{c}}
@item @code{uw2 __MQSLLHI (uw2, int)}
@tab @code{@var{c} = __MQSLLHI (@var{a}, @var{b})}
@tab @code{MQSLLHI @var{a},@var{b},@var{c}}
@item @code{sw2 __MQSRAHI (sw2, int)}
@tab @code{@var{c} = __MQSRAHI (@var{a}, @var{b})}
@tab @code{MQSRAHI @var{a},@var{b},@var{c}}
@item @code{sw2 __MQSUBHSS (sw2, sw2)}
@tab @code{@var{c} = __MQSUBHSS (@var{a}, @var{b})}
@tab @code{MQSUBHSS @var{a},@var{b},@var{c}}
@item @code{uw2 __MQSUBHUS (uw2, uw2)}
@tab @code{@var{c} = __MQSUBHUS (@var{a}, @var{b})}
@tab @code{MQSUBHUS @var{a},@var{b},@var{c}}
@item @code{void __MQXMACHS (acc, sw2, sw2)}
@tab @code{__MQXMACHS (@var{c}, @var{a}, @var{b})}
@tab @code{MQXMACHS @var{a},@var{b},@var{c}}
@item @code{void __MQXMACXHS (acc, sw2, sw2)}
@tab @code{__MQXMACXHS (@var{c}, @var{a}, @var{b})}
@tab @code{MQXMACXHS @var{a},@var{b},@var{c}}
@item @code{uw1 __MRDACC (acc)}
@tab @code{@var{b} = __MRDACC (@var{a})}
@tab @code{MRDACC @var{a},@var{b}}
@item @code{uw1 __MRDACCG (acc)}
@tab @code{@var{b} = __MRDACCG (@var{a})}
@tab @code{MRDACCG @var{a},@var{b}}
@item @code{uw1 __MROTLI (uw1, const)}
@tab @code{@var{c} = __MROTLI (@var{a}, @var{b})}
@tab @code{MROTLI @var{a},#@var{b},@var{c}}
@item @code{uw1 __MROTRI (uw1, const)}
@tab @code{@var{c} = __MROTRI (@var{a}, @var{b})}
@tab @code{MROTRI @var{a},#@var{b},@var{c}}
@item @code{sw1 __MSATHS (sw1, sw1)}
@tab @code{@var{c} = __MSATHS (@var{a}, @var{b})}
@tab @code{MSATHS @var{a},@var{b},@var{c}}
@item @code{uw1 __MSATHU (uw1, uw1)}
@tab @code{@var{c} = __MSATHU (@var{a}, @var{b})}
@tab @code{MSATHU @var{a},@var{b},@var{c}}
@item @code{uw1 __MSLLHI (uw1, const)}
@tab @code{@var{c} = __MSLLHI (@var{a}, @var{b})}
@tab @code{MSLLHI @var{a},#@var{b},@var{c}}
@item @code{sw1 __MSRAHI (sw1, const)}
@tab @code{@var{c} = __MSRAHI (@var{a}, @var{b})}
@tab @code{MSRAHI @var{a},#@var{b},@var{c}}
@item @code{uw1 __MSRLHI (uw1, const)}
@tab @code{@var{c} = __MSRLHI (@var{a}, @var{b})}
@tab @code{MSRLHI @var{a},#@var{b},@var{c}}
@item @code{void __MSUBACCS (acc, acc)}
@tab @code{__MSUBACCS (@var{b}, @var{a})}
@tab @code{MSUBACCS @var{a},@var{b}}
@item @code{sw1 __MSUBHSS (sw1, sw1)}
@tab @code{@var{c} = __MSUBHSS (@var{a}, @var{b})}
@tab @code{MSUBHSS @var{a},@var{b},@var{c}}
@item @code{uw1 __MSUBHUS (uw1, uw1)}
@tab @code{@var{c} = __MSUBHUS (@var{a}, @var{b})}
@tab @code{MSUBHUS @var{a},@var{b},@var{c}}
@item @code{void __MTRAP (void)}
@tab @code{__MTRAP ()}
@tab @code{MTRAP}
@item @code{uw2 __MUNPACKH (uw1)}
@tab @code{@var{b} = __MUNPACKH (@var{a})}
@tab @code{MUNPACKH @var{a},@var{b}}
@item @code{uw1 __MWCUT (uw2, uw1)}
@tab @code{@var{c} = __MWCUT (@var{a}, @var{b})}
@tab @code{MWCUT @var{a},@var{b},@var{c}}
@item @code{void __MWTACC (acc, uw1)}
@tab @code{__MWTACC (@var{b}, @var{a})}
@tab @code{MWTACC @var{a},@var{b}}
@item @code{void __MWTACCG (acc, uw1)}
@tab @code{__MWTACCG (@var{b}, @var{a})}
@tab @code{MWTACCG @var{a},@var{b}}
@item @code{uw1 __MXOR (uw1, uw1)}
@tab @code{@var{c} = __MXOR (@var{a}, @var{b})}
@tab @code{MXOR @var{a},@var{b},@var{c}}
@end multitable

@node Raw read/write Functions
@subsubsection Raw Read/Write Functions

This sections describes built-in functions related to read and write
instructions to access memory.  These functions generate
@code{membar} instructions to flush the I/O load and stores where
appropriate, as described in Fujitsu's manual described above.

@table @code

@item unsigned char __builtin_read8 (void *@var{data})
@item unsigned short __builtin_read16 (void *@var{data})
@item unsigned long __builtin_read32 (void *@var{data})
@item unsigned long long __builtin_read64 (void *@var{data})

@item void __builtin_write8 (void *@var{data}, unsigned char @var{datum})
@item void __builtin_write16 (void *@var{data}, unsigned short @var{datum})
@item void __builtin_write32 (void *@var{data}, unsigned long @var{datum})
@item void __builtin_write64 (void *@var{data}, unsigned long long @var{datum})
@end table

@node Other Built-in Functions
@subsubsection Other Built-in Functions

This section describes built-in functions that are not named after
a specific FR-V instruction.

@table @code
@item sw2 __IACCreadll (iacc @var{reg})
Return the full 64-bit value of IACC0@.  The @var{reg} argument is reserved
for future expansion and must be 0.

@item sw1 __IACCreadl (iacc @var{reg})
Return the value of IACC0H if @var{reg} is 0 and IACC0L if @var{reg} is 1.
Other values of @var{reg} are rejected as invalid.

@item void __IACCsetll (iacc @var{reg}, sw2 @var{x})
Set the full 64-bit value of IACC0 to @var{x}.  The @var{reg} argument
is reserved for future expansion and must be 0.

@item void __IACCsetl (iacc @var{reg}, sw1 @var{x})
Set IACC0H to @var{x} if @var{reg} is 0 and IACC0L to @var{x} if @var{reg}
is 1.  Other values of @var{reg} are rejected as invalid.

@item void __data_prefetch0 (const void *@var{x})
Use the @code{dcpl} instruction to load the contents of address @var{x}
into the data cache.

@item void __data_prefetch (const void *@var{x})
Use the @code{nldub} instruction to load the contents of address @var{x}
into the data cache.  The instruction is issued in slot I1@.
@end table

@node LoongArch Base Built-in Functions
@subsection LoongArch Base Built-in Functions

These built-in functions are available for LoongArch.

Data Type Description:
@itemize
@item @code{imm0_31}, a compile-time constant in range 0 to 31;
@item @code{imm0_16383}, a compile-time constant in range 0 to 16383;
@item @code{imm0_32767}, a compile-time constant in range 0 to 32767;
@item @code{imm_n2048_2047}, a compile-time constant in range -2048 to 2047;
@end itemize

The intrinsics provided are listed below:
@smallexample
    unsigned int __builtin_loongarch_movfcsr2gr (imm0_31)
    void __builtin_loongarch_movgr2fcsr (imm0_31, unsigned int)
    void __builtin_loongarch_cacop_d (imm0_31, unsigned long int, imm_n2048_2047)
    unsigned int __builtin_loongarch_cpucfg (unsigned int)
    void __builtin_loongarch_asrtle_d (long int, long int)
    void __builtin_loongarch_asrtgt_d (long int, long int)
    long int __builtin_loongarch_lddir_d (long int, imm0_31)
    void __builtin_loongarch_ldpte_d (long int, imm0_31)

    int __builtin_loongarch_crc_w_b_w (char, int)
    int __builtin_loongarch_crc_w_h_w (short, int)
    int __builtin_loongarch_crc_w_w_w (int, int)
    int __builtin_loongarch_crc_w_d_w (long int, int)
    int __builtin_loongarch_crcc_w_b_w (char, int)
    int __builtin_loongarch_crcc_w_h_w (short, int)
    int __builtin_loongarch_crcc_w_w_w (int, int)
    int __builtin_loongarch_crcc_w_d_w (long int, int)

    unsigned int __builtin_loongarch_csrrd_w (imm0_16383)
    unsigned int __builtin_loongarch_csrwr_w (unsigned int, imm0_16383)
    unsigned int __builtin_loongarch_csrxchg_w (unsigned int, unsigned int, imm0_16383)
    unsigned long int __builtin_loongarch_csrrd_d (imm0_16383)
    unsigned long int __builtin_loongarch_csrwr_d (unsigned long int, imm0_16383)
    unsigned long int __builtin_loongarch_csrxchg_d (unsigned long int, unsigned long int, imm0_16383)

    unsigned char __builtin_loongarch_iocsrrd_b (unsigned int)
    unsigned short __builtin_loongarch_iocsrrd_h (unsigned int)
    unsigned int __builtin_loongarch_iocsrrd_w (unsigned int)
    unsigned long int __builtin_loongarch_iocsrrd_d (unsigned int)
    void __builtin_loongarch_iocsrwr_b (unsigned char, unsigned int)
    void __builtin_loongarch_iocsrwr_h (unsigned short, unsigned int)
    void __builtin_loongarch_iocsrwr_w (unsigned int, unsigned int)
    void __builtin_loongarch_iocsrwr_d (unsigned long int, unsigned int)

    void __builtin_loongarch_dbar (imm0_32767)
    void __builtin_loongarch_ibar (imm0_32767)

    void __builtin_loongarch_syscall (imm0_32767)
    void __builtin_loongarch_break (imm0_32767)
@end smallexample

These instrisic functions are available by using @option{-mfrecipe}.
@smallexample
    float __builtin_loongarch_frecipe_s (float);
    double  __builtin_loongarch_frecipe_d (double);
    float __builtin_loongarch_frsqrte_s (float);
    double  __builtin_loongarch_frsqrte_d (double);
@end smallexample

@emph{Note:}Since the control register is divided into 32-bit and 64-bit,
but the access instruction is not distinguished. So GCC renames the control
instructions when implementing intrinsics.

Take the csrrd instruction as an example, built-in functions are implemented as follows:
@smallexample
  __builtin_loongarch_csrrd_w  // When reading the 32-bit control register use.
  __builtin_loongarch_csrrd_d  // When reading the 64-bit control register use.
@end smallexample

For the convenience of use, the built-in functions are encapsulated,
the encapsulated functions and @code{__drdtime_t, __rdtime_t} are
defined in the @code{larchintrin.h}. So if you call the following
function you need to include @code{larchintrin.h}.

@smallexample
     typedef struct drdtime@{
            unsigned long dvalue;
            unsigned long dtimeid;
     @} __drdtime_t;

     typedef struct rdtime@{
            unsigned int value;
            unsigned int timeid;
     @} __rdtime_t;
@end smallexample

@smallexample
    __drdtime_t __rdtime_d (void)
    __rdtime_t  __rdtimel_w (void)
    __rdtime_t  __rdtimeh_w (void)
    unsigned int  __movfcsr2gr (imm0_31)
    void __movgr2fcsr (imm0_31, unsigned int)
    void __cacop_d (imm0_31, unsigned long, imm_n2048_2047)
    unsigned int  __cpucfg (unsigned int)
    void __asrtle_d (long int, long int)
    void __asrtgt_d (long int, long int)
    long int  __lddir_d (long int, imm0_31)
    void __ldpte_d (long int, imm0_31)

    int  __crc_w_b_w (char, int)
    int  __crc_w_h_w (short, int)
    int  __crc_w_w_w (int, int)
    int  __crc_w_d_w (long int, int)
    int  __crcc_w_b_w (char, int)
    int  __crcc_w_h_w (short, int)
    int  __crcc_w_w_w (int, int)
    int  __crcc_w_d_w (long int, int)

    unsigned int  __csrrd_w (imm0_16383)
    unsigned int  __csrwr_w (unsigned int, imm0_16383)
    unsigned int  __csrxchg_w (unsigned int, unsigned int, imm0_16383)
    unsigned long  __csrrd_d (imm0_16383)
    unsigned long  __csrwr_d (unsigned long, imm0_16383)
    unsigned long  __csrxchg_d (unsigned long, unsigned long, imm0_16383)

    unsigned char   __iocsrrd_b (unsigned int)
    unsigned short  __iocsrrd_h (unsigned int)
    unsigned int  __iocsrrd_w (unsigned int)
    unsigned long  __iocsrrd_d (unsigned int)
    void __iocsrwr_b (unsigned char, unsigned int)
    void __iocsrwr_h (unsigned short, unsigned int)
    void __iocsrwr_w (unsigned int, unsigned int)
    void __iocsrwr_d (unsigned long, unsigned int)

    void __dbar (imm0_32767)
    void __ibar (imm0_32767)

    void __syscall (imm0_32767)
    void __break (imm0_32767)
@end smallexample

These instrisic functions are available by including @code{larchintrin.h} and
using @option{-mfrecipe}.
@smallexample
    float __frecipe_s (float);
    double __frecipe_d (double);
    float __frsqrte_s (float);
    double __frsqrte_d (double);
@end smallexample

Additional built-in functions are available for LoongArch family
processors to efficiently use 128-bit floating-point (__float128)
values.

The following are the basic built-in functions supported.
@smallexample
__float128 __builtin_fabsq (__float128);
__float128 __builtin_copysignq (__float128, __float128);
__float128 __builtin_infq (void);
__float128 __builtin_huge_valq (void);
__float128 __builtin_nanq (void);
__float128 __builtin_nansq (void);
@end smallexample

Returns the value that is currently set in the @samp{tp} register.
@smallexample
    void * __builtin_thread_pointer (void)
@end smallexample

@node LoongArch SX Vector Intrinsics
@subsection LoongArch SX Vector Intrinsics

GCC provides intrinsics to access the LSX (Loongson SIMD Extension) instructions.
The interface is made available by including @code{<lsxintrin.h>} and using
@option{-mlsx}.

The following vectors typedefs are included in @code{lsxintrin.h}:

@itemize
@item @code{__m128i}, a 128-bit vector of fixed point;
@item @code{__m128}, a 128-bit vector of single precision floating point;
@item @code{__m128d}, a 128-bit vector of double precision floating point.
@end itemize

Instructions and corresponding built-ins may have additional restrictions and/or
input/output values manipulated:
@itemize
@item @code{imm0_1}, an integer literal in range 0 to 1;
@item @code{imm0_3}, an integer literal in range 0 to 3;
@item @code{imm0_7}, an integer literal in range 0 to 7;
@item @code{imm0_15}, an integer literal in range 0 to 15;
@item @code{imm0_31}, an integer literal in range 0 to 31;
@item @code{imm0_63}, an integer literal in range 0 to 63;
@item @code{imm0_127}, an integer literal in range 0 to 127;
@item @code{imm0_255}, an integer literal in range 0 to 255;
@item @code{imm_n16_15}, an integer literal in range -16 to 15;
@item @code{imm_n128_127}, an integer literal in range -128 to 127;
@item @code{imm_n256_255}, an integer literal in range -256 to 255;
@item @code{imm_n512_511}, an integer literal in range -512 to 511;
@item @code{imm_n1024_1023}, an integer literal in range -1024 to 1023;
@item @code{imm_n2048_2047}, an integer literal in range -2048 to 2047.
@end itemize

For convenience, GCC defines functions @code{__lsx_vrepli_@{b/h/w/d@}} and
@code{__lsx_b[n]z_@{v/b/h/w/d@}}, which are implemented as follows:

@smallexample
a. @code{__lsx_vrepli_@{b/h/w/d@}}: Implemented the case where the highest
   bit of @code{vldi} instruction @code{i13} is 1.

   i13[12] == 1'b0
   case i13[11:10] of :
     2'b00: __lsx_vrepli_b (imm_n512_511)
     2'b01: __lsx_vrepli_h (imm_n512_511)
     2'b10: __lsx_vrepli_w (imm_n512_511)
     2'b11: __lsx_vrepli_d (imm_n512_511)

b. @code{__lsx_b[n]z_@{v/b/h/w/d@}}: Since the @code{vseteqz} class directive
   cannot be used on its own, this function is defined.

   _lsx_bz_v  => vseteqz.v + bcnez
   _lsx_bnz_v => vsetnez.v + bcnez
   _lsx_bz_b  => vsetanyeqz.b + bcnez
   _lsx_bz_h  => vsetanyeqz.h + bcnez
   _lsx_bz_w  => vsetanyeqz.w + bcnez
   _lsx_bz_d  => vsetanyeqz.d + bcnez
   _lsx_bnz_b => vsetallnez.b + bcnez
   _lsx_bnz_h => vsetallnez.h + bcnez
   _lsx_bnz_w => vsetallnez.w + bcnez
   _lsx_bnz_d => vsetallnez.d + bcnez
@end smallexample

@smallexample
eg:
  #include <lsxintrin.h>

  extern __m128i @var{a};

  void
  test (void)
  @{
    if (__lsx_bz_v (@var{a}))
      printf ("1\n");
    else
      printf ("2\n");
  @}
@end smallexample

@emph{Note:} For directives where the intent operand is also the source operand
(modifying only part of the bitfield of the intent register), the first parameter
in the builtin call function is used as the intent operand.

@smallexample
eg:
  #include <lsxintrin.h>

  extern __m128i @var{dst};
  extern int @var{src};

  void
  test (void)
  @{
    @var{dst} = __lsx_vinsgr2vr_b (@var{dst}, @var{src}, 3);
  @}
@end smallexample

The intrinsics provided are listed below:
@smallexample
int __lsx_bnz_b (__m128i);
int __lsx_bnz_d (__m128i);
int __lsx_bnz_h (__m128i);
int __lsx_bnz_v (__m128i);
int __lsx_bnz_w (__m128i);
int __lsx_bz_b (__m128i);
int __lsx_bz_d (__m128i);
int __lsx_bz_h (__m128i);
int __lsx_bz_v (__m128i);
int __lsx_bz_w (__m128i);
__m128i __lsx_vabsd_b (__m128i, __m128i);
__m128i __lsx_vabsd_bu (__m128i, __m128i);
__m128i __lsx_vabsd_d (__m128i, __m128i);
__m128i __lsx_vabsd_du (__m128i, __m128i);
__m128i __lsx_vabsd_h (__m128i, __m128i);
__m128i __lsx_vabsd_hu (__m128i, __m128i);
__m128i __lsx_vabsd_w (__m128i, __m128i);
__m128i __lsx_vabsd_wu (__m128i, __m128i);
__m128i __lsx_vadda_b (__m128i, __m128i);
__m128i __lsx_vadda_d (__m128i, __m128i);
__m128i __lsx_vadda_h (__m128i, __m128i);
__m128i __lsx_vadda_w (__m128i, __m128i);
__m128i __lsx_vadd_b (__m128i, __m128i);
__m128i __lsx_vadd_d (__m128i, __m128i);
__m128i __lsx_vadd_h (__m128i, __m128i);
__m128i __lsx_vaddi_bu (__m128i, imm0_31);
__m128i __lsx_vaddi_du (__m128i, imm0_31);
__m128i __lsx_vaddi_hu (__m128i, imm0_31);
__m128i __lsx_vaddi_wu (__m128i, imm0_31);
__m128i __lsx_vadd_q (__m128i, __m128i);
__m128i __lsx_vadd_w (__m128i, __m128i);
__m128i __lsx_vaddwev_d_w (__m128i, __m128i);
__m128i __lsx_vaddwev_d_wu (__m128i, __m128i);
__m128i __lsx_vaddwev_d_wu_w (__m128i, __m128i);
__m128i __lsx_vaddwev_h_b (__m128i, __m128i);
__m128i __lsx_vaddwev_h_bu (__m128i, __m128i);
__m128i __lsx_vaddwev_h_bu_b (__m128i, __m128i);
__m128i __lsx_vaddwev_q_d (__m128i, __m128i);
__m128i __lsx_vaddwev_q_du (__m128i, __m128i);
__m128i __lsx_vaddwev_q_du_d (__m128i, __m128i);
__m128i __lsx_vaddwev_w_h (__m128i, __m128i);
__m128i __lsx_vaddwev_w_hu (__m128i, __m128i);
__m128i __lsx_vaddwev_w_hu_h (__m128i, __m128i);
__m128i __lsx_vaddwod_d_w (__m128i, __m128i);
__m128i __lsx_vaddwod_d_wu (__m128i, __m128i);
__m128i __lsx_vaddwod_d_wu_w (__m128i, __m128i);
__m128i __lsx_vaddwod_h_b (__m128i, __m128i);
__m128i __lsx_vaddwod_h_bu (__m128i, __m128i);
__m128i __lsx_vaddwod_h_bu_b (__m128i, __m128i);
__m128i __lsx_vaddwod_q_d (__m128i, __m128i);
__m128i __lsx_vaddwod_q_du (__m128i, __m128i);
__m128i __lsx_vaddwod_q_du_d (__m128i, __m128i);
__m128i __lsx_vaddwod_w_h (__m128i, __m128i);
__m128i __lsx_vaddwod_w_hu (__m128i, __m128i);
__m128i __lsx_vaddwod_w_hu_h (__m128i, __m128i);
__m128i __lsx_vandi_b (__m128i, imm0_255);
__m128i __lsx_vandn_v (__m128i, __m128i);
__m128i __lsx_vand_v (__m128i, __m128i);
__m128i __lsx_vavg_b (__m128i, __m128i);
__m128i __lsx_vavg_bu (__m128i, __m128i);
__m128i __lsx_vavg_d (__m128i, __m128i);
__m128i __lsx_vavg_du (__m128i, __m128i);
__m128i __lsx_vavg_h (__m128i, __m128i);
__m128i __lsx_vavg_hu (__m128i, __m128i);
__m128i __lsx_vavgr_b (__m128i, __m128i);
__m128i __lsx_vavgr_bu (__m128i, __m128i);
__m128i __lsx_vavgr_d (__m128i, __m128i);
__m128i __lsx_vavgr_du (__m128i, __m128i);
__m128i __lsx_vavgr_h (__m128i, __m128i);
__m128i __lsx_vavgr_hu (__m128i, __m128i);
__m128i __lsx_vavgr_w (__m128i, __m128i);
__m128i __lsx_vavgr_wu (__m128i, __m128i);
__m128i __lsx_vavg_w (__m128i, __m128i);
__m128i __lsx_vavg_wu (__m128i, __m128i);
__m128i __lsx_vbitclr_b (__m128i, __m128i);
__m128i __lsx_vbitclr_d (__m128i, __m128i);
__m128i __lsx_vbitclr_h (__m128i, __m128i);
__m128i __lsx_vbitclri_b (__m128i, imm0_7);
__m128i __lsx_vbitclri_d (__m128i, imm0_63);
__m128i __lsx_vbitclri_h (__m128i, imm0_15);
__m128i __lsx_vbitclri_w (__m128i, imm0_31);
__m128i __lsx_vbitclr_w (__m128i, __m128i);
__m128i __lsx_vbitrev_b (__m128i, __m128i);
__m128i __lsx_vbitrev_d (__m128i, __m128i);
__m128i __lsx_vbitrev_h (__m128i, __m128i);
__m128i __lsx_vbitrevi_b (__m128i, imm0_7);
__m128i __lsx_vbitrevi_d (__m128i, imm0_63);
__m128i __lsx_vbitrevi_h (__m128i, imm0_15);
__m128i __lsx_vbitrevi_w (__m128i, imm0_31);
__m128i __lsx_vbitrev_w (__m128i, __m128i);
__m128i __lsx_vbitseli_b (__m128i, __m128i, imm0_255);
__m128i __lsx_vbitsel_v (__m128i, __m128i, __m128i);
__m128i __lsx_vbitset_b (__m128i, __m128i);
__m128i __lsx_vbitset_d (__m128i, __m128i);
__m128i __lsx_vbitset_h (__m128i, __m128i);
__m128i __lsx_vbitseti_b (__m128i, imm0_7);
__m128i __lsx_vbitseti_d (__m128i, imm0_63);
__m128i __lsx_vbitseti_h (__m128i, imm0_15);
__m128i __lsx_vbitseti_w (__m128i, imm0_31);
__m128i __lsx_vbitset_w (__m128i, __m128i);
__m128i __lsx_vbsll_v (__m128i, imm0_31);
__m128i __lsx_vbsrl_v (__m128i, imm0_31);
__m128i __lsx_vclo_b (__m128i);
__m128i __lsx_vclo_d (__m128i);
__m128i __lsx_vclo_h (__m128i);
__m128i __lsx_vclo_w (__m128i);
__m128i __lsx_vclz_b (__m128i);
__m128i __lsx_vclz_d (__m128i);
__m128i __lsx_vclz_h (__m128i);
__m128i __lsx_vclz_w (__m128i);
__m128i __lsx_vdiv_b (__m128i, __m128i);
__m128i __lsx_vdiv_bu (__m128i, __m128i);
__m128i __lsx_vdiv_d (__m128i, __m128i);
__m128i __lsx_vdiv_du (__m128i, __m128i);
__m128i __lsx_vdiv_h (__m128i, __m128i);
__m128i __lsx_vdiv_hu (__m128i, __m128i);
__m128i __lsx_vdiv_w (__m128i, __m128i);
__m128i __lsx_vdiv_wu (__m128i, __m128i);
__m128i __lsx_vexth_du_wu (__m128i);
__m128i __lsx_vexth_d_w (__m128i);
__m128i __lsx_vexth_h_b (__m128i);
__m128i __lsx_vexth_hu_bu (__m128i);
__m128i __lsx_vexth_q_d (__m128i);
__m128i __lsx_vexth_qu_du (__m128i);
__m128i __lsx_vexth_w_h (__m128i);
__m128i __lsx_vexth_wu_hu (__m128i);
__m128i __lsx_vextl_q_d (__m128i);
__m128i __lsx_vextl_qu_du (__m128i);
__m128i __lsx_vextrins_b (__m128i, __m128i, imm0_255);
__m128i __lsx_vextrins_d (__m128i, __m128i, imm0_255);
__m128i __lsx_vextrins_h (__m128i, __m128i, imm0_255);
__m128i __lsx_vextrins_w (__m128i, __m128i, imm0_255);
__m128d __lsx_vfadd_d (__m128d, __m128d);
__m128 __lsx_vfadd_s (__m128, __m128);
__m128i __lsx_vfclass_d (__m128d);
__m128i __lsx_vfclass_s (__m128);
__m128i __lsx_vfcmp_caf_d (__m128d, __m128d);
__m128i __lsx_vfcmp_caf_s (__m128, __m128);
__m128i __lsx_vfcmp_ceq_d (__m128d, __m128d);
__m128i __lsx_vfcmp_ceq_s (__m128, __m128);
__m128i __lsx_vfcmp_cle_d (__m128d, __m128d);
__m128i __lsx_vfcmp_cle_s (__m128, __m128);
__m128i __lsx_vfcmp_clt_d (__m128d, __m128d);
__m128i __lsx_vfcmp_clt_s (__m128, __m128);
__m128i __lsx_vfcmp_cne_d (__m128d, __m128d);
__m128i __lsx_vfcmp_cne_s (__m128, __m128);
__m128i __lsx_vfcmp_cor_d (__m128d, __m128d);
__m128i __lsx_vfcmp_cor_s (__m128, __m128);
__m128i __lsx_vfcmp_cueq_d (__m128d, __m128d);
__m128i __lsx_vfcmp_cueq_s (__m128, __m128);
__m128i __lsx_vfcmp_cule_d (__m128d, __m128d);
__m128i __lsx_vfcmp_cule_s (__m128, __m128);
__m128i __lsx_vfcmp_cult_d (__m128d, __m128d);
__m128i __lsx_vfcmp_cult_s (__m128, __m128);
__m128i __lsx_vfcmp_cun_d (__m128d, __m128d);
__m128i __lsx_vfcmp_cune_d (__m128d, __m128d);
__m128i __lsx_vfcmp_cune_s (__m128, __m128);
__m128i __lsx_vfcmp_cun_s (__m128, __m128);
__m128i __lsx_vfcmp_saf_d (__m128d, __m128d);
__m128i __lsx_vfcmp_saf_s (__m128, __m128);
__m128i __lsx_vfcmp_seq_d (__m128d, __m128d);
__m128i __lsx_vfcmp_seq_s (__m128, __m128);
__m128i __lsx_vfcmp_sle_d (__m128d, __m128d);
__m128i __lsx_vfcmp_sle_s (__m128, __m128);
__m128i __lsx_vfcmp_slt_d (__m128d, __m128d);
__m128i __lsx_vfcmp_slt_s (__m128, __m128);
__m128i __lsx_vfcmp_sne_d (__m128d, __m128d);
__m128i __lsx_vfcmp_sne_s (__m128, __m128);
__m128i __lsx_vfcmp_sor_d (__m128d, __m128d);
__m128i __lsx_vfcmp_sor_s (__m128, __m128);
__m128i __lsx_vfcmp_sueq_d (__m128d, __m128d);
__m128i __lsx_vfcmp_sueq_s (__m128, __m128);
__m128i __lsx_vfcmp_sule_d (__m128d, __m128d);
__m128i __lsx_vfcmp_sule_s (__m128, __m128);
__m128i __lsx_vfcmp_sult_d (__m128d, __m128d);
__m128i __lsx_vfcmp_sult_s (__m128, __m128);
__m128i __lsx_vfcmp_sun_d (__m128d, __m128d);
__m128i __lsx_vfcmp_sune_d (__m128d, __m128d);
__m128i __lsx_vfcmp_sune_s (__m128, __m128);
__m128i __lsx_vfcmp_sun_s (__m128, __m128);
__m128d __lsx_vfcvth_d_s (__m128);
__m128i __lsx_vfcvt_h_s (__m128, __m128);
__m128 __lsx_vfcvth_s_h (__m128i);
__m128d __lsx_vfcvtl_d_s (__m128);
__m128 __lsx_vfcvtl_s_h (__m128i);
__m128 __lsx_vfcvt_s_d (__m128d, __m128d);
__m128d __lsx_vfdiv_d (__m128d, __m128d);
__m128 __lsx_vfdiv_s (__m128, __m128);
__m128d __lsx_vffint_d_l (__m128i);
__m128d __lsx_vffint_d_lu (__m128i);
__m128d __lsx_vffinth_d_w (__m128i);
__m128d __lsx_vffintl_d_w (__m128i);
__m128 __lsx_vffint_s_l (__m128i, __m128i);
__m128 __lsx_vffint_s_w (__m128i);
__m128 __lsx_vffint_s_wu (__m128i);
__m128d __lsx_vflogb_d (__m128d);
__m128 __lsx_vflogb_s (__m128);
__m128d __lsx_vfmadd_d (__m128d, __m128d, __m128d);
__m128 __lsx_vfmadd_s (__m128, __m128, __m128);
__m128d __lsx_vfmaxa_d (__m128d, __m128d);
__m128 __lsx_vfmaxa_s (__m128, __m128);
__m128d __lsx_vfmax_d (__m128d, __m128d);
__m128 __lsx_vfmax_s (__m128, __m128);
__m128d __lsx_vfmina_d (__m128d, __m128d);
__m128 __lsx_vfmina_s (__m128, __m128);
__m128d __lsx_vfmin_d (__m128d, __m128d);
__m128 __lsx_vfmin_s (__m128, __m128);
__m128d __lsx_vfmsub_d (__m128d, __m128d, __m128d);
__m128 __lsx_vfmsub_s (__m128, __m128, __m128);
__m128d __lsx_vfmul_d (__m128d, __m128d);
__m128 __lsx_vfmul_s (__m128, __m128);
__m128d __lsx_vfnmadd_d (__m128d, __m128d, __m128d);
__m128 __lsx_vfnmadd_s (__m128, __m128, __m128);
__m128d __lsx_vfnmsub_d (__m128d, __m128d, __m128d);
__m128 __lsx_vfnmsub_s (__m128, __m128, __m128);
__m128d __lsx_vfrecip_d (__m128d);
__m128 __lsx_vfrecip_s (__m128);
__m128d __lsx_vfrint_d (__m128d);
__m128d __lsx_vfrintrm_d (__m128d);
__m128 __lsx_vfrintrm_s (__m128);
__m128d __lsx_vfrintrne_d (__m128d);
__m128 __lsx_vfrintrne_s (__m128);
__m128d __lsx_vfrintrp_d (__m128d);
__m128 __lsx_vfrintrp_s (__m128);
__m128d __lsx_vfrintrz_d (__m128d);
__m128 __lsx_vfrintrz_s (__m128);
__m128 __lsx_vfrint_s (__m128);
__m128d __lsx_vfrsqrt_d (__m128d);
__m128 __lsx_vfrsqrt_s (__m128);
__m128i __lsx_vfrstp_b (__m128i, __m128i, __m128i);
__m128i __lsx_vfrstp_h (__m128i, __m128i, __m128i);
__m128i __lsx_vfrstpi_b (__m128i, __m128i, imm0_31);
__m128i __lsx_vfrstpi_h (__m128i, __m128i, imm0_31);
__m128d __lsx_vfsqrt_d (__m128d);
__m128 __lsx_vfsqrt_s (__m128);
__m128d __lsx_vfsub_d (__m128d, __m128d);
__m128 __lsx_vfsub_s (__m128, __m128);
__m128i __lsx_vftinth_l_s (__m128);
__m128i __lsx_vftint_l_d (__m128d);
__m128i __lsx_vftintl_l_s (__m128);
__m128i __lsx_vftint_lu_d (__m128d);
__m128i __lsx_vftintrmh_l_s (__m128);
__m128i __lsx_vftintrm_l_d (__m128d);
__m128i __lsx_vftintrml_l_s (__m128);
__m128i __lsx_vftintrm_w_d (__m128d, __m128d);
__m128i __lsx_vftintrm_w_s (__m128);
__m128i __lsx_vftintrneh_l_s (__m128);
__m128i __lsx_vftintrne_l_d (__m128d);
__m128i __lsx_vftintrnel_l_s (__m128);
__m128i __lsx_vftintrne_w_d (__m128d, __m128d);
__m128i __lsx_vftintrne_w_s (__m128);
__m128i __lsx_vftintrph_l_s (__m128);
__m128i __lsx_vftintrp_l_d (__m128d);
__m128i __lsx_vftintrpl_l_s (__m128);
__m128i __lsx_vftintrp_w_d (__m128d, __m128d);
__m128i __lsx_vftintrp_w_s (__m128);
__m128i __lsx_vftintrzh_l_s (__m128);
__m128i __lsx_vftintrz_l_d (__m128d);
__m128i __lsx_vftintrzl_l_s (__m128);
__m128i __lsx_vftintrz_lu_d (__m128d);
__m128i __lsx_vftintrz_w_d (__m128d, __m128d);
__m128i __lsx_vftintrz_w_s (__m128);
__m128i __lsx_vftintrz_wu_s (__m128);
__m128i __lsx_vftint_w_d (__m128d, __m128d);
__m128i __lsx_vftint_w_s (__m128);
__m128i __lsx_vftint_wu_s (__m128);
__m128i __lsx_vhaddw_du_wu (__m128i, __m128i);
__m128i __lsx_vhaddw_d_w (__m128i, __m128i);
__m128i __lsx_vhaddw_h_b (__m128i, __m128i);
__m128i __lsx_vhaddw_hu_bu (__m128i, __m128i);
__m128i __lsx_vhaddw_q_d (__m128i, __m128i);
__m128i __lsx_vhaddw_qu_du (__m128i, __m128i);
__m128i __lsx_vhaddw_w_h (__m128i, __m128i);
__m128i __lsx_vhaddw_wu_hu (__m128i, __m128i);
__m128i __lsx_vhsubw_du_wu (__m128i, __m128i);
__m128i __lsx_vhsubw_d_w (__m128i, __m128i);
__m128i __lsx_vhsubw_h_b (__m128i, __m128i);
__m128i __lsx_vhsubw_hu_bu (__m128i, __m128i);
__m128i __lsx_vhsubw_q_d (__m128i, __m128i);
__m128i __lsx_vhsubw_qu_du (__m128i, __m128i);
__m128i __lsx_vhsubw_w_h (__m128i, __m128i);
__m128i __lsx_vhsubw_wu_hu (__m128i, __m128i);
__m128i __lsx_vilvh_b (__m128i, __m128i);
__m128i __lsx_vilvh_d (__m128i, __m128i);
__m128i __lsx_vilvh_h (__m128i, __m128i);
__m128i __lsx_vilvh_w (__m128i, __m128i);
__m128i __lsx_vilvl_b (__m128i, __m128i);
__m128i __lsx_vilvl_d (__m128i, __m128i);
__m128i __lsx_vilvl_h (__m128i, __m128i);
__m128i __lsx_vilvl_w (__m128i, __m128i);
__m128i __lsx_vinsgr2vr_b (__m128i, int, imm0_15);
__m128i __lsx_vinsgr2vr_d (__m128i, long int, imm0_1);
__m128i __lsx_vinsgr2vr_h (__m128i, int, imm0_7);
__m128i __lsx_vinsgr2vr_w (__m128i, int, imm0_3);
__m128i __lsx_vld (void *, imm_n2048_2047);
__m128i __lsx_vldi (imm_n1024_1023);
__m128i __lsx_vldrepl_b (void *, imm_n2048_2047);
__m128i __lsx_vldrepl_d (void *, imm_n256_255);
__m128i __lsx_vldrepl_h (void *, imm_n1024_1023);
__m128i __lsx_vldrepl_w (void *, imm_n512_511);
__m128i __lsx_vldx (void *, long int);
__m128i __lsx_vmadd_b (__m128i, __m128i, __m128i);
__m128i __lsx_vmadd_d (__m128i, __m128i, __m128i);
__m128i __lsx_vmadd_h (__m128i, __m128i, __m128i);
__m128i __lsx_vmadd_w (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwev_d_w (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwev_d_wu (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwev_d_wu_w (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwev_h_b (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwev_h_bu (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwev_h_bu_b (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwev_q_d (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwev_q_du (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwev_q_du_d (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwev_w_h (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwev_w_hu (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwev_w_hu_h (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwod_d_w (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwod_d_wu (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwod_d_wu_w (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwod_h_b (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwod_h_bu (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwod_h_bu_b (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwod_q_d (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwod_q_du (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwod_q_du_d (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwod_w_h (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwod_w_hu (__m128i, __m128i, __m128i);
__m128i __lsx_vmaddwod_w_hu_h (__m128i, __m128i, __m128i);
__m128i __lsx_vmax_b (__m128i, __m128i);
__m128i __lsx_vmax_bu (__m128i, __m128i);
__m128i __lsx_vmax_d (__m128i, __m128i);
__m128i __lsx_vmax_du (__m128i, __m128i);
__m128i __lsx_vmax_h (__m128i, __m128i);
__m128i __lsx_vmax_hu (__m128i, __m128i);
__m128i __lsx_vmaxi_b (__m128i, imm_n16_15);
__m128i __lsx_vmaxi_bu (__m128i, imm0_31);
__m128i __lsx_vmaxi_d (__m128i, imm_n16_15);
__m128i __lsx_vmaxi_du (__m128i, imm0_31);
__m128i __lsx_vmaxi_h (__m128i, imm_n16_15);
__m128i __lsx_vmaxi_hu (__m128i, imm0_31);
__m128i __lsx_vmaxi_w (__m128i, imm_n16_15);
__m128i __lsx_vmaxi_wu (__m128i, imm0_31);
__m128i __lsx_vmax_w (__m128i, __m128i);
__m128i __lsx_vmax_wu (__m128i, __m128i);
__m128i __lsx_vmin_b (__m128i, __m128i);
__m128i __lsx_vmin_bu (__m128i, __m128i);
__m128i __lsx_vmin_d (__m128i, __m128i);
__m128i __lsx_vmin_du (__m128i, __m128i);
__m128i __lsx_vmin_h (__m128i, __m128i);
__m128i __lsx_vmin_hu (__m128i, __m128i);
__m128i __lsx_vmini_b (__m128i, imm_n16_15);
__m128i __lsx_vmini_bu (__m128i, imm0_31);
__m128i __lsx_vmini_d (__m128i, imm_n16_15);
__m128i __lsx_vmini_du (__m128i, imm0_31);
__m128i __lsx_vmini_h (__m128i, imm_n16_15);
__m128i __lsx_vmini_hu (__m128i, imm0_31);
__m128i __lsx_vmini_w (__m128i, imm_n16_15);
__m128i __lsx_vmini_wu (__m128i, imm0_31);
__m128i __lsx_vmin_w (__m128i, __m128i);
__m128i __lsx_vmin_wu (__m128i, __m128i);
__m128i __lsx_vmod_b (__m128i, __m128i);
__m128i __lsx_vmod_bu (__m128i, __m128i);
__m128i __lsx_vmod_d (__m128i, __m128i);
__m128i __lsx_vmod_du (__m128i, __m128i);
__m128i __lsx_vmod_h (__m128i, __m128i);
__m128i __lsx_vmod_hu (__m128i, __m128i);
__m128i __lsx_vmod_w (__m128i, __m128i);
__m128i __lsx_vmod_wu (__m128i, __m128i);
__m128i __lsx_vmskgez_b (__m128i);
__m128i __lsx_vmskltz_b (__m128i);
__m128i __lsx_vmskltz_d (__m128i);
__m128i __lsx_vmskltz_h (__m128i);
__m128i __lsx_vmskltz_w (__m128i);
__m128i __lsx_vmsknz_b (__m128i);
__m128i __lsx_vmsub_b (__m128i, __m128i, __m128i);
__m128i __lsx_vmsub_d (__m128i, __m128i, __m128i);
__m128i __lsx_vmsub_h (__m128i, __m128i, __m128i);
__m128i __lsx_vmsub_w (__m128i, __m128i, __m128i);
__m128i __lsx_vmuh_b (__m128i, __m128i);
__m128i __lsx_vmuh_bu (__m128i, __m128i);
__m128i __lsx_vmuh_d (__m128i, __m128i);
__m128i __lsx_vmuh_du (__m128i, __m128i);
__m128i __lsx_vmuh_h (__m128i, __m128i);
__m128i __lsx_vmuh_hu (__m128i, __m128i);
__m128i __lsx_vmuh_w (__m128i, __m128i);
__m128i __lsx_vmuh_wu (__m128i, __m128i);
__m128i __lsx_vmul_b (__m128i, __m128i);
__m128i __lsx_vmul_d (__m128i, __m128i);
__m128i __lsx_vmul_h (__m128i, __m128i);
__m128i __lsx_vmul_w (__m128i, __m128i);
__m128i __lsx_vmulwev_d_w (__m128i, __m128i);
__m128i __lsx_vmulwev_d_wu (__m128i, __m128i);
__m128i __lsx_vmulwev_d_wu_w (__m128i, __m128i);
__m128i __lsx_vmulwev_h_b (__m128i, __m128i);
__m128i __lsx_vmulwev_h_bu (__m128i, __m128i);
__m128i __lsx_vmulwev_h_bu_b (__m128i, __m128i);
__m128i __lsx_vmulwev_q_d (__m128i, __m128i);
__m128i __lsx_vmulwev_q_du (__m128i, __m128i);
__m128i __lsx_vmulwev_q_du_d (__m128i, __m128i);
__m128i __lsx_vmulwev_w_h (__m128i, __m128i);
__m128i __lsx_vmulwev_w_hu (__m128i, __m128i);
__m128i __lsx_vmulwev_w_hu_h (__m128i, __m128i);
__m128i __lsx_vmulwod_d_w (__m128i, __m128i);
__m128i __lsx_vmulwod_d_wu (__m128i, __m128i);
__m128i __lsx_vmulwod_d_wu_w (__m128i, __m128i);
__m128i __lsx_vmulwod_h_b (__m128i, __m128i);
__m128i __lsx_vmulwod_h_bu (__m128i, __m128i);
__m128i __lsx_vmulwod_h_bu_b (__m128i, __m128i);
__m128i __lsx_vmulwod_q_d (__m128i, __m128i);
__m128i __lsx_vmulwod_q_du (__m128i, __m128i);
__m128i __lsx_vmulwod_q_du_d (__m128i, __m128i);
__m128i __lsx_vmulwod_w_h (__m128i, __m128i);
__m128i __lsx_vmulwod_w_hu (__m128i, __m128i);
__m128i __lsx_vmulwod_w_hu_h (__m128i, __m128i);
__m128i __lsx_vneg_b (__m128i);
__m128i __lsx_vneg_d (__m128i);
__m128i __lsx_vneg_h (__m128i);
__m128i __lsx_vneg_w (__m128i);
__m128i __lsx_vnori_b (__m128i, imm0_255);
__m128i __lsx_vnor_v (__m128i, __m128i);
__m128i __lsx_vori_b (__m128i, imm0_255);
__m128i __lsx_vorn_v (__m128i, __m128i);
__m128i __lsx_vor_v (__m128i, __m128i);
__m128i __lsx_vpackev_b (__m128i, __m128i);
__m128i __lsx_vpackev_d (__m128i, __m128i);
__m128i __lsx_vpackev_h (__m128i, __m128i);
__m128i __lsx_vpackev_w (__m128i, __m128i);
__m128i __lsx_vpackod_b (__m128i, __m128i);
__m128i __lsx_vpackod_d (__m128i, __m128i);
__m128i __lsx_vpackod_h (__m128i, __m128i);
__m128i __lsx_vpackod_w (__m128i, __m128i);
__m128i __lsx_vpcnt_b (__m128i);
__m128i __lsx_vpcnt_d (__m128i);
__m128i __lsx_vpcnt_h (__m128i);
__m128i __lsx_vpcnt_w (__m128i);
__m128i __lsx_vpermi_w (__m128i, __m128i, imm0_255);
__m128i __lsx_vpickev_b (__m128i, __m128i);
__m128i __lsx_vpickev_d (__m128i, __m128i);
__m128i __lsx_vpickev_h (__m128i, __m128i);
__m128i __lsx_vpickev_w (__m128i, __m128i);
__m128i __lsx_vpickod_b (__m128i, __m128i);
__m128i __lsx_vpickod_d (__m128i, __m128i);
__m128i __lsx_vpickod_h (__m128i, __m128i);
__m128i __lsx_vpickod_w (__m128i, __m128i);
int __lsx_vpickve2gr_b (__m128i, imm0_15);
unsigned int __lsx_vpickve2gr_bu (__m128i, imm0_15);
long int __lsx_vpickve2gr_d (__m128i, imm0_1);
unsigned long int __lsx_vpickve2gr_du (__m128i, imm0_1);
int __lsx_vpickve2gr_h (__m128i, imm0_7);
unsigned int __lsx_vpickve2gr_hu (__m128i, imm0_7);
int __lsx_vpickve2gr_w (__m128i, imm0_3);
unsigned int __lsx_vpickve2gr_wu (__m128i, imm0_3);
__m128i __lsx_vreplgr2vr_b (int);
__m128i __lsx_vreplgr2vr_d (long int);
__m128i __lsx_vreplgr2vr_h (int);
__m128i __lsx_vreplgr2vr_w (int);
__m128i __lsx_vrepli_b (imm_n512_511);
__m128i __lsx_vrepli_d (imm_n512_511);
__m128i __lsx_vrepli_h (imm_n512_511);
__m128i __lsx_vrepli_w (imm_n512_511);
__m128i __lsx_vreplve_b (__m128i, int);
__m128i __lsx_vreplve_d (__m128i, int);
__m128i __lsx_vreplve_h (__m128i, int);
__m128i __lsx_vreplvei_b (__m128i, imm0_15);
__m128i __lsx_vreplvei_d (__m128i, imm0_1);
__m128i __lsx_vreplvei_h (__m128i, imm0_7);
__m128i __lsx_vreplvei_w (__m128i, imm0_3);
__m128i __lsx_vreplve_w (__m128i, int);
__m128i __lsx_vrotr_b (__m128i, __m128i);
__m128i __lsx_vrotr_d (__m128i, __m128i);
__m128i __lsx_vrotr_h (__m128i, __m128i);
__m128i __lsx_vrotri_b (__m128i, imm0_7);
__m128i __lsx_vrotri_d (__m128i, imm0_63);
__m128i __lsx_vrotri_h (__m128i, imm0_15);
__m128i __lsx_vrotri_w (__m128i, imm0_31);
__m128i __lsx_vrotr_w (__m128i, __m128i);
__m128i __lsx_vsadd_b (__m128i, __m128i);
__m128i __lsx_vsadd_bu (__m128i, __m128i);
__m128i __lsx_vsadd_d (__m128i, __m128i);
__m128i __lsx_vsadd_du (__m128i, __m128i);
__m128i __lsx_vsadd_h (__m128i, __m128i);
__m128i __lsx_vsadd_hu (__m128i, __m128i);
__m128i __lsx_vsadd_w (__m128i, __m128i);
__m128i __lsx_vsadd_wu (__m128i, __m128i);
__m128i __lsx_vsat_b (__m128i, imm0_7);
__m128i __lsx_vsat_bu (__m128i, imm0_7);
__m128i __lsx_vsat_d (__m128i, imm0_63);
__m128i __lsx_vsat_du (__m128i, imm0_63);
__m128i __lsx_vsat_h (__m128i, imm0_15);
__m128i __lsx_vsat_hu (__m128i, imm0_15);
__m128i __lsx_vsat_w (__m128i, imm0_31);
__m128i __lsx_vsat_wu (__m128i, imm0_31);
__m128i __lsx_vseq_b (__m128i, __m128i);
__m128i __lsx_vseq_d (__m128i, __m128i);
__m128i __lsx_vseq_h (__m128i, __m128i);
__m128i __lsx_vseqi_b (__m128i, imm_n16_15);
__m128i __lsx_vseqi_d (__m128i, imm_n16_15);
__m128i __lsx_vseqi_h (__m128i, imm_n16_15);
__m128i __lsx_vseqi_w (__m128i, imm_n16_15);
__m128i __lsx_vseq_w (__m128i, __m128i);
__m128i __lsx_vshuf4i_b (__m128i, imm0_255);
__m128i __lsx_vshuf4i_d (__m128i, __m128i, imm0_255);
__m128i __lsx_vshuf4i_h (__m128i, imm0_255);
__m128i __lsx_vshuf4i_w (__m128i, imm0_255);
__m128i __lsx_vshuf_b (__m128i, __m128i, __m128i);
__m128i __lsx_vshuf_d (__m128i, __m128i, __m128i);
__m128i __lsx_vshuf_h (__m128i, __m128i, __m128i);
__m128i __lsx_vshuf_w (__m128i, __m128i, __m128i);
__m128i __lsx_vsigncov_b (__m128i, __m128i);
__m128i __lsx_vsigncov_d (__m128i, __m128i);
__m128i __lsx_vsigncov_h (__m128i, __m128i);
__m128i __lsx_vsigncov_w (__m128i, __m128i);
__m128i __lsx_vsle_b (__m128i, __m128i);
__m128i __lsx_vsle_bu (__m128i, __m128i);
__m128i __lsx_vsle_d (__m128i, __m128i);
__m128i __lsx_vsle_du (__m128i, __m128i);
__m128i __lsx_vsle_h (__m128i, __m128i);
__m128i __lsx_vsle_hu (__m128i, __m128i);
__m128i __lsx_vslei_b (__m128i, imm_n16_15);
__m128i __lsx_vslei_bu (__m128i, imm0_31);
__m128i __lsx_vslei_d (__m128i, imm_n16_15);
__m128i __lsx_vslei_du (__m128i, imm0_31);
__m128i __lsx_vslei_h (__m128i, imm_n16_15);
__m128i __lsx_vslei_hu (__m128i, imm0_31);
__m128i __lsx_vslei_w (__m128i, imm_n16_15);
__m128i __lsx_vslei_wu (__m128i, imm0_31);
__m128i __lsx_vsle_w (__m128i, __m128i);
__m128i __lsx_vsle_wu (__m128i, __m128i);
__m128i __lsx_vsll_b (__m128i, __m128i);
__m128i __lsx_vsll_d (__m128i, __m128i);
__m128i __lsx_vsll_h (__m128i, __m128i);
__m128i __lsx_vslli_b (__m128i, imm0_7);
__m128i __lsx_vslli_d (__m128i, imm0_63);
__m128i __lsx_vslli_h (__m128i, imm0_15);
__m128i __lsx_vslli_w (__m128i, imm0_31);
__m128i __lsx_vsll_w (__m128i, __m128i);
__m128i __lsx_vsllwil_du_wu (__m128i, imm0_31);
__m128i __lsx_vsllwil_d_w (__m128i, imm0_31);
__m128i __lsx_vsllwil_h_b (__m128i, imm0_7);
__m128i __lsx_vsllwil_hu_bu (__m128i, imm0_7);
__m128i __lsx_vsllwil_w_h (__m128i, imm0_15);
__m128i __lsx_vsllwil_wu_hu (__m128i, imm0_15);
__m128i __lsx_vslt_b (__m128i, __m128i);
__m128i __lsx_vslt_bu (__m128i, __m128i);
__m128i __lsx_vslt_d (__m128i, __m128i);
__m128i __lsx_vslt_du (__m128i, __m128i);
__m128i __lsx_vslt_h (__m128i, __m128i);
__m128i __lsx_vslt_hu (__m128i, __m128i);
__m128i __lsx_vslti_b (__m128i, imm_n16_15);
__m128i __lsx_vslti_bu (__m128i, imm0_31);
__m128i __lsx_vslti_d (__m128i, imm_n16_15);
__m128i __lsx_vslti_du (__m128i, imm0_31);
__m128i __lsx_vslti_h (__m128i, imm_n16_15);
__m128i __lsx_vslti_hu (__m128i, imm0_31);
__m128i __lsx_vslti_w (__m128i, imm_n16_15);
__m128i __lsx_vslti_wu (__m128i, imm0_31);
__m128i __lsx_vslt_w (__m128i, __m128i);
__m128i __lsx_vslt_wu (__m128i, __m128i);
__m128i __lsx_vsra_b (__m128i, __m128i);
__m128i __lsx_vsra_d (__m128i, __m128i);
__m128i __lsx_vsra_h (__m128i, __m128i);
__m128i __lsx_vsrai_b (__m128i, imm0_7);
__m128i __lsx_vsrai_d (__m128i, imm0_63);
__m128i __lsx_vsrai_h (__m128i, imm0_15);
__m128i __lsx_vsrai_w (__m128i, imm0_31);
__m128i __lsx_vsran_b_h (__m128i, __m128i);
__m128i __lsx_vsran_h_w (__m128i, __m128i);
__m128i __lsx_vsrani_b_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vsrani_d_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vsrani_h_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vsrani_w_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vsran_w_d (__m128i, __m128i);
__m128i __lsx_vsrar_b (__m128i, __m128i);
__m128i __lsx_vsrar_d (__m128i, __m128i);
__m128i __lsx_vsrar_h (__m128i, __m128i);
__m128i __lsx_vsrari_b (__m128i, imm0_7);
__m128i __lsx_vsrari_d (__m128i, imm0_63);
__m128i __lsx_vsrari_h (__m128i, imm0_15);
__m128i __lsx_vsrari_w (__m128i, imm0_31);
__m128i __lsx_vsrarn_b_h (__m128i, __m128i);
__m128i __lsx_vsrarn_h_w (__m128i, __m128i);
__m128i __lsx_vsrarni_b_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vsrarni_d_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vsrarni_h_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vsrarni_w_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vsrarn_w_d (__m128i, __m128i);
__m128i __lsx_vsrar_w (__m128i, __m128i);
__m128i __lsx_vsra_w (__m128i, __m128i);
__m128i __lsx_vsrl_b (__m128i, __m128i);
__m128i __lsx_vsrl_d (__m128i, __m128i);
__m128i __lsx_vsrl_h (__m128i, __m128i);
__m128i __lsx_vsrli_b (__m128i, imm0_7);
__m128i __lsx_vsrli_d (__m128i, imm0_63);
__m128i __lsx_vsrli_h (__m128i, imm0_15);
__m128i __lsx_vsrli_w (__m128i, imm0_31);
__m128i __lsx_vsrln_b_h (__m128i, __m128i);
__m128i __lsx_vsrln_h_w (__m128i, __m128i);
__m128i __lsx_vsrlni_b_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vsrlni_d_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vsrlni_h_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vsrlni_w_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vsrln_w_d (__m128i, __m128i);
__m128i __lsx_vsrlr_b (__m128i, __m128i);
__m128i __lsx_vsrlr_d (__m128i, __m128i);
__m128i __lsx_vsrlr_h (__m128i, __m128i);
__m128i __lsx_vsrlri_b (__m128i, imm0_7);
__m128i __lsx_vsrlri_d (__m128i, imm0_63);
__m128i __lsx_vsrlri_h (__m128i, imm0_15);
__m128i __lsx_vsrlri_w (__m128i, imm0_31);
__m128i __lsx_vsrlrn_b_h (__m128i, __m128i);
__m128i __lsx_vsrlrn_h_w (__m128i, __m128i);
__m128i __lsx_vsrlrni_b_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vsrlrni_d_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vsrlrni_h_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vsrlrni_w_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vsrlrn_w_d (__m128i, __m128i);
__m128i __lsx_vsrlr_w (__m128i, __m128i);
__m128i __lsx_vsrl_w (__m128i, __m128i);
__m128i __lsx_vssran_b_h (__m128i, __m128i);
__m128i __lsx_vssran_bu_h (__m128i, __m128i);
__m128i __lsx_vssran_hu_w (__m128i, __m128i);
__m128i __lsx_vssran_h_w (__m128i, __m128i);
__m128i __lsx_vssrani_b_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vssrani_bu_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vssrani_d_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vssrani_du_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vssrani_hu_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vssrani_h_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vssrani_w_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vssrani_wu_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vssran_w_d (__m128i, __m128i);
__m128i __lsx_vssran_wu_d (__m128i, __m128i);
__m128i __lsx_vssrarn_b_h (__m128i, __m128i);
__m128i __lsx_vssrarn_bu_h (__m128i, __m128i);
__m128i __lsx_vssrarn_hu_w (__m128i, __m128i);
__m128i __lsx_vssrarn_h_w (__m128i, __m128i);
__m128i __lsx_vssrarni_b_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vssrarni_bu_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vssrarni_d_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vssrarni_du_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vssrarni_hu_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vssrarni_h_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vssrarni_w_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vssrarni_wu_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vssrarn_w_d (__m128i, __m128i);
__m128i __lsx_vssrarn_wu_d (__m128i, __m128i);
__m128i __lsx_vssrln_b_h (__m128i, __m128i);
__m128i __lsx_vssrln_bu_h (__m128i, __m128i);
__m128i __lsx_vssrln_hu_w (__m128i, __m128i);
__m128i __lsx_vssrln_h_w (__m128i, __m128i);
__m128i __lsx_vssrlni_b_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vssrlni_bu_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vssrlni_d_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vssrlni_du_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vssrlni_hu_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vssrlni_h_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vssrlni_w_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vssrlni_wu_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vssrln_w_d (__m128i, __m128i);
__m128i __lsx_vssrln_wu_d (__m128i, __m128i);
__m128i __lsx_vssrlrn_b_h (__m128i, __m128i);
__m128i __lsx_vssrlrn_bu_h (__m128i, __m128i);
__m128i __lsx_vssrlrn_hu_w (__m128i, __m128i);
__m128i __lsx_vssrlrn_h_w (__m128i, __m128i);
__m128i __lsx_vssrlrni_b_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vssrlrni_bu_h (__m128i, __m128i, imm0_15);
__m128i __lsx_vssrlrni_d_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vssrlrni_du_q (__m128i, __m128i, imm0_127);
__m128i __lsx_vssrlrni_hu_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vssrlrni_h_w (__m128i, __m128i, imm0_31);
__m128i __lsx_vssrlrni_w_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vssrlrni_wu_d (__m128i, __m128i, imm0_63);
__m128i __lsx_vssrlrn_w_d (__m128i, __m128i);
__m128i __lsx_vssrlrn_wu_d (__m128i, __m128i);
__m128i __lsx_vssub_b (__m128i, __m128i);
__m128i __lsx_vssub_bu (__m128i, __m128i);
__m128i __lsx_vssub_d (__m128i, __m128i);
__m128i __lsx_vssub_du (__m128i, __m128i);
__m128i __lsx_vssub_h (__m128i, __m128i);
__m128i __lsx_vssub_hu (__m128i, __m128i);
__m128i __lsx_vssub_w (__m128i, __m128i);
__m128i __lsx_vssub_wu (__m128i, __m128i);
void __lsx_vst (__m128i, void *, imm_n2048_2047);
void __lsx_vstelm_b (__m128i, void *, imm_n128_127, imm0_15);
void __lsx_vstelm_d (__m128i, void *, imm_n128_127, imm0_1);
void __lsx_vstelm_h (__m128i, void *, imm_n128_127, imm0_7);
void __lsx_vstelm_w (__m128i, void *, imm_n128_127, imm0_3);
void __lsx_vstx (__m128i, void *, long int);
__m128i __lsx_vsub_b (__m128i, __m128i);
__m128i __lsx_vsub_d (__m128i, __m128i);
__m128i __lsx_vsub_h (__m128i, __m128i);
__m128i __lsx_vsubi_bu (__m128i, imm0_31);
__m128i __lsx_vsubi_du (__m128i, imm0_31);
__m128i __lsx_vsubi_hu (__m128i, imm0_31);
__m128i __lsx_vsubi_wu (__m128i, imm0_31);
__m128i __lsx_vsub_q (__m128i, __m128i);
__m128i __lsx_vsub_w (__m128i, __m128i);
__m128i __lsx_vsubwev_d_w (__m128i, __m128i);
__m128i __lsx_vsubwev_d_wu (__m128i, __m128i);
__m128i __lsx_vsubwev_h_b (__m128i, __m128i);
__m128i __lsx_vsubwev_h_bu (__m128i, __m128i);
__m128i __lsx_vsubwev_q_d (__m128i, __m128i);
__m128i __lsx_vsubwev_q_du (__m128i, __m128i);
__m128i __lsx_vsubwev_w_h (__m128i, __m128i);
__m128i __lsx_vsubwev_w_hu (__m128i, __m128i);
__m128i __lsx_vsubwod_d_w (__m128i, __m128i);
__m128i __lsx_vsubwod_d_wu (__m128i, __m128i);
__m128i __lsx_vsubwod_h_b (__m128i, __m128i);
__m128i __lsx_vsubwod_h_bu (__m128i, __m128i);
__m128i __lsx_vsubwod_q_d (__m128i, __m128i);
__m128i __lsx_vsubwod_q_du (__m128i, __m128i);
__m128i __lsx_vsubwod_w_h (__m128i, __m128i);
__m128i __lsx_vsubwod_w_hu (__m128i, __m128i);
__m128i __lsx_vxori_b (__m128i, imm0_255);
__m128i __lsx_vxor_v (__m128i, __m128i);
@end smallexample

These instrisic functions are available by including @code{lsxintrin.h} and
using @option{-mfrecipe} and @option{-mlsx}.
@smallexample
__m128d __lsx_vfrecipe_d (__m128d);
__m128 __lsx_vfrecipe_s (__m128);
__m128d __lsx_vfrsqrte_d (__m128d);
__m128 __lsx_vfrsqrte_s (__m128);
@end smallexample

@node LoongArch ASX Vector Intrinsics
@subsection LoongArch ASX Vector Intrinsics

GCC provides intrinsics to access the LASX (Loongson Advanced SIMD Extension)
instructions. The interface is made available by including @code{<lasxintrin.h>}
and using @option{-mlasx}.

The following vectors typedefs are included in @code{lasxintrin.h}:

@itemize
@item @code{__m256i}, a 256-bit vector of fixed point;
@item @code{__m256}, a 256-bit vector of single precision floating point;
@item @code{__m256d}, a 256-bit vector of double precision floating point.
@end itemize

Instructions and corresponding built-ins may have additional restrictions and/or
input/output values manipulated:

@itemize
@item @code{imm0_1}, an integer literal in range 0 to 1.
@item @code{imm0_3}, an integer literal in range 0 to 3.
@item @code{imm0_7}, an integer literal in range 0 to 7.
@item @code{imm0_15}, an integer literal in range 0 to 15.
@item @code{imm0_31}, an integer literal in range 0 to 31.
@item @code{imm0_63}, an integer literal in range 0 to 63.
@item @code{imm0_127}, an integer literal in range 0 to 127.
@item @code{imm0_255}, an integer literal in range 0 to 255.
@item @code{imm_n16_15}, an integer literal in range -16 to 15.
@item @code{imm_n128_127}, an integer literal in range -128 to 127.
@item @code{imm_n256_255}, an integer literal in range -256 to 255.
@item @code{imm_n512_511}, an integer literal in range -512 to 511.
@item @code{imm_n1024_1023}, an integer literal in range -1024 to 1023.
@item @code{imm_n2048_2047}, an integer literal in range -2048 to 2047.
@end itemize

For convenience, GCC defines functions @code{__lasx_xvrepli_@{b/h/w/d@}} and
@code{__lasx_b[n]z_@{v/b/h/w/d@}}, which are implemented as follows:

@smallexample
a. @code{__lasx_xvrepli_@{b/h/w/d@}}: Implemented the case where the highest
   bit of @code{xvldi} instruction @code{i13} is 1.

   i13[12] == 1'b0
   case i13[11:10] of :
     2'b00: __lasx_xvrepli_b (imm_n512_511)
     2'b01: __lasx_xvrepli_h (imm_n512_511)
     2'b10: __lasx_xvrepli_w (imm_n512_511)
     2'b11: __lasx_xvrepli_d (imm_n512_511)

b. @code{__lasx_b[n]z_@{v/b/h/w/d@}}: Since the @code{xvseteqz} class directive
   cannot be used on its own, this function is defined.

   __lasx_xbz_v  => xvseteqz.v + bcnez
   __lasx_xbnz_v => xvsetnez.v + bcnez
   __lasx_xbz_b  => xvsetanyeqz.b + bcnez
   __lasx_xbz_h  => xvsetanyeqz.h + bcnez
   __lasx_xbz_w  => xvsetanyeqz.w + bcnez
   __lasx_xbz_d  => xvsetanyeqz.d + bcnez
   __lasx_xbnz_b => xvsetallnez.b + bcnez
   __lasx_xbnz_h => xvsetallnez.h + bcnez
   __lasx_xbnz_w => xvsetallnez.w + bcnez
   __lasx_xbnz_d => xvsetallnez.d + bcnez
@end smallexample

@smallexample
eg:
  #include <lasxintrin.h>

  extern __m256i @var{a};

  void
  test (void)
  @{
    if (__lasx_xbz_v (@var{a}))
      printf ("1\n");
    else
      printf ("2\n");
  @}
@end smallexample

@emph{Note:} For directives where the intent operand is also the source operand
(modifying only part of the bitfield of the intent register), the first parameter
in the builtin call function is used as the intent operand.

@smallexample
eg:
  #include <lasxintrin.h>
  extern __m256i @var{dst};
  int @var{src};

  void
  test (void)
  @{
    @var{dst} = __lasx_xvinsgr2vr_w (@var{dst}, @var{src}, 3);
  @}
@end smallexample


The intrinsics provided are listed below:

@smallexample
__m256i __lasx_vext2xv_d_b (__m256i);
__m256i __lasx_vext2xv_d_h (__m256i);
__m256i __lasx_vext2xv_du_bu (__m256i);
__m256i __lasx_vext2xv_du_hu (__m256i);
__m256i __lasx_vext2xv_du_wu (__m256i);
__m256i __lasx_vext2xv_d_w (__m256i);
__m256i __lasx_vext2xv_h_b (__m256i);
__m256i __lasx_vext2xv_hu_bu (__m256i);
__m256i __lasx_vext2xv_w_b (__m256i);
__m256i __lasx_vext2xv_w_h (__m256i);
__m256i __lasx_vext2xv_wu_bu (__m256i);
__m256i __lasx_vext2xv_wu_hu (__m256i);
int __lasx_xbnz_b (__m256i);
int __lasx_xbnz_d (__m256i);
int __lasx_xbnz_h (__m256i);
int __lasx_xbnz_v (__m256i);
int __lasx_xbnz_w (__m256i);
int __lasx_xbz_b (__m256i);
int __lasx_xbz_d (__m256i);
int __lasx_xbz_h (__m256i);
int __lasx_xbz_v (__m256i);
int __lasx_xbz_w (__m256i);
__m256i __lasx_xvabsd_b (__m256i, __m256i);
__m256i __lasx_xvabsd_bu (__m256i, __m256i);
__m256i __lasx_xvabsd_d (__m256i, __m256i);
__m256i __lasx_xvabsd_du (__m256i, __m256i);
__m256i __lasx_xvabsd_h (__m256i, __m256i);
__m256i __lasx_xvabsd_hu (__m256i, __m256i);
__m256i __lasx_xvabsd_w (__m256i, __m256i);
__m256i __lasx_xvabsd_wu (__m256i, __m256i);
__m256i __lasx_xvadda_b (__m256i, __m256i);
__m256i __lasx_xvadda_d (__m256i, __m256i);
__m256i __lasx_xvadda_h (__m256i, __m256i);
__m256i __lasx_xvadda_w (__m256i, __m256i);
__m256i __lasx_xvadd_b (__m256i, __m256i);
__m256i __lasx_xvadd_d (__m256i, __m256i);
__m256i __lasx_xvadd_h (__m256i, __m256i);
__m256i __lasx_xvaddi_bu (__m256i, imm0_31);
__m256i __lasx_xvaddi_du (__m256i, imm0_31);
__m256i __lasx_xvaddi_hu (__m256i, imm0_31);
__m256i __lasx_xvaddi_wu (__m256i, imm0_31);
__m256i __lasx_xvadd_q (__m256i, __m256i);
__m256i __lasx_xvadd_w (__m256i, __m256i);
__m256i __lasx_xvaddwev_d_w (__m256i, __m256i);
__m256i __lasx_xvaddwev_d_wu (__m256i, __m256i);
__m256i __lasx_xvaddwev_d_wu_w (__m256i, __m256i);
__m256i __lasx_xvaddwev_h_b (__m256i, __m256i);
__m256i __lasx_xvaddwev_h_bu (__m256i, __m256i);
__m256i __lasx_xvaddwev_h_bu_b (__m256i, __m256i);
__m256i __lasx_xvaddwev_q_d (__m256i, __m256i);
__m256i __lasx_xvaddwev_q_du (__m256i, __m256i);
__m256i __lasx_xvaddwev_q_du_d (__m256i, __m256i);
__m256i __lasx_xvaddwev_w_h (__m256i, __m256i);
__m256i __lasx_xvaddwev_w_hu (__m256i, __m256i);
__m256i __lasx_xvaddwev_w_hu_h (__m256i, __m256i);
__m256i __lasx_xvaddwod_d_w (__m256i, __m256i);
__m256i __lasx_xvaddwod_d_wu (__m256i, __m256i);
__m256i __lasx_xvaddwod_d_wu_w (__m256i, __m256i);
__m256i __lasx_xvaddwod_h_b (__m256i, __m256i);
__m256i __lasx_xvaddwod_h_bu (__m256i, __m256i);
__m256i __lasx_xvaddwod_h_bu_b (__m256i, __m256i);
__m256i __lasx_xvaddwod_q_d (__m256i, __m256i);
__m256i __lasx_xvaddwod_q_du (__m256i, __m256i);
__m256i __lasx_xvaddwod_q_du_d (__m256i, __m256i);
__m256i __lasx_xvaddwod_w_h (__m256i, __m256i);
__m256i __lasx_xvaddwod_w_hu (__m256i, __m256i);
__m256i __lasx_xvaddwod_w_hu_h (__m256i, __m256i);
__m256i __lasx_xvandi_b (__m256i, imm0_255);
__m256i __lasx_xvandn_v (__m256i, __m256i);
__m256i __lasx_xvand_v (__m256i, __m256i);
__m256i __lasx_xvavg_b (__m256i, __m256i);
__m256i __lasx_xvavg_bu (__m256i, __m256i);
__m256i __lasx_xvavg_d (__m256i, __m256i);
__m256i __lasx_xvavg_du (__m256i, __m256i);
__m256i __lasx_xvavg_h (__m256i, __m256i);
__m256i __lasx_xvavg_hu (__m256i, __m256i);
__m256i __lasx_xvavgr_b (__m256i, __m256i);
__m256i __lasx_xvavgr_bu (__m256i, __m256i);
__m256i __lasx_xvavgr_d (__m256i, __m256i);
__m256i __lasx_xvavgr_du (__m256i, __m256i);
__m256i __lasx_xvavgr_h (__m256i, __m256i);
__m256i __lasx_xvavgr_hu (__m256i, __m256i);
__m256i __lasx_xvavgr_w (__m256i, __m256i);
__m256i __lasx_xvavgr_wu (__m256i, __m256i);
__m256i __lasx_xvavg_w (__m256i, __m256i);
__m256i __lasx_xvavg_wu (__m256i, __m256i);
__m256i __lasx_xvbitclr_b (__m256i, __m256i);
__m256i __lasx_xvbitclr_d (__m256i, __m256i);
__m256i __lasx_xvbitclr_h (__m256i, __m256i);
__m256i __lasx_xvbitclri_b (__m256i, imm0_7);
__m256i __lasx_xvbitclri_d (__m256i, imm0_63);
__m256i __lasx_xvbitclri_h (__m256i, imm0_15);
__m256i __lasx_xvbitclri_w (__m256i, imm0_31);
__m256i __lasx_xvbitclr_w (__m256i, __m256i);
__m256i __lasx_xvbitrev_b (__m256i, __m256i);
__m256i __lasx_xvbitrev_d (__m256i, __m256i);
__m256i __lasx_xvbitrev_h (__m256i, __m256i);
__m256i __lasx_xvbitrevi_b (__m256i, imm0_7);
__m256i __lasx_xvbitrevi_d (__m256i, imm0_63);
__m256i __lasx_xvbitrevi_h (__m256i, imm0_15);
__m256i __lasx_xvbitrevi_w (__m256i, imm0_31);
__m256i __lasx_xvbitrev_w (__m256i, __m256i);
__m256i __lasx_xvbitseli_b (__m256i, __m256i, imm0_255);
__m256i __lasx_xvbitsel_v (__m256i, __m256i, __m256i);
__m256i __lasx_xvbitset_b (__m256i, __m256i);
__m256i __lasx_xvbitset_d (__m256i, __m256i);
__m256i __lasx_xvbitset_h (__m256i, __m256i);
__m256i __lasx_xvbitseti_b (__m256i, imm0_7);
__m256i __lasx_xvbitseti_d (__m256i, imm0_63);
__m256i __lasx_xvbitseti_h (__m256i, imm0_15);
__m256i __lasx_xvbitseti_w (__m256i, imm0_31);
__m256i __lasx_xvbitset_w (__m256i, __m256i);
__m256i __lasx_xvbsll_v (__m256i, imm0_31);
__m256i __lasx_xvbsrl_v (__m256i, imm0_31);
__m256i __lasx_xvclo_b (__m256i);
__m256i __lasx_xvclo_d (__m256i);
__m256i __lasx_xvclo_h (__m256i);
__m256i __lasx_xvclo_w (__m256i);
__m256i __lasx_xvclz_b (__m256i);
__m256i __lasx_xvclz_d (__m256i);
__m256i __lasx_xvclz_h (__m256i);
__m256i __lasx_xvclz_w (__m256i);
__m256i __lasx_xvdiv_b (__m256i, __m256i);
__m256i __lasx_xvdiv_bu (__m256i, __m256i);
__m256i __lasx_xvdiv_d (__m256i, __m256i);
__m256i __lasx_xvdiv_du (__m256i, __m256i);
__m256i __lasx_xvdiv_h (__m256i, __m256i);
__m256i __lasx_xvdiv_hu (__m256i, __m256i);
__m256i __lasx_xvdiv_w (__m256i, __m256i);
__m256i __lasx_xvdiv_wu (__m256i, __m256i);
__m256i __lasx_xvexth_du_wu (__m256i);
__m256i __lasx_xvexth_d_w (__m256i);
__m256i __lasx_xvexth_h_b (__m256i);
__m256i __lasx_xvexth_hu_bu (__m256i);
__m256i __lasx_xvexth_q_d (__m256i);
__m256i __lasx_xvexth_qu_du (__m256i);
__m256i __lasx_xvexth_w_h (__m256i);
__m256i __lasx_xvexth_wu_hu (__m256i);
__m256i __lasx_xvextl_q_d (__m256i);
__m256i __lasx_xvextl_qu_du (__m256i);
__m256i __lasx_xvextrins_b (__m256i, __m256i, imm0_255);
__m256i __lasx_xvextrins_d (__m256i, __m256i, imm0_255);
__m256i __lasx_xvextrins_h (__m256i, __m256i, imm0_255);
__m256i __lasx_xvextrins_w (__m256i, __m256i, imm0_255);
__m256d __lasx_xvfadd_d (__m256d, __m256d);
__m256 __lasx_xvfadd_s (__m256, __m256);
__m256i __lasx_xvfclass_d (__m256d);
__m256i __lasx_xvfclass_s (__m256);
__m256i __lasx_xvfcmp_caf_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_caf_s (__m256, __m256);
__m256i __lasx_xvfcmp_ceq_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_ceq_s (__m256, __m256);
__m256i __lasx_xvfcmp_cle_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_cle_s (__m256, __m256);
__m256i __lasx_xvfcmp_clt_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_clt_s (__m256, __m256);
__m256i __lasx_xvfcmp_cne_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_cne_s (__m256, __m256);
__m256i __lasx_xvfcmp_cor_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_cor_s (__m256, __m256);
__m256i __lasx_xvfcmp_cueq_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_cueq_s (__m256, __m256);
__m256i __lasx_xvfcmp_cule_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_cule_s (__m256, __m256);
__m256i __lasx_xvfcmp_cult_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_cult_s (__m256, __m256);
__m256i __lasx_xvfcmp_cun_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_cune_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_cune_s (__m256, __m256);
__m256i __lasx_xvfcmp_cun_s (__m256, __m256);
__m256i __lasx_xvfcmp_saf_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_saf_s (__m256, __m256);
__m256i __lasx_xvfcmp_seq_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_seq_s (__m256, __m256);
__m256i __lasx_xvfcmp_sle_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_sle_s (__m256, __m256);
__m256i __lasx_xvfcmp_slt_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_slt_s (__m256, __m256);
__m256i __lasx_xvfcmp_sne_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_sne_s (__m256, __m256);
__m256i __lasx_xvfcmp_sor_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_sor_s (__m256, __m256);
__m256i __lasx_xvfcmp_sueq_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_sueq_s (__m256, __m256);
__m256i __lasx_xvfcmp_sule_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_sule_s (__m256, __m256);
__m256i __lasx_xvfcmp_sult_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_sult_s (__m256, __m256);
__m256i __lasx_xvfcmp_sun_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_sune_d (__m256d, __m256d);
__m256i __lasx_xvfcmp_sune_s (__m256, __m256);
__m256i __lasx_xvfcmp_sun_s (__m256, __m256);
__m256d __lasx_xvfcvth_d_s (__m256);
__m256i __lasx_xvfcvt_h_s (__m256, __m256);
__m256 __lasx_xvfcvth_s_h (__m256i);
__m256d __lasx_xvfcvtl_d_s (__m256);
__m256 __lasx_xvfcvtl_s_h (__m256i);
__m256 __lasx_xvfcvt_s_d (__m256d, __m256d);
__m256d __lasx_xvfdiv_d (__m256d, __m256d);
__m256 __lasx_xvfdiv_s (__m256, __m256);
__m256d __lasx_xvffint_d_l (__m256i);
__m256d __lasx_xvffint_d_lu (__m256i);
__m256d __lasx_xvffinth_d_w (__m256i);
__m256d __lasx_xvffintl_d_w (__m256i);
__m256 __lasx_xvffint_s_l (__m256i, __m256i);
__m256 __lasx_xvffint_s_w (__m256i);
__m256 __lasx_xvffint_s_wu (__m256i);
__m256d __lasx_xvflogb_d (__m256d);
__m256 __lasx_xvflogb_s (__m256);
__m256d __lasx_xvfmadd_d (__m256d, __m256d, __m256d);
__m256 __lasx_xvfmadd_s (__m256, __m256, __m256);
__m256d __lasx_xvfmaxa_d (__m256d, __m256d);
__m256 __lasx_xvfmaxa_s (__m256, __m256);
__m256d __lasx_xvfmax_d (__m256d, __m256d);
__m256 __lasx_xvfmax_s (__m256, __m256);
__m256d __lasx_xvfmina_d (__m256d, __m256d);
__m256 __lasx_xvfmina_s (__m256, __m256);
__m256d __lasx_xvfmin_d (__m256d, __m256d);
__m256 __lasx_xvfmin_s (__m256, __m256);
__m256d __lasx_xvfmsub_d (__m256d, __m256d, __m256d);
__m256 __lasx_xvfmsub_s (__m256, __m256, __m256);
__m256d __lasx_xvfmul_d (__m256d, __m256d);
__m256 __lasx_xvfmul_s (__m256, __m256);
__m256d __lasx_xvfnmadd_d (__m256d, __m256d, __m256d);
__m256 __lasx_xvfnmadd_s (__m256, __m256, __m256);
__m256d __lasx_xvfnmsub_d (__m256d, __m256d, __m256d);
__m256 __lasx_xvfnmsub_s (__m256, __m256, __m256);
__m256d __lasx_xvfrecip_d (__m256d);
__m256 __lasx_xvfrecip_s (__m256);
__m256d __lasx_xvfrint_d (__m256d);
__m256d __lasx_xvfrintrm_d (__m256d);
__m256 __lasx_xvfrintrm_s (__m256);
__m256d __lasx_xvfrintrne_d (__m256d);
__m256 __lasx_xvfrintrne_s (__m256);
__m256d __lasx_xvfrintrp_d (__m256d);
__m256 __lasx_xvfrintrp_s (__m256);
__m256d __lasx_xvfrintrz_d (__m256d);
__m256 __lasx_xvfrintrz_s (__m256);
__m256 __lasx_xvfrint_s (__m256);
__m256d __lasx_xvfrsqrt_d (__m256d);
__m256 __lasx_xvfrsqrt_s (__m256);
__m256i __lasx_xvfrstp_b (__m256i, __m256i, __m256i);
__m256i __lasx_xvfrstp_h (__m256i, __m256i, __m256i);
__m256i __lasx_xvfrstpi_b (__m256i, __m256i, imm0_31);
__m256i __lasx_xvfrstpi_h (__m256i, __m256i, imm0_31);
__m256d __lasx_xvfsqrt_d (__m256d);
__m256 __lasx_xvfsqrt_s (__m256);
__m256d __lasx_xvfsub_d (__m256d, __m256d);
__m256 __lasx_xvfsub_s (__m256, __m256);
__m256i __lasx_xvftinth_l_s (__m256);
__m256i __lasx_xvftint_l_d (__m256d);
__m256i __lasx_xvftintl_l_s (__m256);
__m256i __lasx_xvftint_lu_d (__m256d);
__m256i __lasx_xvftintrmh_l_s (__m256);
__m256i __lasx_xvftintrm_l_d (__m256d);
__m256i __lasx_xvftintrml_l_s (__m256);
__m256i __lasx_xvftintrm_w_d (__m256d, __m256d);
__m256i __lasx_xvftintrm_w_s (__m256);
__m256i __lasx_xvftintrneh_l_s (__m256);
__m256i __lasx_xvftintrne_l_d (__m256d);
__m256i __lasx_xvftintrnel_l_s (__m256);
__m256i __lasx_xvftintrne_w_d (__m256d, __m256d);
__m256i __lasx_xvftintrne_w_s (__m256);
__m256i __lasx_xvftintrph_l_s (__m256);
__m256i __lasx_xvftintrp_l_d (__m256d);
__m256i __lasx_xvftintrpl_l_s (__m256);
__m256i __lasx_xvftintrp_w_d (__m256d, __m256d);
__m256i __lasx_xvftintrp_w_s (__m256);
__m256i __lasx_xvftintrzh_l_s (__m256);
__m256i __lasx_xvftintrz_l_d (__m256d);
__m256i __lasx_xvftintrzl_l_s (__m256);
__m256i __lasx_xvftintrz_lu_d (__m256d);
__m256i __lasx_xvftintrz_w_d (__m256d, __m256d);
__m256i __lasx_xvftintrz_w_s (__m256);
__m256i __lasx_xvftintrz_wu_s (__m256);
__m256i __lasx_xvftint_w_d (__m256d, __m256d);
__m256i __lasx_xvftint_w_s (__m256);
__m256i __lasx_xvftint_wu_s (__m256);
__m256i __lasx_xvhaddw_du_wu (__m256i, __m256i);
__m256i __lasx_xvhaddw_d_w (__m256i, __m256i);
__m256i __lasx_xvhaddw_h_b (__m256i, __m256i);
__m256i __lasx_xvhaddw_hu_bu (__m256i, __m256i);
__m256i __lasx_xvhaddw_q_d (__m256i, __m256i);
__m256i __lasx_xvhaddw_qu_du (__m256i, __m256i);
__m256i __lasx_xvhaddw_w_h (__m256i, __m256i);
__m256i __lasx_xvhaddw_wu_hu (__m256i, __m256i);
__m256i __lasx_xvhsubw_du_wu (__m256i, __m256i);
__m256i __lasx_xvhsubw_d_w (__m256i, __m256i);
__m256i __lasx_xvhsubw_h_b (__m256i, __m256i);
__m256i __lasx_xvhsubw_hu_bu (__m256i, __m256i);
__m256i __lasx_xvhsubw_q_d (__m256i, __m256i);
__m256i __lasx_xvhsubw_qu_du (__m256i, __m256i);
__m256i __lasx_xvhsubw_w_h (__m256i, __m256i);
__m256i __lasx_xvhsubw_wu_hu (__m256i, __m256i);
__m256i __lasx_xvilvh_b (__m256i, __m256i);
__m256i __lasx_xvilvh_d (__m256i, __m256i);
__m256i __lasx_xvilvh_h (__m256i, __m256i);
__m256i __lasx_xvilvh_w (__m256i, __m256i);
__m256i __lasx_xvilvl_b (__m256i, __m256i);
__m256i __lasx_xvilvl_d (__m256i, __m256i);
__m256i __lasx_xvilvl_h (__m256i, __m256i);
__m256i __lasx_xvilvl_w (__m256i, __m256i);
__m256i __lasx_xvinsgr2vr_d (__m256i, long int, imm0_3);
__m256i __lasx_xvinsgr2vr_w (__m256i, int, imm0_7);
__m256i __lasx_xvinsve0_d (__m256i, __m256i, imm0_3);
__m256i __lasx_xvinsve0_w (__m256i, __m256i, imm0_7);
__m256i __lasx_xvld (void *, imm_n2048_2047);
__m256i __lasx_xvldi (imm_n1024_1023);
__m256i __lasx_xvldrepl_b (void *, imm_n2048_2047);
__m256i __lasx_xvldrepl_d (void *, imm_n256_255);
__m256i __lasx_xvldrepl_h (void *, imm_n1024_1023);
__m256i __lasx_xvldrepl_w (void *, imm_n512_511);
__m256i __lasx_xvldx (void *, long int);
__m256i __lasx_xvmadd_b (__m256i, __m256i, __m256i);
__m256i __lasx_xvmadd_d (__m256i, __m256i, __m256i);
__m256i __lasx_xvmadd_h (__m256i, __m256i, __m256i);
__m256i __lasx_xvmadd_w (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwev_d_w (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwev_d_wu (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwev_d_wu_w (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwev_h_b (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwev_h_bu (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwev_h_bu_b (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwev_q_d (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwev_q_du (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwev_q_du_d (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwev_w_h (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwev_w_hu (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwev_w_hu_h (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwod_d_w (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwod_d_wu (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwod_d_wu_w (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwod_h_b (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwod_h_bu (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwod_h_bu_b (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwod_q_d (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwod_q_du (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwod_q_du_d (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwod_w_h (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwod_w_hu (__m256i, __m256i, __m256i);
__m256i __lasx_xvmaddwod_w_hu_h (__m256i, __m256i, __m256i);
__m256i __lasx_xvmax_b (__m256i, __m256i);
__m256i __lasx_xvmax_bu (__m256i, __m256i);
__m256i __lasx_xvmax_d (__m256i, __m256i);
__m256i __lasx_xvmax_du (__m256i, __m256i);
__m256i __lasx_xvmax_h (__m256i, __m256i);
__m256i __lasx_xvmax_hu (__m256i, __m256i);
__m256i __lasx_xvmaxi_b (__m256i, imm_n16_15);
__m256i __lasx_xvmaxi_bu (__m256i, imm0_31);
__m256i __lasx_xvmaxi_d (__m256i, imm_n16_15);
__m256i __lasx_xvmaxi_du (__m256i, imm0_31);
__m256i __lasx_xvmaxi_h (__m256i, imm_n16_15);
__m256i __lasx_xvmaxi_hu (__m256i, imm0_31);
__m256i __lasx_xvmaxi_w (__m256i, imm_n16_15);
__m256i __lasx_xvmaxi_wu (__m256i, imm0_31);
__m256i __lasx_xvmax_w (__m256i, __m256i);
__m256i __lasx_xvmax_wu (__m256i, __m256i);
__m256i __lasx_xvmin_b (__m256i, __m256i);
__m256i __lasx_xvmin_bu (__m256i, __m256i);
__m256i __lasx_xvmin_d (__m256i, __m256i);
__m256i __lasx_xvmin_du (__m256i, __m256i);
__m256i __lasx_xvmin_h (__m256i, __m256i);
__m256i __lasx_xvmin_hu (__m256i, __m256i);
__m256i __lasx_xvmini_b (__m256i, imm_n16_15);
__m256i __lasx_xvmini_bu (__m256i, imm0_31);
__m256i __lasx_xvmini_d (__m256i, imm_n16_15);
__m256i __lasx_xvmini_du (__m256i, imm0_31);
__m256i __lasx_xvmini_h (__m256i, imm_n16_15);
__m256i __lasx_xvmini_hu (__m256i, imm0_31);
__m256i __lasx_xvmini_w (__m256i, imm_n16_15);
__m256i __lasx_xvmini_wu (__m256i, imm0_31);
__m256i __lasx_xvmin_w (__m256i, __m256i);
__m256i __lasx_xvmin_wu (__m256i, __m256i);
__m256i __lasx_xvmod_b (__m256i, __m256i);
__m256i __lasx_xvmod_bu (__m256i, __m256i);
__m256i __lasx_xvmod_d (__m256i, __m256i);
__m256i __lasx_xvmod_du (__m256i, __m256i);
__m256i __lasx_xvmod_h (__m256i, __m256i);
__m256i __lasx_xvmod_hu (__m256i, __m256i);
__m256i __lasx_xvmod_w (__m256i, __m256i);
__m256i __lasx_xvmod_wu (__m256i, __m256i);
__m256i __lasx_xvmskgez_b (__m256i);
__m256i __lasx_xvmskltz_b (__m256i);
__m256i __lasx_xvmskltz_d (__m256i);
__m256i __lasx_xvmskltz_h (__m256i);
__m256i __lasx_xvmskltz_w (__m256i);
__m256i __lasx_xvmsknz_b (__m256i);
__m256i __lasx_xvmsub_b (__m256i, __m256i, __m256i);
__m256i __lasx_xvmsub_d (__m256i, __m256i, __m256i);
__m256i __lasx_xvmsub_h (__m256i, __m256i, __m256i);
__m256i __lasx_xvmsub_w (__m256i, __m256i, __m256i);
__m256i __lasx_xvmuh_b (__m256i, __m256i);
__m256i __lasx_xvmuh_bu (__m256i, __m256i);
__m256i __lasx_xvmuh_d (__m256i, __m256i);
__m256i __lasx_xvmuh_du (__m256i, __m256i);
__m256i __lasx_xvmuh_h (__m256i, __m256i);
__m256i __lasx_xvmuh_hu (__m256i, __m256i);
__m256i __lasx_xvmuh_w (__m256i, __m256i);
__m256i __lasx_xvmuh_wu (__m256i, __m256i);
__m256i __lasx_xvmul_b (__m256i, __m256i);
__m256i __lasx_xvmul_d (__m256i, __m256i);
__m256i __lasx_xvmul_h (__m256i, __m256i);
__m256i __lasx_xvmul_w (__m256i, __m256i);
__m256i __lasx_xvmulwev_d_w (__m256i, __m256i);
__m256i __lasx_xvmulwev_d_wu (__m256i, __m256i);
__m256i __lasx_xvmulwev_d_wu_w (__m256i, __m256i);
__m256i __lasx_xvmulwev_h_b (__m256i, __m256i);
__m256i __lasx_xvmulwev_h_bu (__m256i, __m256i);
__m256i __lasx_xvmulwev_h_bu_b (__m256i, __m256i);
__m256i __lasx_xvmulwev_q_d (__m256i, __m256i);
__m256i __lasx_xvmulwev_q_du (__m256i, __m256i);
__m256i __lasx_xvmulwev_q_du_d (__m256i, __m256i);
__m256i __lasx_xvmulwev_w_h (__m256i, __m256i);
__m256i __lasx_xvmulwev_w_hu (__m256i, __m256i);
__m256i __lasx_xvmulwev_w_hu_h (__m256i, __m256i);
__m256i __lasx_xvmulwod_d_w (__m256i, __m256i);
__m256i __lasx_xvmulwod_d_wu (__m256i, __m256i);
__m256i __lasx_xvmulwod_d_wu_w (__m256i, __m256i);
__m256i __lasx_xvmulwod_h_b (__m256i, __m256i);
__m256i __lasx_xvmulwod_h_bu (__m256i, __m256i);
__m256i __lasx_xvmulwod_h_bu_b (__m256i, __m256i);
__m256i __lasx_xvmulwod_q_d (__m256i, __m256i);
__m256i __lasx_xvmulwod_q_du (__m256i, __m256i);
__m256i __lasx_xvmulwod_q_du_d (__m256i, __m256i);
__m256i __lasx_xvmulwod_w_h (__m256i, __m256i);
__m256i __lasx_xvmulwod_w_hu (__m256i, __m256i);
__m256i __lasx_xvmulwod_w_hu_h (__m256i, __m256i);
__m256i __lasx_xvneg_b (__m256i);
__m256i __lasx_xvneg_d (__m256i);
__m256i __lasx_xvneg_h (__m256i);
__m256i __lasx_xvneg_w (__m256i);
__m256i __lasx_xvnori_b (__m256i, imm0_255);
__m256i __lasx_xvnor_v (__m256i, __m256i);
__m256i __lasx_xvori_b (__m256i, imm0_255);
__m256i __lasx_xvorn_v (__m256i, __m256i);
__m256i __lasx_xvor_v (__m256i, __m256i);
__m256i __lasx_xvpackev_b (__m256i, __m256i);
__m256i __lasx_xvpackev_d (__m256i, __m256i);
__m256i __lasx_xvpackev_h (__m256i, __m256i);
__m256i __lasx_xvpackev_w (__m256i, __m256i);
__m256i __lasx_xvpackod_b (__m256i, __m256i);
__m256i __lasx_xvpackod_d (__m256i, __m256i);
__m256i __lasx_xvpackod_h (__m256i, __m256i);
__m256i __lasx_xvpackod_w (__m256i, __m256i);
__m256i __lasx_xvpcnt_b (__m256i);
__m256i __lasx_xvpcnt_d (__m256i);
__m256i __lasx_xvpcnt_h (__m256i);
__m256i __lasx_xvpcnt_w (__m256i);
__m256i __lasx_xvpermi_d (__m256i, imm0_255);
__m256i __lasx_xvpermi_q (__m256i, __m256i, imm0_255);
__m256i __lasx_xvpermi_w (__m256i, __m256i, imm0_255);
__m256i __lasx_xvperm_w (__m256i, __m256i);
__m256i __lasx_xvpickev_b (__m256i, __m256i);
__m256i __lasx_xvpickev_d (__m256i, __m256i);
__m256i __lasx_xvpickev_h (__m256i, __m256i);
__m256i __lasx_xvpickev_w (__m256i, __m256i);
__m256i __lasx_xvpickod_b (__m256i, __m256i);
__m256i __lasx_xvpickod_d (__m256i, __m256i);
__m256i __lasx_xvpickod_h (__m256i, __m256i);
__m256i __lasx_xvpickod_w (__m256i, __m256i);
long int __lasx_xvpickve2gr_d (__m256i, imm0_3);
unsigned long int __lasx_xvpickve2gr_du (__m256i, imm0_3);
int __lasx_xvpickve2gr_w (__m256i, imm0_7);
unsigned int __lasx_xvpickve2gr_wu (__m256i, imm0_7);
__m256i __lasx_xvpickve_d (__m256i, imm0_3);
__m256d __lasx_xvpickve_d_f (__m256d, imm0_3);
__m256i __lasx_xvpickve_w (__m256i, imm0_7);
__m256 __lasx_xvpickve_w_f (__m256, imm0_7);
__m256i __lasx_xvrepl128vei_b (__m256i, imm0_15);
__m256i __lasx_xvrepl128vei_d (__m256i, imm0_1);
__m256i __lasx_xvrepl128vei_h (__m256i, imm0_7);
__m256i __lasx_xvrepl128vei_w (__m256i, imm0_3);
__m256i __lasx_xvreplgr2vr_b (int);
__m256i __lasx_xvreplgr2vr_d (long int);
__m256i __lasx_xvreplgr2vr_h (int);
__m256i __lasx_xvreplgr2vr_w (int);
__m256i __lasx_xvrepli_b (imm_n512_511);
__m256i __lasx_xvrepli_d (imm_n512_511);
__m256i __lasx_xvrepli_h (imm_n512_511);
__m256i __lasx_xvrepli_w (imm_n512_511);
__m256i __lasx_xvreplve0_b (__m256i);
__m256i __lasx_xvreplve0_d (__m256i);
__m256i __lasx_xvreplve0_h (__m256i);
__m256i __lasx_xvreplve0_q (__m256i);
__m256i __lasx_xvreplve0_w (__m256i);
__m256i __lasx_xvreplve_b (__m256i, int);
__m256i __lasx_xvreplve_d (__m256i, int);
__m256i __lasx_xvreplve_h (__m256i, int);
__m256i __lasx_xvreplve_w (__m256i, int);
__m256i __lasx_xvrotr_b (__m256i, __m256i);
__m256i __lasx_xvrotr_d (__m256i, __m256i);
__m256i __lasx_xvrotr_h (__m256i, __m256i);
__m256i __lasx_xvrotri_b (__m256i, imm0_7);
__m256i __lasx_xvrotri_d (__m256i, imm0_63);
__m256i __lasx_xvrotri_h (__m256i, imm0_15);
__m256i __lasx_xvrotri_w (__m256i, imm0_31);
__m256i __lasx_xvrotr_w (__m256i, __m256i);
__m256i __lasx_xvsadd_b (__m256i, __m256i);
__m256i __lasx_xvsadd_bu (__m256i, __m256i);
__m256i __lasx_xvsadd_d (__m256i, __m256i);
__m256i __lasx_xvsadd_du (__m256i, __m256i);
__m256i __lasx_xvsadd_h (__m256i, __m256i);
__m256i __lasx_xvsadd_hu (__m256i, __m256i);
__m256i __lasx_xvsadd_w (__m256i, __m256i);
__m256i __lasx_xvsadd_wu (__m256i, __m256i);
__m256i __lasx_xvsat_b (__m256i, imm0_7);
__m256i __lasx_xvsat_bu (__m256i, imm0_7);
__m256i __lasx_xvsat_d (__m256i, imm0_63);
__m256i __lasx_xvsat_du (__m256i, imm0_63);
__m256i __lasx_xvsat_h (__m256i, imm0_15);
__m256i __lasx_xvsat_hu (__m256i, imm0_15);
__m256i __lasx_xvsat_w (__m256i, imm0_31);
__m256i __lasx_xvsat_wu (__m256i, imm0_31);
__m256i __lasx_xvseq_b (__m256i, __m256i);
__m256i __lasx_xvseq_d (__m256i, __m256i);
__m256i __lasx_xvseq_h (__m256i, __m256i);
__m256i __lasx_xvseqi_b (__m256i, imm_n16_15);
__m256i __lasx_xvseqi_d (__m256i, imm_n16_15);
__m256i __lasx_xvseqi_h (__m256i, imm_n16_15);
__m256i __lasx_xvseqi_w (__m256i, imm_n16_15);
__m256i __lasx_xvseq_w (__m256i, __m256i);
__m256i __lasx_xvshuf4i_b (__m256i, imm0_255);
__m256i __lasx_xvshuf4i_d (__m256i, __m256i, imm0_255);
__m256i __lasx_xvshuf4i_h (__m256i, imm0_255);
__m256i __lasx_xvshuf4i_w (__m256i, imm0_255);
__m256i __lasx_xvshuf_b (__m256i, __m256i, __m256i);
__m256i __lasx_xvshuf_d (__m256i, __m256i, __m256i);
__m256i __lasx_xvshuf_h (__m256i, __m256i, __m256i);
__m256i __lasx_xvshuf_w (__m256i, __m256i, __m256i);
__m256i __lasx_xvsigncov_b (__m256i, __m256i);
__m256i __lasx_xvsigncov_d (__m256i, __m256i);
__m256i __lasx_xvsigncov_h (__m256i, __m256i);
__m256i __lasx_xvsigncov_w (__m256i, __m256i);
__m256i __lasx_xvsle_b (__m256i, __m256i);
__m256i __lasx_xvsle_bu (__m256i, __m256i);
__m256i __lasx_xvsle_d (__m256i, __m256i);
__m256i __lasx_xvsle_du (__m256i, __m256i);
__m256i __lasx_xvsle_h (__m256i, __m256i);
__m256i __lasx_xvsle_hu (__m256i, __m256i);
__m256i __lasx_xvslei_b (__m256i, imm_n16_15);
__m256i __lasx_xvslei_bu (__m256i, imm0_31);
__m256i __lasx_xvslei_d (__m256i, imm_n16_15);
__m256i __lasx_xvslei_du (__m256i, imm0_31);
__m256i __lasx_xvslei_h (__m256i, imm_n16_15);
__m256i __lasx_xvslei_hu (__m256i, imm0_31);
__m256i __lasx_xvslei_w (__m256i, imm_n16_15);
__m256i __lasx_xvslei_wu (__m256i, imm0_31);
__m256i __lasx_xvsle_w (__m256i, __m256i);
__m256i __lasx_xvsle_wu (__m256i, __m256i);
__m256i __lasx_xvsll_b (__m256i, __m256i);
__m256i __lasx_xvsll_d (__m256i, __m256i);
__m256i __lasx_xvsll_h (__m256i, __m256i);
__m256i __lasx_xvslli_b (__m256i, imm0_7);
__m256i __lasx_xvslli_d (__m256i, imm0_63);
__m256i __lasx_xvslli_h (__m256i, imm0_15);
__m256i __lasx_xvslli_w (__m256i, imm0_31);
__m256i __lasx_xvsll_w (__m256i, __m256i);
__m256i __lasx_xvsllwil_du_wu (__m256i, imm0_31);
__m256i __lasx_xvsllwil_d_w (__m256i, imm0_31);
__m256i __lasx_xvsllwil_h_b (__m256i, imm0_7);
__m256i __lasx_xvsllwil_hu_bu (__m256i, imm0_7);
__m256i __lasx_xvsllwil_w_h (__m256i, imm0_15);
__m256i __lasx_xvsllwil_wu_hu (__m256i, imm0_15);
__m256i __lasx_xvslt_b (__m256i, __m256i);
__m256i __lasx_xvslt_bu (__m256i, __m256i);
__m256i __lasx_xvslt_d (__m256i, __m256i);
__m256i __lasx_xvslt_du (__m256i, __m256i);
__m256i __lasx_xvslt_h (__m256i, __m256i);
__m256i __lasx_xvslt_hu (__m256i, __m256i);
__m256i __lasx_xvslti_b (__m256i, imm_n16_15);
__m256i __lasx_xvslti_bu (__m256i, imm0_31);
__m256i __lasx_xvslti_d (__m256i, imm_n16_15);
__m256i __lasx_xvslti_du (__m256i, imm0_31);
__m256i __lasx_xvslti_h (__m256i, imm_n16_15);
__m256i __lasx_xvslti_hu (__m256i, imm0_31);
__m256i __lasx_xvslti_w (__m256i, imm_n16_15);
__m256i __lasx_xvslti_wu (__m256i, imm0_31);
__m256i __lasx_xvslt_w (__m256i, __m256i);
__m256i __lasx_xvslt_wu (__m256i, __m256i);
__m256i __lasx_xvsra_b (__m256i, __m256i);
__m256i __lasx_xvsra_d (__m256i, __m256i);
__m256i __lasx_xvsra_h (__m256i, __m256i);
__m256i __lasx_xvsrai_b (__m256i, imm0_7);
__m256i __lasx_xvsrai_d (__m256i, imm0_63);
__m256i __lasx_xvsrai_h (__m256i, imm0_15);
__m256i __lasx_xvsrai_w (__m256i, imm0_31);
__m256i __lasx_xvsran_b_h (__m256i, __m256i);
__m256i __lasx_xvsran_h_w (__m256i, __m256i);
__m256i __lasx_xvsrani_b_h (__m256i, __m256i, imm0_15);
__m256i __lasx_xvsrani_d_q (__m256i, __m256i, imm0_127);
__m256i __lasx_xvsrani_h_w (__m256i, __m256i, imm0_31);
__m256i __lasx_xvsrani_w_d (__m256i, __m256i, imm0_63);
__m256i __lasx_xvsran_w_d (__m256i, __m256i);
__m256i __lasx_xvsrar_b (__m256i, __m256i);
__m256i __lasx_xvsrar_d (__m256i, __m256i);
__m256i __lasx_xvsrar_h (__m256i, __m256i);
__m256i __lasx_xvsrari_b (__m256i, imm0_7);
__m256i __lasx_xvsrari_d (__m256i, imm0_63);
__m256i __lasx_xvsrari_h (__m256i, imm0_15);
__m256i __lasx_xvsrari_w (__m256i, imm0_31);
__m256i __lasx_xvsrarn_b_h (__m256i, __m256i);
__m256i __lasx_xvsrarn_h_w (__m256i, __m256i);
__m256i __lasx_xvsrarni_b_h (__m256i, __m256i, imm0_15);
__m256i __lasx_xvsrarni_d_q (__m256i, __m256i, imm0_127);
__m256i __lasx_xvsrarni_h_w (__m256i, __m256i, imm0_31);
__m256i __lasx_xvsrarni_w_d (__m256i, __m256i, imm0_63);
__m256i __lasx_xvsrarn_w_d (__m256i, __m256i);
__m256i __lasx_xvsrar_w (__m256i, __m256i);
__m256i __lasx_xvsra_w (__m256i, __m256i);
__m256i __lasx_xvsrl_b (__m256i, __m256i);
__m256i __lasx_xvsrl_d (__m256i, __m256i);
__m256i __lasx_xvsrl_h (__m256i, __m256i);
__m256i __lasx_xvsrli_b (__m256i, imm0_7);
__m256i __lasx_xvsrli_d (__m256i, imm0_63);
__m256i __lasx_xvsrli_h (__m256i, imm0_15);
__m256i __lasx_xvsrli_w (__m256i, imm0_31);
__m256i __lasx_xvsrln_b_h (__m256i, __m256i);
__m256i __lasx_xvsrln_h_w (__m256i, __m256i);
__m256i __lasx_xvsrlni_b_h (__m256i, __m256i, imm0_15);
__m256i __lasx_xvsrlni_d_q (__m256i, __m256i, imm0_127);
__m256i __lasx_xvsrlni_h_w (__m256i, __m256i, imm0_31);
__m256i __lasx_xvsrlni_w_d (__m256i, __m256i, imm0_63);
__m256i __lasx_xvsrln_w_d (__m256i, __m256i);
__m256i __lasx_xvsrlr_b (__m256i, __m256i);
__m256i __lasx_xvsrlr_d (__m256i, __m256i);
__m256i __lasx_xvsrlr_h (__m256i, __m256i);
__m256i __lasx_xvsrlri_b (__m256i, imm0_7);
__m256i __lasx_xvsrlri_d (__m256i, imm0_63);
__m256i __lasx_xvsrlri_h (__m256i, imm0_15);
__m256i __lasx_xvsrlri_w (__m256i, imm0_31);
__m256i __lasx_xvsrlrn_b_h (__m256i, __m256i);
__m256i __lasx_xvsrlrn_h_w (__m256i, __m256i);
__m256i __lasx_xvsrlrni_b_h (__m256i, __m256i, imm0_15);
__m256i __lasx_xvsrlrni_d_q (__m256i, __m256i, imm0_127);
__m256i __lasx_xvsrlrni_h_w (__m256i, __m256i, imm0_31);
__m256i __lasx_xvsrlrni_w_d (__m256i, __m256i, imm0_63);
__m256i __lasx_xvsrlrn_w_d (__m256i, __m256i);
__m256i __lasx_xvsrlr_w (__m256i, __m256i);
__m256i __lasx_xvsrl_w (__m256i, __m256i);
__m256i __lasx_xvssran_b_h (__m256i, __m256i);
__m256i __lasx_xvssran_bu_h (__m256i, __m256i);
__m256i __lasx_xvssran_hu_w (__m256i, __m256i);
__m256i __lasx_xvssran_h_w (__m256i, __m256i);
__m256i __lasx_xvssrani_b_h (__m256i, __m256i, imm0_15);
__m256i __lasx_xvssrani_bu_h (__m256i, __m256i, imm0_15);
__m256i __lasx_xvssrani_d_q (__m256i, __m256i, imm0_127);
__m256i __lasx_xvssrani_du_q (__m256i, __m256i, imm0_127);
__m256i __lasx_xvssrani_hu_w (__m256i, __m256i, imm0_31);
__m256i __lasx_xvssrani_h_w (__m256i, __m256i, imm0_31);
__m256i __lasx_xvssrani_w_d (__m256i, __m256i, imm0_63);
__m256i __lasx_xvssrani_wu_d (__m256i, __m256i, imm0_63);
__m256i __lasx_xvssran_w_d (__m256i, __m256i);
__m256i __lasx_xvssran_wu_d (__m256i, __m256i);
__m256i __lasx_xvssrarn_b_h (__m256i, __m256i);
__m256i __lasx_xvssrarn_bu_h (__m256i, __m256i);
__m256i __lasx_xvssrarn_hu_w (__m256i, __m256i);
__m256i __lasx_xvssrarn_h_w (__m256i, __m256i);
__m256i __lasx_xvssrarni_b_h (__m256i, __m256i, imm0_15);
__m256i __lasx_xvssrarni_bu_h (__m256i, __m256i, imm0_15);
__m256i __lasx_xvssrarni_d_q (__m256i, __m256i, imm0_127);
__m256i __lasx_xvssrarni_du_q (__m256i, __m256i, imm0_127);
__m256i __lasx_xvssrarni_hu_w (__m256i, __m256i, imm0_31);
__m256i __lasx_xvssrarni_h_w (__m256i, __m256i, imm0_31);
__m256i __lasx_xvssrarni_w_d (__m256i, __m256i, imm0_63);
__m256i __lasx_xvssrarni_wu_d (__m256i, __m256i, imm0_63);
__m256i __lasx_xvssrarn_w_d (__m256i, __m256i);
__m256i __lasx_xvssrarn_wu_d (__m256i, __m256i);
__m256i __lasx_xvssrln_b_h (__m256i, __m256i);
__m256i __lasx_xvssrln_bu_h (__m256i, __m256i);
__m256i __lasx_xvssrln_hu_w (__m256i, __m256i);
__m256i __lasx_xvssrln_h_w (__m256i, __m256i);
__m256i __lasx_xvssrlni_b_h (__m256i, __m256i, imm0_15);
__m256i __lasx_xvssrlni_bu_h (__m256i, __m256i, imm0_15);
__m256i __lasx_xvssrlni_d_q (__m256i, __m256i, imm0_127);
__m256i __lasx_xvssrlni_du_q (__m256i, __m256i, imm0_127);
__m256i __lasx_xvssrlni_hu_w (__m256i, __m256i, imm0_31);
__m256i __lasx_xvssrlni_h_w (__m256i, __m256i, imm0_31);
__m256i __lasx_xvssrlni_w_d (__m256i, __m256i, imm0_63);
__m256i __lasx_xvssrlni_wu_d (__m256i, __m256i, imm0_63);
__m256i __lasx_xvssrln_w_d (__m256i, __m256i);
__m256i __lasx_xvssrln_wu_d (__m256i, __m256i);
__m256i __lasx_xvssrlrn_b_h (__m256i, __m256i);
__m256i __lasx_xvssrlrn_bu_h (__m256i, __m256i);
__m256i __lasx_xvssrlrn_hu_w (__m256i, __m256i);
__m256i __lasx_xvssrlrn_h_w (__m256i, __m256i);
__m256i __lasx_xvssrlrni_b_h (__m256i, __m256i, imm0_15);
__m256i __lasx_xvssrlrni_bu_h (__m256i, __m256i, imm0_15);
__m256i __lasx_xvssrlrni_d_q (__m256i, __m256i, imm0_127);
__m256i __lasx_xvssrlrni_du_q (__m256i, __m256i, imm0_127);
__m256i __lasx_xvssrlrni_hu_w (__m256i, __m256i, imm0_31);
__m256i __lasx_xvssrlrni_h_w (__m256i, __m256i, imm0_31);
__m256i __lasx_xvssrlrni_w_d (__m256i, __m256i, imm0_63);
__m256i __lasx_xvssrlrni_wu_d (__m256i, __m256i, imm0_63);
__m256i __lasx_xvssrlrn_w_d (__m256i, __m256i);
__m256i __lasx_xvssrlrn_wu_d (__m256i, __m256i);
__m256i __lasx_xvssub_b (__m256i, __m256i);
__m256i __lasx_xvssub_bu (__m256i, __m256i);
__m256i __lasx_xvssub_d (__m256i, __m256i);
__m256i __lasx_xvssub_du (__m256i, __m256i);
__m256i __lasx_xvssub_h (__m256i, __m256i);
__m256i __lasx_xvssub_hu (__m256i, __m256i);
__m256i __lasx_xvssub_w (__m256i, __m256i);
__m256i __lasx_xvssub_wu (__m256i, __m256i);
void __lasx_xvst (__m256i, void *, imm_n2048_2047);
void __lasx_xvstelm_b (__m256i, void *, imm_n128_127, imm0_31);
void __lasx_xvstelm_d (__m256i, void *, imm_n128_127, imm0_3);
void __lasx_xvstelm_h (__m256i, void *, imm_n128_127, imm0_15);
void __lasx_xvstelm_w (__m256i, void *, imm_n128_127, imm0_7);
void __lasx_xvstx (__m256i, void *, long int);
__m256i __lasx_xvsub_b (__m256i, __m256i);
__m256i __lasx_xvsub_d (__m256i, __m256i);
__m256i __lasx_xvsub_h (__m256i, __m256i);
__m256i __lasx_xvsubi_bu (__m256i, imm0_31);
__m256i __lasx_xvsubi_du (__m256i, imm0_31);
__m256i __lasx_xvsubi_hu (__m256i, imm0_31);
__m256i __lasx_xvsubi_wu (__m256i, imm0_31);
__m256i __lasx_xvsub_q (__m256i, __m256i);
__m256i __lasx_xvsub_w (__m256i, __m256i);
__m256i __lasx_xvsubwev_d_w (__m256i, __m256i);
__m256i __lasx_xvsubwev_d_wu (__m256i, __m256i);
__m256i __lasx_xvsubwev_h_b (__m256i, __m256i);
__m256i __lasx_xvsubwev_h_bu (__m256i, __m256i);
__m256i __lasx_xvsubwev_q_d (__m256i, __m256i);
__m256i __lasx_xvsubwev_q_du (__m256i, __m256i);
__m256i __lasx_xvsubwev_w_h (__m256i, __m256i);
__m256i __lasx_xvsubwev_w_hu (__m256i, __m256i);
__m256i __lasx_xvsubwod_d_w (__m256i, __m256i);
__m256i __lasx_xvsubwod_d_wu (__m256i, __m256i);
__m256i __lasx_xvsubwod_h_b (__m256i, __m256i);
__m256i __lasx_xvsubwod_h_bu (__m256i, __m256i);
__m256i __lasx_xvsubwod_q_d (__m256i, __m256i);
__m256i __lasx_xvsubwod_q_du (__m256i, __m256i);
__m256i __lasx_xvsubwod_w_h (__m256i, __m256i);
__m256i __lasx_xvsubwod_w_hu (__m256i, __m256i);
__m256i __lasx_xvxori_b (__m256i, imm0_255);
__m256i __lasx_xvxor_v (__m256i, __m256i);
@end smallexample

These instrisic functions are available by including @code{lasxintrin.h} and
using @option{-mfrecipe} and @option{-mlasx}.
@smallexample
__m256d __lasx_xvfrecipe_d (__m256d);
__m256 __lasx_xvfrecipe_s (__m256);
__m256d __lasx_xvfrsqrte_d (__m256d);
__m256 __lasx_xvfrsqrte_s (__m256);
@end smallexample

@node MIPS DSP Built-in Functions
@subsection MIPS DSP Built-in Functions

The MIPS DSP Application-Specific Extension (ASE) includes new
instructions that are designed to improve the performance of DSP and
media applications.  It provides instructions that operate on packed
8-bit/16-bit integer data, Q7, Q15 and Q31 fractional data.

GCC supports MIPS DSP operations using both the generic
vector extensions (@pxref{Vector Extensions}) and a collection of
MIPS-specific built-in functions.  Both kinds of support are
enabled by the @option{-mdsp} command-line option.

Revision 2 of the ASE was introduced in the second half of 2006.
This revision adds extra instructions to the original ASE, but is
otherwise backwards-compatible with it.  You can select revision 2
using the command-line option @option{-mdspr2}; this option implies
@option{-mdsp}.

The SCOUNT and POS bits of the DSP control register are global.  The
WRDSP, EXTPDP, EXTPDPV and MTHLIP instructions modify the SCOUNT and
POS bits.  During optimization, the compiler does not delete these
instructions and it does not delete calls to functions containing
these instructions.

At present, GCC only provides support for operations on 32-bit
vectors.  The vector type associated with 8-bit integer data is
usually called @code{v4i8}, the vector type associated with Q7
is usually called @code{v4q7}, the vector type associated with 16-bit
integer data is usually called @code{v2i16}, and the vector type
associated with Q15 is usually called @code{v2q15}.  They can be
defined in C as follows:

@smallexample
typedef signed char v4i8 __attribute__ ((vector_size(4)));
typedef signed char v4q7 __attribute__ ((vector_size(4)));
typedef short v2i16 __attribute__ ((vector_size(4)));
typedef short v2q15 __attribute__ ((vector_size(4)));
@end smallexample

@code{v4i8}, @code{v4q7}, @code{v2i16} and @code{v2q15} values are
initialized in the same way as aggregates.  For example:

@smallexample
v4i8 a = @{1, 2, 3, 4@};
v4i8 b;
b = (v4i8) @{5, 6, 7, 8@};

v2q15 c = @{0x0fcb, 0x3a75@};
v2q15 d;
d = (v2q15) @{0.1234 * 0x1.0p15, 0.4567 * 0x1.0p15@};
@end smallexample

@emph{Note:} The CPU's endianness determines the order in which values
are packed.  On little-endian targets, the first value is the least
significant and the last value is the most significant.  The opposite
order applies to big-endian targets.  For example, the code above
sets the lowest byte of @code{a} to @code{1} on little-endian targets
and @code{4} on big-endian targets.

@emph{Note:} Q7, Q15 and Q31 values must be initialized with their integer
representation.  As shown in this example, the integer representation
of a Q7 value can be obtained by multiplying the fractional value by
@code{0x1.0p7}.  The equivalent for Q15 values is to multiply by
@code{0x1.0p15}.  The equivalent for Q31 values is to multiply by
@code{0x1.0p31}.

The table below lists the @code{v4i8} and @code{v2q15} operations for which
hardware support exists.  @code{a} and @code{b} are @code{v4i8} values,
and @code{c} and @code{d} are @code{v2q15} values.

@multitable @columnfractions .50 .50
@headitem C code @tab MIPS instruction
@item @code{a + b} @tab @code{addu.qb}
@item @code{c + d} @tab @code{addq.ph}
@item @code{a - b} @tab @code{subu.qb}
@item @code{c - d} @tab @code{subq.ph}
@end multitable

The table below lists the @code{v2i16} operation for which
hardware support exists for the DSP ASE REV 2.  @code{e} and @code{f} are
@code{v2i16} values.

@multitable @columnfractions .50 .50
@headitem C code @tab MIPS instruction
@item @code{e * f} @tab @code{mul.ph}
@end multitable

It is easier to describe the DSP built-in functions if we first define
the following types:

@smallexample
typedef int q31;
typedef int i32;
typedef unsigned int ui32;
typedef long long a64;
@end smallexample

@code{q31} and @code{i32} are actually the same as @code{int}, but we
use @code{q31} to indicate a Q31 fractional value and @code{i32} to
indicate a 32-bit integer value.  Similarly, @code{a64} is the same as
@code{long long}, but we use @code{a64} to indicate values that are
placed in one of the four DSP accumulators (@code{$ac0},
@code{$ac1}, @code{$ac2} or @code{$ac3}).

Also, some built-in functions prefer or require immediate numbers as
parameters, because the corresponding DSP instructions accept both immediate
numbers and register operands, or accept immediate numbers only.  The
immediate parameters are listed as follows.

@smallexample
imm0_3: 0 to 3.
imm0_7: 0 to 7.
imm0_15: 0 to 15.
imm0_31: 0 to 31.
imm0_63: 0 to 63.
imm0_255: 0 to 255.
imm_n32_31: -32 to 31.
imm_n512_511: -512 to 511.
@end smallexample

The following built-in functions map directly to a particular MIPS DSP
instruction.  Please refer to the architecture specification
for details on what each instruction does.

@smallexample
v2q15 __builtin_mips_addq_ph (v2q15, v2q15);
v2q15 __builtin_mips_addq_s_ph (v2q15, v2q15);
q31 __builtin_mips_addq_s_w (q31, q31);
v4i8 __builtin_mips_addu_qb (v4i8, v4i8);
v4i8 __builtin_mips_addu_s_qb (v4i8, v4i8);
v2q15 __builtin_mips_subq_ph (v2q15, v2q15);
v2q15 __builtin_mips_subq_s_ph (v2q15, v2q15);
q31 __builtin_mips_subq_s_w (q31, q31);
v4i8 __builtin_mips_subu_qb (v4i8, v4i8);
v4i8 __builtin_mips_subu_s_qb (v4i8, v4i8);
i32 __builtin_mips_addsc (i32, i32);
i32 __builtin_mips_addwc (i32, i32);
i32 __builtin_mips_modsub (i32, i32);
i32 __builtin_mips_raddu_w_qb (v4i8);
v2q15 __builtin_mips_absq_s_ph (v2q15);
q31 __builtin_mips_absq_s_w (q31);
v4i8 __builtin_mips_precrq_qb_ph (v2q15, v2q15);
v2q15 __builtin_mips_precrq_ph_w (q31, q31);
v2q15 __builtin_mips_precrq_rs_ph_w (q31, q31);
v4i8 __builtin_mips_precrqu_s_qb_ph (v2q15, v2q15);
q31 __builtin_mips_preceq_w_phl (v2q15);
q31 __builtin_mips_preceq_w_phr (v2q15);
v2q15 __builtin_mips_precequ_ph_qbl (v4i8);
v2q15 __builtin_mips_precequ_ph_qbr (v4i8);
v2q15 __builtin_mips_precequ_ph_qbla (v4i8);
v2q15 __builtin_mips_precequ_ph_qbra (v4i8);
v2q15 __builtin_mips_preceu_ph_qbl (v4i8);
v2q15 __builtin_mips_preceu_ph_qbr (v4i8);
v2q15 __builtin_mips_preceu_ph_qbla (v4i8);
v2q15 __builtin_mips_preceu_ph_qbra (v4i8);
v4i8 __builtin_mips_shll_qb (v4i8, imm0_7);
v4i8 __builtin_mips_shll_qb (v4i8, i32);
v2q15 __builtin_mips_shll_ph (v2q15, imm0_15);
v2q15 __builtin_mips_shll_ph (v2q15, i32);
v2q15 __builtin_mips_shll_s_ph (v2q15, imm0_15);
v2q15 __builtin_mips_shll_s_ph (v2q15, i32);
q31 __builtin_mips_shll_s_w (q31, imm0_31);
q31 __builtin_mips_shll_s_w (q31, i32);
v4i8 __builtin_mips_shrl_qb (v4i8, imm0_7);
v4i8 __builtin_mips_shrl_qb (v4i8, i32);
v2q15 __builtin_mips_shra_ph (v2q15, imm0_15);
v2q15 __builtin_mips_shra_ph (v2q15, i32);
v2q15 __builtin_mips_shra_r_ph (v2q15, imm0_15);
v2q15 __builtin_mips_shra_r_ph (v2q15, i32);
q31 __builtin_mips_shra_r_w (q31, imm0_31);
q31 __builtin_mips_shra_r_w (q31, i32);
v2q15 __builtin_mips_muleu_s_ph_qbl (v4i8, v2q15);
v2q15 __builtin_mips_muleu_s_ph_qbr (v4i8, v2q15);
v2q15 __builtin_mips_mulq_rs_ph (v2q15, v2q15);
q31 __builtin_mips_muleq_s_w_phl (v2q15, v2q15);
q31 __builtin_mips_muleq_s_w_phr (v2q15, v2q15);
a64 __builtin_mips_dpau_h_qbl (a64, v4i8, v4i8);
a64 __builtin_mips_dpau_h_qbr (a64, v4i8, v4i8);
a64 __builtin_mips_dpsu_h_qbl (a64, v4i8, v4i8);
a64 __builtin_mips_dpsu_h_qbr (a64, v4i8, v4i8);
a64 __builtin_mips_dpaq_s_w_ph (a64, v2q15, v2q15);
a64 __builtin_mips_dpaq_sa_l_w (a64, q31, q31);
a64 __builtin_mips_dpsq_s_w_ph (a64, v2q15, v2q15);
a64 __builtin_mips_dpsq_sa_l_w (a64, q31, q31);
a64 __builtin_mips_mulsaq_s_w_ph (a64, v2q15, v2q15);
a64 __builtin_mips_maq_s_w_phl (a64, v2q15, v2q15);
a64 __builtin_mips_maq_s_w_phr (a64, v2q15, v2q15);
a64 __builtin_mips_maq_sa_w_phl (a64, v2q15, v2q15);
a64 __builtin_mips_maq_sa_w_phr (a64, v2q15, v2q15);
i32 __builtin_mips_bitrev (i32);
i32 __builtin_mips_insv (i32, i32);
v4i8 __builtin_mips_repl_qb (imm0_255);
v4i8 __builtin_mips_repl_qb (i32);
v2q15 __builtin_mips_repl_ph (imm_n512_511);
v2q15 __builtin_mips_repl_ph (i32);
void __builtin_mips_cmpu_eq_qb (v4i8, v4i8);
void __builtin_mips_cmpu_lt_qb (v4i8, v4i8);
void __builtin_mips_cmpu_le_qb (v4i8, v4i8);
i32 __builtin_mips_cmpgu_eq_qb (v4i8, v4i8);
i32 __builtin_mips_cmpgu_lt_qb (v4i8, v4i8);
i32 __builtin_mips_cmpgu_le_qb (v4i8, v4i8);
void __builtin_mips_cmp_eq_ph (v2q15, v2q15);
void __builtin_mips_cmp_lt_ph (v2q15, v2q15);
void __builtin_mips_cmp_le_ph (v2q15, v2q15);
v4i8 __builtin_mips_pick_qb (v4i8, v4i8);
v2q15 __builtin_mips_pick_ph (v2q15, v2q15);
v2q15 __builtin_mips_packrl_ph (v2q15, v2q15);
i32 __builtin_mips_extr_w (a64, imm0_31);
i32 __builtin_mips_extr_w (a64, i32);
i32 __builtin_mips_extr_r_w (a64, imm0_31);
i32 __builtin_mips_extr_s_h (a64, i32);
i32 __builtin_mips_extr_rs_w (a64, imm0_31);
i32 __builtin_mips_extr_rs_w (a64, i32);
i32 __builtin_mips_extr_s_h (a64, imm0_31);
i32 __builtin_mips_extr_r_w (a64, i32);
i32 __builtin_mips_extp (a64, imm0_31);
i32 __builtin_mips_extp (a64, i32);
i32 __builtin_mips_extpdp (a64, imm0_31);
i32 __builtin_mips_extpdp (a64, i32);
a64 __builtin_mips_shilo (a64, imm_n32_31);
a64 __builtin_mips_shilo (a64, i32);
a64 __builtin_mips_mthlip (a64, i32);
void __builtin_mips_wrdsp (i32, imm0_63);
i32 __builtin_mips_rddsp (imm0_63);
i32 __builtin_mips_lbux (void *, i32);
i32 __builtin_mips_lhx (void *, i32);
i32 __builtin_mips_lwx (void *, i32);
a64 __builtin_mips_ldx (void *, i32); /* MIPS64 only */
i32 __builtin_mips_bposge32 (void);
a64 __builtin_mips_madd (a64, i32, i32);
a64 __builtin_mips_maddu (a64, ui32, ui32);
a64 __builtin_mips_msub (a64, i32, i32);
a64 __builtin_mips_msubu (a64, ui32, ui32);
a64 __builtin_mips_mult (i32, i32);
a64 __builtin_mips_multu (ui32, ui32);
@end smallexample

The following built-in functions map directly to a particular MIPS DSP REV 2
instruction.  Please refer to the architecture specification
for details on what each instruction does.

@smallexample
v4q7 __builtin_mips_absq_s_qb (v4q7);
v2i16 __builtin_mips_addu_ph (v2i16, v2i16);
v2i16 __builtin_mips_addu_s_ph (v2i16, v2i16);
v4i8 __builtin_mips_adduh_qb (v4i8, v4i8);
v4i8 __builtin_mips_adduh_r_qb (v4i8, v4i8);
i32 __builtin_mips_append (i32, i32, imm0_31);
i32 __builtin_mips_balign (i32, i32, imm0_3);
i32 __builtin_mips_cmpgdu_eq_qb (v4i8, v4i8);
i32 __builtin_mips_cmpgdu_lt_qb (v4i8, v4i8);
i32 __builtin_mips_cmpgdu_le_qb (v4i8, v4i8);
a64 __builtin_mips_dpa_w_ph (a64, v2i16, v2i16);
a64 __builtin_mips_dps_w_ph (a64, v2i16, v2i16);
v2i16 __builtin_mips_mul_ph (v2i16, v2i16);
v2i16 __builtin_mips_mul_s_ph (v2i16, v2i16);
q31 __builtin_mips_mulq_rs_w (q31, q31);
v2q15 __builtin_mips_mulq_s_ph (v2q15, v2q15);
q31 __builtin_mips_mulq_s_w (q31, q31);
a64 __builtin_mips_mulsa_w_ph (a64, v2i16, v2i16);
v4i8 __builtin_mips_precr_qb_ph (v2i16, v2i16);
v2i16 __builtin_mips_precr_sra_ph_w (i32, i32, imm0_31);
v2i16 __builtin_mips_precr_sra_r_ph_w (i32, i32, imm0_31);
i32 __builtin_mips_prepend (i32, i32, imm0_31);
v4i8 __builtin_mips_shra_qb (v4i8, imm0_7);
v4i8 __builtin_mips_shra_r_qb (v4i8, imm0_7);
v4i8 __builtin_mips_shra_qb (v4i8, i32);
v4i8 __builtin_mips_shra_r_qb (v4i8, i32);
v2i16 __builtin_mips_shrl_ph (v2i16, imm0_15);
v2i16 __builtin_mips_shrl_ph (v2i16, i32);
v2i16 __builtin_mips_subu_ph (v2i16, v2i16);
v2i16 __builtin_mips_subu_s_ph (v2i16, v2i16);
v4i8 __builtin_mips_subuh_qb (v4i8, v4i8);
v4i8 __builtin_mips_subuh_r_qb (v4i8, v4i8);
v2q15 __builtin_mips_addqh_ph (v2q15, v2q15);
v2q15 __builtin_mips_addqh_r_ph (v2q15, v2q15);
q31 __builtin_mips_addqh_w (q31, q31);
q31 __builtin_mips_addqh_r_w (q31, q31);
v2q15 __builtin_mips_subqh_ph (v2q15, v2q15);
v2q15 __builtin_mips_subqh_r_ph (v2q15, v2q15);
q31 __builtin_mips_subqh_w (q31, q31);
q31 __builtin_mips_subqh_r_w (q31, q31);
a64 __builtin_mips_dpax_w_ph (a64, v2i16, v2i16);
a64 __builtin_mips_dpsx_w_ph (a64, v2i16, v2i16);
a64 __builtin_mips_dpaqx_s_w_ph (a64, v2q15, v2q15);
a64 __builtin_mips_dpaqx_sa_w_ph (a64, v2q15, v2q15);
a64 __builtin_mips_dpsqx_s_w_ph (a64, v2q15, v2q15);
a64 __builtin_mips_dpsqx_sa_w_ph (a64, v2q15, v2q15);
@end smallexample


@node MIPS Paired-Single Support
@subsection MIPS Paired-Single Support

The MIPS64 architecture includes a number of instructions that
operate on pairs of single-precision floating-point values.
Each pair is packed into a 64-bit floating-point register,
with one element being designated the ``upper half'' and
the other being designated the ``lower half''.

GCC supports paired-single operations using both the generic
vector extensions (@pxref{Vector Extensions}) and a collection of
MIPS-specific built-in functions.  Both kinds of support are
enabled by the @option{-mpaired-single} command-line option.

The vector type associated with paired-single values is usually
called @code{v2sf}.  It can be defined in C as follows:

@smallexample
typedef float v2sf __attribute__ ((vector_size (8)));
@end smallexample

@code{v2sf} values are initialized in the same way as aggregates.
For example:

@smallexample
v2sf a = @{1.5, 9.1@};
v2sf b;
float e, f;
b = (v2sf) @{e, f@};
@end smallexample

@emph{Note:} The CPU's endianness determines which value is stored in
the upper half of a register and which value is stored in the lower half.
On little-endian targets, the first value is the lower one and the second
value is the upper one.  The opposite order applies to big-endian targets.
For example, the code above sets the lower half of @code{a} to
@code{1.5} on little-endian targets and @code{9.1} on big-endian targets.

@node MIPS Loongson Built-in Functions
@subsection MIPS Loongson Built-in Functions

GCC provides intrinsics to access the SIMD instructions provided by the
ST Microelectronics Loongson-2E and -2F processors.  These intrinsics,
available after inclusion of the @code{loongson.h} header file,
operate on the following 64-bit vector types:

@itemize
@item @code{uint8x8_t}, a vector of eight unsigned 8-bit integers;
@item @code{uint16x4_t}, a vector of four unsigned 16-bit integers;
@item @code{uint32x2_t}, a vector of two unsigned 32-bit integers;
@item @code{int8x8_t}, a vector of eight signed 8-bit integers;
@item @code{int16x4_t}, a vector of four signed 16-bit integers;
@item @code{int32x2_t}, a vector of two signed 32-bit integers.
@end itemize

The intrinsics provided are listed below; each is named after the
machine instruction to which it corresponds, with suffixes added as
appropriate to distinguish intrinsics that expand to the same machine
instruction yet have different argument types.  Refer to the architecture
documentation for a description of the functionality of each
instruction.

@smallexample
int16x4_t packsswh (int32x2_t s, int32x2_t t);
int8x8_t packsshb (int16x4_t s, int16x4_t t);
uint8x8_t packushb (uint16x4_t s, uint16x4_t t);
uint32x2_t paddw_u (uint32x2_t s, uint32x2_t t);
uint16x4_t paddh_u (uint16x4_t s, uint16x4_t t);
uint8x8_t paddb_u (uint8x8_t s, uint8x8_t t);
int32x2_t paddw_s (int32x2_t s, int32x2_t t);
int16x4_t paddh_s (int16x4_t s, int16x4_t t);
int8x8_t paddb_s (int8x8_t s, int8x8_t t);
uint64_t paddd_u (uint64_t s, uint64_t t);
int64_t paddd_s (int64_t s, int64_t t);
int16x4_t paddsh (int16x4_t s, int16x4_t t);
int8x8_t paddsb (int8x8_t s, int8x8_t t);
uint16x4_t paddush (uint16x4_t s, uint16x4_t t);
uint8x8_t paddusb (uint8x8_t s, uint8x8_t t);
uint64_t pandn_ud (uint64_t s, uint64_t t);
uint32x2_t pandn_uw (uint32x2_t s, uint32x2_t t);
uint16x4_t pandn_uh (uint16x4_t s, uint16x4_t t);
uint8x8_t pandn_ub (uint8x8_t s, uint8x8_t t);
int64_t pandn_sd (int64_t s, int64_t t);
int32x2_t pandn_sw (int32x2_t s, int32x2_t t);
int16x4_t pandn_sh (int16x4_t s, int16x4_t t);
int8x8_t pandn_sb (int8x8_t s, int8x8_t t);
uint16x4_t pavgh (uint16x4_t s, uint16x4_t t);
uint8x8_t pavgb (uint8x8_t s, uint8x8_t t);
uint32x2_t pcmpeqw_u (uint32x2_t s, uint32x2_t t);
uint16x4_t pcmpeqh_u (uint16x4_t s, uint16x4_t t);
uint8x8_t pcmpeqb_u (uint8x8_t s, uint8x8_t t);
int32x2_t pcmpeqw_s (int32x2_t s, int32x2_t t);
int16x4_t pcmpeqh_s (int16x4_t s, int16x4_t t);
int8x8_t pcmpeqb_s (int8x8_t s, int8x8_t t);
uint32x2_t pcmpgtw_u (uint32x2_t s, uint32x2_t t);
uint16x4_t pcmpgth_u (uint16x4_t s, uint16x4_t t);
uint8x8_t pcmpgtb_u (uint8x8_t s, uint8x8_t t);
int32x2_t pcmpgtw_s (int32x2_t s, int32x2_t t);
int16x4_t pcmpgth_s (int16x4_t s, int16x4_t t);
int8x8_t pcmpgtb_s (int8x8_t s, int8x8_t t);
uint16x4_t pextrh_u (uint16x4_t s, int field);
int16x4_t pextrh_s (int16x4_t s, int field);
uint16x4_t pinsrh_0_u (uint16x4_t s, uint16x4_t t);
uint16x4_t pinsrh_1_u (uint16x4_t s, uint16x4_t t);
uint16x4_t pinsrh_2_u (uint16x4_t s, uint16x4_t t);
uint16x4_t pinsrh_3_u (uint16x4_t s, uint16x4_t t);
int16x4_t pinsrh_0_s (int16x4_t s, int16x4_t t);
int16x4_t pinsrh_1_s (int16x4_t s, int16x4_t t);
int16x4_t pinsrh_2_s (int16x4_t s, int16x4_t t);
int16x4_t pinsrh_3_s (int16x4_t s, int16x4_t t);
int32x2_t pmaddhw (int16x4_t s, int16x4_t t);
int16x4_t pmaxsh (int16x4_t s, int16x4_t t);
uint8x8_t pmaxub (uint8x8_t s, uint8x8_t t);
int16x4_t pminsh (int16x4_t s, int16x4_t t);
uint8x8_t pminub (uint8x8_t s, uint8x8_t t);
uint8x8_t pmovmskb_u (uint8x8_t s);
int8x8_t pmovmskb_s (int8x8_t s);
uint16x4_t pmulhuh (uint16x4_t s, uint16x4_t t);
int16x4_t pmulhh (int16x4_t s, int16x4_t t);
int16x4_t pmullh (int16x4_t s, int16x4_t t);
int64_t pmuluw (uint32x2_t s, uint32x2_t t);
uint8x8_t pasubub (uint8x8_t s, uint8x8_t t);
uint16x4_t biadd (uint8x8_t s);
uint16x4_t psadbh (uint8x8_t s, uint8x8_t t);
uint16x4_t pshufh_u (uint16x4_t dest, uint16x4_t s, uint8_t order);
int16x4_t pshufh_s (int16x4_t dest, int16x4_t s, uint8_t order);
uint16x4_t psllh_u (uint16x4_t s, uint8_t amount);
int16x4_t psllh_s (int16x4_t s, uint8_t amount);
uint32x2_t psllw_u (uint32x2_t s, uint8_t amount);
int32x2_t psllw_s (int32x2_t s, uint8_t amount);
uint16x4_t psrlh_u (uint16x4_t s, uint8_t amount);
int16x4_t psrlh_s (int16x4_t s, uint8_t amount);
uint32x2_t psrlw_u (uint32x2_t s, uint8_t amount);
int32x2_t psrlw_s (int32x2_t s, uint8_t amount);
uint16x4_t psrah_u (uint16x4_t s, uint8_t amount);
int16x4_t psrah_s (int16x4_t s, uint8_t amount);
uint32x2_t psraw_u (uint32x2_t s, uint8_t amount);
int32x2_t psraw_s (int32x2_t s, uint8_t amount);
uint32x2_t psubw_u (uint32x2_t s, uint32x2_t t);
uint16x4_t psubh_u (uint16x4_t s, uint16x4_t t);
uint8x8_t psubb_u (uint8x8_t s, uint8x8_t t);
int32x2_t psubw_s (int32x2_t s, int32x2_t t);
int16x4_t psubh_s (int16x4_t s, int16x4_t t);
int8x8_t psubb_s (int8x8_t s, int8x8_t t);
uint64_t psubd_u (uint64_t s, uint64_t t);
int64_t psubd_s (int64_t s, int64_t t);
int16x4_t psubsh (int16x4_t s, int16x4_t t);
int8x8_t psubsb (int8x8_t s, int8x8_t t);
uint16x4_t psubush (uint16x4_t s, uint16x4_t t);
uint8x8_t psubusb (uint8x8_t s, uint8x8_t t);
uint32x2_t punpckhwd_u (uint32x2_t s, uint32x2_t t);
uint16x4_t punpckhhw_u (uint16x4_t s, uint16x4_t t);
uint8x8_t punpckhbh_u (uint8x8_t s, uint8x8_t t);
int32x2_t punpckhwd_s (int32x2_t s, int32x2_t t);
int16x4_t punpckhhw_s (int16x4_t s, int16x4_t t);
int8x8_t punpckhbh_s (int8x8_t s, int8x8_t t);
uint32x2_t punpcklwd_u (uint32x2_t s, uint32x2_t t);
uint16x4_t punpcklhw_u (uint16x4_t s, uint16x4_t t);
uint8x8_t punpcklbh_u (uint8x8_t s, uint8x8_t t);
int32x2_t punpcklwd_s (int32x2_t s, int32x2_t t);
int16x4_t punpcklhw_s (int16x4_t s, int16x4_t t);
int8x8_t punpcklbh_s (int8x8_t s, int8x8_t t);
@end smallexample

@menu
* Paired-Single Arithmetic::
* Paired-Single Built-in Functions::
* MIPS-3D Built-in Functions::
@end menu

@node Paired-Single Arithmetic
@subsubsection Paired-Single Arithmetic

The table below lists the @code{v2sf} operations for which hardware
support exists.  @code{a}, @code{b} and @code{c} are @code{v2sf}
values and @code{x} is an integral value.

@multitable @columnfractions .50 .50
@headitem C code @tab MIPS instruction
@item @code{a + b} @tab @code{add.ps}
@item @code{a - b} @tab @code{sub.ps}
@item @code{-a} @tab @code{neg.ps}
@item @code{a * b} @tab @code{mul.ps}
@item @code{a * b + c} @tab @code{madd.ps}
@item @code{a * b - c} @tab @code{msub.ps}
@item @code{-(a * b + c)} @tab @code{nmadd.ps}
@item @code{-(a * b - c)} @tab @code{nmsub.ps}
@item @code{x ? a : b} @tab @code{movn.ps}/@code{movz.ps}
@end multitable

Note that the multiply-accumulate instructions can be disabled
using the command-line option @code{-mno-fused-madd}.

@node Paired-Single Built-in Functions
@subsubsection Paired-Single Built-in Functions

The following paired-single functions map directly to a particular
MIPS instruction.  Please refer to the architecture specification
for details on what each instruction does.

@table @code
@item v2sf __builtin_mips_pll_ps (v2sf, v2sf)
Pair lower lower (@code{pll.ps}).

@item v2sf __builtin_mips_pul_ps (v2sf, v2sf)
Pair upper lower (@code{pul.ps}).

@item v2sf __builtin_mips_plu_ps (v2sf, v2sf)
Pair lower upper (@code{plu.ps}).

@item v2sf __builtin_mips_puu_ps (v2sf, v2sf)
Pair upper upper (@code{puu.ps}).

@item v2sf __builtin_mips_cvt_ps_s (float, float)
Convert pair to paired single (@code{cvt.ps.s}).

@item float __builtin_mips_cvt_s_pl (v2sf)
Convert pair lower to single (@code{cvt.s.pl}).

@item float __builtin_mips_cvt_s_pu (v2sf)
Convert pair upper to single (@code{cvt.s.pu}).

@item v2sf __builtin_mips_abs_ps (v2sf)
Absolute value (@code{abs.ps}).

@item v2sf __builtin_mips_alnv_ps (v2sf, v2sf, int)
Align variable (@code{alnv.ps}).

@emph{Note:} The value of the third parameter must be 0 or 4
modulo 8, otherwise the result is unpredictable.  Please read the
instruction description for details.
@end table

The following multi-instruction functions are also available.
In each case, @var{cond} can be any of the 16 floating-point conditions:
@code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, @code{ult},
@code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq}, @code{ngl},
@code{lt}, @code{nge}, @code{le} or @code{ngt}.

@table @code
@item v2sf __builtin_mips_movt_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
@itemx v2sf __builtin_mips_movf_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
Conditional move based on floating-point comparison (@code{c.@var{cond}.ps},
@code{movt.ps}/@code{movf.ps}).

The @code{movt} functions return the value @var{x} computed by:

@smallexample
c.@var{cond}.ps @var{cc},@var{a},@var{b}
mov.ps @var{x},@var{c}
movt.ps @var{x},@var{d},@var{cc}
@end smallexample

The @code{movf} functions are similar but use @code{movf.ps} instead
of @code{movt.ps}.

@item int __builtin_mips_upper_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
@itemx int __builtin_mips_lower_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
Comparison of two paired-single values (@code{c.@var{cond}.ps},
@code{bc1t}/@code{bc1f}).

These functions compare @var{a} and @var{b} using @code{c.@var{cond}.ps}
and return either the upper or lower half of the result.  For example:

@smallexample
v2sf a, b;
if (__builtin_mips_upper_c_eq_ps (a, b))
  upper_halves_are_equal ();
else
  upper_halves_are_unequal ();

if (__builtin_mips_lower_c_eq_ps (a, b))
  lower_halves_are_equal ();
else
  lower_halves_are_unequal ();
@end smallexample
@end table

@node MIPS-3D Built-in Functions
@subsubsection MIPS-3D Built-in Functions

The MIPS-3D Application-Specific Extension (ASE) includes additional
paired-single instructions that are designed to improve the performance
of 3D graphics operations.  Support for these instructions is controlled
by the @option{-mips3d} command-line option.

The functions listed below map directly to a particular MIPS-3D
instruction.  Please refer to the architecture specification for
more details on what each instruction does.

@table @code
@item v2sf __builtin_mips_addr_ps (v2sf, v2sf)
Reduction add (@code{addr.ps}).

@item v2sf __builtin_mips_mulr_ps (v2sf, v2sf)
Reduction multiply (@code{mulr.ps}).

@item v2sf __builtin_mips_cvt_pw_ps (v2sf)
Convert paired single to paired word (@code{cvt.pw.ps}).

@item v2sf __builtin_mips_cvt_ps_pw (v2sf)
Convert paired word to paired single (@code{cvt.ps.pw}).

@item float __builtin_mips_recip1_s (float)
@itemx double __builtin_mips_recip1_d (double)
@itemx v2sf __builtin_mips_recip1_ps (v2sf)
Reduced-precision reciprocal (sequence step 1) (@code{recip1.@var{fmt}}).

@item float __builtin_mips_recip2_s (float, float)
@itemx double __builtin_mips_recip2_d (double, double)
@itemx v2sf __builtin_mips_recip2_ps (v2sf, v2sf)
Reduced-precision reciprocal (sequence step 2) (@code{recip2.@var{fmt}}).

@item float __builtin_mips_rsqrt1_s (float)
@itemx double __builtin_mips_rsqrt1_d (double)
@itemx v2sf __builtin_mips_rsqrt1_ps (v2sf)
Reduced-precision reciprocal square root (sequence step 1)
(@code{rsqrt1.@var{fmt}}).

@item float __builtin_mips_rsqrt2_s (float, float)
@itemx double __builtin_mips_rsqrt2_d (double, double)
@itemx v2sf __builtin_mips_rsqrt2_ps (v2sf, v2sf)
Reduced-precision reciprocal square root (sequence step 2)
(@code{rsqrt2.@var{fmt}}).
@end table

The following multi-instruction functions are also available.
In each case, @var{cond} can be any of the 16 floating-point conditions:
@code{f}, @code{un}, @code{eq}, @code{ueq}, @code{olt}, @code{ult},
@code{ole}, @code{ule}, @code{sf}, @code{ngle}, @code{seq},
@code{ngl}, @code{lt}, @code{nge}, @code{le} or @code{ngt}.

@table @code
@item int __builtin_mips_cabs_@var{cond}_s (float @var{a}, float @var{b})
@itemx int __builtin_mips_cabs_@var{cond}_d (double @var{a}, double @var{b})
Absolute comparison of two scalar values (@code{cabs.@var{cond}.@var{fmt}},
@code{bc1t}/@code{bc1f}).

These functions compare @var{a} and @var{b} using @code{cabs.@var{cond}.s}
or @code{cabs.@var{cond}.d} and return the result as a boolean value.
For example:

@smallexample
float a, b;
if (__builtin_mips_cabs_eq_s (a, b))
  true ();
else
  false ();
@end smallexample

@item int __builtin_mips_upper_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
@itemx int __builtin_mips_lower_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
Absolute comparison of two paired-single values (@code{cabs.@var{cond}.ps},
@code{bc1t}/@code{bc1f}).

These functions compare @var{a} and @var{b} using @code{cabs.@var{cond}.ps}
and return either the upper or lower half of the result.  For example:

@smallexample
v2sf a, b;
if (__builtin_mips_upper_cabs_eq_ps (a, b))
  upper_halves_are_equal ();
else
  upper_halves_are_unequal ();

if (__builtin_mips_lower_cabs_eq_ps (a, b))
  lower_halves_are_equal ();
else
  lower_halves_are_unequal ();
@end smallexample

@item v2sf __builtin_mips_movt_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
@itemx v2sf __builtin_mips_movf_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
Conditional move based on absolute comparison (@code{cabs.@var{cond}.ps},
@code{movt.ps}/@code{movf.ps}).

The @code{movt} functions return the value @var{x} computed by:

@smallexample
cabs.@var{cond}.ps @var{cc},@var{a},@var{b}
mov.ps @var{x},@var{c}
movt.ps @var{x},@var{d},@var{cc}
@end smallexample

The @code{movf} functions are similar but use @code{movf.ps} instead
of @code{movt.ps}.

@item int __builtin_mips_any_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
@itemx int __builtin_mips_all_c_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
@itemx int __builtin_mips_any_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
@itemx int __builtin_mips_all_cabs_@var{cond}_ps (v2sf @var{a}, v2sf @var{b})
Comparison of two paired-single values
(@code{c.@var{cond}.ps}/@code{cabs.@var{cond}.ps},
@code{bc1any2t}/@code{bc1any2f}).

These functions compare @var{a} and @var{b} using @code{c.@var{cond}.ps}
or @code{cabs.@var{cond}.ps}.  The @code{any} forms return @code{true} if either
result is @code{true} and the @code{all} forms return @code{true} if both results are @code{true}.
For example:

@smallexample
v2sf a, b;
if (__builtin_mips_any_c_eq_ps (a, b))
  one_is_true ();
else
  both_are_false ();

if (__builtin_mips_all_c_eq_ps (a, b))
  both_are_true ();
else
  one_is_false ();
@end smallexample

@item int __builtin_mips_any_c_@var{cond}_4s (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
@itemx int __builtin_mips_all_c_@var{cond}_4s (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
@itemx int __builtin_mips_any_cabs_@var{cond}_4s (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
@itemx int __builtin_mips_all_cabs_@var{cond}_4s (v2sf @var{a}, v2sf @var{b}, v2sf @var{c}, v2sf @var{d})
Comparison of four paired-single values
(@code{c.@var{cond}.ps}/@code{cabs.@var{cond}.ps},
@code{bc1any4t}/@code{bc1any4f}).

These functions use @code{c.@var{cond}.ps} or @code{cabs.@var{cond}.ps}
to compare @var{a} with @var{b} and to compare @var{c} with @var{d}.
The @code{any} forms return @code{true} if any of the four results are @code{true}
and the @code{all} forms return @code{true} if all four results are @code{true}.
For example:

@smallexample
v2sf a, b, c, d;
if (__builtin_mips_any_c_eq_4s (a, b, c, d))
  some_are_true ();
else
  all_are_false ();

if (__builtin_mips_all_c_eq_4s (a, b, c, d))
  all_are_true ();
else
  some_are_false ();
@end smallexample
@end table

@node MIPS SIMD Architecture (MSA) Support
@subsection MIPS SIMD Architecture (MSA) Support

@menu
* MIPS SIMD Architecture Built-in Functions::
@end menu

GCC provides intrinsics to access the SIMD instructions provided by the
MSA MIPS SIMD Architecture.  The interface is made available by including
@code{<msa.h>} and using @option{-mmsa -mhard-float -mfp64 -mnan=2008}.
For each @code{__builtin_msa_*}, there is a shortened name of the intrinsic,
@code{__msa_*}.

MSA implements 128-bit wide vector registers, operating on 8-, 16-, 32- and
64-bit integer, 16- and 32-bit fixed-point, or 32- and 64-bit floating point
data elements.  The following vectors typedefs are included in @code{msa.h}:
@itemize
@item @code{v16i8}, a vector of sixteen signed 8-bit integers;
@item @code{v16u8}, a vector of sixteen unsigned 8-bit integers;
@item @code{v8i16}, a vector of eight signed 16-bit integers;
@item @code{v8u16}, a vector of eight unsigned 16-bit integers;
@item @code{v4i32}, a vector of four signed 32-bit integers;
@item @code{v4u32}, a vector of four unsigned 32-bit integers;
@item @code{v2i64}, a vector of two signed 64-bit integers;
@item @code{v2u64}, a vector of two unsigned 64-bit integers;
@item @code{v4f32}, a vector of four 32-bit floats;
@item @code{v2f64}, a vector of two 64-bit doubles.
@end itemize

Instructions and corresponding built-ins may have additional restrictions and/or
input/output values manipulated:
@itemize
@item @code{imm0_1}, an integer literal in range 0 to 1;
@item @code{imm0_3}, an integer literal in range 0 to 3;
@item @code{imm0_7}, an integer literal in range 0 to 7;
@item @code{imm0_15}, an integer literal in range 0 to 15;
@item @code{imm0_31}, an integer literal in range 0 to 31;
@item @code{imm0_63}, an integer literal in range 0 to 63;
@item @code{imm0_255}, an integer literal in range 0 to 255;
@item @code{imm_n16_15}, an integer literal in range -16 to 15;
@item @code{imm_n512_511}, an integer literal in range -512 to 511;
@item @code{imm_n1024_1022}, an integer literal in range -512 to 511 left
shifted by 1 bit, i.e., -1024, -1022, @dots{}, 1020, 1022;
@item @code{imm_n2048_2044}, an integer literal in range -512 to 511 left
shifted by 2 bits, i.e., -2048, -2044, @dots{}, 2040, 2044;
@item @code{imm_n4096_4088}, an integer literal in range -512 to 511 left
shifted by 3 bits, i.e., -4096, -4088, @dots{}, 4080, 4088;
@item @code{imm1_4}, an integer literal in range 1 to 4;
@item @code{i32, i64, u32, u64, f32, f64}, defined as follows:
@end itemize

@smallexample
@{
typedef int i32;
#if __LONG_MAX__ == __LONG_LONG_MAX__
typedef long i64;
#else
typedef long long i64;
#endif

typedef unsigned int u32;
#if __LONG_MAX__ == __LONG_LONG_MAX__
typedef unsigned long u64;
#else
typedef unsigned long long u64;
#endif

typedef double f64;
typedef float f32;
@}
@end smallexample

@node MIPS SIMD Architecture Built-in Functions
@subsubsection MIPS SIMD Architecture Built-in Functions

The intrinsics provided are listed below; each is named after the
machine instruction.

@smallexample
v16i8 __builtin_msa_add_a_b (v16i8, v16i8);
v8i16 __builtin_msa_add_a_h (v8i16, v8i16);
v4i32 __builtin_msa_add_a_w (v4i32, v4i32);
v2i64 __builtin_msa_add_a_d (v2i64, v2i64);

v16i8 __builtin_msa_adds_a_b (v16i8, v16i8);
v8i16 __builtin_msa_adds_a_h (v8i16, v8i16);
v4i32 __builtin_msa_adds_a_w (v4i32, v4i32);
v2i64 __builtin_msa_adds_a_d (v2i64, v2i64);

v16i8 __builtin_msa_adds_s_b (v16i8, v16i8);
v8i16 __builtin_msa_adds_s_h (v8i16, v8i16);
v4i32 __builtin_msa_adds_s_w (v4i32, v4i32);
v2i64 __builtin_msa_adds_s_d (v2i64, v2i64);

v16u8 __builtin_msa_adds_u_b (v16u8, v16u8);
v8u16 __builtin_msa_adds_u_h (v8u16, v8u16);
v4u32 __builtin_msa_adds_u_w (v4u32, v4u32);
v2u64 __builtin_msa_adds_u_d (v2u64, v2u64);

v16i8 __builtin_msa_addv_b (v16i8, v16i8);
v8i16 __builtin_msa_addv_h (v8i16, v8i16);
v4i32 __builtin_msa_addv_w (v4i32, v4i32);
v2i64 __builtin_msa_addv_d (v2i64, v2i64);

v16i8 __builtin_msa_addvi_b (v16i8, imm0_31);
v8i16 __builtin_msa_addvi_h (v8i16, imm0_31);
v4i32 __builtin_msa_addvi_w (v4i32, imm0_31);
v2i64 __builtin_msa_addvi_d (v2i64, imm0_31);

v16u8 __builtin_msa_and_v (v16u8, v16u8);

v16u8 __builtin_msa_andi_b (v16u8, imm0_255);

v16i8 __builtin_msa_asub_s_b (v16i8, v16i8);
v8i16 __builtin_msa_asub_s_h (v8i16, v8i16);
v4i32 __builtin_msa_asub_s_w (v4i32, v4i32);
v2i64 __builtin_msa_asub_s_d (v2i64, v2i64);

v16u8 __builtin_msa_asub_u_b (v16u8, v16u8);
v8u16 __builtin_msa_asub_u_h (v8u16, v8u16);
v4u32 __builtin_msa_asub_u_w (v4u32, v4u32);
v2u64 __builtin_msa_asub_u_d (v2u64, v2u64);

v16i8 __builtin_msa_ave_s_b (v16i8, v16i8);
v8i16 __builtin_msa_ave_s_h (v8i16, v8i16);
v4i32 __builtin_msa_ave_s_w (v4i32, v4i32);
v2i64 __builtin_msa_ave_s_d (v2i64, v2i64);

v16u8 __builtin_msa_ave_u_b (v16u8, v16u8);
v8u16 __builtin_msa_ave_u_h (v8u16, v8u16);
v4u32 __builtin_msa_ave_u_w (v4u32, v4u32);
v2u64 __builtin_msa_ave_u_d (v2u64, v2u64);

v16i8 __builtin_msa_aver_s_b (v16i8, v16i8);
v8i16 __builtin_msa_aver_s_h (v8i16, v8i16);
v4i32 __builtin_msa_aver_s_w (v4i32, v4i32);
v2i64 __builtin_msa_aver_s_d (v2i64, v2i64);

v16u8 __builtin_msa_aver_u_b (v16u8, v16u8);
v8u16 __builtin_msa_aver_u_h (v8u16, v8u16);
v4u32 __builtin_msa_aver_u_w (v4u32, v4u32);
v2u64 __builtin_msa_aver_u_d (v2u64, v2u64);

v16u8 __builtin_msa_bclr_b (v16u8, v16u8);
v8u16 __builtin_msa_bclr_h (v8u16, v8u16);
v4u32 __builtin_msa_bclr_w (v4u32, v4u32);
v2u64 __builtin_msa_bclr_d (v2u64, v2u64);

v16u8 __builtin_msa_bclri_b (v16u8, imm0_7);
v8u16 __builtin_msa_bclri_h (v8u16, imm0_15);
v4u32 __builtin_msa_bclri_w (v4u32, imm0_31);
v2u64 __builtin_msa_bclri_d (v2u64, imm0_63);

v16u8 __builtin_msa_binsl_b (v16u8, v16u8, v16u8);
v8u16 __builtin_msa_binsl_h (v8u16, v8u16, v8u16);
v4u32 __builtin_msa_binsl_w (v4u32, v4u32, v4u32);
v2u64 __builtin_msa_binsl_d (v2u64, v2u64, v2u64);

v16u8 __builtin_msa_binsli_b (v16u8, v16u8, imm0_7);
v8u16 __builtin_msa_binsli_h (v8u16, v8u16, imm0_15);
v4u32 __builtin_msa_binsli_w (v4u32, v4u32, imm0_31);
v2u64 __builtin_msa_binsli_d (v2u64, v2u64, imm0_63);

v16u8 __builtin_msa_binsr_b (v16u8, v16u8, v16u8);
v8u16 __builtin_msa_binsr_h (v8u16, v8u16, v8u16);
v4u32 __builtin_msa_binsr_w (v4u32, v4u32, v4u32);
v2u64 __builtin_msa_binsr_d (v2u64, v2u64, v2u64);

v16u8 __builtin_msa_binsri_b (v16u8, v16u8, imm0_7);
v8u16 __builtin_msa_binsri_h (v8u16, v8u16, imm0_15);
v4u32 __builtin_msa_binsri_w (v4u32, v4u32, imm0_31);
v2u64 __builtin_msa_binsri_d (v2u64, v2u64, imm0_63);

v16u8 __builtin_msa_bmnz_v (v16u8, v16u8, v16u8);

v16u8 __builtin_msa_bmnzi_b (v16u8, v16u8, imm0_255);

v16u8 __builtin_msa_bmz_v (v16u8, v16u8, v16u8);

v16u8 __builtin_msa_bmzi_b (v16u8, v16u8, imm0_255);

v16u8 __builtin_msa_bneg_b (v16u8, v16u8);
v8u16 __builtin_msa_bneg_h (v8u16, v8u16);
v4u32 __builtin_msa_bneg_w (v4u32, v4u32);
v2u64 __builtin_msa_bneg_d (v2u64, v2u64);

v16u8 __builtin_msa_bnegi_b (v16u8, imm0_7);
v8u16 __builtin_msa_bnegi_h (v8u16, imm0_15);
v4u32 __builtin_msa_bnegi_w (v4u32, imm0_31);
v2u64 __builtin_msa_bnegi_d (v2u64, imm0_63);

i32 __builtin_msa_bnz_b (v16u8);
i32 __builtin_msa_bnz_h (v8u16);
i32 __builtin_msa_bnz_w (v4u32);
i32 __builtin_msa_bnz_d (v2u64);

i32 __builtin_msa_bnz_v (v16u8);

v16u8 __builtin_msa_bsel_v (v16u8, v16u8, v16u8);

v16u8 __builtin_msa_bseli_b (v16u8, v16u8, imm0_255);

v16u8 __builtin_msa_bset_b (v16u8, v16u8);
v8u16 __builtin_msa_bset_h (v8u16, v8u16);
v4u32 __builtin_msa_bset_w (v4u32, v4u32);
v2u64 __builtin_msa_bset_d (v2u64, v2u64);

v16u8 __builtin_msa_bseti_b (v16u8, imm0_7);
v8u16 __builtin_msa_bseti_h (v8u16, imm0_15);
v4u32 __builtin_msa_bseti_w (v4u32, imm0_31);
v2u64 __builtin_msa_bseti_d (v2u64, imm0_63);

i32 __builtin_msa_bz_b (v16u8);
i32 __builtin_msa_bz_h (v8u16);
i32 __builtin_msa_bz_w (v4u32);
i32 __builtin_msa_bz_d (v2u64);

i32 __builtin_msa_bz_v (v16u8);

v16i8 __builtin_msa_ceq_b (v16i8, v16i8);
v8i16 __builtin_msa_ceq_h (v8i16, v8i16);
v4i32 __builtin_msa_ceq_w (v4i32, v4i32);
v2i64 __builtin_msa_ceq_d (v2i64, v2i64);

v16i8 __builtin_msa_ceqi_b (v16i8, imm_n16_15);
v8i16 __builtin_msa_ceqi_h (v8i16, imm_n16_15);
v4i32 __builtin_msa_ceqi_w (v4i32, imm_n16_15);
v2i64 __builtin_msa_ceqi_d (v2i64, imm_n16_15);

i32 __builtin_msa_cfcmsa (imm0_31);

v16i8 __builtin_msa_cle_s_b (v16i8, v16i8);
v8i16 __builtin_msa_cle_s_h (v8i16, v8i16);
v4i32 __builtin_msa_cle_s_w (v4i32, v4i32);
v2i64 __builtin_msa_cle_s_d (v2i64, v2i64);

v16i8 __builtin_msa_cle_u_b (v16u8, v16u8);
v8i16 __builtin_msa_cle_u_h (v8u16, v8u16);
v4i32 __builtin_msa_cle_u_w (v4u32, v4u32);
v2i64 __builtin_msa_cle_u_d (v2u64, v2u64);

v16i8 __builtin_msa_clei_s_b (v16i8, imm_n16_15);
v8i16 __builtin_msa_clei_s_h (v8i16, imm_n16_15);
v4i32 __builtin_msa_clei_s_w (v4i32, imm_n16_15);
v2i64 __builtin_msa_clei_s_d (v2i64, imm_n16_15);

v16i8 __builtin_msa_clei_u_b (v16u8, imm0_31);
v8i16 __builtin_msa_clei_u_h (v8u16, imm0_31);
v4i32 __builtin_msa_clei_u_w (v4u32, imm0_31);
v2i64 __builtin_msa_clei_u_d (v2u64, imm0_31);

v16i8 __builtin_msa_clt_s_b (v16i8, v16i8);
v8i16 __builtin_msa_clt_s_h (v8i16, v8i16);
v4i32 __builtin_msa_clt_s_w (v4i32, v4i32);
v2i64 __builtin_msa_clt_s_d (v2i64, v2i64);

v16i8 __builtin_msa_clt_u_b (v16u8, v16u8);
v8i16 __builtin_msa_clt_u_h (v8u16, v8u16);
v4i32 __builtin_msa_clt_u_w (v4u32, v4u32);
v2i64 __builtin_msa_clt_u_d (v2u64, v2u64);

v16i8 __builtin_msa_clti_s_b (v16i8, imm_n16_15);
v8i16 __builtin_msa_clti_s_h (v8i16, imm_n16_15);
v4i32 __builtin_msa_clti_s_w (v4i32, imm_n16_15);
v2i64 __builtin_msa_clti_s_d (v2i64, imm_n16_15);

v16i8 __builtin_msa_clti_u_b (v16u8, imm0_31);
v8i16 __builtin_msa_clti_u_h (v8u16, imm0_31);
v4i32 __builtin_msa_clti_u_w (v4u32, imm0_31);
v2i64 __builtin_msa_clti_u_d (v2u64, imm0_31);

i32 __builtin_msa_copy_s_b (v16i8, imm0_15);
i32 __builtin_msa_copy_s_h (v8i16, imm0_7);
i32 __builtin_msa_copy_s_w (v4i32, imm0_3);
i64 __builtin_msa_copy_s_d (v2i64, imm0_1);

u32 __builtin_msa_copy_u_b (v16i8, imm0_15);
u32 __builtin_msa_copy_u_h (v8i16, imm0_7);
u32 __builtin_msa_copy_u_w (v4i32, imm0_3);
u64 __builtin_msa_copy_u_d (v2i64, imm0_1);

void __builtin_msa_ctcmsa (imm0_31, i32);

v16i8 __builtin_msa_div_s_b (v16i8, v16i8);
v8i16 __builtin_msa_div_s_h (v8i16, v8i16);
v4i32 __builtin_msa_div_s_w (v4i32, v4i32);
v2i64 __builtin_msa_div_s_d (v2i64, v2i64);

v16u8 __builtin_msa_div_u_b (v16u8, v16u8);
v8u16 __builtin_msa_div_u_h (v8u16, v8u16);
v4u32 __builtin_msa_div_u_w (v4u32, v4u32);
v2u64 __builtin_msa_div_u_d (v2u64, v2u64);

v8i16 __builtin_msa_dotp_s_h (v16i8, v16i8);
v4i32 __builtin_msa_dotp_s_w (v8i16, v8i16);
v2i64 __builtin_msa_dotp_s_d (v4i32, v4i32);

v8u16 __builtin_msa_dotp_u_h (v16u8, v16u8);
v4u32 __builtin_msa_dotp_u_w (v8u16, v8u16);
v2u64 __builtin_msa_dotp_u_d (v4u32, v4u32);

v8i16 __builtin_msa_dpadd_s_h (v8i16, v16i8, v16i8);
v4i32 __builtin_msa_dpadd_s_w (v4i32, v8i16, v8i16);
v2i64 __builtin_msa_dpadd_s_d (v2i64, v4i32, v4i32);

v8u16 __builtin_msa_dpadd_u_h (v8u16, v16u8, v16u8);
v4u32 __builtin_msa_dpadd_u_w (v4u32, v8u16, v8u16);
v2u64 __builtin_msa_dpadd_u_d (v2u64, v4u32, v4u32);

v8i16 __builtin_msa_dpsub_s_h (v8i16, v16i8, v16i8);
v4i32 __builtin_msa_dpsub_s_w (v4i32, v8i16, v8i16);
v2i64 __builtin_msa_dpsub_s_d (v2i64, v4i32, v4i32);

v8i16 __builtin_msa_dpsub_u_h (v8i16, v16u8, v16u8);
v4i32 __builtin_msa_dpsub_u_w (v4i32, v8u16, v8u16);
v2i64 __builtin_msa_dpsub_u_d (v2i64, v4u32, v4u32);

v4f32 __builtin_msa_fadd_w (v4f32, v4f32);
v2f64 __builtin_msa_fadd_d (v2f64, v2f64);

v4i32 __builtin_msa_fcaf_w (v4f32, v4f32);
v2i64 __builtin_msa_fcaf_d (v2f64, v2f64);

v4i32 __builtin_msa_fceq_w (v4f32, v4f32);
v2i64 __builtin_msa_fceq_d (v2f64, v2f64);

v4i32 __builtin_msa_fclass_w (v4f32);
v2i64 __builtin_msa_fclass_d (v2f64);

v4i32 __builtin_msa_fcle_w (v4f32, v4f32);
v2i64 __builtin_msa_fcle_d (v2f64, v2f64);

v4i32 __builtin_msa_fclt_w (v4f32, v4f32);
v2i64 __builtin_msa_fclt_d (v2f64, v2f64);

v4i32 __builtin_msa_fcne_w (v4f32, v4f32);
v2i64 __builtin_msa_fcne_d (v2f64, v2f64);

v4i32 __builtin_msa_fcor_w (v4f32, v4f32);
v2i64 __builtin_msa_fcor_d (v2f64, v2f64);

v4i32 __builtin_msa_fcueq_w (v4f32, v4f32);
v2i64 __builtin_msa_fcueq_d (v2f64, v2f64);

v4i32 __builtin_msa_fcule_w (v4f32, v4f32);
v2i64 __builtin_msa_fcule_d (v2f64, v2f64);

v4i32 __builtin_msa_fcult_w (v4f32, v4f32);
v2i64 __builtin_msa_fcult_d (v2f64, v2f64);

v4i32 __builtin_msa_fcun_w (v4f32, v4f32);
v2i64 __builtin_msa_fcun_d (v2f64, v2f64);

v4i32 __builtin_msa_fcune_w (v4f32, v4f32);
v2i64 __builtin_msa_fcune_d (v2f64, v2f64);

v4f32 __builtin_msa_fdiv_w (v4f32, v4f32);
v2f64 __builtin_msa_fdiv_d (v2f64, v2f64);

v8i16 __builtin_msa_fexdo_h (v4f32, v4f32);
v4f32 __builtin_msa_fexdo_w (v2f64, v2f64);

v4f32 __builtin_msa_fexp2_w (v4f32, v4i32);
v2f64 __builtin_msa_fexp2_d (v2f64, v2i64);

v4f32 __builtin_msa_fexupl_w (v8i16);
v2f64 __builtin_msa_fexupl_d (v4f32);

v4f32 __builtin_msa_fexupr_w (v8i16);
v2f64 __builtin_msa_fexupr_d (v4f32);

v4f32 __builtin_msa_ffint_s_w (v4i32);
v2f64 __builtin_msa_ffint_s_d (v2i64);

v4f32 __builtin_msa_ffint_u_w (v4u32);
v2f64 __builtin_msa_ffint_u_d (v2u64);

v4f32 __builtin_msa_ffql_w (v8i16);
v2f64 __builtin_msa_ffql_d (v4i32);

v4f32 __builtin_msa_ffqr_w (v8i16);
v2f64 __builtin_msa_ffqr_d (v4i32);

v16i8 __builtin_msa_fill_b (i32);
v8i16 __builtin_msa_fill_h (i32);
v4i32 __builtin_msa_fill_w (i32);
v2i64 __builtin_msa_fill_d (i64);

v4f32 __builtin_msa_flog2_w (v4f32);
v2f64 __builtin_msa_flog2_d (v2f64);

v4f32 __builtin_msa_fmadd_w (v4f32, v4f32, v4f32);
v2f64 __builtin_msa_fmadd_d (v2f64, v2f64, v2f64);

v4f32 __builtin_msa_fmax_w (v4f32, v4f32);
v2f64 __builtin_msa_fmax_d (v2f64, v2f64);

v4f32 __builtin_msa_fmax_a_w (v4f32, v4f32);
v2f64 __builtin_msa_fmax_a_d (v2f64, v2f64);

v4f32 __builtin_msa_fmin_w (v4f32, v4f32);
v2f64 __builtin_msa_fmin_d (v2f64, v2f64);

v4f32 __builtin_msa_fmin_a_w (v4f32, v4f32);
v2f64 __builtin_msa_fmin_a_d (v2f64, v2f64);

v4f32 __builtin_msa_fmsub_w (v4f32, v4f32, v4f32);
v2f64 __builtin_msa_fmsub_d (v2f64, v2f64, v2f64);

v4f32 __builtin_msa_fmul_w (v4f32, v4f32);
v2f64 __builtin_msa_fmul_d (v2f64, v2f64);

v4f32 __builtin_msa_frint_w (v4f32);
v2f64 __builtin_msa_frint_d (v2f64);

v4f32 __builtin_msa_frcp_w (v4f32);
v2f64 __builtin_msa_frcp_d (v2f64);

v4f32 __builtin_msa_frsqrt_w (v4f32);
v2f64 __builtin_msa_frsqrt_d (v2f64);

v4i32 __builtin_msa_fsaf_w (v4f32, v4f32);
v2i64 __builtin_msa_fsaf_d (v2f64, v2f64);

v4i32 __builtin_msa_fseq_w (v4f32, v4f32);
v2i64 __builtin_msa_fseq_d (v2f64, v2f64);

v4i32 __builtin_msa_fsle_w (v4f32, v4f32);
v2i64 __builtin_msa_fsle_d (v2f64, v2f64);

v4i32 __builtin_msa_fslt_w (v4f32, v4f32);
v2i64 __builtin_msa_fslt_d (v2f64, v2f64);

v4i32 __builtin_msa_fsne_w (v4f32, v4f32);
v2i64 __builtin_msa_fsne_d (v2f64, v2f64);

v4i32 __builtin_msa_fsor_w (v4f32, v4f32);
v2i64 __builtin_msa_fsor_d (v2f64, v2f64);

v4f32 __builtin_msa_fsqrt_w (v4f32);
v2f64 __builtin_msa_fsqrt_d (v2f64);

v4f32 __builtin_msa_fsub_w (v4f32, v4f32);
v2f64 __builtin_msa_fsub_d (v2f64, v2f64);

v4i32 __builtin_msa_fsueq_w (v4f32, v4f32);
v2i64 __builtin_msa_fsueq_d (v2f64, v2f64);

v4i32 __builtin_msa_fsule_w (v4f32, v4f32);
v2i64 __builtin_msa_fsule_d (v2f64, v2f64);

v4i32 __builtin_msa_fsult_w (v4f32, v4f32);
v2i64 __builtin_msa_fsult_d (v2f64, v2f64);

v4i32 __builtin_msa_fsun_w (v4f32, v4f32);
v2i64 __builtin_msa_fsun_d (v2f64, v2f64);

v4i32 __builtin_msa_fsune_w (v4f32, v4f32);
v2i64 __builtin_msa_fsune_d (v2f64, v2f64);

v4i32 __builtin_msa_ftint_s_w (v4f32);
v2i64 __builtin_msa_ftint_s_d (v2f64);

v4u32 __builtin_msa_ftint_u_w (v4f32);
v2u64 __builtin_msa_ftint_u_d (v2f64);

v8i16 __builtin_msa_ftq_h (v4f32, v4f32);
v4i32 __builtin_msa_ftq_w (v2f64, v2f64);

v4i32 __builtin_msa_ftrunc_s_w (v4f32);
v2i64 __builtin_msa_ftrunc_s_d (v2f64);

v4u32 __builtin_msa_ftrunc_u_w (v4f32);
v2u64 __builtin_msa_ftrunc_u_d (v2f64);

v8i16 __builtin_msa_hadd_s_h (v16i8, v16i8);
v4i32 __builtin_msa_hadd_s_w (v8i16, v8i16);
v2i64 __builtin_msa_hadd_s_d (v4i32, v4i32);

v8u16 __builtin_msa_hadd_u_h (v16u8, v16u8);
v4u32 __builtin_msa_hadd_u_w (v8u16, v8u16);
v2u64 __builtin_msa_hadd_u_d (v4u32, v4u32);

v8i16 __builtin_msa_hsub_s_h (v16i8, v16i8);
v4i32 __builtin_msa_hsub_s_w (v8i16, v8i16);
v2i64 __builtin_msa_hsub_s_d (v4i32, v4i32);

v8i16 __builtin_msa_hsub_u_h (v16u8, v16u8);
v4i32 __builtin_msa_hsub_u_w (v8u16, v8u16);
v2i64 __builtin_msa_hsub_u_d (v4u32, v4u32);

v16i8 __builtin_msa_ilvev_b (v16i8, v16i8);
v8i16 __builtin_msa_ilvev_h (v8i16, v8i16);
v4i32 __builtin_msa_ilvev_w (v4i32, v4i32);
v2i64 __builtin_msa_ilvev_d (v2i64, v2i64);

v16i8 __builtin_msa_ilvl_b (v16i8, v16i8);
v8i16 __builtin_msa_ilvl_h (v8i16, v8i16);
v4i32 __builtin_msa_ilvl_w (v4i32, v4i32);
v2i64 __builtin_msa_ilvl_d (v2i64, v2i64);

v16i8 __builtin_msa_ilvod_b (v16i8, v16i8);
v8i16 __builtin_msa_ilvod_h (v8i16, v8i16);
v4i32 __builtin_msa_ilvod_w (v4i32, v4i32);
v2i64 __builtin_msa_ilvod_d (v2i64, v2i64);

v16i8 __builtin_msa_ilvr_b (v16i8, v16i8);
v8i16 __builtin_msa_ilvr_h (v8i16, v8i16);
v4i32 __builtin_msa_ilvr_w (v4i32, v4i32);
v2i64 __builtin_msa_ilvr_d (v2i64, v2i64);

v16i8 __builtin_msa_insert_b (v16i8, imm0_15, i32);
v8i16 __builtin_msa_insert_h (v8i16, imm0_7, i32);
v4i32 __builtin_msa_insert_w (v4i32, imm0_3, i32);
v2i64 __builtin_msa_insert_d (v2i64, imm0_1, i64);

v16i8 __builtin_msa_insve_b (v16i8, imm0_15, v16i8);
v8i16 __builtin_msa_insve_h (v8i16, imm0_7, v8i16);
v4i32 __builtin_msa_insve_w (v4i32, imm0_3, v4i32);
v2i64 __builtin_msa_insve_d (v2i64, imm0_1, v2i64);

v16i8 __builtin_msa_ld_b (const void *, imm_n512_511);
v8i16 __builtin_msa_ld_h (const void *, imm_n1024_1022);
v4i32 __builtin_msa_ld_w (const void *, imm_n2048_2044);
v2i64 __builtin_msa_ld_d (const void *, imm_n4096_4088);

v16i8 __builtin_msa_ldi_b (imm_n512_511);
v8i16 __builtin_msa_ldi_h (imm_n512_511);
v4i32 __builtin_msa_ldi_w (imm_n512_511);
v2i64 __builtin_msa_ldi_d (imm_n512_511);

v8i16 __builtin_msa_madd_q_h (v8i16, v8i16, v8i16);
v4i32 __builtin_msa_madd_q_w (v4i32, v4i32, v4i32);

v8i16 __builtin_msa_maddr_q_h (v8i16, v8i16, v8i16);
v4i32 __builtin_msa_maddr_q_w (v4i32, v4i32, v4i32);

v16i8 __builtin_msa_maddv_b (v16i8, v16i8, v16i8);
v8i16 __builtin_msa_maddv_h (v8i16, v8i16, v8i16);
v4i32 __builtin_msa_maddv_w (v4i32, v4i32, v4i32);
v2i64 __builtin_msa_maddv_d (v2i64, v2i64, v2i64);

v16i8 __builtin_msa_max_a_b (v16i8, v16i8);
v8i16 __builtin_msa_max_a_h (v8i16, v8i16);
v4i32 __builtin_msa_max_a_w (v4i32, v4i32);
v2i64 __builtin_msa_max_a_d (v2i64, v2i64);

v16i8 __builtin_msa_max_s_b (v16i8, v16i8);
v8i16 __builtin_msa_max_s_h (v8i16, v8i16);
v4i32 __builtin_msa_max_s_w (v4i32, v4i32);
v2i64 __builtin_msa_max_s_d (v2i64, v2i64);

v16u8 __builtin_msa_max_u_b (v16u8, v16u8);
v8u16 __builtin_msa_max_u_h (v8u16, v8u16);
v4u32 __builtin_msa_max_u_w (v4u32, v4u32);
v2u64 __builtin_msa_max_u_d (v2u64, v2u64);

v16i8 __builtin_msa_maxi_s_b (v16i8, imm_n16_15);
v8i16 __builtin_msa_maxi_s_h (v8i16, imm_n16_15);
v4i32 __builtin_msa_maxi_s_w (v4i32, imm_n16_15);
v2i64 __builtin_msa_maxi_s_d (v2i64, imm_n16_15);

v16u8 __builtin_msa_maxi_u_b (v16u8, imm0_31);
v8u16 __builtin_msa_maxi_u_h (v8u16, imm0_31);
v4u32 __builtin_msa_maxi_u_w (v4u32, imm0_31);
v2u64 __builtin_msa_maxi_u_d (v2u64, imm0_31);

v16i8 __builtin_msa_min_a_b (v16i8, v16i8);
v8i16 __builtin_msa_min_a_h (v8i16, v8i16);
v4i32 __builtin_msa_min_a_w (v4i32, v4i32);
v2i64 __builtin_msa_min_a_d (v2i64, v2i64);

v16i8 __builtin_msa_min_s_b (v16i8, v16i8);
v8i16 __builtin_msa_min_s_h (v8i16, v8i16);
v4i32 __builtin_msa_min_s_w (v4i32, v4i32);
v2i64 __builtin_msa_min_s_d (v2i64, v2i64);

v16u8 __builtin_msa_min_u_b (v16u8, v16u8);
v8u16 __builtin_msa_min_u_h (v8u16, v8u16);
v4u32 __builtin_msa_min_u_w (v4u32, v4u32);
v2u64 __builtin_msa_min_u_d (v2u64, v2u64);

v16i8 __builtin_msa_mini_s_b (v16i8, imm_n16_15);
v8i16 __builtin_msa_mini_s_h (v8i16, imm_n16_15);
v4i32 __builtin_msa_mini_s_w (v4i32, imm_n16_15);
v2i64 __builtin_msa_mini_s_d (v2i64, imm_n16_15);

v16u8 __builtin_msa_mini_u_b (v16u8, imm0_31);
v8u16 __builtin_msa_mini_u_h (v8u16, imm0_31);
v4u32 __builtin_msa_mini_u_w (v4u32, imm0_31);
v2u64 __builtin_msa_mini_u_d (v2u64, imm0_31);

v16i8 __builtin_msa_mod_s_b (v16i8, v16i8);
v8i16 __builtin_msa_mod_s_h (v8i16, v8i16);
v4i32 __builtin_msa_mod_s_w (v4i32, v4i32);
v2i64 __builtin_msa_mod_s_d (v2i64, v2i64);

v16u8 __builtin_msa_mod_u_b (v16u8, v16u8);
v8u16 __builtin_msa_mod_u_h (v8u16, v8u16);
v4u32 __builtin_msa_mod_u_w (v4u32, v4u32);
v2u64 __builtin_msa_mod_u_d (v2u64, v2u64);

v16i8 __builtin_msa_move_v (v16i8);

v8i16 __builtin_msa_msub_q_h (v8i16, v8i16, v8i16);
v4i32 __builtin_msa_msub_q_w (v4i32, v4i32, v4i32);

v8i16 __builtin_msa_msubr_q_h (v8i16, v8i16, v8i16);
v4i32 __builtin_msa_msubr_q_w (v4i32, v4i32, v4i32);

v16i8 __builtin_msa_msubv_b (v16i8, v16i8, v16i8);
v8i16 __builtin_msa_msubv_h (v8i16, v8i16, v8i16);
v4i32 __builtin_msa_msubv_w (v4i32, v4i32, v4i32);
v2i64 __builtin_msa_msubv_d (v2i64, v2i64, v2i64);

v8i16 __builtin_msa_mul_q_h (v8i16, v8i16);
v4i32 __builtin_msa_mul_q_w (v4i32, v4i32);

v8i16 __builtin_msa_mulr_q_h (v8i16, v8i16);
v4i32 __builtin_msa_mulr_q_w (v4i32, v4i32);

v16i8 __builtin_msa_mulv_b (v16i8, v16i8);
v8i16 __builtin_msa_mulv_h (v8i16, v8i16);
v4i32 __builtin_msa_mulv_w (v4i32, v4i32);
v2i64 __builtin_msa_mulv_d (v2i64, v2i64);

v16i8 __builtin_msa_nloc_b (v16i8);
v8i16 __builtin_msa_nloc_h (v8i16);
v4i32 __builtin_msa_nloc_w (v4i32);
v2i64 __builtin_msa_nloc_d (v2i64);

v16i8 __builtin_msa_nlzc_b (v16i8);
v8i16 __builtin_msa_nlzc_h (v8i16);
v4i32 __builtin_msa_nlzc_w (v4i32);
v2i64 __builtin_msa_nlzc_d (v2i64);

v16u8 __builtin_msa_nor_v (v16u8, v16u8);

v16u8 __builtin_msa_nori_b (v16u8, imm0_255);

v16u8 __builtin_msa_or_v (v16u8, v16u8);

v16u8 __builtin_msa_ori_b (v16u8, imm0_255);

v16i8 __builtin_msa_pckev_b (v16i8, v16i8);
v8i16 __builtin_msa_pckev_h (v8i16, v8i16);
v4i32 __builtin_msa_pckev_w (v4i32, v4i32);
v2i64 __builtin_msa_pckev_d (v2i64, v2i64);

v16i8 __builtin_msa_pckod_b (v16i8, v16i8);
v8i16 __builtin_msa_pckod_h (v8i16, v8i16);
v4i32 __builtin_msa_pckod_w (v4i32, v4i32);
v2i64 __builtin_msa_pckod_d (v2i64, v2i64);

v16i8 __builtin_msa_pcnt_b (v16i8);
v8i16 __builtin_msa_pcnt_h (v8i16);
v4i32 __builtin_msa_pcnt_w (v4i32);
v2i64 __builtin_msa_pcnt_d (v2i64);

v16i8 __builtin_msa_sat_s_b (v16i8, imm0_7);
v8i16 __builtin_msa_sat_s_h (v8i16, imm0_15);
v4i32 __builtin_msa_sat_s_w (v4i32, imm0_31);
v2i64 __builtin_msa_sat_s_d (v2i64, imm0_63);

v16u8 __builtin_msa_sat_u_b (v16u8, imm0_7);
v8u16 __builtin_msa_sat_u_h (v8u16, imm0_15);
v4u32 __builtin_msa_sat_u_w (v4u32, imm0_31);
v2u64 __builtin_msa_sat_u_d (v2u64, imm0_63);

v16i8 __builtin_msa_shf_b (v16i8, imm0_255);
v8i16 __builtin_msa_shf_h (v8i16, imm0_255);
v4i32 __builtin_msa_shf_w (v4i32, imm0_255);

v16i8 __builtin_msa_sld_b (v16i8, v16i8, i32);
v8i16 __builtin_msa_sld_h (v8i16, v8i16, i32);
v4i32 __builtin_msa_sld_w (v4i32, v4i32, i32);
v2i64 __builtin_msa_sld_d (v2i64, v2i64, i32);

v16i8 __builtin_msa_sldi_b (v16i8, v16i8, imm0_15);
v8i16 __builtin_msa_sldi_h (v8i16, v8i16, imm0_7);
v4i32 __builtin_msa_sldi_w (v4i32, v4i32, imm0_3);
v2i64 __builtin_msa_sldi_d (v2i64, v2i64, imm0_1);

v16i8 __builtin_msa_sll_b (v16i8, v16i8);
v8i16 __builtin_msa_sll_h (v8i16, v8i16);
v4i32 __builtin_msa_sll_w (v4i32, v4i32);
v2i64 __builtin_msa_sll_d (v2i64, v2i64);

v16i8 __builtin_msa_slli_b (v16i8, imm0_7);
v8i16 __builtin_msa_slli_h (v8i16, imm0_15);
v4i32 __builtin_msa_slli_w (v4i32, imm0_31);
v2i64 __builtin_msa_slli_d (v2i64, imm0_63);

v16i8 __builtin_msa_splat_b (v16i8, i32);
v8i16 __builtin_msa_splat_h (v8i16, i32);
v4i32 __builtin_msa_splat_w (v4i32, i32);
v2i64 __builtin_msa_splat_d (v2i64, i32);

v16i8 __builtin_msa_splati_b (v16i8, imm0_15);
v8i16 __builtin_msa_splati_h (v8i16, imm0_7);
v4i32 __builtin_msa_splati_w (v4i32, imm0_3);
v2i64 __builtin_msa_splati_d (v2i64, imm0_1);

v16i8 __builtin_msa_sra_b (v16i8, v16i8);
v8i16 __builtin_msa_sra_h (v8i16, v8i16);
v4i32 __builtin_msa_sra_w (v4i32, v4i32);
v2i64 __builtin_msa_sra_d (v2i64, v2i64);

v16i8 __builtin_msa_srai_b (v16i8, imm0_7);
v8i16 __builtin_msa_srai_h (v8i16, imm0_15);
v4i32 __builtin_msa_srai_w (v4i32, imm0_31);
v2i64 __builtin_msa_srai_d (v2i64, imm0_63);

v16i8 __builtin_msa_srar_b (v16i8, v16i8);
v8i16 __builtin_msa_srar_h (v8i16, v8i16);
v4i32 __builtin_msa_srar_w (v4i32, v4i32);
v2i64 __builtin_msa_srar_d (v2i64, v2i64);

v16i8 __builtin_msa_srari_b (v16i8, imm0_7);
v8i16 __builtin_msa_srari_h (v8i16, imm0_15);
v4i32 __builtin_msa_srari_w (v4i32, imm0_31);
v2i64 __builtin_msa_srari_d (v2i64, imm0_63);

v16i8 __builtin_msa_srl_b (v16i8, v16i8);
v8i16 __builtin_msa_srl_h (v8i16, v8i16);
v4i32 __builtin_msa_srl_w (v4i32, v4i32);
v2i64 __builtin_msa_srl_d (v2i64, v2i64);

v16i8 __builtin_msa_srli_b (v16i8, imm0_7);
v8i16 __builtin_msa_srli_h (v8i16, imm0_15);
v4i32 __builtin_msa_srli_w (v4i32, imm0_31);
v2i64 __builtin_msa_srli_d (v2i64, imm0_63);

v16i8 __builtin_msa_srlr_b (v16i8, v16i8);
v8i16 __builtin_msa_srlr_h (v8i16, v8i16);
v4i32 __builtin_msa_srlr_w (v4i32, v4i32);
v2i64 __builtin_msa_srlr_d (v2i64, v2i64);

v16i8 __builtin_msa_srlri_b (v16i8, imm0_7);
v8i16 __builtin_msa_srlri_h (v8i16, imm0_15);
v4i32 __builtin_msa_srlri_w (v4i32, imm0_31);
v2i64 __builtin_msa_srlri_d (v2i64, imm0_63);

void __builtin_msa_st_b (v16i8, void *, imm_n512_511);
void __builtin_msa_st_h (v8i16, void *, imm_n1024_1022);
void __builtin_msa_st_w (v4i32, void *, imm_n2048_2044);
void __builtin_msa_st_d (v2i64, void *, imm_n4096_4088);

v16i8 __builtin_msa_subs_s_b (v16i8, v16i8);
v8i16 __builtin_msa_subs_s_h (v8i16, v8i16);
v4i32 __builtin_msa_subs_s_w (v4i32, v4i32);
v2i64 __builtin_msa_subs_s_d (v2i64, v2i64);

v16u8 __builtin_msa_subs_u_b (v16u8, v16u8);
v8u16 __builtin_msa_subs_u_h (v8u16, v8u16);
v4u32 __builtin_msa_subs_u_w (v4u32, v4u32);
v2u64 __builtin_msa_subs_u_d (v2u64, v2u64);

v16u8 __builtin_msa_subsus_u_b (v16u8, v16i8);
v8u16 __builtin_msa_subsus_u_h (v8u16, v8i16);
v4u32 __builtin_msa_subsus_u_w (v4u32, v4i32);
v2u64 __builtin_msa_subsus_u_d (v2u64, v2i64);

v16i8 __builtin_msa_subsuu_s_b (v16u8, v16u8);
v8i16 __builtin_msa_subsuu_s_h (v8u16, v8u16);
v4i32 __builtin_msa_subsuu_s_w (v4u32, v4u32);
v2i64 __builtin_msa_subsuu_s_d (v2u64, v2u64);

v16i8 __builtin_msa_subv_b (v16i8, v16i8);
v8i16 __builtin_msa_subv_h (v8i16, v8i16);
v4i32 __builtin_msa_subv_w (v4i32, v4i32);
v2i64 __builtin_msa_subv_d (v2i64, v2i64);

v16i8 __builtin_msa_subvi_b (v16i8, imm0_31);
v8i16 __builtin_msa_subvi_h (v8i16, imm0_31);
v4i32 __builtin_msa_subvi_w (v4i32, imm0_31);
v2i64 __builtin_msa_subvi_d (v2i64, imm0_31);

v16i8 __builtin_msa_vshf_b (v16i8, v16i8, v16i8);
v8i16 __builtin_msa_vshf_h (v8i16, v8i16, v8i16);
v4i32 __builtin_msa_vshf_w (v4i32, v4i32, v4i32);
v2i64 __builtin_msa_vshf_d (v2i64, v2i64, v2i64);

v16u8 __builtin_msa_xor_v (v16u8, v16u8);

v16u8 __builtin_msa_xori_b (v16u8, imm0_255);
@end smallexample

@node Other MIPS Built-in Functions
@subsection Other MIPS Built-in Functions

GCC provides other MIPS-specific built-in functions:

@table @code
@item void __builtin_mips_cache (int @var{op}, const volatile void *@var{addr})
Insert a @samp{cache} instruction with operands @var{op} and @var{addr}.
GCC defines the preprocessor macro @code{___GCC_HAVE_BUILTIN_MIPS_CACHE}
when this function is available.

@item unsigned int __builtin_mips_get_fcsr (void)
@itemx void __builtin_mips_set_fcsr (unsigned int @var{value})
Get and set the contents of the floating-point control and status register
(FPU control register 31).  These functions are only available in hard-float
code but can be called in both MIPS16 and non-MIPS16 contexts.

@code{__builtin_mips_set_fcsr} can be used to change any bit of the
register except the condition codes, which GCC assumes are preserved.
@end table

@node MSP430 Built-in Functions
@subsection MSP430 Built-in Functions

GCC provides a couple of special builtin functions to aid in the
writing of interrupt handlers in C.

@table @code
@item __bic_SR_register_on_exit (int @var{mask})
This clears the indicated bits in the saved copy of the status register
currently residing on the stack.  This only works inside interrupt
handlers and the changes to the status register will only take affect
once the handler returns.

@item __bis_SR_register_on_exit (int @var{mask})
This sets the indicated bits in the saved copy of the status register
currently residing on the stack.  This only works inside interrupt
handlers and the changes to the status register will only take affect
once the handler returns.

@item __delay_cycles (long long @var{cycles})
This inserts an instruction sequence that takes exactly @var{cycles}
cycles (between 0 and about 17E9) to complete.  The inserted sequence
may use jumps, loops, or no-ops, and does not interfere with any other
instructions.  Note that @var{cycles} must be a compile-time constant
integer - that is, you must pass a number, not a variable that may be
optimized to a constant later.  The number of cycles delayed by this
builtin is exact.
@end table

@node NDS32 Built-in Functions
@subsection NDS32 Built-in Functions

These built-in functions are available for the NDS32 target:

@defbuiltin{void __builtin_nds32_isync (int *@var{addr})}
Insert an ISYNC instruction into the instruction stream where
@var{addr} is an instruction address for serialization.
@enddefbuiltin

@defbuiltin{void __builtin_nds32_isb (void)}
Insert an ISB instruction into the instruction stream.
@enddefbuiltin

@defbuiltin{int __builtin_nds32_mfsr (int @var{sr})}
Return the content of a system register which is mapped by @var{sr}.
@enddefbuiltin

@defbuiltin{int __builtin_nds32_mfusr (int @var{usr})}
Return the content of a user space register which is mapped by @var{usr}.
@enddefbuiltin

@defbuiltin{void __builtin_nds32_mtsr (int @var{value}, int @var{sr})}
Move the @var{value} to a system register which is mapped by @var{sr}.
@enddefbuiltin

@defbuiltin{void __builtin_nds32_mtusr (int @var{value}, int @var{usr})}
Move the @var{value} to a user space register which is mapped by @var{usr}.
@enddefbuiltin

@defbuiltin{void __builtin_nds32_setgie_en (void)}
Enable global interrupt.
@enddefbuiltin

@defbuiltin{void __builtin_nds32_setgie_dis (void)}
Disable global interrupt.
@enddefbuiltin

@node Nvidia PTX Built-in Functions
@subsection Nvidia PTX Built-in Functions

These built-in functions are available for the Nvidia PTX target:

@defbuiltin{{unsigned int} __builtin_nvptx_brev (unsigned int @var{x})}
Reverse the bit order of a 32-bit unsigned integer.
@enddefbuiltin

@defbuiltin{{unsigned long long} __builtin_nvptx_brevll (unsigned long long @var{x})}
Reverse the bit order of a 64-bit unsigned integer.
@enddefbuiltin

@node Basic PowerPC Built-in Functions
@subsection Basic PowerPC Built-in Functions

@menu
* Basic PowerPC Built-in Functions Available on all Configurations::
* Basic PowerPC Built-in Functions Available on ISA 2.05::
* Basic PowerPC Built-in Functions Available on ISA 2.06::
* Basic PowerPC Built-in Functions Available on ISA 2.07::
* Basic PowerPC Built-in Functions Available on ISA 3.0::
* Basic PowerPC Built-in Functions Available on ISA 3.1::
@end menu

This section describes PowerPC built-in functions that do not require
the inclusion of any special header files to declare prototypes or
provide macro definitions.  The sections that follow describe
additional PowerPC built-in functions.

@node Basic PowerPC Built-in Functions Available on all Configurations
@subsubsection Basic PowerPC Built-in Functions Available on all Configurations

@defbuiltin{void __builtin_cpu_init (void)}
This function is a @code{nop} on the PowerPC platform and is included solely
to maintain API compatibility with the x86 builtins.
@enddefbuiltin

@defbuiltin{int __builtin_cpu_is (const char *@var{cpuname})}
This function returns a value of @code{1} if the run-time CPU is of type
@var{cpuname} and returns @code{0} otherwise

The @code{__builtin_cpu_is} function requires GLIBC 2.23 or newer
which exports the hardware capability bits.  GCC defines the macro
@code{__BUILTIN_CPU_SUPPORTS__} if the @code{__builtin_cpu_supports}
built-in function is fully supported.

If GCC was configured to use a GLIBC before 2.23, the built-in
function @code{__builtin_cpu_is} always returns a 0 and the compiler
issues a warning.

The following CPU names can be detected:

@table @samp
@item power10
IBM POWER10 Server CPU.
@item power9
IBM POWER9 Server CPU.
@item power8
IBM POWER8 Server CPU.
@item power7
IBM POWER7 Server CPU.
@item power6x
IBM POWER6 Server CPU (RAW mode).
@item power6
IBM POWER6 Server CPU (Architected mode).
@item power5+
IBM POWER5+ Server CPU.
@item power5
IBM POWER5 Server CPU.
@item ppc970
IBM 970 Server CPU (ie, Apple G5).
@item power4
IBM POWER4 Server CPU.
@item ppca2
IBM A2 64-bit Embedded CPU
@item ppc476
IBM PowerPC 476FP 32-bit Embedded CPU.
@item ppc464
IBM PowerPC 464 32-bit Embedded CPU.
@item ppc440
PowerPC 440 32-bit Embedded CPU.
@item ppc405
PowerPC 405 32-bit Embedded CPU.
@item ppc-cell-be
IBM PowerPC Cell Broadband Engine Architecture CPU.
@end table

Here is an example:
@smallexample
#ifdef __BUILTIN_CPU_SUPPORTS__
  if (__builtin_cpu_is ("power8"))
    @{
       do_power8 (); // POWER8 specific implementation.
    @}
  else
#endif
    @{
       do_generic (); // Generic implementation.
    @}
@end smallexample
@enddefbuiltin

@defbuiltin{int __builtin_cpu_supports (const char *@var{feature})}
This function returns a value of @code{1} if the run-time CPU supports the HWCAP
feature @var{feature} and returns @code{0} otherwise.

The @code{__builtin_cpu_supports} function requires GLIBC 2.23 or
newer which exports the hardware capability bits.  GCC defines the
macro @code{__BUILTIN_CPU_SUPPORTS__} if the
@code{__builtin_cpu_supports} built-in function is fully supported.

If GCC was configured to use a GLIBC before 2.23, the built-in
function @code{__builtin_cpu_supports} always returns a 0 and the
compiler issues a warning.

The following features can be
detected:

@table @samp
@item 4xxmac
4xx CPU has a Multiply Accumulator.
@item altivec
CPU has a SIMD/Vector Unit.
@item arch_2_05
CPU supports ISA 2.05 (eg, POWER6)
@item arch_2_06
CPU supports ISA 2.06 (eg, POWER7)
@item arch_2_07
CPU supports ISA 2.07 (eg, POWER8)
@item arch_3_00
CPU supports ISA 3.0 (eg, POWER9)
@item arch_3_1
CPU supports ISA 3.1 (eg, POWER10)
@item archpmu
CPU supports the set of compatible performance monitoring events.
@item booke
CPU supports the Embedded ISA category.
@item cellbe
CPU has a CELL broadband engine.
@item darn
CPU supports the @code{darn} (deliver a random number) instruction.
@item dfp
CPU has a decimal floating point unit.
@item dscr
CPU supports the data stream control register.
@item ebb
CPU supports event base branching.
@item efpdouble
CPU has a SPE double precision floating point unit.
@item efpsingle
CPU has a SPE single precision floating point unit.
@item fpu
CPU has a floating point unit.
@item htm
CPU has hardware transaction memory instructions.
@item htm-nosc
Kernel aborts hardware transactions when a syscall is made.
@item htm-no-suspend
CPU supports hardware transaction memory but does not support the
@code{tsuspend.} instruction.
@item ic_snoop
CPU supports icache snooping capabilities.
@item ieee128
CPU supports 128-bit IEEE binary floating point instructions.
@item isel
CPU supports the integer select instruction.
@item mma
CPU supports the matrix-multiply assist instructions.
@item mmu
CPU has a memory management unit.
@item notb
CPU does not have a timebase (eg, 601 and 403gx).
@item pa6t
CPU supports the PA Semi 6T CORE ISA.
@item power4
CPU supports ISA 2.00 (eg, POWER4)
@item power5
CPU supports ISA 2.02 (eg, POWER5)
@item power5+
CPU supports ISA 2.03 (eg, POWER5+)
@item power6x
CPU supports ISA 2.05 (eg, POWER6) extended opcodes mffgpr and mftgpr.
@item ppc32
CPU supports 32-bit mode execution.
@item ppc601
CPU supports the old POWER ISA (eg, 601)
@item ppc64
CPU supports 64-bit mode execution.
@item ppcle
CPU supports a little-endian mode that uses address swizzling.
@item scv
Kernel supports system call vectored.
@item smt
CPU support simultaneous multi-threading.
@item spe
CPU has a signal processing extension unit.
@item tar
CPU supports the target address register.
@item true_le
CPU supports true little-endian mode.
@item ucache
CPU has unified I/D cache.
@item vcrypto
CPU supports the vector cryptography instructions.
@item vsx
CPU supports the vector-scalar extension.
@end table

Here is an example:
@smallexample
#ifdef __BUILTIN_CPU_SUPPORTS__
  if (__builtin_cpu_supports ("fpu"))
    @{
       asm("fadd %0,%1,%2" : "=d"(dst) : "d"(src1), "d"(src2));
    @}
  else
#endif
    @{
       dst = __fadd (src1, src2); // Software FP addition function.
    @}
@end smallexample
@enddefbuiltin

The following built-in functions are also available on all PowerPC
processors:
@smallexample
uint64_t __builtin_ppc_get_timebase ();
unsigned long __builtin_ppc_mftb ();
double __builtin_unpack_ibm128 (__ibm128, int);
__ibm128 __builtin_pack_ibm128 (double, double);
double __builtin_mffs (void);
void __builtin_mtfsf (const int, double);
void __builtin_mtfsb0 (const int);
void __builtin_mtfsb1 (const int);
double __builtin_set_fpscr_rn (int);
@end smallexample

The @code{__builtin_ppc_get_timebase} and @code{__builtin_ppc_mftb}
functions generate instructions to read the Time Base Register.  The
@code{__builtin_ppc_get_timebase} function may generate multiple
instructions and always returns the 64 bits of the Time Base Register.
The @code{__builtin_ppc_mftb} function always generates one instruction and
returns the Time Base Register value as an unsigned long, throwing away
the most significant word on 32-bit environments.  The @code{__builtin_mffs}
return the value of the FPSCR register.  Note, ISA 3.0 supports the
@code{__builtin_mffsl()} which permits software to read the control and
non-sticky status bits in the FSPCR without the higher latency associated with
accessing the sticky status bits.  The @code{__builtin_mtfsf} takes a constant
8-bit integer field mask and a double precision floating point argument
and generates the @code{mtfsf} (extended mnemonic) instruction to write new
values to selected fields of the FPSCR.  The
@code{__builtin_mtfsb0} and @code{__builtin_mtfsb1} take the bit to change
as an argument.  The valid bit range is between 0 and 31.  The builtins map to
the @code{mtfsb0} and @code{mtfsb1} instructions which take the argument and
add 32.  Hence these instructions only modify the FPSCR[32:63] bits by
changing the specified bit to a zero or one respectively.

The @code{__builtin_set_fpscr_rn} built-in allows changing both of the floating
point rounding mode bits and returning the various FPSCR fields before the RN
field is updated.  The built-in returns a double consisting of the initial
value of the FPSCR fields DRN, VE, OE, UE, ZE, XE, NI, and RN bit positions
with all other bits set to zero.  The built-in argument is a 2-bit value for the
new RN field value.  The argument can either be an @code{const int} or stored
in a variable.  Earlier versions of @code{__builtin_set_fpscr_rn} returned
void.  A @code{__SET_FPSCR_RN_RETURNS_FPSCR__} macro has been added.  If
defined, then the @code{__builtin_set_fpscr_rn} built-in returns the FPSCR
fields.  If not defined, the @code{__builtin_set_fpscr_rn} does not return a
value.  If the @option{-msoft-float} option is used, the
@code{__builtin_set_fpscr_rn} built-in will not return a value.

@node Basic PowerPC Built-in Functions Available on ISA 2.05
@subsubsection Basic PowerPC Built-in Functions Available on ISA 2.05

The basic built-in functions described in this section are
available on the PowerPC family of processors starting with ISA 2.05
or later.  Unless specific options are explicitly disabled on the
command line, specifying option @option{-mcpu=power6} has the effect of
enabling the @option{-mpowerpc64}, @option{-mpowerpc-gpopt},
@option{-mpowerpc-gfxopt}, @option{-mmfcrf}, @option{-mpopcntb},
@option{-mfprnd}, @option{-mcmpb}, @option{-mhard-dfp}, and
@option{-mrecip-precision} options.  Specify the
@option{-maltivec} option explicitly in
combination with the above options if desired.

The following functions require option @option{-mcmpb}.
@smallexample
unsigned long long __builtin_cmpb (unsigned long long int, unsigned long long int);
unsigned int __builtin_cmpb (unsigned int, unsigned int);
@end smallexample

The @code{__builtin_cmpb} function
performs a byte-wise compare on the contents of its two arguments,
returning the result of the byte-wise comparison as the returned
value.  For each byte comparison, the corresponding byte of the return
value holds 0xff if the input bytes are equal and 0 if the input bytes
are not equal.  If either of the arguments to this built-in function
is wider than 32 bits, the function call expands into the form that
expects @code{unsigned long long int} arguments
which is only available on 64-bit targets.

The following built-in functions are available
when hardware decimal floating point
(@option{-mhard-dfp}) is available:
@smallexample
void __builtin_set_fpscr_drn(int);
_Decimal64 __builtin_ddedpd (int, _Decimal64);
_Decimal128 __builtin_ddedpdq (int, _Decimal128);
_Decimal64 __builtin_denbcd (int, _Decimal64);
_Decimal128 __builtin_denbcdq (int, _Decimal128);
_Decimal64 __builtin_diex (long long, _Decimal64);
_Decimal128 _builtin_diexq (long long, _Decimal128);
_Decimal64 __builtin_dscli (_Decimal64, int);
_Decimal128 __builtin_dscliq (_Decimal128, int);
_Decimal64 __builtin_dscri (_Decimal64, int);
_Decimal128 __builtin_dscriq (_Decimal128, int);
long long __builtin_dxex (_Decimal64);
long long __builtin_dxexq (_Decimal128);
_Decimal128 __builtin_pack_dec128 (unsigned long long, unsigned long long);
unsigned long long __builtin_unpack_dec128 (_Decimal128, int);

The @code{__builtin_set_fpscr_drn} builtin allows changing the three decimal
floating point rounding mode bits.  The argument is a 3-bit value.  The
argument can either be a @code{const int} or the value can be stored in
a variable.
The builtin uses the ISA 3.0 instruction @code{mffscdrn} if available.
Otherwise the builtin reads the FPSCR, masks the current decimal rounding
mode bits out and OR's in the new value.

_Decimal64 __builtin_dfp_quantize (_Decimal64, _Decimal64, const int);
_Decimal64 __builtin_dfp_quantize (const int, _Decimal64, const int);
_Decimal128 __builtin_dfp_quantize (_Decimal128, _Decimal128, const int);
_Decimal128 __builtin_dfp_quantize (const int, _Decimal128, const int);

The @code{__builtin_dfp_quantize} built-in, converts and rounds the second
argument to the form with the exponent as specified by the first
argument based on the rounding mode specified by the third argument.
If the first argument is a decimal floating point value, its exponent is used
for converting and rounding of the second argument.  If the first argument is a
5-bit constant integer value, then the value specifies the exponent to be used
when rounding and converting the second argument.  The third argument is a
two bit constant integer that specifies the rounding mode.  The possible modes
are: 00 Round to nearest, ties to even; 01 Round toward 0; 10 Round to nearest,
ties away from 0; 11 Round according to DRN where DRN is the Decimal Floating
point field of the FPSCR.

@end smallexample

The following functions require @option{-mhard-float},
@option{-mpowerpc-gfxopt}, and @option{-mpopcntb} options.

@smallexample
double __builtin_recipdiv (double, double);
float __builtin_recipdivf (float, float);
double __builtin_rsqrt (double);
float __builtin_rsqrtf (float);
@end smallexample

The @code{vec_rsqrt}, @code{__builtin_rsqrt}, and
@code{__builtin_rsqrtf} functions generate multiple instructions to
implement the reciprocal sqrt functionality using reciprocal sqrt
estimate instructions.

The @code{__builtin_recipdiv}, and @code{__builtin_recipdivf}
functions generate multiple instructions to implement division using
the reciprocal estimate instructions.

The following functions require @option{-mhard-float} and
@option{-mmultiple} options.

The @code{__builtin_unpack_longdouble} function takes a
@code{long double} argument and a compile time constant of 0 or 1.  If
the constant is 0, the first @code{double} within the
@code{long double} is returned, otherwise the second @code{double}
is returned.  The @code{__builtin_unpack_longdouble} function is only
available if @code{long double} uses the IBM extended double
representation.

The @code{__builtin_pack_longdouble} function takes two @code{double}
arguments and returns a @code{long double} value that combines the two
arguments.  The @code{__builtin_pack_longdouble} function is only
available if @code{long double} uses the IBM extended double
representation.

The @code{__builtin_unpack_ibm128} function takes a @code{__ibm128}
argument and a compile time constant of 0 or 1.  If the constant is 0,
the first @code{double} within the @code{__ibm128} is returned,
otherwise the second @code{double} is returned.

The @code{__builtin_pack_ibm128} function takes two @code{double}
arguments and returns a @code{__ibm128} value that combines the two
arguments.

Additional built-in functions are available for the 64-bit PowerPC
family of processors, for efficient use of 128-bit floating point
(@code{__float128}) values.

Vector select

@smallexample
vector signed __int128 vec_sel (vector signed __int128,
               vector signed __int128, vector bool __int128);
vector signed __int128 vec_sel (vector signed __int128,
               vector signed __int128, vector unsigned __int128);
vector unsigned __int128 vec_sel (vector unsigned __int128,
               vector unsigned __int128, vector bool __int128);
vector unsigned __int128 vec_sel (vector unsigned __int128,
               vector unsigned __int128, vector unsigned __int128);
vector bool __int128 vec_sel (vector bool __int128,
               vector bool __int128, vector bool __int128);
vector bool __int128 vec_sel (vector bool __int128,
               vector bool __int128, vector unsigned __int128);
@end smallexample

The instance is an extension of the exiting overloaded built-in @code{vec_sel}
that is documented in the PVIPR.

@node Basic PowerPC Built-in Functions Available on ISA 2.06
@subsubsection Basic PowerPC Built-in Functions Available on ISA 2.06

The basic built-in functions described in this section are
available on the PowerPC family of processors starting with ISA 2.05
or later.  Unless specific options are explicitly disabled on the
command line, specifying option @option{-mcpu=power7} has the effect of
enabling all the same options as for @option{-mcpu=power6} in
addition to the @option{-maltivec}, @option{-mpopcntd}, and
@option{-mvsx} options.

The following basic built-in functions require @option{-mpopcntd}:
@smallexample
unsigned int __builtin_addg6s (unsigned int, unsigned int);
long long __builtin_bpermd (long long, long long);
unsigned int __builtin_cbcdtd (unsigned int);
unsigned int __builtin_cdtbcd (unsigned int);
long long __builtin_divde (long long, long long);
unsigned long long __builtin_divdeu (unsigned long long, unsigned long long);
int __builtin_divwe (int, int);
unsigned int __builtin_divweu (unsigned int, unsigned int);
vector __int128 __builtin_pack_vector_int128 (long long, long long);
void __builtin_rs6000_speculation_barrier (void);
long long __builtin_unpack_vector_int128 (vector __int128, signed char);
@end smallexample

Of these, the @code{__builtin_divde} and @code{__builtin_divdeu} functions
require a 64-bit environment.

The following basic built-in functions, which are also supported on
x86 targets, require @option{-mfloat128}.
@smallexample
__float128 __builtin_fabsq (__float128);
__float128 __builtin_copysignq (__float128, __float128);
__float128 __builtin_infq (void);
__float128 __builtin_huge_valq (void);
__float128 __builtin_nanq (void);
__float128 __builtin_nansq (void);

__float128 __builtin_sqrtf128 (__float128);
__float128 __builtin_fmaf128 (__float128, __float128, __float128);
@end smallexample

@node Basic PowerPC Built-in Functions Available on ISA 2.07
@subsubsection Basic PowerPC Built-in Functions Available on ISA 2.07

The basic built-in functions described in this section are
available on the PowerPC family of processors starting with ISA 2.07
or later.  Unless specific options are explicitly disabled on the
command line, specifying option @option{-mcpu=power8} has the effect of
enabling all the same options as for @option{-mcpu=power7} in
addition to the @option{-mpower8-fusion}, @option{-mcrypto},
@option{-mhtm}, @option{-mquad-memory}, and
@option{-mquad-memory-atomic} options.

This section intentionally empty.

@node Basic PowerPC Built-in Functions Available on ISA 3.0
@subsubsection Basic PowerPC Built-in Functions Available on ISA 3.0

The basic built-in functions described in this section are
available on the PowerPC family of processors starting with ISA 3.0
or later.  Unless specific options are explicitly disabled on the
command line, specifying option @option{-mcpu=power9} has the effect of
enabling all the same options as for @option{-mcpu=power8} in
addition to the @option{-misel} option.

The following built-in functions are available on Linux 64-bit systems
that use the ISA 3.0 instruction set (@option{-mcpu=power9}):

@defbuiltin{__float128 __builtin_addf128_round_to_odd (__float128, __float128)}
Perform a 128-bit IEEE floating point add using round to odd as the
rounding mode.
@enddefbuiltin

@defbuiltin{__float128 __builtin_subf128_round_to_odd (__float128, __float128)}
Perform a 128-bit IEEE floating point subtract using round to odd as
the rounding mode.
@enddefbuiltin

@defbuiltin{__float128 __builtin_mulf128_round_to_odd (__float128, __float128)}
Perform a 128-bit IEEE floating point multiply using round to odd as
the rounding mode.
@enddefbuiltin

@defbuiltin{__float128 __builtin_divf128_round_to_odd (__float128, __float128)}
Perform a 128-bit IEEE floating point divide using round to odd as
the rounding mode.
@enddefbuiltin

@defbuiltin{__float128 __builtin_sqrtf128_round_to_odd (__float128)}
Perform a 128-bit IEEE floating point square root using round to odd
as the rounding mode.
@enddefbuiltin

@defbuiltin{__float128 __builtin_fmaf128_round_to_odd (__float128, __float128, __float128)}
Perform a 128-bit IEEE floating point fused multiply and add operation
using round to odd as the rounding mode.
@enddefbuiltin

@defbuiltin{double __builtin_truncf128_round_to_odd (__float128)}
Convert a 128-bit IEEE floating point value to @code{double} using
round to odd as the rounding mode.
@enddefbuiltin


The following additional built-in functions are also available for the
PowerPC family of processors, starting with ISA 3.0 or later:

@defbuiltin{{long long} __builtin_darn (void)}
@defbuiltinx{{long long} __builtin_darn_raw (void)}
@defbuiltinx{int __builtin_darn_32 (void)}
The @code{__builtin_darn} and @code{__builtin_darn_raw}
functions require a
64-bit environment supporting ISA 3.0 or later.
The @code{__builtin_darn} function provides a 64-bit conditioned
random number.  The @code{__builtin_darn_raw} function provides a
64-bit raw random number.  The @code{__builtin_darn_32} function
provides a 32-bit conditioned random number.
@enddefbuiltin

The following additional built-in functions are also available for the
PowerPC family of processors, starting with ISA 3.0 or later:

@smallexample
int __builtin_byte_in_set (unsigned char u, unsigned long long set);
int __builtin_byte_in_range (unsigned char u, unsigned int range);
int __builtin_byte_in_either_range (unsigned char u, unsigned int ranges);

int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal64 value);
int __builtin_dfp_dtstsfi_lt (unsigned int comparison, _Decimal128 value);
int __builtin_dfp_dtstsfi_lt_dd (unsigned int comparison, _Decimal64 value);
int __builtin_dfp_dtstsfi_lt_td (unsigned int comparison, _Decimal128 value);

int __builtin_dfp_dtstsfi_gt (unsigned int comparison, _Decimal64 value);
int __builtin_dfp_dtstsfi_gt (unsigned int comparison, _Decimal128 value);
int __builtin_dfp_dtstsfi_gt_dd (unsigned int comparison, _Decimal64 value);
int __builtin_dfp_dtstsfi_gt_td (unsigned int comparison, _Decimal128 value);

int __builtin_dfp_dtstsfi_eq (unsigned int comparison, _Decimal64 value);
int __builtin_dfp_dtstsfi_eq (unsigned int comparison, _Decimal128 value);
int __builtin_dfp_dtstsfi_eq_dd (unsigned int comparison, _Decimal64 value);
int __builtin_dfp_dtstsfi_eq_td (unsigned int comparison, _Decimal128 value);

int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal64 value);
int __builtin_dfp_dtstsfi_ov (unsigned int comparison, _Decimal128 value);
int __builtin_dfp_dtstsfi_ov_dd (unsigned int comparison, _Decimal64 value);
int __builtin_dfp_dtstsfi_ov_td (unsigned int comparison, _Decimal128 value);

double __builtin_mffsl(void);

@end smallexample
The @code{__builtin_byte_in_set} function requires a
64-bit environment supporting ISA 3.0 or later.  This function returns
a non-zero value if and only if its @code{u} argument exactly equals one of
the eight bytes contained within its 64-bit @code{set} argument.

The @code{__builtin_byte_in_range} and
@code{__builtin_byte_in_either_range} require an environment
supporting ISA 3.0 or later.  For these two functions, the
@code{range} argument is encoded as 4 bytes, organized as
@code{hi_1:lo_1:hi_2:lo_2}.
The @code{__builtin_byte_in_range} function returns a
non-zero value if and only if its @code{u} argument is within the
range bounded between @code{lo_2} and @code{hi_2} inclusive.
The @code{__builtin_byte_in_either_range} function returns non-zero if
and only if its @code{u} argument is within either the range bounded
between @code{lo_1} and @code{hi_1} inclusive or the range bounded
between @code{lo_2} and @code{hi_2} inclusive.

The @code{__builtin_dfp_dtstsfi_lt} function returns a non-zero value
if and only if the number of signficant digits of its @code{value} argument
is less than its @code{comparison} argument.  The
@code{__builtin_dfp_dtstsfi_lt_dd} and
@code{__builtin_dfp_dtstsfi_lt_td} functions behave similarly, but
require that the type of the @code{value} argument be
@code{__Decimal64} and @code{__Decimal128} respectively.

The @code{__builtin_dfp_dtstsfi_gt} function returns a non-zero value
if and only if the number of signficant digits of its @code{value} argument
is greater than its @code{comparison} argument.  The
@code{__builtin_dfp_dtstsfi_gt_dd} and
@code{__builtin_dfp_dtstsfi_gt_td} functions behave similarly, but
require that the type of the @code{value} argument be
@code{__Decimal64} and @code{__Decimal128} respectively.

The @code{__builtin_dfp_dtstsfi_eq} function returns a non-zero value
if and only if the number of signficant digits of its @code{value} argument
equals its @code{comparison} argument.  The
@code{__builtin_dfp_dtstsfi_eq_dd} and
@code{__builtin_dfp_dtstsfi_eq_td} functions behave similarly, but
require that the type of the @code{value} argument be
@code{__Decimal64} and @code{__Decimal128} respectively.

The @code{__builtin_dfp_dtstsfi_ov} function returns a non-zero value
if and only if its @code{value} argument has an undefined number of
significant digits, such as when @code{value} is an encoding of @code{NaN}.
The @code{__builtin_dfp_dtstsfi_ov_dd} and
@code{__builtin_dfp_dtstsfi_ov_td} functions behave similarly, but
require that the type of the @code{value} argument be
@code{__Decimal64} and @code{__Decimal128} respectively.

The @code{__builtin_mffsl} uses the ISA 3.0 @code{mffsl} instruction to read
the FPSCR.  The instruction is a lower latency version of the @code{mffs}
instruction.  If the @code{mffsl} instruction is not available, then the
builtin uses the older @code{mffs} instruction to read the FPSCR.

@node Basic PowerPC Built-in Functions Available on ISA 3.1
@subsubsection Basic PowerPC Built-in Functions Available on ISA 3.1

The basic built-in functions described in this section are
available on the PowerPC family of processors starting with ISA 3.1.
Unless specific options are explicitly disabled on the
command line, specifying option @option{-mcpu=power10} has the effect of
enabling all the same options as for @option{-mcpu=power9}.

The following built-in functions are available on Linux 64-bit systems
that use a future architecture instruction set (@option{-mcpu=power10}):

@defbuiltin{{unsigned long long} @
            __builtin_cfuged (unsigned long long, unsigned long long)}
Perform a 64-bit centrifuge operation, as if implemented by the
@code{cfuged} instruction.
@enddefbuiltin

@defbuiltin{{unsigned long long} @
            __builtin_cntlzdm (unsigned long long, unsigned long long)}
Perform a 64-bit count leading zeros operation under mask, as if
implemented by the @code{cntlzdm} instruction.
@enddefbuiltin

@defbuiltin{{unsigned long long} @
            __builtin_cnttzdm (unsigned long long, unsigned long long)}
Perform a 64-bit count trailing zeros operation under mask, as if
implemented by the @code{cnttzdm} instruction.
@enddefbuiltin

@defbuiltin{{unsigned long long} @
            __builtin_pdepd (unsigned long long, unsigned long long)}
Perform a 64-bit parallel bits deposit operation, as if implemented by the
@code{pdepd} instruction.
@enddefbuiltin

@defbuiltin{{unsigned long long} @
            __builtin_pextd (unsigned long long, unsigned long long)}
Perform a 64-bit parallel bits extract operation, as if implemented by the
@code{pextd} instruction.
@enddefbuiltin

@defbuiltin{{vector signed __int128} vsx_xl_sext (signed long long, signed char *)}
@defbuiltinx{{vector signed __int128} vsx_xl_sext (signed long long, signed short *)}
@defbuiltinx{{vector signed __int128} vsx_xl_sext (signed long long, signed int *)}
@defbuiltinx{{vector signed __int128} vsx_xl_sext (signed long long, signed long long *)}
@defbuiltinx{{vector unsigned __int128} vsx_xl_zext (signed long long, unsigned char *)}
@defbuiltinx{{vector unsigned __int128} vsx_xl_zext (signed long long, unsigned short *)}
@defbuiltinx{{vector unsigned __int128} vsx_xl_zext (signed long long, unsigned int *)}
@defbuiltinx{{vector unsigned __int128} vsx_xl_zext (signed long long, unsigned long long *)}

Load (and sign extend) to an __int128 vector, as if implemented by the ISA 3.1
@code{lxvrbx}, @code{lxvrhx}, @code{lxvrwx}, and  @code{lxvrdx}
instructions.
@enddefbuiltin

@defbuiltin{{void} vec_xst_trunc (vector signed __int128, signed long long, signed char *)}
@defbuiltinx{{void} vec_xst_trunc (vector signed __int128, signed long long, signed short *)}
@defbuiltinx{{void} vec_xst_trunc (vector signed __int128, signed long long, signed int *)}
@defbuiltinx{{void} vec_xst_trunc (vector signed __int128, signed long long, signed long long *)}
@defbuiltinx{{void} vec_xst_trunc (vector unsigned __int128, signed long long, unsigned char *)}
@defbuiltinx{{void} vec_xst_trunc (vector unsigned __int128, signed long long, unsigned short *)}
@defbuiltinx{{void} vec_xst_trunc (vector unsigned __int128, signed long long, unsigned int *)}
@defbuiltinx{{void} vec_xst_trunc (vector unsigned __int128, signed long long, unsigned long long *)}

Truncate and store the rightmost element of a vector, as if implemented by the
ISA 3.1 @code{stxvrbx}, @code{stxvrhx}, @code{stxvrwx}, and @code{stxvrdx}
instructions.
@enddefbuiltin

@node PowerPC AltiVec/VSX Built-in Functions
@subsection PowerPC AltiVec/VSX Built-in Functions

GCC provides an interface for the PowerPC family of processors to access
the AltiVec operations described in Motorola's AltiVec Programming
Interface Manual.  The interface is made available by including
@code{<altivec.h>} and using @option{-maltivec} and
@option{-mabi=altivec}.  The interface supports the following vector
types.

@smallexample
vector unsigned char
vector signed char
vector bool char

vector unsigned short
vector signed short
vector bool short
vector pixel

vector unsigned int
vector signed int
vector bool int
vector float
@end smallexample

GCC's implementation of the high-level language interface available from
C and C++ code differs from Motorola's documentation in several ways.

@itemize @bullet

@item
A vector constant is a list of constant expressions within curly braces.

@item
A vector initializer requires no cast if the vector constant is of the
same type as the variable it is initializing.

@item
If @code{signed} or @code{unsigned} is omitted, the signedness of the
vector type is the default signedness of the base type.  The default
varies depending on the operating system, so a portable program should
always specify the signedness.

@item
Compiling with @option{-maltivec} adds keywords @code{__vector},
@code{vector}, @code{__pixel}, @code{pixel}, @code{__bool} and
@code{bool}.  When compiling ISO C, the context-sensitive substitution
of the keywords @code{vector}, @code{pixel} and @code{bool} is
disabled.  To use them, you must include @code{<altivec.h>} instead.

@item
GCC allows using a @code{typedef} name as the type specifier for a
vector type, but only under the following circumstances:

@itemize @bullet

@item
When using @code{__vector} instead of @code{vector}; for example,

@smallexample
typedef signed short int16;
__vector int16 data;
@end smallexample

@item
When using @code{vector} in keyword-and-predefine mode; for example,

@smallexample
typedef signed short int16;
vector int16 data;
@end smallexample

Note that keyword-and-predefine mode is enabled by disabling GNU
extensions (e.g., by using @code{-std=c11}) and including
@code{<altivec.h>}.
@end itemize

@item
For C, overloaded functions are implemented with macros so the following
does not work:

@smallexample
  vec_add ((vector signed int)@{1, 2, 3, 4@}, foo);
@end smallexample

@noindent
Since @code{vec_add} is a macro, the vector constant in the example
is treated as four separate arguments.  Wrap the entire argument in
parentheses for this to work.
@end itemize

@emph{Note:} Only the @code{<altivec.h>} interface is supported.
Internally, GCC uses built-in functions to achieve the functionality in
the aforementioned header file, but they are not supported and are
subject to change without notice.

GCC complies with the Power Vector Intrinsic Programming Reference (PVIPR),
which may be found at
@uref{https://openpowerfoundation.org/?resource_lib=power-vector-intrinsic-programming-reference}.
Chapter 4 of this document fully documents the vector API interfaces
that must be
provided by compliant compilers.  Programmers should preferentially use
the interfaces described therein.  However, historically GCC has provided
additional interfaces for access to vector instructions.  These are
briefly described below.  Where the PVIPR provides a portable interface,
other functions in GCC that provide the same capabilities should be
considered deprecated.

The PVIPR documents the following overloaded functions:

@multitable @columnfractions 0.33 0.33 0.33

@item @code{vec_abs}
@tab @code{vec_absd}
@tab @code{vec_abss}
@item @code{vec_add}
@tab @code{vec_addc}
@tab @code{vec_adde}
@item @code{vec_addec}
@tab @code{vec_adds}
@tab @code{vec_all_eq}
@item @code{vec_all_ge}
@tab @code{vec_all_gt}
@tab @code{vec_all_in}
@item @code{vec_all_le}
@tab @code{vec_all_lt}
@tab @code{vec_all_nan}
@item @code{vec_all_ne}
@tab @code{vec_all_nge}
@tab @code{vec_all_ngt}
@item @code{vec_all_nle}
@tab @code{vec_all_nlt}
@tab @code{vec_all_numeric}
@item @code{vec_and}
@tab @code{vec_andc}
@tab @code{vec_any_eq}
@item @code{vec_any_ge}
@tab @code{vec_any_gt}
@tab @code{vec_any_le}
@item @code{vec_any_lt}
@tab @code{vec_any_nan}
@tab @code{vec_any_ne}
@item @code{vec_any_nge}
@tab @code{vec_any_ngt}
@tab @code{vec_any_nle}
@item @code{vec_any_nlt}
@tab @code{vec_any_numeric}
@tab @code{vec_any_out}
@item @code{vec_avg}
@tab @code{vec_bperm}
@tab @code{vec_ceil}
@item @code{vec_cipher_be}
@tab @code{vec_cipherlast_be}
@tab @code{vec_cmpb}
@item @code{vec_cmpeq}
@tab @code{vec_cmpge}
@tab @code{vec_cmpgt}
@item @code{vec_cmple}
@tab @code{vec_cmplt}
@tab @code{vec_cmpne}
@item @code{vec_cmpnez}
@tab @code{vec_cntlz}
@tab @code{vec_cntlz_lsbb}
@item @code{vec_cnttz}
@tab @code{vec_cnttz_lsbb}
@tab @code{vec_cpsgn}
@item @code{vec_ctf}
@tab @code{vec_cts}
@tab @code{vec_ctu}
@item @code{vec_div}
@tab @code{vec_double}
@tab @code{vec_doublee}
@item @code{vec_doubleh}
@tab @code{vec_doublel}
@tab @code{vec_doubleo}
@item @code{vec_eqv}
@tab @code{vec_expte}
@tab @code{vec_extract}
@item @code{vec_extract_exp}
@tab @code{vec_extract_fp32_from_shorth}
@tab @code{vec_extract_fp32_from_shortl}
@item @code{vec_extract_sig}
@tab @code{vec_extract_4b}
@tab @code{vec_first_match_index}
@item @code{vec_first_match_or_eos_index}
@tab @code{vec_first_mismatch_index}
@tab @code{vec_first_mismatch_or_eos_index}
@item @code{vec_float}
@tab @code{vec_float2}
@tab @code{vec_floate}
@item @code{vec_floato}
@tab @code{vec_floor}
@tab @code{vec_gb}
@item @code{vec_insert}
@tab @code{vec_insert_exp}
@tab @code{vec_insert4b}
@item @code{vec_ld}
@tab @code{vec_lde}
@tab @code{vec_ldl}
@item @code{vec_loge}
@tab @code{vec_madd}
@tab @code{vec_madds}
@item @code{vec_max}
@tab @code{vec_mergee}
@tab @code{vec_mergeh}
@item @code{vec_mergel}
@tab @code{vec_mergeo}
@tab @code{vec_mfvscr}
@item @code{vec_min}
@tab @code{vec_mradds}
@tab @code{vec_msub}
@item @code{vec_msum}
@tab @code{vec_msums}
@tab @code{vec_mtvscr}
@item @code{vec_mul}
@tab @code{vec_mule}
@tab @code{vec_mulo}
@item @code{vec_nabs}
@tab @code{vec_nand}
@tab @code{vec_ncipher_be}
@item @code{vec_ncipherlast_be}
@tab @code{vec_nearbyint}
@tab @code{vec_neg}
@item @code{vec_nmadd}
@tab @code{vec_nmsub}
@tab @code{vec_nor}
@item @code{vec_or}
@tab @code{vec_orc}
@tab @code{vec_pack}
@item @code{vec_pack_to_short_fp32}
@tab @code{vec_packpx}
@tab @code{vec_packs}
@item @code{vec_packsu}
@tab @code{vec_parity_lsbb}
@tab @code{vec_perm}
@item @code{vec_permxor}
@tab @code{vec_pmsum_be}
@tab @code{vec_popcnt}
@item @code{vec_re}
@tab @code{vec_recipdiv}
@tab @code{vec_revb}
@item @code{vec_reve}
@tab @code{vec_rint}
@tab @code{vec_rl}
@item @code{vec_rlmi}
@tab @code{vec_rlnm}
@tab @code{vec_round}
@item @code{vec_rsqrt}
@tab @code{vec_rsqrte}
@tab @code{vec_sbox_be}
@item @code{vec_sel}
@tab @code{vec_shasigma_be}
@tab @code{vec_signed}
@item @code{vec_signed2}
@tab @code{vec_signede}
@tab @code{vec_signedo}
@item @code{vec_sl}
@tab @code{vec_sld}
@tab @code{vec_sldw}
@item @code{vec_sll}
@tab @code{vec_slo}
@tab @code{vec_slv}
@item @code{vec_splat}
@tab @code{vec_splat_s8}
@tab @code{vec_splat_s16}
@item @code{vec_splat_s32}
@tab @code{vec_splat_u8}
@tab @code{vec_splat_u16}
@item @code{vec_splat_u32}
@tab @code{vec_splats}
@tab @code{vec_sqrt}
@item @code{vec_sr}
@tab @code{vec_sra}
@tab @code{vec_srl}
@item @code{vec_sro}
@tab @code{vec_srv}
@tab @code{vec_st}
@item @code{vec_ste}
@tab @code{vec_stl}
@tab @code{vec_sub}
@item @code{vec_subc}
@tab @code{vec_sube}
@tab @code{vec_subec}
@item @code{vec_subs}
@tab @code{vec_sum2s}
@tab @code{vec_sum4s}
@item @code{vec_sums}
@tab @code{vec_test_data_class}
@tab @code{vec_trunc}
@item @code{vec_unpackh}
@tab @code{vec_unpackl}
@tab @code{vec_unsigned}
@item @code{vec_unsigned2}
@tab @code{vec_unsignede}
@tab @code{vec_unsignedo}
@item @code{vec_xl}
@tab @code{vec_xl_be}
@tab @code{vec_xl_len}
@item @code{vec_xl_len_r}
@tab @code{vec_xor}
@tab @code{vec_xst}
@item @code{vec_xst_be}
@tab @code{vec_xst_len}
@tab @code{vec_xst_len_r}

@end multitable

@menu
* PowerPC AltiVec Built-in Functions on ISA 2.05::
* PowerPC AltiVec Built-in Functions Available on ISA 2.06::
* PowerPC AltiVec Built-in Functions Available on ISA 2.07::
* PowerPC AltiVec Built-in Functions Available on ISA 3.0::
* PowerPC AltiVec Built-in Functions Available on ISA 3.1::
@end menu

@node PowerPC AltiVec Built-in Functions on ISA 2.05
@subsubsection PowerPC AltiVec Built-in Functions on ISA 2.05

The following interfaces are supported for the generic and specific
AltiVec operations and the AltiVec predicates.  In cases where there
is a direct mapping between generic and specific operations, only the
generic names are shown here, although the specific operations can also
be used.

Arguments that are documented as @code{const int} require literal
integral values within the range required for that operation.

Only functions excluded from the PVIPR are listed here.

@smallexample
void vec_dss (const int);

void vec_dssall (void);

void vec_dst (const vector unsigned char *, int, const int);
void vec_dst (const vector signed char *, int, const int);
void vec_dst (const vector bool char *, int, const int);
void vec_dst (const vector unsigned short *, int, const int);
void vec_dst (const vector signed short *, int, const int);
void vec_dst (const vector bool short *, int, const int);
void vec_dst (const vector pixel *, int, const int);
void vec_dst (const vector unsigned int *, int, const int);
void vec_dst (const vector signed int *, int, const int);
void vec_dst (const vector bool int *, int, const int);
void vec_dst (const vector float *, int, const int);
void vec_dst (const unsigned char *, int, const int);
void vec_dst (const signed char *, int, const int);
void vec_dst (const unsigned short *, int, const int);
void vec_dst (const short *, int, const int);
void vec_dst (const unsigned int *, int, const int);
void vec_dst (const int *, int, const int);
void vec_dst (const float *, int, const int);

void vec_dstst (const vector unsigned char *, int, const int);
void vec_dstst (const vector signed char *, int, const int);
void vec_dstst (const vector bool char *, int, const int);
void vec_dstst (const vector unsigned short *, int, const int);
void vec_dstst (const vector signed short *, int, const int);
void vec_dstst (const vector bool short *, int, const int);
void vec_dstst (const vector pixel *, int, const int);
void vec_dstst (const vector unsigned int *, int, const int);
void vec_dstst (const vector signed int *, int, const int);
void vec_dstst (const vector bool int *, int, const int);
void vec_dstst (const vector float *, int, const int);
void vec_dstst (const unsigned char *, int, const int);
void vec_dstst (const signed char *, int, const int);
void vec_dstst (const unsigned short *, int, const int);
void vec_dstst (const short *, int, const int);
void vec_dstst (const unsigned int *, int, const int);
void vec_dstst (const int *, int, const int);
void vec_dstst (const unsigned long *, int, const int);
void vec_dstst (const long *, int, const int);
void vec_dstst (const float *, int, const int);

void vec_dststt (const vector unsigned char *, int, const int);
void vec_dststt (const vector signed char *, int, const int);
void vec_dststt (const vector bool char *, int, const int);
void vec_dststt (const vector unsigned short *, int, const int);
void vec_dststt (const vector signed short *, int, const int);
void vec_dststt (const vector bool short *, int, const int);
void vec_dststt (const vector pixel *, int, const int);
void vec_dststt (const vector unsigned int *, int, const int);
void vec_dststt (const vector signed int *, int, const int);
void vec_dststt (const vector bool int *, int, const int);
void vec_dststt (const vector float *, int, const int);
void vec_dststt (const unsigned char *, int, const int);
void vec_dststt (const signed char *, int, const int);
void vec_dststt (const unsigned short *, int, const int);
void vec_dststt (const short *, int, const int);
void vec_dststt (const unsigned int *, int, const int);
void vec_dststt (const int *, int, const int);
void vec_dststt (const float *, int, const int);

void vec_dstt (const vector unsigned char *, int, const int);
void vec_dstt (const vector signed char *, int, const int);
void vec_dstt (const vector bool char *, int, const int);
void vec_dstt (const vector unsigned short *, int, const int);
void vec_dstt (const vector signed short *, int, const int);
void vec_dstt (const vector bool short *, int, const int);
void vec_dstt (const vector pixel *, int, const int);
void vec_dstt (const vector unsigned int *, int, const int);
void vec_dstt (const vector signed int *, int, const int);
void vec_dstt (const vector bool int *, int, const int);
void vec_dstt (const vector float *, int, const int);
void vec_dstt (const unsigned char *, int, const int);
void vec_dstt (const signed char *, int, const int);
void vec_dstt (const unsigned short *, int, const int);
void vec_dstt (const short *, int, const int);
void vec_dstt (const unsigned int *, int, const int);
void vec_dstt (const int *, int, const int);
void vec_dstt (const float *, int, const int);

vector signed char vec_lvebx (int, char *);
vector unsigned char vec_lvebx (int, unsigned char *);

vector signed short vec_lvehx (int, short *);
vector unsigned short vec_lvehx (int, unsigned short *);

vector float vec_lvewx (int, float *);
vector signed int vec_lvewx (int, int *);
vector unsigned int vec_lvewx (int, unsigned int *);

vector unsigned char vec_lvsl (int, const unsigned char *);
vector unsigned char vec_lvsl (int, const signed char *);
vector unsigned char vec_lvsl (int, const unsigned short *);
vector unsigned char vec_lvsl (int, const short *);
vector unsigned char vec_lvsl (int, const unsigned int *);
vector unsigned char vec_lvsl (int, const int *);
vector unsigned char vec_lvsl (int, const float *);

vector unsigned char vec_lvsr (int, const unsigned char *);
vector unsigned char vec_lvsr (int, const signed char *);
vector unsigned char vec_lvsr (int, const unsigned short *);
vector unsigned char vec_lvsr (int, const short *);
vector unsigned char vec_lvsr (int, const unsigned int *);
vector unsigned char vec_lvsr (int, const int *);
vector unsigned char vec_lvsr (int, const float *);

void vec_stvebx (vector signed char, int, signed char *);
void vec_stvebx (vector unsigned char, int, unsigned char *);
void vec_stvebx (vector bool char, int, signed char *);
void vec_stvebx (vector bool char, int, unsigned char *);

void vec_stvehx (vector signed short, int, short *);
void vec_stvehx (vector unsigned short, int, unsigned short *);
void vec_stvehx (vector bool short, int, short *);
void vec_stvehx (vector bool short, int, unsigned short *);

void vec_stvewx (vector float, int, float *);
void vec_stvewx (vector signed int, int, int *);
void vec_stvewx (vector unsigned int, int, unsigned int *);
void vec_stvewx (vector bool int, int, int *);
void vec_stvewx (vector bool int, int, unsigned int *);

vector float vec_vaddfp (vector float, vector float);

vector signed char vec_vaddsbs (vector bool char, vector signed char);
vector signed char vec_vaddsbs (vector signed char, vector bool char);
vector signed char vec_vaddsbs (vector signed char, vector signed char);

vector signed short vec_vaddshs (vector bool short, vector signed short);
vector signed short vec_vaddshs (vector signed short, vector bool short);
vector signed short vec_vaddshs (vector signed short, vector signed short);

vector signed int vec_vaddsws (vector bool int, vector signed int);
vector signed int vec_vaddsws (vector signed int, vector bool int);
vector signed int vec_vaddsws (vector signed int, vector signed int);

vector signed char vec_vaddubm (vector bool char, vector signed char);
vector signed char vec_vaddubm (vector signed char, vector bool char);
vector signed char vec_vaddubm (vector signed char, vector signed char);
vector unsigned char vec_vaddubm (vector bool char, vector unsigned char);
vector unsigned char vec_vaddubm (vector unsigned char, vector bool char);
vector unsigned char vec_vaddubm (vector unsigned char, vector unsigned char);

vector unsigned char vec_vaddubs (vector bool char, vector unsigned char);
vector unsigned char vec_vaddubs (vector unsigned char, vector bool char);
vector unsigned char vec_vaddubs (vector unsigned char, vector unsigned char);

vector signed short vec_vadduhm (vector bool short, vector signed short);
vector signed short vec_vadduhm (vector signed short, vector bool short);
vector signed short vec_vadduhm (vector signed short, vector signed short);
vector unsigned short vec_vadduhm (vector bool short, vector unsigned short);
vector unsigned short vec_vadduhm (vector unsigned short, vector bool short);
vector unsigned short vec_vadduhm (vector unsigned short, vector unsigned short);

vector unsigned short vec_vadduhs (vector bool short, vector unsigned short);
vector unsigned short vec_vadduhs (vector unsigned short, vector bool short);
vector unsigned short vec_vadduhs (vector unsigned short, vector unsigned short);

vector signed int vec_vadduwm (vector bool int, vector signed int);
vector signed int vec_vadduwm (vector signed int, vector bool int);
vector signed int vec_vadduwm (vector signed int, vector signed int);
vector unsigned int vec_vadduwm (vector bool int, vector unsigned int);
vector unsigned int vec_vadduwm (vector unsigned int, vector bool int);
vector unsigned int vec_vadduwm (vector unsigned int, vector unsigned int);

vector unsigned int vec_vadduws (vector bool int, vector unsigned int);
vector unsigned int vec_vadduws (vector unsigned int, vector bool int);
vector unsigned int vec_vadduws (vector unsigned int, vector unsigned int);

vector signed char vec_vavgsb (vector signed char, vector signed char);

vector signed short vec_vavgsh (vector signed short, vector signed short);

vector signed int vec_vavgsw (vector signed int, vector signed int);

vector unsigned char vec_vavgub (vector unsigned char, vector unsigned char);

vector unsigned short vec_vavguh (vector unsigned short, vector unsigned short);

vector unsigned int vec_vavguw (vector unsigned int, vector unsigned int);

vector float vec_vcfsx (vector signed int, const int);

vector float vec_vcfux (vector unsigned int, const int);

vector bool int vec_vcmpeqfp (vector float, vector float);

vector bool char vec_vcmpequb (vector signed char, vector signed char);
vector bool char vec_vcmpequb (vector unsigned char, vector unsigned char);

vector bool short vec_vcmpequh (vector signed short, vector signed short);
vector bool short vec_vcmpequh (vector unsigned short, vector unsigned short);

vector bool int vec_vcmpequw (vector signed int, vector signed int);
vector bool int vec_vcmpequw (vector unsigned int, vector unsigned int);

vector bool int vec_vcmpgtfp (vector float, vector float);

vector bool char vec_vcmpgtsb (vector signed char, vector signed char);

vector bool short vec_vcmpgtsh (vector signed short, vector signed short);

vector bool int vec_vcmpgtsw (vector signed int, vector signed int);

vector bool char vec_vcmpgtub (vector unsigned char, vector unsigned char);

vector bool short vec_vcmpgtuh (vector unsigned short, vector unsigned short);

vector bool int vec_vcmpgtuw (vector unsigned int, vector unsigned int);

vector float vec_vmaxfp (vector float, vector float);

vector signed char vec_vmaxsb (vector bool char, vector signed char);
vector signed char vec_vmaxsb (vector signed char, vector bool char);
vector signed char vec_vmaxsb (vector signed char, vector signed char);

vector signed short vec_vmaxsh (vector bool short, vector signed short);
vector signed short vec_vmaxsh (vector signed short, vector bool short);
vector signed short vec_vmaxsh (vector signed short, vector signed short);

vector signed int vec_vmaxsw (vector bool int, vector signed int);
vector signed int vec_vmaxsw (vector signed int, vector bool int);
vector signed int vec_vmaxsw (vector signed int, vector signed int);

vector unsigned char vec_vmaxub (vector bool char, vector unsigned char);
vector unsigned char vec_vmaxub (vector unsigned char, vector bool char);
vector unsigned char vec_vmaxub (vector unsigned char, vector unsigned char);

vector unsigned short vec_vmaxuh (vector bool short, vector unsigned short);
vector unsigned short vec_vmaxuh (vector unsigned short, vector bool short);
vector unsigned short vec_vmaxuh (vector unsigned short, vector unsigned short);

vector unsigned int vec_vmaxuw (vector bool int, vector unsigned int);
vector unsigned int vec_vmaxuw (vector unsigned int, vector bool int);
vector unsigned int vec_vmaxuw (vector unsigned int, vector unsigned int);

vector float vec_vminfp (vector float, vector float);

vector signed char vec_vminsb (vector bool char, vector signed char);
vector signed char vec_vminsb (vector signed char, vector bool char);
vector signed char vec_vminsb (vector signed char, vector signed char);

vector signed short vec_vminsh (vector bool short, vector signed short);
vector signed short vec_vminsh (vector signed short, vector bool short);
vector signed short vec_vminsh (vector signed short, vector signed short);

vector signed int vec_vminsw (vector bool int, vector signed int);
vector signed int vec_vminsw (vector signed int, vector bool int);
vector signed int vec_vminsw (vector signed int, vector signed int);

vector unsigned char vec_vminub (vector bool char, vector unsigned char);
vector unsigned char vec_vminub (vector unsigned char, vector bool char);
vector unsigned char vec_vminub (vector unsigned char, vector unsigned char);

vector unsigned short vec_vminuh (vector bool short, vector unsigned short);
vector unsigned short vec_vminuh (vector unsigned short, vector bool short);
vector unsigned short vec_vminuh (vector unsigned short, vector unsigned short);

vector unsigned int vec_vminuw (vector bool int, vector unsigned int);
vector unsigned int vec_vminuw (vector unsigned int, vector bool int);
vector unsigned int vec_vminuw (vector unsigned int, vector unsigned int);

vector bool char vec_vmrghb (vector bool char, vector bool char);
vector signed char vec_vmrghb (vector signed char, vector signed char);
vector unsigned char vec_vmrghb (vector unsigned char, vector unsigned char);

vector bool short vec_vmrghh (vector bool short, vector bool short);
vector signed short vec_vmrghh (vector signed short, vector signed short);
vector unsigned short vec_vmrghh (vector unsigned short, vector unsigned short);
vector pixel vec_vmrghh (vector pixel, vector pixel);

vector float vec_vmrghw (vector float, vector float);
vector bool int vec_vmrghw (vector bool int, vector bool int);
vector signed int vec_vmrghw (vector signed int, vector signed int);
vector unsigned int vec_vmrghw (vector unsigned int, vector unsigned int);

vector bool char vec_vmrglb (vector bool char, vector bool char);
vector signed char vec_vmrglb (vector signed char, vector signed char);
vector unsigned char vec_vmrglb (vector unsigned char, vector unsigned char);

vector bool short vec_vmrglh (vector bool short, vector bool short);
vector signed short vec_vmrglh (vector signed short, vector signed short);
vector unsigned short vec_vmrglh (vector unsigned short, vector unsigned short);
vector pixel vec_vmrglh (vector pixel, vector pixel);

vector float vec_vmrglw (vector float, vector float);
vector signed int vec_vmrglw (vector signed int, vector signed int);
vector unsigned int vec_vmrglw (vector unsigned int, vector unsigned int);
vector bool int vec_vmrglw (vector bool int, vector bool int);

vector signed int vec_vmsummbm (vector signed char, vector unsigned char,
                                vector signed int);

vector signed int vec_vmsumshm (vector signed short, vector signed short,
                                vector signed int);

vector signed int vec_vmsumshs (vector signed short, vector signed short,
                                vector signed int);

vector unsigned int vec_vmsumubm (vector unsigned char, vector unsigned char,
                                  vector unsigned int);

vector unsigned int vec_vmsumuhm (vector unsigned short, vector unsigned short,
                                  vector unsigned int);

vector unsigned int vec_vmsumuhs (vector unsigned short, vector unsigned short,
                                  vector unsigned int);

vector signed short vec_vmulesb (vector signed char, vector signed char);

vector signed int vec_vmulesh (vector signed short, vector signed short);

vector unsigned short vec_vmuleub (vector unsigned char, vector unsigned char);

vector unsigned int vec_vmuleuh (vector unsigned short, vector unsigned short);

vector signed short vec_vmulosb (vector signed char, vector signed char);

vector signed int vec_vmulosh (vector signed short, vector signed short);

vector unsigned short vec_vmuloub (vector unsigned char, vector unsigned char);

vector unsigned int vec_vmulouh (vector unsigned short, vector unsigned short);

vector signed char vec_vpkshss (vector signed short, vector signed short);

vector unsigned char vec_vpkshus (vector signed short, vector signed short);

vector signed short vec_vpkswss (vector signed int, vector signed int);

vector unsigned short vec_vpkswus (vector signed int, vector signed int);

vector bool char vec_vpkuhum (vector bool short, vector bool short);
vector signed char vec_vpkuhum (vector signed short, vector signed short);
vector unsigned char vec_vpkuhum (vector unsigned short, vector unsigned short);

vector unsigned char vec_vpkuhus (vector unsigned short, vector unsigned short);

vector bool short vec_vpkuwum (vector bool int, vector bool int);
vector signed short vec_vpkuwum (vector signed int, vector signed int);
vector unsigned short vec_vpkuwum (vector unsigned int, vector unsigned int);

vector unsigned short vec_vpkuwus (vector unsigned int, vector unsigned int);

vector signed char vec_vrlb (vector signed char, vector unsigned char);
vector unsigned char vec_vrlb (vector unsigned char, vector unsigned char);

vector signed short vec_vrlh (vector signed short, vector unsigned short);
vector unsigned short vec_vrlh (vector unsigned short, vector unsigned short);

vector signed int vec_vrlw (vector signed int, vector unsigned int);
vector unsigned int vec_vrlw (vector unsigned int, vector unsigned int);

vector signed char vec_vslb (vector signed char, vector unsigned char);
vector unsigned char vec_vslb (vector unsigned char, vector unsigned char);

vector signed short vec_vslh (vector signed short, vector unsigned short);
vector unsigned short vec_vslh (vector unsigned short, vector unsigned short);

vector signed int vec_vslw (vector signed int, vector unsigned int);
vector unsigned int vec_vslw (vector unsigned int, vector unsigned int);

vector signed char vec_vspltb (vector signed char, const int);
vector unsigned char vec_vspltb (vector unsigned char, const int);
vector bool char vec_vspltb (vector bool char, const int);

vector bool short vec_vsplth (vector bool short, const int);
vector signed short vec_vsplth (vector signed short, const int);
vector unsigned short vec_vsplth (vector unsigned short, const int);
vector pixel vec_vsplth (vector pixel, const int);

vector float vec_vspltw (vector float, const int);
vector signed int vec_vspltw (vector signed int, const int);
vector unsigned int vec_vspltw (vector unsigned int, const int);
vector bool int vec_vspltw (vector bool int, const int);

vector signed char vec_vsrab (vector signed char, vector unsigned char);
vector unsigned char vec_vsrab (vector unsigned char, vector unsigned char);

vector signed short vec_vsrah (vector signed short, vector unsigned short);
vector unsigned short vec_vsrah (vector unsigned short, vector unsigned short);

vector signed int vec_vsraw (vector signed int, vector unsigned int);
vector unsigned int vec_vsraw (vector unsigned int, vector unsigned int);

vector signed char vec_vsrb (vector signed char, vector unsigned char);
vector unsigned char vec_vsrb (vector unsigned char, vector unsigned char);

vector signed short vec_vsrh (vector signed short, vector unsigned short);
vector unsigned short vec_vsrh (vector unsigned short, vector unsigned short);

vector signed int vec_vsrw (vector signed int, vector unsigned int);
vector unsigned int vec_vsrw (vector unsigned int, vector unsigned int);

vector float vec_vsubfp (vector float, vector float);

vector signed char vec_vsubsbs (vector bool char, vector signed char);
vector signed char vec_vsubsbs (vector signed char, vector bool char);
vector signed char vec_vsubsbs (vector signed char, vector signed char);

vector signed short vec_vsubshs (vector bool short, vector signed short);
vector signed short vec_vsubshs (vector signed short, vector bool short);
vector signed short vec_vsubshs (vector signed short, vector signed short);

vector signed int vec_vsubsws (vector bool int, vector signed int);
vector signed int vec_vsubsws (vector signed int, vector bool int);
vector signed int vec_vsubsws (vector signed int, vector signed int);

vector signed char vec_vsububm (vector bool char, vector signed char);
vector signed char vec_vsububm (vector signed char, vector bool char);
vector signed char vec_vsububm (vector signed char, vector signed char);
vector unsigned char vec_vsububm (vector bool char, vector unsigned char);
vector unsigned char vec_vsububm (vector unsigned char, vector bool char);
vector unsigned char vec_vsububm (vector unsigned char, vector unsigned char);

vector unsigned char vec_vsububs (vector bool char, vector unsigned char);
vector unsigned char vec_vsububs (vector unsigned char, vector bool char);
vector unsigned char vec_vsububs (vector unsigned char, vector unsigned char);

vector signed short vec_vsubuhm (vector bool short, vector signed short);
vector signed short vec_vsubuhm (vector signed short, vector bool short);
vector signed short vec_vsubuhm (vector signed short, vector signed short);
vector unsigned short vec_vsubuhm (vector bool short, vector unsigned short);
vector unsigned short vec_vsubuhm (vector unsigned short, vector bool short);
vector unsigned short vec_vsubuhm (vector unsigned short, vector unsigned short);

vector unsigned short vec_vsubuhs (vector bool short, vector unsigned short);
vector unsigned short vec_vsubuhs (vector unsigned short, vector bool short);
vector unsigned short vec_vsubuhs (vector unsigned short, vector unsigned short);

vector signed int vec_vsubuwm (vector bool int, vector signed int);
vector signed int vec_vsubuwm (vector signed int, vector bool int);
vector signed int vec_vsubuwm (vector signed int, vector signed int);
vector unsigned int vec_vsubuwm (vector bool int, vector unsigned int);
vector unsigned int vec_vsubuwm (vector unsigned int, vector bool int);
vector unsigned int vec_vsubuwm (vector unsigned int, vector unsigned int);

vector unsigned int vec_vsubuws (vector bool int, vector unsigned int);
vector unsigned int vec_vsubuws (vector unsigned int, vector bool int);
vector unsigned int vec_vsubuws (vector unsigned int, vector unsigned int);

vector signed int vec_vsum4sbs (vector signed char, vector signed int);

vector signed int vec_vsum4shs (vector signed short, vector signed int);

vector unsigned int vec_vsum4ubs (vector unsigned char, vector unsigned int);

vector unsigned int vec_vupkhpx (vector pixel);

vector bool short vec_vupkhsb (vector bool char);
vector signed short vec_vupkhsb (vector signed char);

vector bool int vec_vupkhsh (vector bool short);
vector signed int vec_vupkhsh (vector signed short);

vector unsigned int vec_vupklpx (vector pixel);

vector bool short vec_vupklsb (vector bool char);
vector signed short vec_vupklsb (vector signed char);

vector bool int vec_vupklsh (vector bool short);
vector signed int vec_vupklsh (vector signed short);
@end smallexample

@node PowerPC AltiVec Built-in Functions Available on ISA 2.06
@subsubsection PowerPC AltiVec Built-in Functions Available on ISA 2.06

The AltiVec built-in functions described in this section are
available on the PowerPC family of processors starting with ISA 2.06
or later.  These are normally enabled by adding @option{-mvsx} to the
command line.

When @option{-mvsx} is used, the following additional vector types are
implemented.

@smallexample
vector unsigned __int128
vector signed __int128
vector unsigned long long int
vector signed long long int
vector double
@end smallexample

The long long types are only implemented for 64-bit code generation.

Only functions excluded from the PVIPR are listed here.

@smallexample
void vec_dst (const unsigned long *, int, const int);
void vec_dst (const long *, int, const int);

void vec_dststt (const unsigned long *, int, const int);
void vec_dststt (const long *, int, const int);

void vec_dstt (const unsigned long *, int, const int);
void vec_dstt (const long *, int, const int);

vector unsigned char vec_lvsl (int, const unsigned long *);
vector unsigned char vec_lvsl (int, const long *);

vector unsigned char vec_lvsr (int, const unsigned long *);
vector unsigned char vec_lvsr (int, const long *);

vector unsigned char vec_lvsl (int, const double *);
vector unsigned char vec_lvsr (int, const double *);

vector double vec_vsx_ld (int, const vector double *);
vector double vec_vsx_ld (int, const double *);
vector float vec_vsx_ld (int, const vector float *);
vector float vec_vsx_ld (int, const float *);
vector bool int vec_vsx_ld (int, const vector bool int *);
vector signed int vec_vsx_ld (int, const vector signed int *);
vector signed int vec_vsx_ld (int, const int *);
vector signed int vec_vsx_ld (int, const long *);
vector unsigned int vec_vsx_ld (int, const vector unsigned int *);
vector unsigned int vec_vsx_ld (int, const unsigned int *);
vector unsigned int vec_vsx_ld (int, const unsigned long *);
vector bool short vec_vsx_ld (int, const vector bool short *);
vector pixel vec_vsx_ld (int, const vector pixel *);
vector signed short vec_vsx_ld (int, const vector signed short *);
vector signed short vec_vsx_ld (int, const short *);
vector unsigned short vec_vsx_ld (int, const vector unsigned short *);
vector unsigned short vec_vsx_ld (int, const unsigned short *);
vector bool char vec_vsx_ld (int, const vector bool char *);
vector signed char vec_vsx_ld (int, const vector signed char *);
vector signed char vec_vsx_ld (int, const signed char *);
vector unsigned char vec_vsx_ld (int, const vector unsigned char *);
vector unsigned char vec_vsx_ld (int, const unsigned char *);

void vec_vsx_st (vector double, int, vector double *);
void vec_vsx_st (vector double, int, double *);
void vec_vsx_st (vector float, int, vector float *);
void vec_vsx_st (vector float, int, float *);
void vec_vsx_st (vector signed int, int, vector signed int *);
void vec_vsx_st (vector signed int, int, int *);
void vec_vsx_st (vector unsigned int, int, vector unsigned int *);
void vec_vsx_st (vector unsigned int, int, unsigned int *);
void vec_vsx_st (vector bool int, int, vector bool int *);
void vec_vsx_st (vector bool int, int, unsigned int *);
void vec_vsx_st (vector bool int, int, int *);
void vec_vsx_st (vector signed short, int, vector signed short *);
void vec_vsx_st (vector signed short, int, short *);
void vec_vsx_st (vector unsigned short, int, vector unsigned short *);
void vec_vsx_st (vector unsigned short, int, unsigned short *);
void vec_vsx_st (vector bool short, int, vector bool short *);
void vec_vsx_st (vector bool short, int, unsigned short *);
void vec_vsx_st (vector pixel, int, vector pixel *);
void vec_vsx_st (vector pixel, int, unsigned short *);
void vec_vsx_st (vector pixel, int, short *);
void vec_vsx_st (vector bool short, int, short *);
void vec_vsx_st (vector signed char, int, vector signed char *);
void vec_vsx_st (vector signed char, int, signed char *);
void vec_vsx_st (vector unsigned char, int, vector unsigned char *);
void vec_vsx_st (vector unsigned char, int, unsigned char *);
void vec_vsx_st (vector bool char, int, vector bool char *);
void vec_vsx_st (vector bool char, int, unsigned char *);
void vec_vsx_st (vector bool char, int, signed char *);

vector double vec_xxpermdi (vector double, vector double, const int);
vector float vec_xxpermdi (vector float, vector float, const int);
vector __int128 vec_xxpermdi (vector __int128,
                              vector __int128, const int);
vector __uint128 vec_xxpermdi (vector __uint128,
                               vector __uint128, const int);
vector long long vec_xxpermdi (vector long long, vector long long, const int);
vector unsigned long long vec_xxpermdi (vector unsigned long long,
                                        vector unsigned long long, const int);
vector int vec_xxpermdi (vector int, vector int, const int);
vector unsigned int vec_xxpermdi (vector unsigned int,
                                  vector unsigned int, const int);
vector short vec_xxpermdi (vector short, vector short, const int);
vector unsigned short vec_xxpermdi (vector unsigned short,
                                    vector unsigned short, const int);
vector signed char vec_xxpermdi (vector signed char, vector signed char,
                                 const int);
vector unsigned char vec_xxpermdi (vector unsigned char,
                                   vector unsigned char, const int);

vector double vec_xxsldi (vector double, vector double, int);
vector float vec_xxsldi (vector float, vector float, int);
vector long long vec_xxsldi (vector long long, vector long long, int);
vector unsigned long long vec_xxsldi (vector unsigned long long,
                                      vector unsigned long long, int);
vector int vec_xxsldi (vector int, vector int, int);
vector unsigned int vec_xxsldi (vector unsigned int, vector unsigned int, int);
vector short vec_xxsldi (vector short, vector short, int);
vector unsigned short vec_xxsldi (vector unsigned short,
                                  vector unsigned short, int);
vector signed char vec_xxsldi (vector signed char, vector signed char, int);
vector unsigned char vec_xxsldi (vector unsigned char,
                                 vector unsigned char, int);
@end smallexample

Note that the @samp{vec_ld} and @samp{vec_st} built-in functions always
generate the AltiVec @samp{LVX} and @samp{STVX} instructions even
if the VSX instruction set is available.  The @samp{vec_vsx_ld} and
@samp{vec_vsx_st} built-in functions always generate the VSX @samp{LXVD2X},
@samp{LXVW4X}, @samp{STXVD2X}, and @samp{STXVW4X} instructions.

@smallexample
vector signed long long vec_signedo (vector float);
vector signed long long vec_signede (vector float);
vector unsigned long long vec_unsignedo (vector float);
vector unsigned long long vec_unsignede (vector float);
@end smallexample

The overloaded built-ins @code{vec_signedo} and @code{vec_signede} are
additional extensions to the built-ins as documented in the PVIPR.

@node PowerPC AltiVec Built-in Functions Available on ISA 2.07
@subsubsection PowerPC AltiVec Built-in Functions Available on ISA 2.07

If the ISA 2.07 additions to the vector/scalar (power8-vector)
instruction set are available, the following additional functions are
available for both 32-bit and 64-bit targets.  For 64-bit targets, you
can use @var{vector long} instead of @var{vector long long},
@var{vector bool long} instead of @var{vector bool long long}, and
@var{vector unsigned long} instead of @var{vector unsigned long long}.

Only functions excluded from the PVIPR are listed here.

@smallexample
vector long long vec_vaddudm (vector long long, vector long long);
vector long long vec_vaddudm (vector bool long long, vector long long);
vector long long vec_vaddudm (vector long long, vector bool long long);
vector unsigned long long vec_vaddudm (vector unsigned long long,
                                       vector unsigned long long);
vector unsigned long long vec_vaddudm (vector bool unsigned long long,
                                       vector unsigned long long);
vector unsigned long long vec_vaddudm (vector unsigned long long,
                                       vector bool unsigned long long);

vector long long vec_vclz (vector long long);
vector unsigned long long vec_vclz (vector unsigned long long);
vector int vec_vclz (vector int);
vector unsigned int vec_vclz (vector int);
vector short vec_vclz (vector short);
vector unsigned short vec_vclz (vector unsigned short);
vector signed char vec_vclz (vector signed char);
vector unsigned char vec_vclz (vector unsigned char);

vector signed char vec_vclzb (vector signed char);
vector unsigned char vec_vclzb (vector unsigned char);

vector long long vec_vclzd (vector long long);
vector unsigned long long vec_vclzd (vector unsigned long long);

vector short vec_vclzh (vector short);
vector unsigned short vec_vclzh (vector unsigned short);

vector int vec_vclzw (vector int);
vector unsigned int vec_vclzw (vector int);

vector signed char vec_vgbbd (vector signed char);
vector unsigned char vec_vgbbd (vector unsigned char);

vector long long vec_vmaxsd (vector long long, vector long long);

vector unsigned long long vec_vmaxud (vector unsigned long long,
                                      unsigned vector long long);

vector long long vec_vminsd (vector long long, vector long long);

vector unsigned long long vec_vminud (vector long long, vector long long);

vector int vec_vpksdss (vector long long, vector long long);
vector unsigned int vec_vpksdss (vector long long, vector long long);

vector unsigned int vec_vpkudus (vector unsigned long long,
                                 vector unsigned long long);

vector int vec_vpkudum (vector long long, vector long long);
vector unsigned int vec_vpkudum (vector unsigned long long,
                                 vector unsigned long long);
vector bool int vec_vpkudum (vector bool long long, vector bool long long);

vector long long vec_vpopcnt (vector long long);
vector unsigned long long vec_vpopcnt (vector unsigned long long);
vector int vec_vpopcnt (vector int);
vector unsigned int vec_vpopcnt (vector int);
vector short vec_vpopcnt (vector short);
vector unsigned short vec_vpopcnt (vector unsigned short);
vector signed char vec_vpopcnt (vector signed char);
vector unsigned char vec_vpopcnt (vector unsigned char);

vector signed char vec_vpopcntb (vector signed char);
vector unsigned char vec_vpopcntb (vector unsigned char);

vector long long vec_vpopcntd (vector long long);
vector unsigned long long vec_vpopcntd (vector unsigned long long);

vector short vec_vpopcnth (vector short);
vector unsigned short vec_vpopcnth (vector unsigned short);

vector int vec_vpopcntw (vector int);
vector unsigned int vec_vpopcntw (vector int);

vector long long vec_vrld (vector long long, vector unsigned long long);
vector unsigned long long vec_vrld (vector unsigned long long,
                                    vector unsigned long long);

vector long long vec_vsld (vector long long, vector unsigned long long);
vector long long vec_vsld (vector unsigned long long,
                           vector unsigned long long);

vector long long vec_vsrad (vector long long, vector unsigned long long);
vector unsigned long long vec_vsrad (vector unsigned long long,
                                     vector unsigned long long);

vector long long vec_vsrd (vector long long, vector unsigned long long);
vector unsigned long long char vec_vsrd (vector unsigned long long,
                                         vector unsigned long long);

vector long long vec_vsubudm (vector long long, vector long long);
vector long long vec_vsubudm (vector bool long long, vector long long);
vector long long vec_vsubudm (vector long long, vector bool long long);
vector unsigned long long vec_vsubudm (vector unsigned long long,
                                       vector unsigned long long);
vector unsigned long long vec_vsubudm (vector bool long long,
                                       vector unsigned long long);
vector unsigned long long vec_vsubudm (vector unsigned long long,
                                       vector bool long long);

vector long long vec_vupkhsw (vector int);
vector unsigned long long vec_vupkhsw (vector unsigned int);

vector long long vec_vupklsw (vector int);
vector unsigned long long vec_vupklsw (vector int);
@end smallexample

If the ISA 2.07 additions to the vector/scalar (power8-vector)
instruction set are available, the following additional functions are
available for 64-bit targets.  New vector types
(@var{vector __int128} and @var{vector __uint128}) are available
to hold the @var{__int128} and @var{__uint128} types to use these
builtins.

The normal vector extract, and set operations work on
@var{vector __int128} and @var{vector __uint128} types,
but the index value must be 0.

Only functions excluded from the PVIPR are listed here.

@smallexample
vector __int128 vec_vaddcuq (vector __int128, vector __int128);
vector __uint128 vec_vaddcuq (vector __uint128, vector __uint128);

vector __int128 vec_vadduqm (vector __int128, vector __int128);
vector __uint128 vec_vadduqm (vector __uint128, vector __uint128);

vector __int128 vec_vaddecuq (vector __int128, vector __int128,
                                vector __int128);
vector __uint128 vec_vaddecuq (vector __uint128, vector __uint128,
                                 vector __uint128);

vector __int128 vec_vaddeuqm (vector __int128, vector __int128,
                                vector __int128);
vector __uint128 vec_vaddeuqm (vector __uint128, vector __uint128,
                                 vector __uint128);

vector __int128 vec_vsubecuq (vector __int128, vector __int128,
                                vector __int128);
vector __uint128 vec_vsubecuq (vector __uint128, vector __uint128,
                                 vector __uint128);

vector __int128 vec_vsubeuqm (vector __int128, vector __int128,
                                vector __int128);
vector __uint128 vec_vsubeuqm (vector __uint128, vector __uint128,
                                 vector __uint128);

vector __int128 vec_vsubcuq (vector __int128, vector __int128);
vector __uint128 vec_vsubcuq (vector __uint128, vector __uint128);

__int128 vec_vsubuqm (__int128, __int128);
__uint128 vec_vsubuqm (__uint128, __uint128);

vector __int128 __builtin_bcdadd (vector __int128, vector __int128, const int);
vector unsigned char __builtin_bcdadd (vector unsigned char, vector unsigned char,
                                       const int);
int __builtin_bcdadd_lt (vector __int128, vector __int128, const int);
int __builtin_bcdadd_lt (vector unsigned char, vector unsigned char, const int);
int __builtin_bcdadd_eq (vector __int128, vector __int128, const int);
int __builtin_bcdadd_eq (vector unsigned char, vector unsigned char, const int);
int __builtin_bcdadd_gt (vector __int128, vector __int128, const int);
int __builtin_bcdadd_gt (vector unsigned char, vector unsigned char, const int);
int __builtin_bcdadd_ov (vector __int128, vector __int128, const int);
int __builtin_bcdadd_ov (vector unsigned char, vector unsigned char, const int);

vector __int128 __builtin_bcdsub (vector __int128, vector __int128, const int);
vector unsigned char __builtin_bcdsub (vector unsigned char, vector unsigned char,
                                       const int);
int __builtin_bcdsub_le (vector __int128, vector __int128, const int);
int __builtin_bcdsub_le (vector unsigned char, vector unsigned char, const int);
int __builtin_bcdsub_lt (vector __int128, vector __int128, const int);
int __builtin_bcdsub_lt (vector unsigned char, vector unsigned char, const int);
int __builtin_bcdsub_eq (vector __int128, vector __int128, const int);
int __builtin_bcdsub_eq (vector unsigned char, vector unsigned char, const int);
int __builtin_bcdsub_gt (vector __int128, vector __int128, const int);
int __builtin_bcdsub_gt (vector unsigned char, vector unsigned char, const int);
int __builtin_bcdsub_ge (vector __int128, vector __int128, const int);
int __builtin_bcdsub_ge (vector unsigned char, vector unsigned char, const int);
int __builtin_bcdsub_ov (vector __int128, vector __int128, const int);
int __builtin_bcdsub_ov (vector unsigned char, vector unsigned char, const int);
@end smallexample

@node PowerPC AltiVec Built-in Functions Available on ISA 3.0
@subsubsection PowerPC AltiVec Built-in Functions Available on ISA 3.0

The following additional built-in functions are also available for the
PowerPC family of processors, starting with ISA 3.0
(@option{-mcpu=power9}) or later.

Only instructions excluded from the PVIPR are listed here.

@smallexample
unsigned int scalar_extract_exp (double source);
unsigned long long int scalar_extract_exp (__ieee128 source);

unsigned long long int scalar_extract_sig (double source);
unsigned __int128 scalar_extract_sig (__ieee128 source);

double scalar_insert_exp (unsigned long long int significand,
                          unsigned long long int exponent);
double scalar_insert_exp (double significand, unsigned long long int exponent);

ieee_128 scalar_insert_exp (unsigned __int128 significand,
                            unsigned long long int exponent);
ieee_128 scalar_insert_exp (ieee_128 significand, unsigned long long int exponent);
vector ieee_128 scalar_insert_exp (vector unsigned __int128 significand,
                                   vector unsigned long long exponent);
vector unsigned long long scalar_extract_exp_to_vec (ieee_128);
vector unsigned __int128  scalar_extract_sig_to_vec (ieee_128);

int scalar_cmp_exp_gt (double arg1, double arg2);
int scalar_cmp_exp_lt (double arg1, double arg2);
int scalar_cmp_exp_eq (double arg1, double arg2);
int scalar_cmp_exp_unordered (double arg1, double arg2);

bool scalar_test_data_class (float source, const int condition);
bool scalar_test_data_class (double source, const int condition);
bool scalar_test_data_class (__ieee128 source, const int condition);

bool scalar_test_neg (float source);
bool scalar_test_neg (double source);
bool scalar_test_neg (__ieee128 source);
@end smallexample

The @code{scalar_extract_exp} with a 64-bit source argument
function requires an environment supporting ISA 3.0 or later.
The @code{scalar_extract_exp} with a 128-bit source argument
and @code{scalar_extract_sig}
functions require a 64-bit environment supporting ISA 3.0 or later.
The @code{scalar_extract_exp} and @code{scalar_extract_sig} built-in
functions return the significand and the biased exponent value
respectively of their @code{source} arguments.
When supplied with a 64-bit @code{source} argument, the
result returned by @code{scalar_extract_sig} has
the @code{0x0010000000000000} bit set if the
function's @code{source} argument is in normalized form.
Otherwise, this bit is set to 0.
When supplied with a 128-bit @code{source} argument, the
@code{0x00010000000000000000000000000000} bit of the result is
treated similarly.
Note that the sign of the significand is not represented in the result
returned from the @code{scalar_extract_sig} function.  Use the
@code{scalar_test_neg} function to test the sign of its @code{double}
argument.

The @code{scalar_insert_exp}
functions require a 64-bit environment supporting ISA 3.0 or later.
When supplied with a 64-bit first argument, the
@code{scalar_insert_exp} built-in function returns a double-precision
floating point value that is constructed by assembling the values of its
@code{significand} and @code{exponent} arguments.  The sign of the
result is copied from the most significant bit of the
@code{significand} argument.  The significand and exponent components
of the result are composed of the least significant 11 bits of the
@code{exponent} argument and the least significant 52 bits of the
@code{significand} argument respectively.

When supplied with a 128-bit first argument, the
@code{scalar_insert_exp} built-in function returns a quad-precision
IEEE floating point value if the two arguments were scalar.  If the two
arguments are vectors, the return value is a vector IEEE floating point value.
The sign bit of the result is copied from the most significant bit of the
@code{significand} argument.  The significand and exponent components of the
result are composed of the least significant 15 bits of the @code{exponent}
argument (element 0 on big-endian and element 1 on little-endian) and the
least significant 112 bits of the @code{significand} argument
respectively.  Note, the @code{significand} is the scalar argument or in the
case of vector arguments, @code{significand} is element 0 for big-endian and
element 1 for little-endian.

The @code{scalar_extract_exp_to_vec},
and @code{scalar_extract_sig_to_vec} are similar to
@code{scalar_extract_exp}, @code{scalar_extract_sig} except they return
a vector result of type unsigned long long and unsigned __int128 respectively.

The @code{scalar_cmp_exp_gt}, @code{scalar_cmp_exp_lt},
@code{scalar_cmp_exp_eq}, and @code{scalar_cmp_exp_unordered} built-in
functions return a non-zero value if @code{arg1} is greater than, less
than, equal to, or not comparable to @code{arg2} respectively.  The
arguments are not comparable if one or the other equals NaN (not a
number). 

The @code{scalar_test_data_class} built-in function returns 1
if any of the condition tests enabled by the value of the
@code{condition} variable are true, and 0 otherwise.  The
@code{condition} argument must be a compile-time constant integer with
value not exceeding 127.  The
@code{condition} argument is encoded as a bitmask with each bit
enabling the testing of a different condition, as characterized by the
following:
@smallexample
0x40    Test for NaN
0x20    Test for +Infinity
0x10    Test for -Infinity
0x08    Test for +Zero
0x04    Test for -Zero
0x02    Test for +Denormal
0x01    Test for -Denormal
@end smallexample

The @code{scalar_test_neg} built-in function returns 1 if its
@code{source} argument holds a negative value, 0 otherwise.

The following built-in functions are also available for the PowerPC family
of processors, starting with ISA 3.0 or later
(@option{-mcpu=power9}).  These string functions are described
separately in order to group the descriptions closer to the function
prototypes.

Only functions excluded from the PVIPR are listed here.

@smallexample
int vec_all_nez (vector signed char, vector signed char);
int vec_all_nez (vector unsigned char, vector unsigned char);
int vec_all_nez (vector signed short, vector signed short);
int vec_all_nez (vector unsigned short, vector unsigned short);
int vec_all_nez (vector signed int, vector signed int);
int vec_all_nez (vector unsigned int, vector unsigned int);

int vec_any_eqz (vector signed char, vector signed char);
int vec_any_eqz (vector unsigned char, vector unsigned char);
int vec_any_eqz (vector signed short, vector signed short);
int vec_any_eqz (vector unsigned short, vector unsigned short);
int vec_any_eqz (vector signed int, vector signed int);
int vec_any_eqz (vector unsigned int, vector unsigned int);

signed char vec_xlx (unsigned int index, vector signed char data);
unsigned char vec_xlx (unsigned int index, vector unsigned char data);
signed short vec_xlx (unsigned int index, vector signed short data);
unsigned short vec_xlx (unsigned int index, vector unsigned short data);
signed int vec_xlx (unsigned int index, vector signed int data);
unsigned int vec_xlx (unsigned int index, vector unsigned int data);
float vec_xlx (unsigned int index, vector float data);

signed char vec_xrx (unsigned int index, vector signed char data);
unsigned char vec_xrx (unsigned int index, vector unsigned char data);
signed short vec_xrx (unsigned int index, vector signed short data);
unsigned short vec_xrx (unsigned int index, vector unsigned short data);
signed int vec_xrx (unsigned int index, vector signed int data);
unsigned int vec_xrx (unsigned int index, vector unsigned int data);
float vec_xrx (unsigned int index, vector float data);
@end smallexample

The @code{vec_all_nez}, @code{vec_any_eqz}, and @code{vec_cmpnez}
perform pairwise comparisons between the elements at the same
positions within their two vector arguments.
The @code{vec_all_nez} function returns a
non-zero value if and only if all pairwise comparisons are not
equal and no element of either vector argument contains a zero.
The @code{vec_any_eqz} function returns a
non-zero value if and only if at least one pairwise comparison is equal
or if at least one element of either vector argument contains a zero.
The @code{vec_cmpnez} function returns a vector of the same type as
its two arguments, within which each element consists of all ones to
denote that either the corresponding elements of the incoming arguments are
not equal or that at least one of the corresponding elements contains
zero.  Otherwise, the element of the returned vector contains all zeros.

The @code{vec_xlx} and @code{vec_xrx} functions extract the single
element selected by the @code{index} argument from the vector
represented by the @code{data} argument.  The @code{index} argument
always specifies a byte offset, regardless of the size of the vector
element.  With @code{vec_xlx}, @code{index} is the offset of the first
byte of the element to be extracted.  With @code{vec_xrx}, @code{index}
represents the last byte of the element to be extracted, measured
from the right end of the vector.  In other words, the last byte of
the element to be extracted is found at position @code{(15 - index)}.
There is no requirement that @code{index} be a multiple of the vector
element size.  However, if the size of the vector element added to
@code{index} is greater than 15, the content of the returned value is
undefined.

The following functions are also available if the ISA 3.0 instruction
set additions (@option{-mcpu=power9}) are available.

Only functions excluded from the PVIPR are listed here.

@smallexample
vector long long vec_vctz (vector long long);
vector unsigned long long vec_vctz (vector unsigned long long);
vector int vec_vctz (vector int);
vector unsigned int vec_vctz (vector int);
vector short vec_vctz (vector short);
vector unsigned short vec_vctz (vector unsigned short);
vector signed char vec_vctz (vector signed char);
vector unsigned char vec_vctz (vector unsigned char);

vector signed char vec_vctzb (vector signed char);
vector unsigned char vec_vctzb (vector unsigned char);

vector long long vec_vctzd (vector long long);
vector unsigned long long vec_vctzd (vector unsigned long long);

vector short vec_vctzh (vector short);
vector unsigned short vec_vctzh (vector unsigned short);

vector int vec_vctzw (vector int);
vector unsigned int vec_vctzw (vector int);

vector int vec_vprtyb (vector int);
vector unsigned int vec_vprtyb (vector unsigned int);
vector long long vec_vprtyb (vector long long);
vector unsigned long long vec_vprtyb (vector unsigned long long);

vector int vec_vprtybw (vector int);
vector unsigned int vec_vprtybw (vector unsigned int);

vector long long vec_vprtybd (vector long long);
vector unsigned long long vec_vprtybd (vector unsigned long long);
@end smallexample

On 64-bit targets, if the ISA 3.0 additions (@option{-mcpu=power9})
are available:

@smallexample
vector long vec_vprtyb (vector long);
vector unsigned long vec_vprtyb (vector unsigned long);
vector __int128 vec_vprtyb (vector __int128);
vector __uint128 vec_vprtyb (vector __uint128);

vector long vec_vprtybd (vector long);
vector unsigned long vec_vprtybd (vector unsigned long);

vector __int128 vec_vprtybq (vector __int128);
vector __uint128 vec_vprtybd (vector __uint128);
@end smallexample

The following built-in functions are available for the PowerPC family
of processors, starting with ISA 3.0 or later (@option{-mcpu=power9}).

Only functions excluded from the PVIPR are listed here.

@smallexample
__vector unsigned char
vec_absdb (__vector unsigned char arg1, __vector unsigned char arg2);
__vector unsigned short
vec_absdh (__vector unsigned short arg1, __vector unsigned short arg2);
__vector unsigned int
vec_absdw (__vector unsigned int arg1, __vector unsigned int arg2);
@end smallexample

The @code{vec_absd}, @code{vec_absdb}, @code{vec_absdh}, and
@code{vec_absdw} built-in functions each computes the absolute
differences of the pairs of vector elements supplied in its two vector
arguments, placing the absolute differences into the corresponding
elements of the vector result.

The following built-in functions are available for the PowerPC family
of processors, starting with ISA 3.0 or later (@option{-mcpu=power9}):
@smallexample
vector unsigned int vec_vrlnm (vector unsigned int, vector unsigned int);
vector unsigned long long vec_vrlnm (vector unsigned long long,
                                     vector unsigned long long);
@end smallexample

The result of @code{vec_vrlnm} is obtained by rotating each element
of the first argument vector left and ANDing it with a mask.  The
second argument vector contains the mask  beginning in bits 11:15,
the mask end in bits 19:23, and the shift count in bits 27:31,
of each element.

If the cryptographic instructions are enabled (@option{-mcrypto} or
@option{-mcpu=power8}), the following builtins are enabled.

Only functions excluded from the PVIPR are listed here.

@smallexample
vector unsigned long long __builtin_crypto_vsbox (vector unsigned long long);

vector unsigned long long __builtin_crypto_vcipher (vector unsigned long long,
                                                    vector unsigned long long);

vector unsigned long long __builtin_crypto_vcipherlast
                                     (vector unsigned long long,
                                      vector unsigned long long);

vector unsigned long long __builtin_crypto_vncipher (vector unsigned long long,
                                                     vector unsigned long long);

vector unsigned long long __builtin_crypto_vncipherlast (vector unsigned long long,
                                                         vector unsigned long long);

vector unsigned char __builtin_crypto_vpermxor (vector unsigned char,
                                                vector unsigned char,
                                                vector unsigned char);

vector unsigned short __builtin_crypto_vpermxor (vector unsigned short,
                                                 vector unsigned short,
                                                 vector unsigned short);

vector unsigned int __builtin_crypto_vpermxor (vector unsigned int,
                                               vector unsigned int,
                                               vector unsigned int);

vector unsigned long long __builtin_crypto_vpermxor (vector unsigned long long,
                                                     vector unsigned long long,
                                                     vector unsigned long long);

vector unsigned char __builtin_crypto_vpmsumb (vector unsigned char,
                                               vector unsigned char);

vector unsigned short __builtin_crypto_vpmsumh (vector unsigned short,
                                                vector unsigned short);

vector unsigned int __builtin_crypto_vpmsumw (vector unsigned int,
                                              vector unsigned int);

vector unsigned long long __builtin_crypto_vpmsumd (vector unsigned long long,
                                                    vector unsigned long long);

vector unsigned long long __builtin_crypto_vshasigmad (vector unsigned long long,
                                                       int, int);

vector unsigned int __builtin_crypto_vshasigmaw (vector unsigned int, int, int);
@end smallexample

The second argument to @var{__builtin_crypto_vshasigmad} and
@var{__builtin_crypto_vshasigmaw} must be a constant
integer that is 0 or 1.  The third argument to these built-in functions
must be a constant integer in the range of 0 to 15.

The following sign extension builtins are provided:

@smallexample
vector signed int vec_signexti (vector signed char a);
vector signed long long vec_signextll (vector signed char a);
vector signed int vec_signexti (vector signed short a);
vector signed long long vec_signextll (vector signed short a);
vector signed long long vec_signextll (vector signed int a);
vector signed long long vec_signextq (vector signed long long a);
@end smallexample

Each element of the result is produced by sign-extending the element of the
input vector that would fall in the least significant portion of the result
element. For example, a sign-extension of a vector signed char to a vector
signed long long will sign extend the rightmost byte of each doubleword.

@node PowerPC AltiVec Built-in Functions Available on ISA 3.1
@subsubsection PowerPC AltiVec Built-in Functions Available on ISA 3.1

The following additional built-in functions are also available for the
PowerPC family of processors, starting with ISA 3.1 (@option{-mcpu=power10}):


@smallexample
@exdent vector unsigned long long int
@exdent vec_cfuge (vector unsigned long long int, vector unsigned long long int);
@end smallexample
Perform a vector centrifuge operation, as if implemented by the
@code{vcfuged} instruction.
@findex vec_cfuge

@smallexample
@exdent vector unsigned long long int
@exdent vec_cntlzm (vector unsigned long long int, vector unsigned long long int);
@end smallexample
Perform a vector count leading zeros under bit mask operation, as if
implemented by the @code{vclzdm} instruction.
@findex vec_cntlzm

@smallexample
@exdent vector unsigned long long int
@exdent vec_cnttzm (vector unsigned long long int, vector unsigned long long int);
@end smallexample
Perform a vector count trailing zeros under bit mask operation, as if
implemented by the @code{vctzdm} instruction.
@findex vec_cnttzm

@smallexample
@exdent vector signed char
@exdent vec_clrl (vector signed char @var{a}, unsigned int @var{n});
@exdent vector unsigned char
@exdent vec_clrl (vector unsigned char @var{a}, unsigned int @var{n});
@end smallexample
Clear the left-most @code{(16 - n)} bytes of vector argument @code{a}, as if
implemented by the @code{vclrlb} instruction on a big-endian target
and by the @code{vclrrb} instruction on a little-endian target.  A
value of @code{n} that is greater than 16 is treated as if it equaled 16.
@findex vec_clrl

@smallexample
@exdent vector signed char
@exdent vec_clrr (vector signed char @var{a}, unsigned int @var{n});
@exdent vector unsigned char
@exdent vec_clrr (vector unsigned char @var{a}, unsigned int @var{n});
@end smallexample
Clear the right-most @code{(16 - n)} bytes of vector argument @code{a}, as if
implemented by the @code{vclrrb} instruction on a big-endian target
and by the @code{vclrlb} instruction on a little-endian target.  A
value of @code{n} that is greater than 16 is treated as if it equaled 16.
@findex vec_clrr

@smallexample
@exdent vector unsigned long long int
@exdent vec_gnb (vector unsigned __int128, const unsigned char);
@end smallexample
Perform a 128-bit vector gather  operation, as if implemented by the
@code{vgnb} instruction.  The second argument must be a literal
integer value between 2 and 7 inclusive.
@findex vec_gnb


Vector Extract

@smallexample
@exdent vector unsigned long long int
@exdent vec_extractl (vector unsigned char, vector unsigned char, unsigned int);
@exdent vector unsigned long long int
@exdent vec_extractl (vector unsigned short, vector unsigned short, unsigned int);
@exdent vector unsigned long long int
@exdent vec_extractl (vector unsigned int, vector unsigned int, unsigned int);
@exdent vector unsigned long long int
@exdent vec_extractl (vector unsigned long long, vector unsigned long long, unsigned int);
@end smallexample
Extract an element from two concatenated vectors starting at the given byte index
in natural-endian order, and place it zero-extended in doubleword 1 of the result
according to natural element order.  If the byte index is out of range for the
data type, the intrinsic will be rejected.
For little-endian, this output will match the placement by the hardware
instruction, i.e., dword[0] in RTL notation.  For big-endian, an additional
instruction is needed to move it from the "left" doubleword to the  "right" one.
For little-endian, semantics matching the @code{vextdubvrx},
@code{vextduhvrx}, @code{vextduwvrx} instruction will be generated, while for
big-endian, semantics matching the @code{vextdubvlx}, @code{vextduhvlx},
@code{vextduwvlx} instructions
will be generated.  Note that some fairly anomalous results can be generated if
the byte index is not aligned on an element boundary for the element being
extracted.  This is a limitation of the bi-endian vector programming model is
consistent with the limitation on @code{vec_perm}.
@findex vec_extractl

@smallexample
@exdent vector unsigned long long int
@exdent vec_extracth (vector unsigned char, vector unsigned char, unsigned int);
@exdent vector unsigned long long int
@exdent vec_extracth (vector unsigned short, vector unsigned short,
unsigned int);
@exdent vector unsigned long long int
@exdent vec_extracth (vector unsigned int, vector unsigned int, unsigned int);
@exdent vector unsigned long long int
@exdent vec_extracth (vector unsigned long long, vector unsigned long long,
unsigned int);
@end smallexample
Extract an element from two concatenated vectors starting at the given byte
index.  The index is based on big endian order for a little endian system.
Similarly, the index is based on little endian order for a big endian system.
The extraced elements are zero-extended and put in doubleword 1
according to natural element order.  If the byte index is out of range for the
data type, the intrinsic will be rejected.  For little-endian, this output
will match the placement by the hardware instruction (vextdubvrx, vextduhvrx,
vextduwvrx, vextddvrx) i.e., dword[0] in RTL
notation.  For big-endian, an additional instruction is needed to move it
from the "left" doubleword to the "right" one.  For little-endian, semantics
matching the @code{vextdubvlx}, @code{vextduhvlx}, @code{vextduwvlx}
instructions will be generated, while for big-endian, semantics matching the
@code{vextdubvrx}, @code{vextduhvrx}, @code{vextduwvrx} instructions will
be generated.  Note that some fairly anomalous
results can be generated if the byte index is not aligned on the
element boundary for the element being extracted.  This is a
limitation of the bi-endian vector programming model consistent with the
limitation on @code{vec_perm}.
@findex vec_extracth
@smallexample
@exdent vector unsigned long long int
@exdent vec_pdep (vector unsigned long long int, vector unsigned long long int);
@end smallexample
Perform a vector parallel bits deposit operation, as if implemented by
the @code{vpdepd} instruction.
@findex vec_pdep

Vector Insert

@smallexample
@exdent vector unsigned char
@exdent vec_insertl (unsigned char, vector unsigned char, unsigned int);
@exdent vector unsigned short
@exdent vec_insertl (unsigned short, vector unsigned short, unsigned int);
@exdent vector unsigned int
@exdent vec_insertl (unsigned int, vector unsigned int, unsigned int);
@exdent vector unsigned long long
@exdent vec_insertl (unsigned long long, vector unsigned long long,
unsigned int);
@exdent vector unsigned char
@exdent vec_insertl (vector unsigned char, vector unsigned char, unsigned int;
@exdent vector unsigned short
@exdent vec_insertl (vector unsigned short, vector unsigned short,
unsigned int);
@exdent vector unsigned int
@exdent vec_insertl (vector unsigned int, vector unsigned int, unsigned int);
@end smallexample

Let src be the first argument, when the first argument is a scalar, or the
rightmost element of the left doubleword of the first argument, when the first
argument is a vector.  Insert the source into the destination at the position
given by the third argument, using natural element order in the second
argument.  The rest of the second argument is unchanged.  If the byte
index is greater than 14 for halfwords, greater than 12 for words, or
greater than 8 for doublewords the result is undefined.   For little-endian,
the generated code will be semantically equivalent to @code{vins[bhwd]rx}
instructions.  Similarly for big-endian it will be semantically equivalent
to @code{vins[bhwd]lx}.  Note that some fairly anomalous results can be
generated if the byte index is not aligned on an element boundary for the
type of element being inserted.
@findex vec_insertl

@smallexample
@exdent vector unsigned char
@exdent vec_inserth (unsigned char, vector unsigned char, unsigned int);
@exdent vector unsigned short
@exdent vec_inserth (unsigned short, vector unsigned short, unsigned int);
@exdent vector unsigned int
@exdent vec_inserth (unsigned int, vector unsigned int, unsigned int);
@exdent vector unsigned long long
@exdent vec_inserth (unsigned long long, vector unsigned long long,
unsigned int);
@exdent vector unsigned char
@exdent vec_inserth (vector unsigned char, vector unsigned char, unsigned int);
@exdent vector unsigned short
@exdent vec_inserth (vector unsigned short, vector unsigned short,
unsigned int);
@exdent vector unsigned int
@exdent vec_inserth (vector unsigned int, vector unsigned int, unsigned int);
@end smallexample

Let src be the first argument, when the first argument is a scalar, or the
rightmost element of the first argument, when the first argument is a vector.
Insert src into the second argument at the position identified by the third
argument, using opposite element order in the second argument, and leaving the
rest of the second argument unchanged.  If the byte index is greater than 14
for halfwords, 12 for words, or 8 for doublewords, the intrinsic will be
rejected. Note that the underlying hardware instruction uses the same register
for the second argument and the result.
For little-endian, the code generation will be semantically equivalent to
@code{vins[bhwd]lx}, while for big-endian it will be semantically equivalent to
@code{vins[bhwd]rx}.
Note that some fairly anomalous results can be generated if the byte index is
not aligned on an element boundary for the sort of element being inserted.
@findex vec_inserth

Vector Replace Element
@smallexample
@exdent vector signed int vec_replace_elt (vector signed int, signed int,
const int);
@exdent vector unsigned int vec_replace_elt (vector unsigned int,
unsigned int, const int);
@exdent vector float vec_replace_elt (vector float, float, const int);
@exdent vector signed long long vec_replace_elt (vector signed long long,
signed long long, const int);
@exdent vector unsigned long long vec_replace_elt (vector unsigned long long,
unsigned long long, const int);
@exdent vector double rec_replace_elt (vector double, double, const int);
@end smallexample
The third argument (constrained to [0,3]) identifies the natural-endian
element number of the first argument that will be replaced by the second
argument to produce the result.  The other elements of the first argument will
remain unchanged in the result.

If it's desirable to insert a word at an unaligned position, use
vec_replace_unaligned instead.

@findex vec_replace_element

Vector Replace Unaligned
@smallexample
@exdent vector unsigned char vec_replace_unaligned (vector unsigned char,
signed int, const int);
@exdent vector unsigned char vec_replace_unaligned (vector unsigned char,
unsigned int, const int);
@exdent vector unsigned char vec_replace_unaligned (vector unsigned char,
float, const int);
@exdent vector unsigned char vec_replace_unaligned (vector unsigned char,
signed long long, const int);
@exdent vector unsigned char vec_replace_unaligned (vector unsigned char,
unsigned long long, const int);
@exdent vector unsigned char vec_replace_unaligned (vector unsigned char,
double, const int);
@end smallexample

The second argument replaces a portion of the first argument to produce the
result, with the rest of the first argument unchanged in the result.  The
third argument identifies the byte index (using left-to-right, or big-endian
order) where the high-order byte of the second argument will be placed, with
the remaining bytes of the second argument placed naturally "to the right"
of the high-order byte.

The programmer is responsible for understanding the endianness issues involved
with the first argument and the result.
@findex vec_replace_unaligned

Vector Shift Left Double Bit Immediate
@smallexample
@exdent vector signed char vec_sldb (vector signed char, vector signed char,
const unsigned int);
@exdent vector unsigned char vec_sldb (vector unsigned char,
vector unsigned char, const unsigned int);
@exdent vector signed short vec_sldb (vector signed short, vector signed short,
const unsigned int);
@exdent vector unsigned short vec_sldb (vector unsigned short,
vector unsigned short, const unsigned int);
@exdent vector signed int vec_sldb (vector signed int, vector signed int,
const unsigned int);
@exdent vector unsigned int vec_sldb (vector unsigned int, vector unsigned int,
const unsigned int);
@exdent vector signed long long vec_sldb (vector signed long long,
vector signed long long, const unsigned int);
@exdent vector unsigned long long vec_sldb (vector unsigned long long,
vector unsigned long long, const unsigned int);
@end smallexample

Shift the combined input vectors left by the amount specified by the low-order
three bits of the third argument, and return the leftmost remaining 128 bits.
Code using this instruction must be endian-aware.

@findex vec_sldb

Vector Shift Right Double Bit Immediate

@smallexample
@exdent vector signed char vec_srdb (vector signed char, vector signed char,
const unsigned int);
@exdent vector unsigned char vec_srdb (vector unsigned char, vector unsigned char,
const unsigned int);
@exdent vector signed short vec_srdb (vector signed short, vector signed short,
const unsigned int);
@exdent vector unsigned short vec_srdb (vector unsigned short, vector unsigned short,
const unsigned int);
@exdent vector signed int vec_srdb (vector signed int, vector signed int,
const unsigned int);
@exdent vector unsigned int vec_srdb (vector unsigned int, vector unsigned int,
const unsigned int);
@exdent vector signed long long vec_srdb (vector signed long long,
vector signed long long, const unsigned int);
@exdent vector unsigned long long vec_srdb (vector unsigned long long,
vector unsigned long long, const unsigned int);
@end smallexample

Shift the combined input vectors right by the amount specified by the low-order
three bits of the third argument, and return the remaining 128 bits.  Code
using this built-in must be endian-aware.

@findex vec_srdb

Vector Splat

@smallexample
@exdent vector signed int vec_splati (const signed int);
@exdent vector float vec_splati (const float);
@end smallexample

Splat a 32-bit immediate into a vector of words.

@findex vec_splati

@smallexample
@exdent vector double vec_splatid (const float);
@end smallexample

Convert a single precision floating-point value to double-precision and splat
the result to a vector of double-precision floats.

@findex vec_splatid

@smallexample
@exdent vector signed int vec_splati_ins (vector signed int,
const unsigned int, const signed int);
@exdent vector unsigned int vec_splati_ins (vector unsigned int,
const unsigned int, const unsigned int);
@exdent vector float vec_splati_ins (vector float, const unsigned int,
const float);
@end smallexample

Argument 2 must be either 0 or 1.  Splat the value of argument 3 into the word
identified by argument 2 of each doubleword of argument 1 and return the
result.  The other words of argument 1 are unchanged.

@findex vec_splati_ins

Vector Blend Variable

@smallexample
@exdent vector signed char vec_blendv (vector signed char, vector signed char,
vector unsigned char);
@exdent vector unsigned char vec_blendv (vector unsigned char,
vector unsigned char, vector unsigned char);
@exdent vector signed short vec_blendv (vector signed short,
vector signed short, vector unsigned short);
@exdent vector unsigned short vec_blendv (vector unsigned short,
vector unsigned short, vector unsigned short);
@exdent vector signed int vec_blendv (vector signed int, vector signed int,
vector unsigned int);
@exdent vector unsigned int vec_blendv (vector unsigned int,
vector unsigned int, vector unsigned int);
@exdent vector signed long long vec_blendv (vector signed long long,
vector signed long long, vector unsigned long long);
@exdent vector unsigned long long vec_blendv (vector unsigned long long,
vector unsigned long long, vector unsigned long long);
@exdent vector float vec_blendv (vector float, vector float,
vector unsigned int);
@exdent vector double vec_blendv (vector double, vector double,
vector unsigned long long);
@end smallexample

Blend the first and second argument vectors according to the sign bits of the
corresponding elements of the third argument vector.  This is similar to the
@code{vsel} and @code{xxsel} instructions but for bigger elements.

@findex vec_blendv

Vector Permute Extended

@smallexample
@exdent vector signed char vec_permx (vector signed char, vector signed char,
vector unsigned char, const int);
@exdent vector unsigned char vec_permx (vector unsigned char,
vector unsigned char, vector unsigned char, const int);
@exdent vector signed short vec_permx (vector signed short,
vector signed short, vector unsigned char, const int);
@exdent vector unsigned short vec_permx (vector unsigned short,
vector unsigned short, vector unsigned char, const int);
@exdent vector signed int vec_permx (vector signed int, vector signed int,
vector unsigned char, const int);
@exdent vector unsigned int vec_permx (vector unsigned int,
vector unsigned int, vector unsigned char, const int);
@exdent vector signed long long vec_permx (vector signed long long,
vector signed long long, vector unsigned char, const int);
@exdent vector unsigned long long vec_permx (vector unsigned long long,
vector unsigned long long, vector unsigned char, const int);
@exdent vector float (vector float, vector float, vector unsigned char,
const int);
@exdent vector double (vector double, vector double, vector unsigned char,
const int);
@end smallexample

Perform a partial permute of the first two arguments, which form a 32-byte
section of an emulated vector up to 256 bytes wide, using the partial permute
control vector in the third argument.  The fourth argument (constrained to
values of 0-7) identifies which 32-byte section of the emulated vector is
contained in the first two arguments.
@findex vec_permx

@smallexample
@exdent vector unsigned long long int
@exdent vec_pext (vector unsigned long long int, vector unsigned long long int);
@end smallexample
Perform a vector parallel bit extract operation, as if implemented by
the @code{vpextd} instruction.
@findex vec_pext

@smallexample
@exdent vector unsigned char vec_stril (vector unsigned char);
@exdent vector signed char vec_stril (vector signed char);
@exdent vector unsigned short vec_stril (vector unsigned short);
@exdent vector signed short vec_stril (vector signed short);
@end smallexample
Isolate the left-most non-zero elements of the incoming vector argument,
replacing all elements to the right of the left-most zero element
found within the argument with zero.  The typical implementation uses
the @code{vstribl} or @code{vstrihl} instruction on big-endian targets
and uses the @code{vstribr} or @code{vstrihr} instruction on
little-endian targets.
@findex vec_stril

@smallexample
@exdent int vec_stril_p (vector unsigned char);
@exdent int vec_stril_p (vector signed char);
@exdent int short vec_stril_p (vector unsigned short);
@exdent int vec_stril_p (vector signed short);
@end smallexample
Return a non-zero value if and only if the argument contains a zero
element.  The typical implementation uses
the @code{vstribl.} or @code{vstrihl.} instruction on big-endian targets
and uses the @code{vstribr.} or @code{vstrihr.} instruction on
little-endian targets.  Choose this built-in to check for presence of
zero element if the same argument is also passed to @code{vec_stril}.
@findex vec_stril_p

@smallexample
@exdent vector unsigned char vec_strir (vector unsigned char);
@exdent vector signed char vec_strir (vector signed char);
@exdent vector unsigned short vec_strir (vector unsigned short);
@exdent vector signed short vec_strir (vector signed short);
@end smallexample
Isolate the right-most non-zero elements of the incoming vector argument,
replacing all elements to the left of the right-most zero element
found within the argument with zero.  The typical implementation uses
the @code{vstribr} or @code{vstrihr} instruction on big-endian targets
and uses the @code{vstribl} or @code{vstrihl} instruction on
little-endian targets.
@findex vec_strir

@smallexample
@exdent int vec_strir_p (vector unsigned char);
@exdent int vec_strir_p (vector signed char);
@exdent int short vec_strir_p (vector unsigned short);
@exdent int vec_strir_p (vector signed short);
@end smallexample
Return a non-zero value if and only if the argument contains a zero
element.  The typical implementation uses
the @code{vstribr.} or @code{vstrihr.} instruction on big-endian targets
and uses the @code{vstribl.} or @code{vstrihl.} instruction on
little-endian targets.  Choose this built-in to check for presence of
zero element if the same argument is also passed to @code{vec_strir}.
@findex vec_strir_p

@smallexample
@exdent vector unsigned char
@exdent vec_ternarylogic (vector unsigned char, vector unsigned char,
            vector unsigned char, const unsigned int);
@exdent vector unsigned short
@exdent vec_ternarylogic (vector unsigned short, vector unsigned short,
            vector unsigned short, const unsigned int);
@exdent vector unsigned int
@exdent vec_ternarylogic (vector unsigned int, vector unsigned int,
            vector unsigned int, const unsigned int);
@exdent vector unsigned long long int
@exdent vec_ternarylogic (vector unsigned long long int, vector unsigned long long int,
            vector unsigned long long int, const unsigned int);
@exdent vector unsigned __int128
@exdent vec_ternarylogic (vector unsigned __int128, vector unsigned __int128,
            vector unsigned __int128, const unsigned int);
@end smallexample
Perform a 128-bit vector evaluate operation, as if implemented by the
@code{xxeval} instruction.  The fourth argument must be a literal
integer value between 0 and 255 inclusive.
@findex vec_ternarylogic

@smallexample
@exdent vector unsigned char vec_genpcvm (vector unsigned char, const int);
@exdent vector unsigned short vec_genpcvm (vector unsigned short, const int);
@exdent vector unsigned int vec_genpcvm (vector unsigned int, const int);
@exdent vector unsigned int vec_genpcvm (vector unsigned long long int,
                                         const int);
@end smallexample

Vector Integer Multiply/Divide/Modulo

@smallexample
@exdent vector signed int
@exdent vec_mulh (vector signed int @var{a}, vector signed int @var{b});
@exdent vector unsigned int
@exdent vec_mulh (vector unsigned int @var{a}, vector unsigned int @var{b});
@end smallexample

For each integer value @code{i} from 0 to 3, do the following. The integer
value in word element @code{i} of a is multiplied by the integer value in word
element @code{i} of b. The high-order 32 bits of the 64-bit product are placed
into word element @code{i} of the vector returned.

@smallexample
@exdent vector signed long long
@exdent vec_mulh (vector signed long long @var{a}, vector signed long long @var{b});
@exdent vector unsigned long long
@exdent vec_mulh (vector unsigned long long @var{a}, vector unsigned long long @var{b});
@end smallexample

For each integer value @code{i} from 0 to 1, do the following. The integer
value in doubleword element @code{i} of a is multiplied by the integer value in
doubleword element @code{i} of b. The high-order 64 bits of the 128-bit product
are placed into doubleword element @code{i} of the vector returned.

@smallexample
@exdent vector unsigned long long
@exdent vec_mul (vector unsigned long long @var{a}, vector unsigned long long @var{b});
@exdent vector signed long long
@exdent vec_mul (vector signed long long @var{a}, vector signed long long @var{b});
@end smallexample

For each integer value @code{i} from 0 to 1, do the following. The integer
value in doubleword element @code{i} of a is multiplied by the integer value in
doubleword element @code{i} of b. The low-order 64 bits of the 128-bit product
are placed into doubleword element @code{i} of the vector returned.

@smallexample
@exdent vector signed int
@exdent vec_div (vector signed int @var{a}, vector signed int @var{b});
@exdent vector unsigned int
@exdent vec_div (vector unsigned int @var{a}, vector unsigned int @var{b});
@end smallexample

For each integer value @code{i} from 0 to 3, do the following. The integer in
word element @code{i} of a is divided by the integer in word element @code{i}
of b. The unique integer quotient is placed into the word element @code{i} of
the vector returned. If an attempt is made to perform any of the divisions
<anything> ÷ 0 then the quotient is undefined.

@smallexample
@exdent vector signed long long
@exdent vec_div (vector signed long long @var{a}, vector signed long long @var{b});
@exdent vector unsigned long long
@exdent vec_div (vector unsigned long long @var{a}, vector unsigned long long @var{b});
@end smallexample

For each integer value @code{i} from 0 to 1, do the following. The integer in
doubleword element @code{i} of a is divided by the integer in doubleword
element @code{i} of b. The unique integer quotient is placed into the
doubleword element @code{i} of the vector returned. If an attempt is made to
perform any of the divisions 0x8000_0000_0000_0000 ÷ -1 or <anything> ÷ 0 then
the quotient is undefined.

@smallexample
@exdent vector signed int
@exdent vec_dive (vector signed int @var{a}, vector signed int @var{b});
@exdent vector unsigned int
@exdent vec_dive (vector unsigned int @var{a}, vector unsigned int @var{b});
@end smallexample

For each integer value @code{i} from 0 to 3, do the following. The integer in
word element @code{i} of a is shifted left by 32 bits, then divided by the
integer in word element @code{i} of b. The unique integer quotient is placed
into the word element @code{i} of the vector returned. If the quotient cannot
be represented in 32 bits, or if an attempt is made to perform any of the
divisions <anything> ÷ 0 then the quotient is undefined.

@smallexample
@exdent vector signed long long
@exdent vec_dive (vector signed long long @var{a}, vector signed long long @var{b});
@exdent vector unsigned long long
@exdent vec_dive (vector unsigned long long @var{a}, vector unsigned long long @var{b});
@end smallexample

For each integer value @code{i} from 0 to 1, do the following. The integer in
doubleword element @code{i} of a is shifted left by 64 bits, then divided by
the integer in doubleword element @code{i} of b. The unique integer quotient is
placed into the doubleword element @code{i} of the vector returned. If the
quotient cannot be represented in 64 bits, or if an attempt is made to perform
<anything> ÷ 0 then the quotient is undefined.

@smallexample
@exdent vector signed int
@exdent vec_mod (vector signed int @var{a}, vector signed int @var{b});
@exdent vector unsigned int
@exdent vec_mod (vector unsigned int @var{a}, vector unsigned int @var{b});
@end smallexample

For each integer value @code{i} from 0 to 3, do the following. The integer in
word element @code{i} of a is divided by the integer in word element @code{i}
of b. The unique integer remainder is placed into the word element @code{i} of
the vector returned.  If an attempt is made to perform any of the divisions
0x8000_0000 ÷ -1 or <anything> ÷ 0 then the remainder is undefined.

@smallexample
@exdent vector signed long long
@exdent vec_mod (vector signed long long @var{a}, vector signed long long @var{b});
@exdent vector unsigned long long
@exdent vec_mod (vector unsigned long long @var{a}, vector unsigned long long @var{b});
@end smallexample

For each integer value @code{i} from 0 to 1, do the following. The integer in
doubleword element @code{i} of a is divided by the integer in doubleword
element @code{i} of b. The unique integer remainder is placed into the
doubleword element @code{i} of the vector returned. If an attempt is made to
perform <anything> ÷ 0 then the remainder is undefined.

Generate PCV from specified Mask size, as if implemented by the
@code{xxgenpcvbm}, @code{xxgenpcvhm}, @code{xxgenpcvwm} instructions, where
immediate value is either 0, 1, 2 or 3.
@findex vec_genpcvm

@smallexample
@exdent vector unsigned __int128 vec_rl (vector unsigned __int128 @var{A},
                                         vector unsigned __int128 @var{B});
@exdent vector signed __int128 vec_rl (vector signed __int128 @var{A},
                                       vector unsigned __int128 @var{B});
@end smallexample

Result value: Each element of @var{R} is obtained by rotating the corresponding element
of @var{A} left by the number of bits specified by the corresponding element of @var{B}.


@smallexample
@exdent vector unsigned __int128 vec_rlmi (vector unsigned __int128,
                                           vector unsigned __int128,
                                           vector unsigned __int128);
@exdent vector signed __int128 vec_rlmi (vector signed __int128,
                                         vector signed __int128,
                                         vector unsigned __int128);
@end smallexample

Returns the result of rotating the first input and inserting it under mask
into the second input.  The first bit in the mask, the last bit in the mask are
obtained from the two 7-bit fields bits [108:115] and bits [117:123]
respectively of the second input.  The shift is obtained from the third input
in the 7-bit field [125:131] where all bits counted from zero at the left.

@smallexample
@exdent vector unsigned __int128 vec_rlnm (vector unsigned __int128,
                                           vector unsigned __int128,
                                           vector unsigned __int128);
@exdent vector signed __int128 vec_rlnm (vector signed __int128,
                                         vector unsigned __int128,
                                         vector unsigned __int128);
@end smallexample

Returns the result of rotating the first input and ANDing it with a mask.  The
first bit in the mask and the last bit in the mask are obtained from the two
7-bit fields bits [117:123] and bits [125:131] respectively of the second
input.  The shift is obtained from the third input in the 7-bit field bits
[125:131] where all bits counted from zero at the left.

@smallexample
@exdent vector unsigned __int128 vec_sl(vector unsigned __int128 @var{A}, vector unsigned __int128 @var{B});
@exdent vector signed __int128 vec_sl(vector signed __int128 @var{A}, vector unsigned __int128 @var{B});
@end smallexample

Result value: Each element of @var{R} is obtained by shifting the corresponding element of
@var{A} left by the number of bits specified by the corresponding element of @var{B}.

@smallexample
@exdent vector unsigned __int128 vec_sr(vector unsigned __int128 @var{A}, vector unsigned __int128 @var{B});
@exdent vector signed __int128 vec_sr(vector signed __int128 @var{A}, vector unsigned __int128 @var{B});
@end smallexample

Result value: Each element of @var{R} is obtained by shifting the corresponding element of
@var{A} right by the number of bits specified by the corresponding element of @var{B}.

@smallexample
@exdent vector unsigned __int128 vec_sra(vector unsigned __int128 @var{A}, vector unsigned __int128 @var{B});
@exdent vector signed __int128 vec_sra(vector signed __int128 @var{A}, vector unsigned __int128 @var{B});
@end smallexample

Result value: Each element of @var{R} is obtained by arithmetic shifting the corresponding
element of @var{A} right by the number of bits specified by the corresponding element of @var{B}.

@smallexample
@exdent vector unsigned __int128 vec_mule (vector unsigned long long,
                                           vector unsigned long long);
@exdent vector signed __int128 vec_mule (vector signed long long,
                                         vector signed long long);
@end smallexample

Returns a vector containing a 128-bit integer result of multiplying the even
doubleword elements of the two inputs.

@smallexample
@exdent vector unsigned __int128 vec_mulo (vector unsigned long long,
                                           vector unsigned long long);
@exdent vector signed __int128 vec_mulo (vector signed long long,
                                         vector signed long long);
@end smallexample

Returns a vector containing a 128-bit integer result of multiplying the odd
doubleword elements of the two inputs.

@smallexample
@exdent vector unsigned __int128 vec_div (vector unsigned __int128,
                                          vector unsigned __int128);
@exdent vector signed __int128 vec_div (vector signed __int128,
                                        vector signed __int128);
@end smallexample

Returns the result of dividing the first operand by the second operand. An
attempt to divide any value by zero or to divide the most negative signed
128-bit integer by negative one results in an undefined value.

@smallexample
@exdent vector unsigned __int128 vec_dive (vector unsigned __int128,
                                           vector unsigned __int128);
@exdent vector signed __int128 vec_dive (vector signed __int128,
                                         vector signed __int128);
@end smallexample

The result is produced by shifting the first input left by 128 bits and
dividing by the second.  If an attempt is made to divide by zero or the result
is larger than 128 bits, the result is undefined.

@smallexample
@exdent vector unsigned __int128 vec_mod (vector unsigned __int128,
                                          vector unsigned __int128);
@exdent vector signed __int128 vec_mod (vector signed __int128,
                                        vector signed __int128);
@end smallexample

The result is the modulo result of dividing the first input  by the second
input.

The following builtins perform 128-bit vector comparisons.  The
@code{vec_all_xx}, @code{vec_any_xx}, and @code{vec_cmpxx}, where @code{xx} is
one of the operations @code{eq, ne, gt, lt, ge, le} perform pairwise
comparisons between the elements at the same positions within their two vector
arguments.  The @code{vec_all_xx}function returns a non-zero value if and only
if all pairwise comparisons are true.  The @code{vec_any_xx} function returns
a non-zero value if and only if at least one pairwise comparison is true.  The
@code{vec_cmpxx}function returns a vector of the same type as its two
arguments, within which each element consists of all ones to denote that
specified logical comparison of the corresponding elements was true.
Otherwise, the element of the returned vector contains all zeros.

@smallexample
vector bool __int128 vec_cmpeq (vector signed __int128, vector signed __int128);
vector bool __int128 vec_cmpeq (vector unsigned __int128, vector unsigned __int128);
vector bool __int128 vec_cmpne (vector signed __int128, vector signed __int128);
vector bool __int128 vec_cmpne (vector unsigned __int128, vector unsigned __int128);
vector bool __int128 vec_cmpgt (vector signed __int128, vector signed __int128);
vector bool __int128 vec_cmpgt (vector unsigned __int128, vector unsigned __int128);
vector bool __int128 vec_cmplt (vector signed __int128, vector signed __int128);
vector bool __int128 vec_cmplt (vector unsigned __int128, vector unsigned __int128);
vector bool __int128 vec_cmpge (vector signed __int128, vector signed __int128);
vector bool __int128 vec_cmpge (vector unsigned __int128, vector unsigned __int128);
vector bool __int128 vec_cmple (vector signed __int128, vector signed __int128);
vector bool __int128 vec_cmple (vector unsigned __int128, vector unsigned __int128);

int vec_all_eq (vector signed __int128, vector signed __int128);
int vec_all_eq (vector unsigned __int128, vector unsigned __int128);
int vec_all_ne (vector signed __int128, vector signed __int128);
int vec_all_ne (vector unsigned __int128, vector unsigned __int128);
int vec_all_gt (vector signed __int128, vector signed __int128);
int vec_all_gt (vector unsigned __int128, vector unsigned __int128);
int vec_all_lt (vector signed __int128, vector signed __int128);
int vec_all_lt (vector unsigned __int128, vector unsigned __int128);
int vec_all_ge (vector signed __int128, vector signed __int128);
int vec_all_ge (vector unsigned __int128, vector unsigned __int128);
int vec_all_le (vector signed __int128, vector signed __int128);
int vec_all_le (vector unsigned __int128, vector unsigned __int128);

int vec_any_eq (vector signed __int128, vector signed __int128);
int vec_any_eq (vector unsigned __int128, vector unsigned __int128);
int vec_any_ne (vector signed __int128, vector signed __int128);
int vec_any_ne (vector unsigned __int128, vector unsigned __int128);
int vec_any_gt (vector signed __int128, vector signed __int128);
int vec_any_gt (vector unsigned __int128, vector unsigned __int128);
int vec_any_lt (vector signed __int128, vector signed __int128);
int vec_any_lt (vector unsigned __int128, vector unsigned __int128);
int vec_any_ge (vector signed __int128, vector signed __int128);
int vec_any_ge (vector unsigned __int128, vector unsigned __int128);
int vec_any_le (vector signed __int128, vector signed __int128);
int vec_any_le (vector unsigned __int128, vector unsigned __int128);
@end smallexample


@node PowerPC Hardware Transactional Memory Built-in Functions
@subsection PowerPC Hardware Transactional Memory Built-in Functions
GCC provides two interfaces for accessing the Hardware Transactional
Memory (HTM) instructions available on some of the PowerPC family
of processors (eg, POWER8).  The two interfaces come in a low level
interface, consisting of built-in functions specific to PowerPC and a
higher level interface consisting of inline functions that are common
between PowerPC and S/390.

@subsubsection PowerPC HTM Low Level Built-in Functions

The following low level built-in functions are available with
@option{-mhtm} or @option{-mcpu=CPU} where CPU is `power8' or later.
They all generate the machine instruction that is part of the name.

The HTM builtins (with the exception of @code{__builtin_tbegin}) return
the full 4-bit condition register value set by their associated hardware
instruction.  The header file @code{htmintrin.h} defines some macros that can
be used to decipher the return value.  The @code{__builtin_tbegin} builtin
returns a simple @code{true} or @code{false} value depending on whether a transaction was
successfully started or not.  The arguments of the builtins match exactly the
type and order of the associated hardware instruction's operands, except for
the @code{__builtin_tcheck} builtin, which does not take any input arguments.
Refer to the ISA manual for a description of each instruction's operands.

@smallexample
unsigned int __builtin_tbegin (unsigned int);
unsigned int __builtin_tend (unsigned int);

unsigned int __builtin_tabort (unsigned int);
unsigned int __builtin_tabortdc (unsigned int, unsigned int, unsigned int);
unsigned int __builtin_tabortdci (unsigned int, unsigned int, int);
unsigned int __builtin_tabortwc (unsigned int, unsigned int, unsigned int);
unsigned int __builtin_tabortwci (unsigned int, unsigned int, int);

unsigned int __builtin_tcheck (void);
unsigned int __builtin_treclaim (unsigned int);
unsigned int __builtin_trechkpt (void);
unsigned int __builtin_tsr (unsigned int);
@end smallexample

In addition to the above HTM built-ins, we have added built-ins for
some common extended mnemonics of the HTM instructions:

@smallexample
unsigned int __builtin_tendall (void);
unsigned int __builtin_tresume (void);
unsigned int __builtin_tsuspend (void);
@end smallexample

Note that the semantics of the above HTM builtins are required to mimic
the locking semantics used for critical sections.  Builtins that are used
to create a new transaction or restart a suspended transaction must have
lock acquisition like semantics while those builtins that end or suspend a
transaction must have lock release like semantics.  Specifically, this must
mimic lock semantics as specified by C++11, for example: Lock acquisition is
as-if an execution of __atomic_exchange_n(&globallock,1,__ATOMIC_ACQUIRE)
that returns 0, and lock release is as-if an execution of
__atomic_store(&globallock,0,__ATOMIC_RELEASE), with globallock being an
implicit implementation-defined lock used for all transactions.  The HTM
instructions associated with with the builtins inherently provide the
correct acquisition and release hardware barriers required.  However,
the compiler must also be prohibited from moving loads and stores across
the builtins in a way that would violate their semantics.  This has been
accomplished by adding memory barriers to the associated HTM instructions
(which is a conservative approach to provide acquire and release semantics).
Earlier versions of the compiler did not treat the HTM instructions as
memory barriers.  A @code{__TM_FENCE__} macro has been added, which can
be used to determine whether the current compiler treats HTM instructions
as memory barriers or not.  This allows the user to explicitly add memory
barriers to their code when using an older version of the compiler.

The following set of built-in functions are available to gain access
to the HTM specific special purpose registers.

@smallexample
unsigned long __builtin_get_texasr (void);
unsigned long __builtin_get_texasru (void);
unsigned long __builtin_get_tfhar (void);
unsigned long __builtin_get_tfiar (void);

void __builtin_set_texasr (unsigned long);
void __builtin_set_texasru (unsigned long);
void __builtin_set_tfhar (unsigned long);
void __builtin_set_tfiar (unsigned long);
@end smallexample

Example usage of these low level built-in functions may look like:

@smallexample
#include <htmintrin.h>

int num_retries = 10;

while (1)
  @{
    if (__builtin_tbegin (0))
      @{
        /* Transaction State Initiated.  */
        if (is_locked (lock))
          __builtin_tabort (0);
        ... transaction code...
        __builtin_tend (0);
        break;
      @}
    else
      @{
        /* Transaction State Failed.  Use locks if the transaction
           failure is "persistent" or we've tried too many times.  */
        if (num_retries-- <= 0
            || _TEXASRU_FAILURE_PERSISTENT (__builtin_get_texasru ()))
          @{
            acquire_lock (lock);
            ... non transactional fallback path...
            release_lock (lock);
            break;
          @}
      @}
  @}
@end smallexample

One final built-in function has been added that returns the value of
the 2-bit Transaction State field of the Machine Status Register (MSR)
as stored in @code{CR0}.

@smallexample
unsigned long __builtin_ttest (void)
@end smallexample

This built-in can be used to determine the current transaction state
using the following code example:

@smallexample
#include <htmintrin.h>

unsigned char tx_state = _HTM_STATE (__builtin_ttest ());

if (tx_state == _HTM_TRANSACTIONAL)
  @{
    /* Code to use in transactional state.  */
  @}
else if (tx_state == _HTM_NONTRANSACTIONAL)
  @{
    /* Code to use in non-transactional state.  */
  @}
else if (tx_state == _HTM_SUSPENDED)
  @{
    /* Code to use in transaction suspended state.  */
  @}
@end smallexample

@subsubsection PowerPC HTM High Level Inline Functions

The following high level HTM interface is made available by including
@code{<htmxlintrin.h>} and using @option{-mhtm} or @option{-mcpu=CPU}
where CPU is `power8' or later.  This interface is common between PowerPC
and S/390, allowing users to write one HTM source implementation that
can be compiled and executed on either system.

@smallexample
long __TM_simple_begin (void);
long __TM_begin (void* const TM_buff);
long __TM_end (void);
void __TM_abort (void);
void __TM_named_abort (unsigned char const code);
void __TM_resume (void);
void __TM_suspend (void);

long __TM_is_user_abort (void* const TM_buff);
long __TM_is_named_user_abort (void* const TM_buff, unsigned char *code);
long __TM_is_illegal (void* const TM_buff);
long __TM_is_footprint_exceeded (void* const TM_buff);
long __TM_nesting_depth (void* const TM_buff);
long __TM_is_nested_too_deep(void* const TM_buff);
long __TM_is_conflict(void* const TM_buff);
long __TM_is_failure_persistent(void* const TM_buff);
long __TM_failure_address(void* const TM_buff);
long long __TM_failure_code(void* const TM_buff);
@end smallexample

Using these common set of HTM inline functions, we can create
a more portable version of the HTM example in the previous
section that will work on either PowerPC or S/390:

@smallexample
#include <htmxlintrin.h>

int num_retries = 10;
TM_buff_type TM_buff;

while (1)
  @{
    if (__TM_begin (TM_buff) == _HTM_TBEGIN_STARTED)
      @{
        /* Transaction State Initiated.  */
        if (is_locked (lock))
          __TM_abort ();
        ... transaction code...
        __TM_end ();
        break;
      @}
    else
      @{
        /* Transaction State Failed.  Use locks if the transaction
           failure is "persistent" or we've tried too many times.  */
        if (num_retries-- <= 0
            || __TM_is_failure_persistent (TM_buff))
          @{
            acquire_lock (lock);
            ... non transactional fallback path...
            release_lock (lock);
            break;
          @}
      @}
  @}
@end smallexample

@node PowerPC Atomic Memory Operation Functions
@subsection PowerPC Atomic Memory Operation Functions
ISA 3.0 of the PowerPC added new atomic memory operation (amo)
instructions.  GCC provides support for these instructions in 64-bit
environments.  All of the functions are declared in the include file
@code{amo.h}.

The functions supported are:

@smallexample
#include <amo.h>

uint32_t amo_lwat_add (uint32_t *, uint32_t);
uint32_t amo_lwat_xor (uint32_t *, uint32_t);
uint32_t amo_lwat_ior (uint32_t *, uint32_t);
uint32_t amo_lwat_and (uint32_t *, uint32_t);
uint32_t amo_lwat_umax (uint32_t *, uint32_t);
uint32_t amo_lwat_umin (uint32_t *, uint32_t);
uint32_t amo_lwat_swap (uint32_t *, uint32_t);

int32_t amo_lwat_sadd (int32_t *, int32_t);
int32_t amo_lwat_smax (int32_t *, int32_t);
int32_t amo_lwat_smin (int32_t *, int32_t);
int32_t amo_lwat_sswap (int32_t *, int32_t);

uint64_t amo_ldat_add (uint64_t *, uint64_t);
uint64_t amo_ldat_xor (uint64_t *, uint64_t);
uint64_t amo_ldat_ior (uint64_t *, uint64_t);
uint64_t amo_ldat_and (uint64_t *, uint64_t);
uint64_t amo_ldat_umax (uint64_t *, uint64_t);
uint64_t amo_ldat_umin (uint64_t *, uint64_t);
uint64_t amo_ldat_swap (uint64_t *, uint64_t);

int64_t amo_ldat_sadd (int64_t *, int64_t);
int64_t amo_ldat_smax (int64_t *, int64_t);
int64_t amo_ldat_smin (int64_t *, int64_t);
int64_t amo_ldat_sswap (int64_t *, int64_t);

void amo_stwat_add (uint32_t *, uint32_t);
void amo_stwat_xor (uint32_t *, uint32_t);
void amo_stwat_ior (uint32_t *, uint32_t);
void amo_stwat_and (uint32_t *, uint32_t);
void amo_stwat_umax (uint32_t *, uint32_t);
void amo_stwat_umin (uint32_t *, uint32_t);

void amo_stwat_sadd (int32_t *, int32_t);
void amo_stwat_smax (int32_t *, int32_t);
void amo_stwat_smin (int32_t *, int32_t);

void amo_stdat_add (uint64_t *, uint64_t);
void amo_stdat_xor (uint64_t *, uint64_t);
void amo_stdat_ior (uint64_t *, uint64_t);
void amo_stdat_and (uint64_t *, uint64_t);
void amo_stdat_umax (uint64_t *, uint64_t);
void amo_stdat_umin (uint64_t *, uint64_t);

void amo_stdat_sadd (int64_t *, int64_t);
void amo_stdat_smax (int64_t *, int64_t);
void amo_stdat_smin (int64_t *, int64_t);
@end smallexample

@node PowerPC Matrix-Multiply Assist Built-in Functions
@subsection PowerPC Matrix-Multiply Assist Built-in Functions
ISA 3.1 of the PowerPC added new Matrix-Multiply Assist (MMA) instructions.
GCC provides support for these instructions through the following built-in
functions which are enabled with the @code{-mmma} option.  The vec_t type
below is defined to be a normal vector unsigned char type.  The uint2, uint4
and uint8 parameters are 2-bit, 4-bit and 8-bit unsigned integer constants
respectively.  The compiler will verify that they are constants and that
their values are within range.

The built-in functions supported are:

@smallexample
void __builtin_mma_xvi4ger8 (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvi8ger4 (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvi16ger2 (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvi16ger2s (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvf16ger2 (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvbf16ger2 (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvf32ger (__vector_quad *, vec_t, vec_t);

void __builtin_mma_xvi4ger8pp (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvi8ger4pp (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvi8ger4spp(__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvi16ger2pp (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvi16ger2spp (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvf16ger2pp (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvf16ger2pn (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvf16ger2np (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvf16ger2nn (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvbf16ger2pp (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvbf16ger2pn (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvbf16ger2np (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvbf16ger2nn (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvf32gerpp (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvf32gerpn (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvf32gernp (__vector_quad *, vec_t, vec_t);
void __builtin_mma_xvf32gernn (__vector_quad *, vec_t, vec_t);

void __builtin_mma_pmxvi4ger8 (__vector_quad *, vec_t, vec_t, uint4, uint4, uint8);
void __builtin_mma_pmxvi4ger8pp (__vector_quad *, vec_t, vec_t, uint4, uint4, uint8);

void __builtin_mma_pmxvi8ger4 (__vector_quad *, vec_t, vec_t, uint4, uint4, uint4);
void __builtin_mma_pmxvi8ger4pp (__vector_quad *, vec_t, vec_t, uint4, uint4, uint4);
void __builtin_mma_pmxvi8ger4spp(__vector_quad *, vec_t, vec_t, uint4, uint4, uint4);

void __builtin_mma_pmxvi16ger2 (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);
void __builtin_mma_pmxvi16ger2s (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);
void __builtin_mma_pmxvf16ger2 (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);
void __builtin_mma_pmxvbf16ger2 (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);

void __builtin_mma_pmxvi16ger2pp (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);
void __builtin_mma_pmxvi16ger2spp (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);
void __builtin_mma_pmxvf16ger2pp (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);
void __builtin_mma_pmxvf16ger2pn (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);
void __builtin_mma_pmxvf16ger2np (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);
void __builtin_mma_pmxvf16ger2nn (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);
void __builtin_mma_pmxvbf16ger2pp (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);
void __builtin_mma_pmxvbf16ger2pn (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);
void __builtin_mma_pmxvbf16ger2np (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);
void __builtin_mma_pmxvbf16ger2nn (__vector_quad *, vec_t, vec_t, uint4, uint4, uint2);

void __builtin_mma_pmxvf32ger (__vector_quad *, vec_t, vec_t, uint4, uint4);
void __builtin_mma_pmxvf32gerpp (__vector_quad *, vec_t, vec_t, uint4, uint4);
void __builtin_mma_pmxvf32gerpn (__vector_quad *, vec_t, vec_t, uint4, uint4);
void __builtin_mma_pmxvf32gernp (__vector_quad *, vec_t, vec_t, uint4, uint4);
void __builtin_mma_pmxvf32gernn (__vector_quad *, vec_t, vec_t, uint4, uint4);

void __builtin_mma_xvf64ger (__vector_quad *, __vector_pair, vec_t);
void __builtin_mma_xvf64gerpp (__vector_quad *, __vector_pair, vec_t);
void __builtin_mma_xvf64gerpn (__vector_quad *, __vector_pair, vec_t);
void __builtin_mma_xvf64gernp (__vector_quad *, __vector_pair, vec_t);
void __builtin_mma_xvf64gernn (__vector_quad *, __vector_pair, vec_t);

void __builtin_mma_pmxvf64ger (__vector_quad *, __vector_pair, vec_t, uint4, uint2);
void __builtin_mma_pmxvf64gerpp (__vector_quad *, __vector_pair, vec_t, uint4, uint2);
void __builtin_mma_pmxvf64gerpn (__vector_quad *, __vector_pair, vec_t, uint4, uint2);
void __builtin_mma_pmxvf64gernp (__vector_quad *, __vector_pair, vec_t, uint4, uint2);
void __builtin_mma_pmxvf64gernn (__vector_quad *, __vector_pair, vec_t, uint4, uint2);

void __builtin_mma_xxmtacc (__vector_quad *);
void __builtin_mma_xxmfacc (__vector_quad *);
void __builtin_mma_xxsetaccz (__vector_quad *);

void __builtin_mma_build_acc (__vector_quad *, vec_t, vec_t, vec_t, vec_t);
void __builtin_mma_disassemble_acc (void *, __vector_quad *);

void __builtin_vsx_build_pair (__vector_pair *, vec_t, vec_t);
void __builtin_vsx_disassemble_pair (void *, __vector_pair *);

vec_t __builtin_vsx_xvcvspbf16 (vec_t);
vec_t __builtin_vsx_xvcvbf16spn (vec_t);

__vector_pair __builtin_vsx_lxvp (size_t, __vector_pair *);
void __builtin_vsx_stxvp (__vector_pair, size_t, __vector_pair *);
@end smallexample

@node PRU Built-in Functions
@subsection PRU Built-in Functions

GCC provides a couple of special builtin functions to aid in utilizing
special PRU instructions.

The built-in functions supported are:

@defbuiltin{void __delay_cycles (constant long long @var{cycles})}
This inserts an instruction sequence that takes exactly @var{cycles}
cycles (between 0 and 0xffffffff) to complete.  The inserted sequence
may use jumps, loops, or no-ops, and does not interfere with any other
instructions.  Note that @var{cycles} must be a compile-time constant
integer - that is, you must pass a number, not a variable that may be
optimized to a constant later.  The number of cycles delayed by this
builtin is exact.
@enddefbuiltin

@defbuiltin{void __halt (void)}
This inserts a HALT instruction to stop processor execution.
@enddefbuiltin

@defbuiltin{{unsigned int} @
            __lmbd (unsigned int @var{wordval}, @
                    unsigned int @var{bitval})}
This inserts LMBD instruction to calculate the left-most bit with value
@var{bitval} in value @var{wordval}.  Only the least significant bit
of @var{bitval} is taken into account.
@enddefbuiltin

@node RISC-V Built-in Functions
@subsection RISC-V Built-in Functions

These built-in functions are available for the RISC-V family of
processors.

@defbuiltin{{void *} __builtin_thread_pointer (void)}
Returns the value that is currently set in the @samp{tp} register.
@enddefbuiltin

@defbuiltin{void __builtin_riscv_pause (void)}
Generates the @code{pause} (hint) machine instruction.  If the target implements
the Zihintpause extension, it indicates that the current hart should be
temporarily paused or slowed down.
@enddefbuiltin

@node RISC-V Vector Intrinsics
@subsection RISC-V Vector Intrinsics

GCC supports vector intrinsics as specified in version 0.11 of the RISC-V
vector intrinsic specification, which is available at the following link:
@uref{https://github.com/riscv-non-isa/rvv-intrinsic-doc/tree/v0.11.x}.
All of these functions are declared in the include file @file{riscv_vector.h}.

@node CORE-V Built-in Functions
@subsection CORE-V Built-in Functions
For more information on all CORE-V built-ins, please see
@uref{https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md}

These built-in functions are available for the CORE-V MAC machine
architecture. For more information on CORE-V built-ins, please see
@uref{https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md#listing-of-multiply-accumulate-builtins-xcvmac}.

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_mac_mac (int32_t, int32_t, int32_t)
Generated assembler @code{cv.mac}
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_mac_msu (int32_t, int32_t, int32_t)
Generates the @code{cv.msu} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_mac_muluN (uint32_t, uint32_t, uint8_t)
Generates the @code{cv.muluN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_mac_mulhhuN (uint32_t, uint32_t, uint8_t)
Generates the @code{cv.mulhhuN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_mac_mulsN (int32_t, int32_t, uint8_t)
Generates the @code{cv.mulsN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_mac_mulhhsN (int32_t, int32_t, uint8_t)
Generates the @code{cv.mulhhsN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_mac_muluRN (uint32_t, uint32_t, uint8_t)
Generates the @code{cv.muluRN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_mac_mulhhuRN (uint32_t, uint32_t, uint8_t)
Generates the @code{cv.mulhhuRN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_mac_mulsRN (int32_t, int32_t, uint8_t)
Generates the @code{cv.mulsRN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_mac_mulhhsRN (int32_t, int32_t, uint8_t)
Generates the @code{cv.mulhhsRN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_mac_macuN (uint32_t, uint32_t, uint8_t)
Generates the @code{cv.macuN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_mac_machhuN (uint32_t, uint32_t, uint8_t)
Generates the @code{cv.machhuN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_mac_macsN (int32_t, int32_t, uint8_t)
Generates the @code{cv.macsN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_mac_machhsN (int32_t, int32_t, uint8_t)
Generates the @code{cv.machhsN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_mac_macuRN (uint32_t, uint32_t, uint8_t)
Generates the @code{cv.macuRN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_mac_machhuRN (uint32_t, uint32_t, uint8_t)
Generates the @code{cv.machhuRN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_mac_macsRN (int32_t, int32_t, uint8_t)
Generates the @code{cv.macsRN} machine instruction.
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_mac_machhsRN (int32_t, int32_t, uint8_t)
Generates the @code{cv.machhsRN} machine instruction.
@end deftypefn

These built-in functions are available for the CORE-V ALU machine
architecture. For more information on CORE-V built-ins, please see
@uref{https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md#listing-of-miscellaneous-alu-builtins-xcvalu}

@deftypefn {Built-in Function} {int} __builtin_riscv_cv_alu_slet (int32_t, int32_t)
Generated assembler @code{cv.slet}
@end deftypefn

@deftypefn {Built-in Function} {int} __builtin_riscv_cv_alu_sletu (uint32_t, uint32_t)
Generated assembler @code{cv.sletu}
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_alu_min (int32_t, int32_t)
Generated assembler @code{cv.min}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_alu_minu (uint32_t, uint32_t)
Generated assembler @code{cv.minu}
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_alu_max (int32_t, int32_t)
Generated assembler @code{cv.max}
@end deftypefn

@deftypefn {Built-in Function} {uint32_tnt} __builtin_riscv_cv_alu_maxu (uint32_t, uint32_t)
Generated assembler @code{cv.maxu}
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_alu_exths (int16_t)
Generated assembler @code{cv.exths}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_alu_exthz (uint16_t)
Generated assembler @code{cv.exthz}
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_alu_extbs (int8_t)
Generated assembler @code{cv.extbs}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_alu_extbz (uint8_t)
Generated assembler @code{cv.extbz}
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_alu_clip (int32_t, uint32_t)
Generated assembler @code{cv.clip} if the uint32_t operand is a constant and an exact power of 2.
Generated assembler @code{cv.clipr} if  the it is a register.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_alu_clipu (uint32_t, uint32_t)
Generated assembler @code{cv.clipu} if the uint32_t operand is a constant and an exact power of 2.
Generated assembler @code{cv.clipur} if  the it is a register.
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_alu_addN (int32_t, int32_t, uint8_t)
Generated assembler @code{cv.addN} if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler @code{cv.addNr} if  the it is a register.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_alu_adduN (uint32_t, uint32_t, uint8_t)
Generated assembler @code{cv.adduN} if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler @code{cv.adduNr} if  the it is a register.
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_alu_addRN (int32_t, int32_t, uint8_t)
Generated assembler @code{cv.addRN} if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler @code{cv.addRNr} if  the it is a register.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_alu_adduRN (uint32_t, uint32_t, uint8_t)
Generated assembler @code{cv.adduRN} if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler @code{cv.adduRNr} if  the it is a register.
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_alu_subN (int32_t, int32_t, uint8_t)
Generated assembler @code{cv.subN} if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler @code{cv.subNr} if  the it is a register.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_alu_subuN (uint32_t, uint32_t, uint8_t)
Generated assembler @code{cv.subuN} if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler @code{cv.subuNr} if  the it is a register.
@end deftypefn

@deftypefn {Built-in Function} {int32_t} __builtin_riscv_cv_alu_subRN (int32_t, int32_t, uint8_t)
Generated assembler @code{cv.subRN} if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler @code{cv.subRNr} if  the it is a register.
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_alu_subuRN (uint32_t, uint32_t, uint8_t)
Generated assembler @code{cv.subuRN} if the uint8_t operand is a constant and in the range 0 <= shft <= 31.
Generated assembler @code{cv.subuRNr} if  the it is a register.
@end deftypefn

These built-in functions are available for the CORE-V Event Load machine
architecture. For more information on CORE-V ELW builtins, please see
@uref{https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md#listing-of-event-load-word-builtins-xcvelw}

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_elw_elw (uint32_t *)
Generated assembler @code{cv.elw}
@end deftypefn

These built-in functions are available for the CORE-V SIMD machine
architecture. For more information on CORE-V SIMD built-ins, please see
@uref{https://github.com/openhwgroup/core-v-sw/blob/master/specifications/corev-builtin-spec.md#listing-of-pulp-816-bit-simd-builtins-xcvsimd}

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_add_h (uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.add.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_add_b (uint32_t, uint32_t)
Generated assembler @code{cv.add.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_add_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.add.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_add_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.add.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_add_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.add.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_add_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.add.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sub_h (uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.sub.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sub_b (uint32_t, uint32_t)
Generated assembler @code{cv.sub.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sub_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.sub.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sub_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.sub.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sub_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.sub.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sub_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.sub.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_avg_h (uint32_t, uint32_t)
Generated assembler @code{cv.avg.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_avg_b (uint32_t, uint32_t)
Generated assembler @code{cv.avg.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_avg_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.avg.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_avg_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.avg.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_avg_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.avg.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_avg_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.avg.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_avgu_h (uint32_t, uint32_t)
Generated assembler @code{cv.avgu.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_avgu_b (uint32_t, uint32_t)
Generated assembler @code{cv.avgu.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_avgu_sc_h (uint32_t, uint16_t)
Generated assembler @code{cv.avgu.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_avgu_sc_h (uint32_t, uint6_t)
Generated assembler @code{cv.avgu.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_avgu_sc_b (uint32_t, uint8_t)
Generated assembler @code{cv.avgu.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_avgu_sc_b (uint32_t, uint6_t)
Generated assembler @code{cv.avgu.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_min_h (uint32_t, uint32_t)
Generated assembler @code{cv.min.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_min_b (uint32_t, uint32_t)
Generated assembler @code{cv.min.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_min_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.min.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_min_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.min.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_min_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.min.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_min_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.min.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_minu_h (uint32_t, uint32_t)
Generated assembler @code{cv.minu.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_minu_b (uint32_t, uint32_t)
Generated assembler @code{cv.minu.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_minu_sc_h (uint32_t, uint16_t)
Generated assembler @code{cv.minu.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_minu_sc_h (uint32_t, uint6_t)
Generated assembler @code{cv.minu.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_minu_sc_b (uint32_t, uint8_t)
Generated assembler @code{cv.minu.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_minu_sc_b (uint32_t, uint6_t)
Generated assembler @code{cv.minu.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_max_h (uint32_t, uint32_t)
Generated assembler @code{cv.max.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_max_b (uint32_t, uint32_t)
Generated assembler @code{cv.max.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_max_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.max.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_max_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.max.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_max_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.max.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_max_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.max.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_maxu_h (uint32_t, uint32_t)
Generated assembler @code{cv.maxu.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_maxu_b (uint32_t, uint32_t)
Generated assembler @code{cv.maxu.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_maxu_sc_h (uint32_t, uint16_t)
Generated assembler @code{cv.maxu.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_maxu_sc_h (uint32_t, uint6_t)
Generated assembler @code{cv.maxu.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_maxu_sc_b (uint32_t, uint8_t)
Generated assembler @code{cv.maxu.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_maxu_sc_b (uint32_t, uint6_t)
Generated assembler @code{cv.maxu.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_srl_h (uint32_t, uint32_t)
Generated assembler @code{cv.srl.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_srl_b (uint32_t, uint32_t)
Generated assembler @code{cv.srl.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_srl_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.srl.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_srl_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.srl.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_srl_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.srl.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_srl_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.srl.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sra_h (uint32_t, uint32_t)
Generated assembler @code{cv.sra.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sra_b (uint32_t, uint32_t)
Generated assembler @code{cv.sra.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sra_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.sra.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sra_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.sra.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sra_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.sra.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sra_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.sra.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sll_h (uint32_t, uint32_t)
Generated assembler @code{cv.sll.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sll_b (uint32_t, uint32_t)
Generated assembler @code{cv.sll.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sll_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.sll.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sll_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.sll.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sll_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.sll.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sll_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.sll.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_or_h (uint32_t, uint32_t)
Generated assembler @code{cv.or.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_or_b (uint32_t, uint32_t)
Generated assembler @code{cv.or.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_or_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.or.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_or_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.or.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_or_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.or.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_or_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.or.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_xor_h (uint32_t, uint32_t)
Generated assembler @code{cv.xor.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_xor_b (uint32_t, uint32_t)
Generated assembler @code{cv.xor.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_xor_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.xor.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_xor_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.xor.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_xor_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.xor.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_xor_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.xor.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_and_h (uint32_t, uint32_t)
Generated assembler @code{cv.and.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_and_b (uint32_t, uint32_t)
Generated assembler @code{cv.and.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_and_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.and.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_and_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.and.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_and_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.and.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_and_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.and.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_abs_h (uint32_t)
Generated assembler @code{cv.abs.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_abs_b (uint32_t)
Generated assembler @code{cv.abs.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotup_h (uint32_t, uint32_t)
Generated assembler @code{cv.dotup.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotup_b (uint32_t, uint32_t)
Generated assembler @code{cv.dotup.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotup_sc_h (uint32_t, uint16_t)
Generated assembler @code{cv.dotup.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotup_sc_h (uint32_t, uint6_t)
Generated assembler @code{cv.dotup.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotup_sc_b (uint32_t, uint8_t)
Generated assembler @code{cv.dotup.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotup_sc_b (uint32_t, uint6_t)
Generated assembler @code{cv.dotup.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotusp_h (uint32_t, uint32_t)
Generated assembler @code{cv.dotusp.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotusp_b (uint32_t, uint32_t)
Generated assembler @code{cv.dotusp.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotusp_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.dotusp.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotusp_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.dotusp.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotusp_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.dotusp.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotusp_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.dotusp.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotsp_h (uint32_t, uint32_t)
Generated assembler @code{cv.dotsp.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotsp_b (uint32_t, uint32_t)
Generated assembler @code{cv.dotsp.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotsp_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.dotsp.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotsp_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.dotsp.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotsp_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.dotsp.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_dotsp_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.dotsp.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotup_h (uint32_t, uint32_t, uint32_t)
Generated assembler @code{cv.sdotup.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotup_b (uint32_t, uint32_t, uint32_t)
Generated assembler @code{cv.sdotup.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotup_sc_h (uint32_t, uint16_t, uint32_t)
Generated assembler @code{cv.sdotup.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotup_sc_h (uint32_t, uint6_t, uint32_t)
Generated assembler @code{cv.sdotup.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotup_sc_b (uint32_t, uint8_t, uint32_t)
Generated assembler @code{cv.sdotup.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotup_sc_b (uint32_t, uint6_t, uint32_t)
Generated assembler @code{cv.sdotup.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotusp_h (uint32_t, uint32_t, uint32_t)
Generated assembler @code{cv.sdotusp.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotusp_b (uint32_t, uint32_t, uint32_t)
Generated assembler @code{cv.sdotusp.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotusp_sc_h (uint32_t, int16_t, uint32_t)
Generated assembler @code{cv.sdotusp.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotusp_sc_h (uint32_t, int6_t, uint32_t)
Generated assembler @code{cv.sdotusp.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotusp_sc_b (uint32_t, int8_t, uint32_t)
Generated assembler @code{cv.sdotusp.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotusp_sc_b (uint32_t, int6_t, uint32_t)
Generated assembler @code{cv.sdotusp.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotsp_h (uint32_t, uint32_t, uint32_t)
Generated assembler @code{cv.sdotsp.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotsp_b (uint32_t, uint32_t, uint32_t)
Generated assembler @code{cv.sdotsp.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotsp_sc_h (uint32_t, int16_t, uint32_t)
Generated assembler @code{cv.sdotsp.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotsp_sc_h (uint32_t, int6_t, uint32_t)
Generated assembler @code{cv.sdotsp.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotsp_sc_b (uint32_t, int8_t, uint32_t)
Generated assembler @code{cv.sdotsp.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sdotsp_sc_b (uint32_t, int6_t, uint32_t)
Generated assembler @code{cv.sdotsp.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_extract_h (uint32_t, uint6_t)
Generated assembler @code{cv.extract.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_extract_b (uint32_t, uint6_t)
Generated assembler @code{cv.extract.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_extractu_h (uint32_t, uint6_t)
Generated assembler @code{cv.extractu.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_extractu_b (uint32_t, uint6_t)
Generated assembler @code{cv.extractu.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_insert_h (uint32_t, uint32_t)
Generated assembler @code{cv.insert.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_insert_b (uint32_t, uint32_t)
Generated assembler @code{cv.insert.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_shuffle_h (uint32_t, uint32_t)
Generated assembler @code{cv.shuffle.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_shuffle_b (uint32_t, uint32_t)
Generated assembler @code{cv.shuffle.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_shuffle_sci_h (uint32_t, uint4_t)
Generated assembler @code{cv.shuffle.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_shufflei0_sci_b (uint32_t, uint4_t)
Generated assembler @code{cv.shufflei0.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_shufflei1_sci_b (uint32_t, uint4_t)
Generated assembler @code{cv.shufflei1.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_shufflei2_sci_b (uint32_t, uint4_t)
Generated assembler @code{cv.shufflei2.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_shufflei3_sci_b (uint32_t, uint4_t)
Generated assembler @code{cv.shufflei3.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_shuffle2_h (uint32_t, uint32_t, uint32_t)
Generated assembler @code{cv.shuffle2.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_shuffle2_b (uint32_t, uint32_t, uint32_t)
Generated assembler @code{cv.shuffle2.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_packlo_h (uint32_t, uint32_t)
Generated assembler @code{cv.pack}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_packhi_h (uint32_t, uint32_t)
Generated assembler @code{cv.pack.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_packhi_b (uint32_t, uint32_t, uint32_t)
Generated assembler @code{cv.packhi.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_packlo_b (uint32_t, uint32_t, uint32_t)
Generated assembler @code{cv.packlo.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpeq_h (uint32_t, uint32_t)
Generated assembler @code{cv.cmpeq.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpeq_b (uint32_t, uint32_t)
Generated assembler @code{cv.cmpeq.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpeq_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.cmpeq.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpeq_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.cmpeq.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpeq_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.cmpeq.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpeq_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.cmpeq.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpne_h (uint32_t, uint32_t)
Generated assembler @code{cv.cmpne.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpne_b (uint32_t, uint32_t)
Generated assembler @code{cv.cmpne.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpne_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.cmpne.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpne_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.cmpne.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpne_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.cmpne.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpne_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.cmpne.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgt_h (uint32_t, uint32_t)
Generated assembler @code{cv.cmpgt.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgt_b (uint32_t, uint32_t)
Generated assembler @code{cv.cmpgt.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgt_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.cmpgt.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgt_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.cmpgt.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgt_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.cmpgt.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgt_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.cmpgt.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpge_h (uint32_t, uint32_t)
Generated assembler @code{cv.cmpge.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpge_b (uint32_t, uint32_t)
Generated assembler @code{cv.cmpge.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpge_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.cmpge.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpge_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.cmpge.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpge_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.cmpge.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpge_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.cmpge.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmplt_h (uint32_t, uint32_t)
Generated assembler @code{cv.cmplt.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmplt_b (uint32_t, uint32_t)
Generated assembler @code{cv.cmplt.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmplt_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.cmplt.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmplt_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.cmplt.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmplt_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.cmplt.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmplt_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.cmplt.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmple_h (uint32_t, uint32_t)
Generated assembler @code{cv.cmple.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmple_b (uint32_t, uint32_t)
Generated assembler @code{cv.cmple.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmple_sc_h (uint32_t, int16_t)
Generated assembler @code{cv.cmple.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmple_sc_h (uint32_t, int6_t)
Generated assembler @code{cv.cmple.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmple_sc_b (uint32_t, int8_t)
Generated assembler @code{cv.cmple.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmple_sc_b (uint32_t, int6_t)
Generated assembler @code{cv.cmple.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgtu_h (uint32_t, uint32_t)
Generated assembler @code{cv.cmpgtu.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgtu_b (uint32_t, uint32_t)
Generated assembler @code{cv.cmpgtu.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgtu_sc_h (uint32_t, uint16_t)
Generated assembler @code{cv.cmpgtu.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgtu_sc_h (uint32_t, uint6_t)
Generated assembler @code{cv.cmpgtu.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgtu_sc_b (uint32_t, uint8_t)
Generated assembler @code{cv.cmpgtu.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgtu_sc_b (uint32_t, uint6_t)
Generated assembler @code{cv.cmpgtu.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgeu_h (uint32_t, uint32_t)
Generated assembler @code{cv.cmpgeu.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgeu_b (uint32_t, uint32_t)
Generated assembler @code{cv.cmpgeu.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgeu_sc_h (uint32_t, uint16_t)
Generated assembler @code{cv.cmpgeu.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgeu_sc_h (uint32_t, uint6_t)
Generated assembler @code{cv.cmpgeu.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgeu_sc_b (uint32_t, uint8_t)
Generated assembler @code{cv.cmpgeu.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpgeu_sc_b (uint32_t, uint6_t)
Generated assembler @code{cv.cmpgeu.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpltu_h (uint32_t, uint32_t)
Generated assembler @code{cv.cmpltu.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpltu_b (uint32_t, uint32_t)
Generated assembler @code{cv.cmpltu.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpltu_sc_h (uint32_t, uint16_t)
Generated assembler @code{cv.cmpltu.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpltu_sc_h (uint32_t, uint6_t)
Generated assembler @code{cv.cmpltu.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpltu_sc_b (uint32_t, uint8_t)
Generated assembler @code{cv.cmpltu.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpltu_sc_b (uint32_t, uint6_t)
Generated assembler @code{cv.cmpltu.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpleu_h (uint32_t, uint32_t)
Generated assembler @code{cv.cmpleu.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpleu_b (uint32_t, uint32_t)
Generated assembler @code{cv.cmpleu.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpleu_sc_h (uint32_t, uint16_t)
Generated assembler @code{cv.cmpleu.sc.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpleu_sc_h (uint32_t, uint6_t)
Generated assembler @code{cv.cmpleu.sci.h}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpleu_sc_b (uint32_t, uint8_t)
Generated assembler @code{cv.cmpleu.sc.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cmpleu_sc_b (uint32_t, uint6_t)
Generated assembler @code{cv.cmpleu.sci.b}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cplxmul_r (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.cplxmul.r}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cplxmul_i (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.cplxmul.i}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cplxmul_r (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.cplxmul.r.div2}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cplxmul_i (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.cplxmul.i.div2}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cplxmul_r (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.cplxmul.r.div4}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cplxmul_i (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.cplxmul.i.div4}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cplxmul_r (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.cplxmul.r.div8}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cplxmul_i (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.cplxmul.i.div8}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_cplxconj (uint32_t)
Generated assembler @code{cv.cplxconj}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_subrotmj (uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.subrotmj}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_subrotmj (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.subrotmj.div2}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_subrotmj (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.subrotmj.div4}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_subrotmj (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.subrotmj.div8}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_add_h (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.add.div2}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_add_h (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.add.div4}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_add_h (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.add.div8}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sub_h (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.sub.div2}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sub_h (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.sub.div4}
@end deftypefn

@deftypefn {Built-in Function} {uint32_t} __builtin_riscv_cv_simd_sub_h (uint32_t, uint32_t, uint32_t, uint4_t)
Generated assembler @code{cv.sub.div8}
@end deftypefn

@node RX Built-in Functions
@subsection RX Built-in Functions
GCC supports some of the RX instructions which cannot be expressed in
the C programming language via the use of built-in functions.  The
following functions are supported:

@defbuiltin{void __builtin_rx_brk (void)}
Generates the @code{brk} machine instruction.
@enddefbuiltin

@defbuiltin{void __builtin_rx_clrpsw (int)}
Generates the @code{clrpsw} machine instruction to clear the specified
bit in the processor status word.
@enddefbuiltin

@defbuiltin{void __builtin_rx_int (int)}
Generates the @code{int} machine instruction to generate an interrupt
with the specified value.
@enddefbuiltin

@defbuiltin{void __builtin_rx_machi (int, int)}
Generates the @code{machi} machine instruction to add the result of
multiplying the top 16 bits of the two arguments into the
accumulator.
@enddefbuiltin

@defbuiltin{void __builtin_rx_maclo (int, int)}
Generates the @code{maclo} machine instruction to add the result of
multiplying the bottom 16 bits of the two arguments into the
accumulator.
@enddefbuiltin

@defbuiltin{void __builtin_rx_mulhi (int, int)}
Generates the @code{mulhi} machine instruction to place the result of
multiplying the top 16 bits of the two arguments into the
accumulator.
@enddefbuiltin

@defbuiltin{void __builtin_rx_mullo (int, int)}
Generates the @code{mullo} machine instruction to place the result of
multiplying the bottom 16 bits of the two arguments into the
accumulator.
@enddefbuiltin

@defbuiltin{int __builtin_rx_mvfachi (void)}
Generates the @code{mvfachi} machine instruction to read the top
32 bits of the accumulator.
@enddefbuiltin

@defbuiltin{int __builtin_rx_mvfacmi (void)}
Generates the @code{mvfacmi} machine instruction to read the middle
32 bits of the accumulator.
@enddefbuiltin

@defbuiltin{int __builtin_rx_mvfc (int)}
Generates the @code{mvfc} machine instruction which reads the control
register specified in its argument and returns its value.
@enddefbuiltin

@defbuiltin{void __builtin_rx_mvtachi (int)}
Generates the @code{mvtachi} machine instruction to set the top
32 bits of the accumulator.
@enddefbuiltin

@defbuiltin{void __builtin_rx_mvtaclo (int)}
Generates the @code{mvtaclo} machine instruction to set the bottom
32 bits of the accumulator.
@enddefbuiltin

@defbuiltin{void __builtin_rx_mvtc (int @var{reg}, int @var{val})}
Generates the @code{mvtc} machine instruction which sets control
register number @code{reg} to @code{val}.
@enddefbuiltin

@defbuiltin{void __builtin_rx_mvtipl (int)}
Generates the @code{mvtipl} machine instruction set the interrupt
priority level.
@enddefbuiltin

@defbuiltin{void __builtin_rx_racw (int)}
Generates the @code{racw} machine instruction to round the accumulator
according to the specified mode.
@enddefbuiltin

@defbuiltin{int __builtin_rx_revw (int)}
Generates the @code{revw} machine instruction which swaps the bytes in
the argument so that bits 0--7 now occupy bits 8--15 and vice versa,
and also bits 16--23 occupy bits 24--31 and vice versa.
@enddefbuiltin

@defbuiltin{void __builtin_rx_rmpa (void)}
Generates the @code{rmpa} machine instruction which initiates a
repeated multiply and accumulate sequence.
@enddefbuiltin

@defbuiltin{void __builtin_rx_round (float)}
Generates the @code{round} machine instruction which returns the
floating-point argument rounded according to the current rounding mode
set in the floating-point status word register.
@enddefbuiltin

@defbuiltin{int __builtin_rx_sat (int)}
Generates the @code{sat} machine instruction which returns the
saturated value of the argument.
@enddefbuiltin

@defbuiltin{void __builtin_rx_setpsw (int)}
Generates the @code{setpsw} machine instruction to set the specified
bit in the processor status word.
@enddefbuiltin

@defbuiltin{void __builtin_rx_wait (void)}
Generates the @code{wait} machine instruction.
@enddefbuiltin

@node S/390 System z Built-in Functions
@subsection S/390 System z Built-in Functions
@defbuiltin{int __builtin_tbegin (void*)}
Generates the @code{tbegin} machine instruction starting a
non-constrained hardware transaction.  If the parameter is non-NULL the
memory area is used to store the transaction diagnostic buffer and
will be passed as first operand to @code{tbegin}.  This buffer can be
defined using the @code{struct __htm_tdb} C struct defined in
@code{htmintrin.h} and must reside on a double-word boundary.  The
second tbegin operand is set to @code{0xff0c}. This enables
save/restore of all GPRs and disables aborts for FPR and AR
manipulations inside the transaction body.  The condition code set by
the tbegin instruction is returned as integer value.  The tbegin
instruction by definition overwrites the content of all FPRs.  The
compiler will generate code which saves and restores the FPRs.  For
soft-float code it is recommended to used the @code{*_nofloat}
variant.  In order to prevent a TDB from being written it is required
to pass a constant zero value as parameter.  Passing a zero value
through a variable is not sufficient.  Although modifications of
access registers inside the transaction will not trigger an
transaction abort it is not supported to actually modify them.  Access
registers do not get saved when entering a transaction. They will have
undefined state when reaching the abort code.
@enddefbuiltin

Macros for the possible return codes of tbegin are defined in the
@code{htmintrin.h} header file:

@defmac _HTM_TBEGIN_STARTED
@code{tbegin} has been executed as part of normal processing.  The
transaction body is supposed to be executed.
@end defmac

@defmac _HTM_TBEGIN_INDETERMINATE
The transaction was aborted due to an indeterminate condition which
might be persistent.
@end defmac

@defmac _HTM_TBEGIN_TRANSIENT
The transaction aborted due to a transient failure.  The transaction
should be re-executed in that case.
@end defmac

@defmac _HTM_TBEGIN_PERSISTENT
The transaction aborted due to a persistent failure.  Re-execution
under same circumstances will not be productive.
@end defmac

@defmac _HTM_FIRST_USER_ABORT_CODE
The @code{_HTM_FIRST_USER_ABORT_CODE} defined in @code{htmintrin.h}
specifies the first abort code which can be used for
@code{__builtin_tabort}.  Values below this threshold are reserved for
machine use.
@end defmac

@deftp {Data type} {struct __htm_tdb}
The @code{struct __htm_tdb} defined in @code{htmintrin.h} describes
the structure of the transaction diagnostic block as specified in the
Principles of Operation manual chapter 5-91.
@end deftp

@defbuiltin{int __builtin_tbegin_nofloat (void*)}
Same as @code{__builtin_tbegin} but without FPR saves and restores.
Using this variant in code making use of FPRs will leave the FPRs in
undefined state when entering the transaction abort handler code.
@enddefbuiltin

@defbuiltin{int __builtin_tbegin_retry (void*, int)}
In addition to @code{__builtin_tbegin} a loop for transient failures
is generated.  If tbegin returns a condition code of 2 the transaction
will be retried as often as specified in the second argument.  The
perform processor assist instruction is used to tell the CPU about the
number of fails so far.
@enddefbuiltin

@defbuiltin{int __builtin_tbegin_retry_nofloat (void*, int)}
Same as @code{__builtin_tbegin_retry} but without FPR saves and
restores.  Using this variant in code making use of FPRs will leave
the FPRs in undefined state when entering the transaction abort
handler code.
@enddefbuiltin

@defbuiltin{void __builtin_tbeginc (void)}
Generates the @code{tbeginc} machine instruction starting a constrained
hardware transaction.  The second operand is set to @code{0xff08}.
@enddefbuiltin

@defbuiltin{int __builtin_tend (void)}
Generates the @code{tend} machine instruction finishing a transaction
and making the changes visible to other threads.  The condition code
generated by tend is returned as integer value.
@enddefbuiltin

@defbuiltin{void __builtin_tabort (int)}
Generates the @code{tabort} machine instruction with the specified
abort code.  Abort codes from 0 through 255 are reserved and will
result in an error message.
@enddefbuiltin

@defbuiltin{void __builtin_tx_assist (int)}
Generates the @code{ppa rX,rY,1} machine instruction.  Where the
integer parameter is loaded into rX and a value of zero is loaded into
rY.  The integer parameter specifies the number of times the
transaction repeatedly aborted.
@enddefbuiltin

@defbuiltin{int __builtin_tx_nesting_depth (void)}
Generates the @code{etnd} machine instruction.  The current nesting
depth is returned as integer value.  For a nesting depth of 0 the code
is not executed as part of an transaction.
@enddefbuiltin

@defbuiltin{void __builtin_non_tx_store (uint64_t *, uint64_t)}

Generates the @code{ntstg} machine instruction.  The second argument
is written to the first arguments location.  The store operation will
not be rolled-back in case of an transaction abort.
@enddefbuiltin

@node SH Built-in Functions
@subsection SH Built-in Functions
The following built-in functions are supported on the SH1, SH2, SH3 and SH4
families of processors:

@defbuiltin{{void} __builtin_set_thread_pointer (void *@var{ptr})}
Sets the @samp{GBR} register to the specified value @var{ptr}.  This is usually
used by system code that manages threads and execution contexts.  The compiler
normally does not generate code that modifies the contents of @samp{GBR} and
thus the value is preserved across function calls.  Changing the @samp{GBR}
value in user code must be done with caution, since the compiler might use
@samp{GBR} in order to access thread local variables.

@enddefbuiltin

@defbuiltin{{void *} __builtin_thread_pointer (void)}
Returns the value that is currently set in the @samp{GBR} register.
Memory loads and stores that use the thread pointer as a base address are
turned into @samp{GBR} based displacement loads and stores, if possible.
For example:
@smallexample
struct my_tcb
@{
   int a, b, c, d, e;
@};

int get_tcb_value (void)
@{
  // Generate @samp{mov.l @@(8,gbr),r0} instruction
  return ((my_tcb*)__builtin_thread_pointer ())->c;
@}

@end smallexample
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_sh_get_fpscr (void)}
Returns the value that is currently set in the @samp{FPSCR} register.
@enddefbuiltin

@defbuiltin{{void} __builtin_sh_set_fpscr (unsigned int @var{val})}
Sets the @samp{FPSCR} register to the specified value @var{val}, while
preserving the current values of the FR, SZ and PR bits.
@enddefbuiltin

@node SPARC VIS Built-in Functions
@subsection SPARC VIS Built-in Functions

GCC supports SIMD operations on the SPARC using both the generic vector
extensions (@pxref{Vector Extensions}) as well as built-in functions for
the SPARC Visual Instruction Set (VIS).  When you use the @option{-mvis}
switch, the VIS extension is exposed as the following built-in functions:

@smallexample
typedef int v1si __attribute__ ((vector_size (4)));
typedef int v2si __attribute__ ((vector_size (8)));
typedef short v4hi __attribute__ ((vector_size (8)));
typedef short v2hi __attribute__ ((vector_size (4)));
typedef unsigned char v8qi __attribute__ ((vector_size (8)));
typedef unsigned char v4qi __attribute__ ((vector_size (4)));

void __builtin_vis_write_gsr (int64_t);
int64_t __builtin_vis_read_gsr (void);

void * __builtin_vis_alignaddr (void *, long);
void * __builtin_vis_alignaddrl (void *, long);
int64_t __builtin_vis_faligndatadi (int64_t, int64_t);
v2si __builtin_vis_faligndatav2si (v2si, v2si);
v4hi __builtin_vis_faligndatav4hi (v4si, v4si);
v8qi __builtin_vis_faligndatav8qi (v8qi, v8qi);

v4hi __builtin_vis_fexpand (v4qi);

v4hi __builtin_vis_fmul8x16 (v4qi, v4hi);
v4hi __builtin_vis_fmul8x16au (v4qi, v2hi);
v4hi __builtin_vis_fmul8x16al (v4qi, v2hi);
v4hi __builtin_vis_fmul8sux16 (v8qi, v4hi);
v4hi __builtin_vis_fmul8ulx16 (v8qi, v4hi);
v2si __builtin_vis_fmuld8sux16 (v4qi, v2hi);
v2si __builtin_vis_fmuld8ulx16 (v4qi, v2hi);

v4qi __builtin_vis_fpack16 (v4hi);
v8qi __builtin_vis_fpack32 (v2si, v8qi);
v2hi __builtin_vis_fpackfix (v2si);
v8qi __builtin_vis_fpmerge (v4qi, v4qi);

int64_t __builtin_vis_pdist (v8qi, v8qi, int64_t);

long __builtin_vis_edge8 (void *, void *);
long __builtin_vis_edge8l (void *, void *);
long __builtin_vis_edge16 (void *, void *);
long __builtin_vis_edge16l (void *, void *);
long __builtin_vis_edge32 (void *, void *);
long __builtin_vis_edge32l (void *, void *);

long __builtin_vis_fcmple16 (v4hi, v4hi);
long __builtin_vis_fcmple32 (v2si, v2si);
long __builtin_vis_fcmpne16 (v4hi, v4hi);
long __builtin_vis_fcmpne32 (v2si, v2si);
long __builtin_vis_fcmpgt16 (v4hi, v4hi);
long __builtin_vis_fcmpgt32 (v2si, v2si);
long __builtin_vis_fcmpeq16 (v4hi, v4hi);
long __builtin_vis_fcmpeq32 (v2si, v2si);

v4hi __builtin_vis_fpadd16 (v4hi, v4hi);
v2hi __builtin_vis_fpadd16s (v2hi, v2hi);
v2si __builtin_vis_fpadd32 (v2si, v2si);
v1si __builtin_vis_fpadd32s (v1si, v1si);
v4hi __builtin_vis_fpsub16 (v4hi, v4hi);
v2hi __builtin_vis_fpsub16s (v2hi, v2hi);
v2si __builtin_vis_fpsub32 (v2si, v2si);
v1si __builtin_vis_fpsub32s (v1si, v1si);

long __builtin_vis_array8 (long, long);
long __builtin_vis_array16 (long, long);
long __builtin_vis_array32 (long, long);
@end smallexample

When you use the @option{-mvis2} switch, the VIS version 2.0 built-in
functions also become available:

@smallexample
long __builtin_vis_bmask (long, long);
int64_t __builtin_vis_bshuffledi (int64_t, int64_t);
v2si __builtin_vis_bshufflev2si (v2si, v2si);
v4hi __builtin_vis_bshufflev2si (v4hi, v4hi);
v8qi __builtin_vis_bshufflev2si (v8qi, v8qi);

long __builtin_vis_edge8n (void *, void *);
long __builtin_vis_edge8ln (void *, void *);
long __builtin_vis_edge16n (void *, void *);
long __builtin_vis_edge16ln (void *, void *);
long __builtin_vis_edge32n (void *, void *);
long __builtin_vis_edge32ln (void *, void *);
@end smallexample

When you use the @option{-mvis3} switch, the VIS version 3.0 built-in
functions also become available:

@smallexample
void __builtin_vis_cmask8 (long);
void __builtin_vis_cmask16 (long);
void __builtin_vis_cmask32 (long);

v4hi __builtin_vis_fchksm16 (v4hi, v4hi);

v4hi __builtin_vis_fsll16 (v4hi, v4hi);
v4hi __builtin_vis_fslas16 (v4hi, v4hi);
v4hi __builtin_vis_fsrl16 (v4hi, v4hi);
v4hi __builtin_vis_fsra16 (v4hi, v4hi);
v2si __builtin_vis_fsll16 (v2si, v2si);
v2si __builtin_vis_fslas16 (v2si, v2si);
v2si __builtin_vis_fsrl16 (v2si, v2si);
v2si __builtin_vis_fsra16 (v2si, v2si);

long __builtin_vis_pdistn (v8qi, v8qi);

v4hi __builtin_vis_fmean16 (v4hi, v4hi);

int64_t __builtin_vis_fpadd64 (int64_t, int64_t);
int64_t __builtin_vis_fpsub64 (int64_t, int64_t);

v4hi __builtin_vis_fpadds16 (v4hi, v4hi);
v2hi __builtin_vis_fpadds16s (v2hi, v2hi);
v4hi __builtin_vis_fpsubs16 (v4hi, v4hi);
v2hi __builtin_vis_fpsubs16s (v2hi, v2hi);
v2si __builtin_vis_fpadds32 (v2si, v2si);
v1si __builtin_vis_fpadds32s (v1si, v1si);
v2si __builtin_vis_fpsubs32 (v2si, v2si);
v1si __builtin_vis_fpsubs32s (v1si, v1si);

long __builtin_vis_fucmple8 (v8qi, v8qi);
long __builtin_vis_fucmpne8 (v8qi, v8qi);
long __builtin_vis_fucmpgt8 (v8qi, v8qi);
long __builtin_vis_fucmpeq8 (v8qi, v8qi);

float __builtin_vis_fhadds (float, float);
double __builtin_vis_fhaddd (double, double);
float __builtin_vis_fhsubs (float, float);
double __builtin_vis_fhsubd (double, double);
float __builtin_vis_fnhadds (float, float);
double __builtin_vis_fnhaddd (double, double);

int64_t __builtin_vis_umulxhi (int64_t, int64_t);
int64_t __builtin_vis_xmulx (int64_t, int64_t);
int64_t __builtin_vis_xmulxhi (int64_t, int64_t);
@end smallexample

When you use the @option{-mvis4} switch, the VIS version 4.0 built-in
functions also become available:

@smallexample
v8qi __builtin_vis_fpadd8 (v8qi, v8qi);
v8qi __builtin_vis_fpadds8 (v8qi, v8qi);
v8qi __builtin_vis_fpaddus8 (v8qi, v8qi);
v4hi __builtin_vis_fpaddus16 (v4hi, v4hi);

v8qi __builtin_vis_fpsub8 (v8qi, v8qi);
v8qi __builtin_vis_fpsubs8 (v8qi, v8qi);
v8qi __builtin_vis_fpsubus8 (v8qi, v8qi);
v4hi __builtin_vis_fpsubus16 (v4hi, v4hi);

long __builtin_vis_fpcmple8 (v8qi, v8qi);
long __builtin_vis_fpcmpgt8 (v8qi, v8qi);
long __builtin_vis_fpcmpule16 (v4hi, v4hi);
long __builtin_vis_fpcmpugt16 (v4hi, v4hi);
long __builtin_vis_fpcmpule32 (v2si, v2si);
long __builtin_vis_fpcmpugt32 (v2si, v2si);

v8qi __builtin_vis_fpmax8 (v8qi, v8qi);
v4hi __builtin_vis_fpmax16 (v4hi, v4hi);
v2si __builtin_vis_fpmax32 (v2si, v2si);

v8qi __builtin_vis_fpmaxu8 (v8qi, v8qi);
v4hi __builtin_vis_fpmaxu16 (v4hi, v4hi);
v2si __builtin_vis_fpmaxu32 (v2si, v2si);

v8qi __builtin_vis_fpmin8 (v8qi, v8qi);
v4hi __builtin_vis_fpmin16 (v4hi, v4hi);
v2si __builtin_vis_fpmin32 (v2si, v2si);

v8qi __builtin_vis_fpminu8 (v8qi, v8qi);
v4hi __builtin_vis_fpminu16 (v4hi, v4hi);
v2si __builtin_vis_fpminu32 (v2si, v2si);
@end smallexample

When you use the @option{-mvis4b} switch, the VIS version 4.0B
built-in functions also become available:

@smallexample
v8qi __builtin_vis_dictunpack8 (double, int);
v4hi __builtin_vis_dictunpack16 (double, int);
v2si __builtin_vis_dictunpack32 (double, int);

long __builtin_vis_fpcmple8shl (v8qi, v8qi, int);
long __builtin_vis_fpcmpgt8shl (v8qi, v8qi, int);
long __builtin_vis_fpcmpeq8shl (v8qi, v8qi, int);
long __builtin_vis_fpcmpne8shl (v8qi, v8qi, int);

long __builtin_vis_fpcmple16shl (v4hi, v4hi, int);
long __builtin_vis_fpcmpgt16shl (v4hi, v4hi, int);
long __builtin_vis_fpcmpeq16shl (v4hi, v4hi, int);
long __builtin_vis_fpcmpne16shl (v4hi, v4hi, int);

long __builtin_vis_fpcmple32shl (v2si, v2si, int);
long __builtin_vis_fpcmpgt32shl (v2si, v2si, int);
long __builtin_vis_fpcmpeq32shl (v2si, v2si, int);
long __builtin_vis_fpcmpne32shl (v2si, v2si, int);

long __builtin_vis_fpcmpule8shl (v8qi, v8qi, int);
long __builtin_vis_fpcmpugt8shl (v8qi, v8qi, int);
long __builtin_vis_fpcmpule16shl (v4hi, v4hi, int);
long __builtin_vis_fpcmpugt16shl (v4hi, v4hi, int);
long __builtin_vis_fpcmpule32shl (v2si, v2si, int);
long __builtin_vis_fpcmpugt32shl (v2si, v2si, int);

long __builtin_vis_fpcmpde8shl (v8qi, v8qi, int);
long __builtin_vis_fpcmpde16shl (v4hi, v4hi, int);
long __builtin_vis_fpcmpde32shl (v2si, v2si, int);

long __builtin_vis_fpcmpur8shl (v8qi, v8qi, int);
long __builtin_vis_fpcmpur16shl (v4hi, v4hi, int);
long __builtin_vis_fpcmpur32shl (v2si, v2si, int);
@end smallexample

@node TI C6X Built-in Functions
@subsection TI C6X Built-in Functions

GCC provides intrinsics to access certain instructions of the TI C6X
processors.  These intrinsics, listed below, are available after
inclusion of the @code{c6x_intrinsics.h} header file.  They map directly
to C6X instructions.

@smallexample
int _sadd (int, int);
int _ssub (int, int);
int _sadd2 (int, int);
int _ssub2 (int, int);
long long _mpy2 (int, int);
long long _smpy2 (int, int);
int _add4 (int, int);
int _sub4 (int, int);
int _saddu4 (int, int);

int _smpy (int, int);
int _smpyh (int, int);
int _smpyhl (int, int);
int _smpylh (int, int);

int _sshl (int, int);
int _subc (int, int);

int _avg2 (int, int);
int _avgu4 (int, int);

int _clrr (int, int);
int _extr (int, int);
int _extru (int, int);
int _abs (int);
int _abs2 (int);
@end smallexample

@node x86 Built-in Functions
@subsection x86 Built-in Functions

These built-in functions are available for the x86-32 and x86-64 family
of computers, depending on the command-line switches used.

If you specify command-line switches such as @option{-msse},
the compiler could use the extended instruction sets even if the built-ins
are not used explicitly in the program.  For this reason, applications
that perform run-time CPU detection must compile separate files for each
supported architecture, using the appropriate flags.  In particular,
the file containing the CPU detection code should be compiled without
these options.

The following machine modes are available for use with MMX built-in functions
(@pxref{Vector Extensions}): @code{V2SI} for a vector of two 32-bit integers,
@code{V4HI} for a vector of four 16-bit integers, and @code{V8QI} for a
vector of eight 8-bit integers.  Some of the built-in functions operate on
MMX registers as a whole 64-bit entity, these use @code{V1DI} as their mode.

If 3DNow!@: extensions are enabled, @code{V2SF} is used as a mode for a vector
of two 32-bit floating-point values.

If SSE extensions are enabled, @code{V4SF} is used for a vector of four 32-bit
floating-point values.  Some instructions use a vector of four 32-bit
integers, these use @code{V4SI}.  Finally, some instructions operate on an
entire vector register, interpreting it as a 128-bit integer, these use mode
@code{TI}.

The x86-32 and x86-64 family of processors use additional built-in
functions for efficient use of @code{TF} (@code{__float128}) 128-bit
floating point and @code{TC} 128-bit complex floating-point values.

The following floating-point built-in functions are always available:

@defbuiltin{__float128 __builtin_fabsq (__float128 @var{x}))}
Computes the absolute value of @var{x}.
@enddefbuiltin

@defbuiltin{__float128 __builtin_copysignq (__float128 @var{x}, @
                                            __float128 @var{y})}
Copies the sign of @var{y} into @var{x} and returns the new value of
@var{x}.
@enddefbuiltin

@defbuiltin{__float128 __builtin_infq (void)}
Similar to @code{__builtin_inf}, except the return type is @code{__float128}.
@enddefbuiltin

@defbuiltin{__float128 __builtin_huge_valq (void)}
Similar to @code{__builtin_huge_val}, except the return type is @code{__float128}.
@enddefbuiltin

@defbuiltin{__float128 __builtin_nanq (void)}
Similar to @code{__builtin_nan}, except the return type is @code{__float128}.
@enddefbuiltin

@defbuiltin{__float128 __builtin_nansq (void)}
Similar to @code{__builtin_nans}, except the return type is @code{__float128}.
@enddefbuiltin

The following built-in function is always available.

@defbuiltin{void __builtin_ia32_pause (void)}
Generates the @code{pause} machine instruction with a compiler memory
barrier.
@enddefbuiltin

The following built-in functions are always available and can be used to
check the target platform type.

@defbuiltin{void __builtin_cpu_init (void)}
This function runs the CPU detection code to check the type of CPU and the
features supported.  This built-in function needs to be invoked along with the built-in functions
to check CPU type and features, @code{__builtin_cpu_is} and
@code{__builtin_cpu_supports}, only when used in a function that is
executed before any constructors are called.  The CPU detection code is
automatically executed in a very high priority constructor.

For example, this function has to be used in @code{ifunc} resolvers that
check for CPU type using the built-in functions @code{__builtin_cpu_is}
and @code{__builtin_cpu_supports}, or in constructors on targets that
don't support constructor priority.
@smallexample

static void (*resolve_memcpy (void)) (void)
@{
  // ifunc resolvers fire before constructors, explicitly call the init
  // function.
  __builtin_cpu_init ();
  if (__builtin_cpu_supports ("ssse3"))
    return ssse3_memcpy; // super fast memcpy with ssse3 instructions.
  else
    return default_memcpy;
@}

void *memcpy (void *, const void *, size_t)
     __attribute__ ((ifunc ("resolve_memcpy")));
@end smallexample

@enddefbuiltin

@defbuiltin{int __builtin_cpu_is (const char *@var{cpuname})}
This function returns a positive integer if the run-time CPU
is of type @var{cpuname}
and returns @code{0} otherwise. The following CPU names can be detected:

@table @samp
@item amd
AMD CPU.

@item intel
Intel CPU.

@item atom
Intel Atom CPU.

@item slm
Intel Silvermont CPU.

@item core2
Intel Core 2 CPU.

@item corei7
Intel Core i7 CPU.

@item nehalem
Intel Core i7 Nehalem CPU.

@item westmere
Intel Core i7 Westmere CPU.

@item sandybridge
Intel Core i7 Sandy Bridge CPU.

@item ivybridge
Intel Core i7 Ivy Bridge CPU.

@item haswell
Intel Core i7 Haswell CPU.

@item broadwell
Intel Core i7 Broadwell CPU.

@item skylake
Intel Core i7 Skylake CPU.

@item skylake-avx512
Intel Core i7 Skylake AVX512 CPU.

@item cannonlake
Intel Core i7 Cannon Lake CPU.

@item icelake-client
Intel Core i7 Ice Lake Client CPU.

@item icelake-server
Intel Core i7 Ice Lake Server CPU.

@item cascadelake
Intel Core i7 Cascadelake CPU.

@item tigerlake
Intel Core i7 Tigerlake CPU.

@item cooperlake
Intel Core i7 Cooperlake CPU.

@item sapphirerapids
Intel Core i7 sapphirerapids CPU.

@item alderlake
Intel Core i7 Alderlake CPU.

@item rocketlake
Intel Core i7 Rocketlake CPU.

@item graniterapids
Intel Core i7 graniterapids CPU.

@item graniterapids-d
Intel Core i7 graniterapids D CPU.

@item arrowlake
Intel Core i7 Arrow Lake CPU.

@item arrowlake-s
Intel Core i7 Arrow Lake S CPU.

@item pantherlake
Intel Core i7 Panther Lake CPU.

@item bonnell
Intel Atom Bonnell CPU.

@item silvermont
Intel Atom Silvermont CPU.

@item goldmont
Intel Atom Goldmont CPU.

@item goldmont-plus
Intel Atom Goldmont Plus CPU.

@item tremont
Intel Atom Tremont CPU.

@item sierraforest
Intel Atom Sierra Forest CPU.

@item grandridge
Intel Atom Grand Ridge CPU.

@item clearwaterforest
Intel Atom Clearwater Forest CPU.

@item lujiazui
ZHAOXIN lujiazui CPU.

@item yongfeng
ZHAOXIN yongfeng CPU.

@item shijidadao
ZHAOXIN shijidadao CPU.

@item amdfam10h
AMD Family 10h CPU.

@item barcelona
AMD Family 10h Barcelona CPU.

@item shanghai
AMD Family 10h Shanghai CPU.

@item istanbul
AMD Family 10h Istanbul CPU.

@item btver1
AMD Family 14h CPU.

@item amdfam15h
AMD Family 15h CPU.

@item bdver1
AMD Family 15h Bulldozer version 1.

@item bdver2
AMD Family 15h Bulldozer version 2.

@item bdver3
AMD Family 15h Bulldozer version 3.

@item bdver4
AMD Family 15h Bulldozer version 4.

@item btver2
AMD Family 16h CPU.

@item amdfam17h
AMD Family 17h CPU.

@item znver1
AMD Family 17h Zen version 1.

@item znver2
AMD Family 17h Zen version 2.

@item amdfam19h
AMD Family 19h CPU.

@item znver3
AMD Family 19h Zen version 3.

@item znver4
AMD Family 19h Zen version 4.

@item znver5
AMD Family 1ah Zen version 5.
@end table

Here is an example:
@smallexample
if (__builtin_cpu_is ("corei7"))
  @{
     do_corei7 (); // Core i7 specific implementation.
  @}
else
  @{
     do_generic (); // Generic implementation.
  @}
@end smallexample
@enddefbuiltin

@defbuiltin{int __builtin_cpu_supports (const char *@var{feature})}
This function returns a positive integer if the run-time CPU
supports @var{feature}
and returns @code{0} otherwise. The following features can be detected:

@table @samp
@item cmov
CMOV instruction.
@item mmx
MMX instructions.
@item popcnt
POPCNT instruction.
@item sse
SSE instructions.
@item sse2
SSE2 instructions.
@item sse3
SSE3 instructions.
@item ssse3
SSSE3 instructions.
@item sse4.1
SSE4.1 instructions.
@item sse4.2
SSE4.2 instructions.
@item avx
AVX instructions.
@item avx2
AVX2 instructions.
@item sse4a
SSE4A instructions.
@item fma4
FMA4 instructions.
@item xop
XOP instructions.
@item fma
FMA instructions.
@item avx512f
AVX512F instructions.
@item bmi
BMI instructions.
@item bmi2
BMI2 instructions.
@item aes
AES instructions.
@item pclmul
PCLMUL instructions.
@item avx512vl
AVX512VL instructions.
@item avx512bw
AVX512BW instructions.
@item avx512dq
AVX512DQ instructions.
@item avx512cd
AVX512CD instructions.
@item avx512vbmi
AVX512VBMI instructions.
@item avx512ifma
AVX512IFMA instructions.
@item avx512vpopcntdq
AVX512VPOPCNTDQ instructions.
@item avx512vbmi2
AVX512VBMI2 instructions.
@item gfni
GFNI instructions.
@item vpclmulqdq
VPCLMULQDQ instructions.
@item avx512vnni
AVX512VNNI instructions.
@item avx512bitalg
AVX512BITALG instructions.
@item x86-64
Baseline x86-64 microarchitecture level (as defined in x86-64 psABI).
@item x86-64-v2
x86-64-v2 microarchitecture level.
@item x86-64-v3
x86-64-v3 microarchitecture level.
@item x86-64-v4
x86-64-v4 microarchitecture level.


@end table

Here is an example:
@smallexample
if (__builtin_cpu_supports ("popcnt"))
  @{
     asm("popcnt %1,%0" : "=r"(count) : "rm"(n) : "cc");
  @}
else
  @{
     count = generic_countbits (n); //generic implementation.
  @}
@end smallexample
@enddefbuiltin

The following built-in functions are made available by @option{-mmmx}.
All of them generate the machine instruction that is part of the name.

@smallexample
v8qi __builtin_ia32_paddb (v8qi, v8qi);
v4hi __builtin_ia32_paddw (v4hi, v4hi);
v2si __builtin_ia32_paddd (v2si, v2si);
v8qi __builtin_ia32_psubb (v8qi, v8qi);
v4hi __builtin_ia32_psubw (v4hi, v4hi);
v2si __builtin_ia32_psubd (v2si, v2si);
v8qi __builtin_ia32_paddsb (v8qi, v8qi);
v4hi __builtin_ia32_paddsw (v4hi, v4hi);
v8qi __builtin_ia32_psubsb (v8qi, v8qi);
v4hi __builtin_ia32_psubsw (v4hi, v4hi);
v8qi __builtin_ia32_paddusb (v8qi, v8qi);
v4hi __builtin_ia32_paddusw (v4hi, v4hi);
v8qi __builtin_ia32_psubusb (v8qi, v8qi);
v4hi __builtin_ia32_psubusw (v4hi, v4hi);
v4hi __builtin_ia32_pmullw (v4hi, v4hi);
v4hi __builtin_ia32_pmulhw (v4hi, v4hi);
di __builtin_ia32_pand (di, di);
di __builtin_ia32_pandn (di,di);
di __builtin_ia32_por (di, di);
di __builtin_ia32_pxor (di, di);
v8qi __builtin_ia32_pcmpeqb (v8qi, v8qi);
v4hi __builtin_ia32_pcmpeqw (v4hi, v4hi);
v2si __builtin_ia32_pcmpeqd (v2si, v2si);
v8qi __builtin_ia32_pcmpgtb (v8qi, v8qi);
v4hi __builtin_ia32_pcmpgtw (v4hi, v4hi);
v2si __builtin_ia32_pcmpgtd (v2si, v2si);
v8qi __builtin_ia32_punpckhbw (v8qi, v8qi);
v4hi __builtin_ia32_punpckhwd (v4hi, v4hi);
v2si __builtin_ia32_punpckhdq (v2si, v2si);
v8qi __builtin_ia32_punpcklbw (v8qi, v8qi);
v4hi __builtin_ia32_punpcklwd (v4hi, v4hi);
v2si __builtin_ia32_punpckldq (v2si, v2si);
v8qi __builtin_ia32_packsswb (v4hi, v4hi);
v4hi __builtin_ia32_packssdw (v2si, v2si);
v8qi __builtin_ia32_packuswb (v4hi, v4hi);

v4hi __builtin_ia32_psllw (v4hi, v4hi);
v2si __builtin_ia32_pslld (v2si, v2si);
v1di __builtin_ia32_psllq (v1di, v1di);
v4hi __builtin_ia32_psrlw (v4hi, v4hi);
v2si __builtin_ia32_psrld (v2si, v2si);
v1di __builtin_ia32_psrlq (v1di, v1di);
v4hi __builtin_ia32_psraw (v4hi, v4hi);
v2si __builtin_ia32_psrad (v2si, v2si);
v4hi __builtin_ia32_psllwi (v4hi, int);
v2si __builtin_ia32_pslldi (v2si, int);
v1di __builtin_ia32_psllqi (v1di, int);
v4hi __builtin_ia32_psrlwi (v4hi, int);
v2si __builtin_ia32_psrldi (v2si, int);
v1di __builtin_ia32_psrlqi (v1di, int);
v4hi __builtin_ia32_psrawi (v4hi, int);
v2si __builtin_ia32_psradi (v2si, int);
@end smallexample

The following built-in functions are made available either with
@option{-msse}, or with @option{-m3dnowa}.  All of them generate
the machine instruction that is part of the name.

@smallexample
v4hi __builtin_ia32_pmulhuw (v4hi, v4hi);
v8qi __builtin_ia32_pavgb (v8qi, v8qi);
v4hi __builtin_ia32_pavgw (v4hi, v4hi);
v1di __builtin_ia32_psadbw (v8qi, v8qi);
v8qi __builtin_ia32_pmaxub (v8qi, v8qi);
v4hi __builtin_ia32_pmaxsw (v4hi, v4hi);
v8qi __builtin_ia32_pminub (v8qi, v8qi);
v4hi __builtin_ia32_pminsw (v4hi, v4hi);
int __builtin_ia32_pmovmskb (v8qi);
void __builtin_ia32_maskmovq (v8qi, v8qi, char *);
void __builtin_ia32_movntq (di *, di);
void __builtin_ia32_sfence (void);
@end smallexample

The following built-in functions are available when @option{-msse} is used.
All of them generate the machine instruction that is part of the name.

@smallexample
int __builtin_ia32_comieq (v4sf, v4sf);
int __builtin_ia32_comineq (v4sf, v4sf);
int __builtin_ia32_comilt (v4sf, v4sf);
int __builtin_ia32_comile (v4sf, v4sf);
int __builtin_ia32_comigt (v4sf, v4sf);
int __builtin_ia32_comige (v4sf, v4sf);
int __builtin_ia32_ucomieq (v4sf, v4sf);
int __builtin_ia32_ucomineq (v4sf, v4sf);
int __builtin_ia32_ucomilt (v4sf, v4sf);
int __builtin_ia32_ucomile (v4sf, v4sf);
int __builtin_ia32_ucomigt (v4sf, v4sf);
int __builtin_ia32_ucomige (v4sf, v4sf);
v4sf __builtin_ia32_addps (v4sf, v4sf);
v4sf __builtin_ia32_subps (v4sf, v4sf);
v4sf __builtin_ia32_mulps (v4sf, v4sf);
v4sf __builtin_ia32_divps (v4sf, v4sf);
v4sf __builtin_ia32_addss (v4sf, v4sf);
v4sf __builtin_ia32_subss (v4sf, v4sf);
v4sf __builtin_ia32_mulss (v4sf, v4sf);
v4sf __builtin_ia32_divss (v4sf, v4sf);
v4sf __builtin_ia32_cmpeqps (v4sf, v4sf);
v4sf __builtin_ia32_cmpltps (v4sf, v4sf);
v4sf __builtin_ia32_cmpleps (v4sf, v4sf);
v4sf __builtin_ia32_cmpgtps (v4sf, v4sf);
v4sf __builtin_ia32_cmpgeps (v4sf, v4sf);
v4sf __builtin_ia32_cmpunordps (v4sf, v4sf);
v4sf __builtin_ia32_cmpneqps (v4sf, v4sf);
v4sf __builtin_ia32_cmpnltps (v4sf, v4sf);
v4sf __builtin_ia32_cmpnleps (v4sf, v4sf);
v4sf __builtin_ia32_cmpngtps (v4sf, v4sf);
v4sf __builtin_ia32_cmpngeps (v4sf, v4sf);
v4sf __builtin_ia32_cmpordps (v4sf, v4sf);
v4sf __builtin_ia32_cmpeqss (v4sf, v4sf);
v4sf __builtin_ia32_cmpltss (v4sf, v4sf);
v4sf __builtin_ia32_cmpless (v4sf, v4sf);
v4sf __builtin_ia32_cmpunordss (v4sf, v4sf);
v4sf __builtin_ia32_cmpneqss (v4sf, v4sf);
v4sf __builtin_ia32_cmpnltss (v4sf, v4sf);
v4sf __builtin_ia32_cmpnless (v4sf, v4sf);
v4sf __builtin_ia32_cmpordss (v4sf, v4sf);
v4sf __builtin_ia32_maxps (v4sf, v4sf);
v4sf __builtin_ia32_maxss (v4sf, v4sf);
v4sf __builtin_ia32_minps (v4sf, v4sf);
v4sf __builtin_ia32_minss (v4sf, v4sf);
v4sf __builtin_ia32_andps (v4sf, v4sf);
v4sf __builtin_ia32_andnps (v4sf, v4sf);
v4sf __builtin_ia32_orps (v4sf, v4sf);
v4sf __builtin_ia32_xorps (v4sf, v4sf);
v4sf __builtin_ia32_movss (v4sf, v4sf);
v4sf __builtin_ia32_movhlps (v4sf, v4sf);
v4sf __builtin_ia32_movlhps (v4sf, v4sf);
v4sf __builtin_ia32_unpckhps (v4sf, v4sf);
v4sf __builtin_ia32_unpcklps (v4sf, v4sf);
v4sf __builtin_ia32_cvtpi2ps (v4sf, v2si);
v4sf __builtin_ia32_cvtsi2ss (v4sf, int);
v2si __builtin_ia32_cvtps2pi (v4sf);
int __builtin_ia32_cvtss2si (v4sf);
v2si __builtin_ia32_cvttps2pi (v4sf);
int __builtin_ia32_cvttss2si (v4sf);
v4sf __builtin_ia32_rcpps (v4sf);
v4sf __builtin_ia32_rsqrtps (v4sf);
v4sf __builtin_ia32_sqrtps (v4sf);
v4sf __builtin_ia32_rcpss (v4sf);
v4sf __builtin_ia32_rsqrtss (v4sf);
v4sf __builtin_ia32_sqrtss (v4sf);
v4sf __builtin_ia32_shufps (v4sf, v4sf, int);
void __builtin_ia32_movntps (float *, v4sf);
int __builtin_ia32_movmskps (v4sf);
@end smallexample

The following built-in functions are available when @option{-msse} is used.

@defbuiltin{v4sf __builtin_ia32_loadups (float *)}
Generates the @code{movups} machine instruction as a load from memory.
@enddefbuiltin

@defbuiltin{void __builtin_ia32_storeups (float *, v4sf)}
Generates the @code{movups} machine instruction as a store to memory.
@enddefbuiltin

@defbuiltin{v4sf __builtin_ia32_loadss (float *)}
Generates the @code{movss} machine instruction as a load from memory.
@enddefbuiltin

@defbuiltin{v4sf __builtin_ia32_loadhps (v4sf, const v2sf *)}
Generates the @code{movhps} machine instruction as a load from memory.
@enddefbuiltin

@defbuiltin{v4sf __builtin_ia32_loadlps (v4sf, const v2sf *)}
Generates the @code{movlps} machine instruction as a load from memory
@enddefbuiltin

@defbuiltin{void __builtin_ia32_storehps (v2sf *, v4sf)}
Generates the @code{movhps} machine instruction as a store to memory.
@enddefbuiltin

@defbuiltin{void __builtin_ia32_storelps (v2sf *, v4sf)}
Generates the @code{movlps} machine instruction as a store to memory.
@enddefbuiltin

The following built-in functions are available when @option{-msse2} is used.
All of them generate the machine instruction that is part of the name.

@smallexample
int __builtin_ia32_comisdeq (v2df, v2df);
int __builtin_ia32_comisdlt (v2df, v2df);
int __builtin_ia32_comisdle (v2df, v2df);
int __builtin_ia32_comisdgt (v2df, v2df);
int __builtin_ia32_comisdge (v2df, v2df);
int __builtin_ia32_comisdneq (v2df, v2df);
int __builtin_ia32_ucomisdeq (v2df, v2df);
int __builtin_ia32_ucomisdlt (v2df, v2df);
int __builtin_ia32_ucomisdle (v2df, v2df);
int __builtin_ia32_ucomisdgt (v2df, v2df);
int __builtin_ia32_ucomisdge (v2df, v2df);
int __builtin_ia32_ucomisdneq (v2df, v2df);
v2df __builtin_ia32_cmpeqpd (v2df, v2df);
v2df __builtin_ia32_cmpltpd (v2df, v2df);
v2df __builtin_ia32_cmplepd (v2df, v2df);
v2df __builtin_ia32_cmpgtpd (v2df, v2df);
v2df __builtin_ia32_cmpgepd (v2df, v2df);
v2df __builtin_ia32_cmpunordpd (v2df, v2df);
v2df __builtin_ia32_cmpneqpd (v2df, v2df);
v2df __builtin_ia32_cmpnltpd (v2df, v2df);
v2df __builtin_ia32_cmpnlepd (v2df, v2df);
v2df __builtin_ia32_cmpngtpd (v2df, v2df);
v2df __builtin_ia32_cmpngepd (v2df, v2df);
v2df __builtin_ia32_cmpordpd (v2df, v2df);
v2df __builtin_ia32_cmpeqsd (v2df, v2df);
v2df __builtin_ia32_cmpltsd (v2df, v2df);
v2df __builtin_ia32_cmplesd (v2df, v2df);
v2df __builtin_ia32_cmpunordsd (v2df, v2df);
v2df __builtin_ia32_cmpneqsd (v2df, v2df);
v2df __builtin_ia32_cmpnltsd (v2df, v2df);
v2df __builtin_ia32_cmpnlesd (v2df, v2df);
v2df __builtin_ia32_cmpordsd (v2df, v2df);
v2di __builtin_ia32_paddq (v2di, v2di);
v2di __builtin_ia32_psubq (v2di, v2di);
v2df __builtin_ia32_addpd (v2df, v2df);
v2df __builtin_ia32_subpd (v2df, v2df);
v2df __builtin_ia32_mulpd (v2df, v2df);
v2df __builtin_ia32_divpd (v2df, v2df);
v2df __builtin_ia32_addsd (v2df, v2df);
v2df __builtin_ia32_subsd (v2df, v2df);
v2df __builtin_ia32_mulsd (v2df, v2df);
v2df __builtin_ia32_divsd (v2df, v2df);
v2df __builtin_ia32_minpd (v2df, v2df);
v2df __builtin_ia32_maxpd (v2df, v2df);
v2df __builtin_ia32_minsd (v2df, v2df);
v2df __builtin_ia32_maxsd (v2df, v2df);
v2df __builtin_ia32_andpd (v2df, v2df);
v2df __builtin_ia32_andnpd (v2df, v2df);
v2df __builtin_ia32_orpd (v2df, v2df);
v2df __builtin_ia32_xorpd (v2df, v2df);
v2df __builtin_ia32_movsd (v2df, v2df);
v2df __builtin_ia32_unpckhpd (v2df, v2df);
v2df __builtin_ia32_unpcklpd (v2df, v2df);
v16qi __builtin_ia32_paddb128 (v16qi, v16qi);
v8hi __builtin_ia32_paddw128 (v8hi, v8hi);
v4si __builtin_ia32_paddd128 (v4si, v4si);
v2di __builtin_ia32_paddq128 (v2di, v2di);
v16qi __builtin_ia32_psubb128 (v16qi, v16qi);
v8hi __builtin_ia32_psubw128 (v8hi, v8hi);
v4si __builtin_ia32_psubd128 (v4si, v4si);
v2di __builtin_ia32_psubq128 (v2di, v2di);
v8hi __builtin_ia32_pmullw128 (v8hi, v8hi);
v8hi __builtin_ia32_pmulhw128 (v8hi, v8hi);
v2di __builtin_ia32_pand128 (v2di, v2di);
v2di __builtin_ia32_pandn128 (v2di, v2di);
v2di __builtin_ia32_por128 (v2di, v2di);
v2di __builtin_ia32_pxor128 (v2di, v2di);
v16qi __builtin_ia32_pavgb128 (v16qi, v16qi);
v8hi __builtin_ia32_pavgw128 (v8hi, v8hi);
v16qi __builtin_ia32_pcmpeqb128 (v16qi, v16qi);
v8hi __builtin_ia32_pcmpeqw128 (v8hi, v8hi);
v4si __builtin_ia32_pcmpeqd128 (v4si, v4si);
v16qi __builtin_ia32_pcmpgtb128 (v16qi, v16qi);
v8hi __builtin_ia32_pcmpgtw128 (v8hi, v8hi);
v4si __builtin_ia32_pcmpgtd128 (v4si, v4si);
v16qi __builtin_ia32_pmaxub128 (v16qi, v16qi);
v8hi __builtin_ia32_pmaxsw128 (v8hi, v8hi);
v16qi __builtin_ia32_pminub128 (v16qi, v16qi);
v8hi __builtin_ia32_pminsw128 (v8hi, v8hi);
v16qi __builtin_ia32_punpckhbw128 (v16qi, v16qi);
v8hi __builtin_ia32_punpckhwd128 (v8hi, v8hi);
v4si __builtin_ia32_punpckhdq128 (v4si, v4si);
v2di __builtin_ia32_punpckhqdq128 (v2di, v2di);
v16qi __builtin_ia32_punpcklbw128 (v16qi, v16qi);
v8hi __builtin_ia32_punpcklwd128 (v8hi, v8hi);
v4si __builtin_ia32_punpckldq128 (v4si, v4si);
v2di __builtin_ia32_punpcklqdq128 (v2di, v2di);
v16qi __builtin_ia32_packsswb128 (v8hi, v8hi);
v8hi __builtin_ia32_packssdw128 (v4si, v4si);
v16qi __builtin_ia32_packuswb128 (v8hi, v8hi);
v8hi __builtin_ia32_pmulhuw128 (v8hi, v8hi);
void __builtin_ia32_maskmovdqu (v16qi, v16qi);
v2df __builtin_ia32_loadupd (double *);
void __builtin_ia32_storeupd (double *, v2df);
v2df __builtin_ia32_loadhpd (v2df, double const *);
v2df __builtin_ia32_loadlpd (v2df, double const *);
int __builtin_ia32_movmskpd (v2df);
int __builtin_ia32_pmovmskb128 (v16qi);
void __builtin_ia32_movnti (int *, int);
void __builtin_ia32_movnti64 (long long int *, long long int);
void __builtin_ia32_movntpd (double *, v2df);
void __builtin_ia32_movntdq (v2df *, v2df);
v4si __builtin_ia32_pshufd (v4si, int);
v8hi __builtin_ia32_pshuflw (v8hi, int);
v8hi __builtin_ia32_pshufhw (v8hi, int);
v2di __builtin_ia32_psadbw128 (v16qi, v16qi);
v2df __builtin_ia32_sqrtpd (v2df);
v2df __builtin_ia32_sqrtsd (v2df);
v2df __builtin_ia32_shufpd (v2df, v2df, int);
v2df __builtin_ia32_cvtdq2pd (v4si);
v4sf __builtin_ia32_cvtdq2ps (v4si);
v4si __builtin_ia32_cvtpd2dq (v2df);
v2si __builtin_ia32_cvtpd2pi (v2df);
v4sf __builtin_ia32_cvtpd2ps (v2df);
v4si __builtin_ia32_cvttpd2dq (v2df);
v2si __builtin_ia32_cvttpd2pi (v2df);
v2df __builtin_ia32_cvtpi2pd (v2si);
int __builtin_ia32_cvtsd2si (v2df);
int __builtin_ia32_cvttsd2si (v2df);
long long __builtin_ia32_cvtsd2si64 (v2df);
long long __builtin_ia32_cvttsd2si64 (v2df);
v4si __builtin_ia32_cvtps2dq (v4sf);
v2df __builtin_ia32_cvtps2pd (v4sf);
v4si __builtin_ia32_cvttps2dq (v4sf);
v2df __builtin_ia32_cvtsi2sd (v2df, int);
v2df __builtin_ia32_cvtsi642sd (v2df, long long);
v4sf __builtin_ia32_cvtsd2ss (v4sf, v2df);
v2df __builtin_ia32_cvtss2sd (v2df, v4sf);
void __builtin_ia32_clflush (const void *);
void __builtin_ia32_lfence (void);
void __builtin_ia32_mfence (void);
v16qi __builtin_ia32_loaddqu (const char *);
void __builtin_ia32_storedqu (char *, v16qi);
v1di __builtin_ia32_pmuludq (v2si, v2si);
v2di __builtin_ia32_pmuludq128 (v4si, v4si);
v8hi __builtin_ia32_psllw128 (v8hi, v8hi);
v4si __builtin_ia32_pslld128 (v4si, v4si);
v2di __builtin_ia32_psllq128 (v2di, v2di);
v8hi __builtin_ia32_psrlw128 (v8hi, v8hi);
v4si __builtin_ia32_psrld128 (v4si, v4si);
v2di __builtin_ia32_psrlq128 (v2di, v2di);
v8hi __builtin_ia32_psraw128 (v8hi, v8hi);
v4si __builtin_ia32_psrad128 (v4si, v4si);
v2di __builtin_ia32_pslldqi128 (v2di, int);
v8hi __builtin_ia32_psllwi128 (v8hi, int);
v4si __builtin_ia32_pslldi128 (v4si, int);
v2di __builtin_ia32_psllqi128 (v2di, int);
v2di __builtin_ia32_psrldqi128 (v2di, int);
v8hi __builtin_ia32_psrlwi128 (v8hi, int);
v4si __builtin_ia32_psrldi128 (v4si, int);
v2di __builtin_ia32_psrlqi128 (v2di, int);
v8hi __builtin_ia32_psrawi128 (v8hi, int);
v4si __builtin_ia32_psradi128 (v4si, int);
v4si __builtin_ia32_pmaddwd128 (v8hi, v8hi);
v2di __builtin_ia32_movq128 (v2di);
@end smallexample

The following built-in functions are available when @option{-msse3} is used.
All of them generate the machine instruction that is part of the name.

@smallexample
v2df __builtin_ia32_addsubpd (v2df, v2df);
v4sf __builtin_ia32_addsubps (v4sf, v4sf);
v2df __builtin_ia32_haddpd (v2df, v2df);
v4sf __builtin_ia32_haddps (v4sf, v4sf);
v2df __builtin_ia32_hsubpd (v2df, v2df);
v4sf __builtin_ia32_hsubps (v4sf, v4sf);
v16qi __builtin_ia32_lddqu (char const *);
void __builtin_ia32_monitor (void *, unsigned int, unsigned int);
v4sf __builtin_ia32_movshdup (v4sf);
v4sf __builtin_ia32_movsldup (v4sf);
void __builtin_ia32_mwait (unsigned int, unsigned int);
@end smallexample

The following built-in functions are available when @option{-mssse3} is used.
All of them generate the machine instruction that is part of the name.

@smallexample
v2si __builtin_ia32_phaddd (v2si, v2si);
v4hi __builtin_ia32_phaddw (v4hi, v4hi);
v4hi __builtin_ia32_phaddsw (v4hi, v4hi);
v2si __builtin_ia32_phsubd (v2si, v2si);
v4hi __builtin_ia32_phsubw (v4hi, v4hi);
v4hi __builtin_ia32_phsubsw (v4hi, v4hi);
v4hi __builtin_ia32_pmaddubsw (v8qi, v8qi);
v4hi __builtin_ia32_pmulhrsw (v4hi, v4hi);
v8qi __builtin_ia32_pshufb (v8qi, v8qi);
v8qi __builtin_ia32_psignb (v8qi, v8qi);
v2si __builtin_ia32_psignd (v2si, v2si);
v4hi __builtin_ia32_psignw (v4hi, v4hi);
v1di __builtin_ia32_palignr (v1di, v1di, int);
v8qi __builtin_ia32_pabsb (v8qi);
v2si __builtin_ia32_pabsd (v2si);
v4hi __builtin_ia32_pabsw (v4hi);
@end smallexample

The following built-in functions are available when @option{-mssse3} is used.
All of them generate the machine instruction that is part of the name.

@smallexample
v4si __builtin_ia32_phaddd128 (v4si, v4si);
v8hi __builtin_ia32_phaddw128 (v8hi, v8hi);
v8hi __builtin_ia32_phaddsw128 (v8hi, v8hi);
v4si __builtin_ia32_phsubd128 (v4si, v4si);
v8hi __builtin_ia32_phsubw128 (v8hi, v8hi);
v8hi __builtin_ia32_phsubsw128 (v8hi, v8hi);
v8hi __builtin_ia32_pmaddubsw128 (v16qi, v16qi);
v8hi __builtin_ia32_pmulhrsw128 (v8hi, v8hi);
v16qi __builtin_ia32_pshufb128 (v16qi, v16qi);
v16qi __builtin_ia32_psignb128 (v16qi, v16qi);
v4si __builtin_ia32_psignd128 (v4si, v4si);
v8hi __builtin_ia32_psignw128 (v8hi, v8hi);
v2di __builtin_ia32_palignr128 (v2di, v2di, int);
v16qi __builtin_ia32_pabsb128 (v16qi);
v4si __builtin_ia32_pabsd128 (v4si);
v8hi __builtin_ia32_pabsw128 (v8hi);
@end smallexample

The following built-in functions are available when @option{-msse4.1} is
used.  All of them generate the machine instruction that is part of the
name.

@smallexample
v2df __builtin_ia32_blendpd (v2df, v2df, const int);
v4sf __builtin_ia32_blendps (v4sf, v4sf, const int);
v2df __builtin_ia32_blendvpd (v2df, v2df, v2df);
v4sf __builtin_ia32_blendvps (v4sf, v4sf, v4sf);
v2df __builtin_ia32_dppd (v2df, v2df, const int);
v4sf __builtin_ia32_dpps (v4sf, v4sf, const int);
v4sf __builtin_ia32_insertps128 (v4sf, v4sf, const int);
v2di __builtin_ia32_movntdqa (v2di *);
v16qi __builtin_ia32_mpsadbw128 (v16qi, v16qi, const int);
v8hi __builtin_ia32_packusdw128 (v4si, v4si);
v16qi __builtin_ia32_pblendvb128 (v16qi, v16qi, v16qi);
v8hi __builtin_ia32_pblendw128 (v8hi, v8hi, const int);
v2di __builtin_ia32_pcmpeqq (v2di, v2di);
v8hi __builtin_ia32_phminposuw128 (v8hi);
v16qi __builtin_ia32_pmaxsb128 (v16qi, v16qi);
v4si __builtin_ia32_pmaxsd128 (v4si, v4si);
v4si __builtin_ia32_pmaxud128 (v4si, v4si);
v8hi __builtin_ia32_pmaxuw128 (v8hi, v8hi);
v16qi __builtin_ia32_pminsb128 (v16qi, v16qi);
v4si __builtin_ia32_pminsd128 (v4si, v4si);
v4si __builtin_ia32_pminud128 (v4si, v4si);
v8hi __builtin_ia32_pminuw128 (v8hi, v8hi);
v4si __builtin_ia32_pmovsxbd128 (v16qi);
v2di __builtin_ia32_pmovsxbq128 (v16qi);
v8hi __builtin_ia32_pmovsxbw128 (v16qi);
v2di __builtin_ia32_pmovsxdq128 (v4si);
v4si __builtin_ia32_pmovsxwd128 (v8hi);
v2di __builtin_ia32_pmovsxwq128 (v8hi);
v4si __builtin_ia32_pmovzxbd128 (v16qi);
v2di __builtin_ia32_pmovzxbq128 (v16qi);
v8hi __builtin_ia32_pmovzxbw128 (v16qi);
v2di __builtin_ia32_pmovzxdq128 (v4si);
v4si __builtin_ia32_pmovzxwd128 (v8hi);
v2di __builtin_ia32_pmovzxwq128 (v8hi);
v2di __builtin_ia32_pmuldq128 (v4si, v4si);
v4si __builtin_ia32_pmulld128 (v4si, v4si);
int __builtin_ia32_ptestc128 (v2di, v2di);
int __builtin_ia32_ptestnzc128 (v2di, v2di);
int __builtin_ia32_ptestz128 (v2di, v2di);
v2df __builtin_ia32_roundpd (v2df, const int);
v4sf __builtin_ia32_roundps (v4sf, const int);
v2df __builtin_ia32_roundsd (v2df, v2df, const int);
v4sf __builtin_ia32_roundss (v4sf, v4sf, const int);
@end smallexample

The following built-in functions are available when @option{-msse4.1} is
used.

@defbuiltin{v4sf __builtin_ia32_vec_set_v4sf (v4sf, float, const int)}
Generates the @code{insertps} machine instruction.
@enddefbuiltin

@defbuiltin{int __builtin_ia32_vec_ext_v16qi (v16qi, const int)}
Generates the @code{pextrb} machine instruction.
@enddefbuiltin

@defbuiltin{v16qi __builtin_ia32_vec_set_v16qi (v16qi, int, const int)}
Generates the @code{pinsrb} machine instruction.
@enddefbuiltin

@defbuiltin{v4si __builtin_ia32_vec_set_v4si (v4si, int, const int)}
Generates the @code{pinsrd} machine instruction.
@enddefbuiltin

@defbuiltin{v2di __builtin_ia32_vec_set_v2di (v2di, long long, const int)}
Generates the @code{pinsrq} machine instruction in 64bit mode.
@enddefbuiltin

The following built-in functions are changed to generate new SSE4.1
instructions when @option{-msse4.1} is used.

@defbuiltin{float __builtin_ia32_vec_ext_v4sf (v4sf, const int)}
Generates the @code{extractps} machine instruction.
@enddefbuiltin

@defbuiltin{int __builtin_ia32_vec_ext_v4si (v4si, const int)}
Generates the @code{pextrd} machine instruction.
@enddefbuiltin

@defbuiltin{{long long} __builtin_ia32_vec_ext_v2di (v2di, const int)}
Generates the @code{pextrq} machine instruction in 64bit mode.
@enddefbuiltin

The following built-in functions are available when @option{-msse4.2} is
used.  All of them generate the machine instruction that is part of the
name.

@smallexample
v16qi __builtin_ia32_pcmpestrm128 (v16qi, int, v16qi, int, const int);
int __builtin_ia32_pcmpestri128 (v16qi, int, v16qi, int, const int);
int __builtin_ia32_pcmpestria128 (v16qi, int, v16qi, int, const int);
int __builtin_ia32_pcmpestric128 (v16qi, int, v16qi, int, const int);
int __builtin_ia32_pcmpestrio128 (v16qi, int, v16qi, int, const int);
int __builtin_ia32_pcmpestris128 (v16qi, int, v16qi, int, const int);
int __builtin_ia32_pcmpestriz128 (v16qi, int, v16qi, int, const int);
v16qi __builtin_ia32_pcmpistrm128 (v16qi, v16qi, const int);
int __builtin_ia32_pcmpistri128 (v16qi, v16qi, const int);
int __builtin_ia32_pcmpistria128 (v16qi, v16qi, const int);
int __builtin_ia32_pcmpistric128 (v16qi, v16qi, const int);
int __builtin_ia32_pcmpistrio128 (v16qi, v16qi, const int);
int __builtin_ia32_pcmpistris128 (v16qi, v16qi, const int);
int __builtin_ia32_pcmpistriz128 (v16qi, v16qi, const int);
v2di __builtin_ia32_pcmpgtq (v2di, v2di);
@end smallexample

The following built-in functions are available when @option{-msse4.2} is
used.

@defbuiltin{{unsigned int} __builtin_ia32_crc32qi (unsigned int, unsigned char)}
Generates the @code{crc32b} machine instruction.
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_ia32_crc32hi (unsigned int, unsigned short)}
Generates the @code{crc32w} machine instruction.
@enddefbuiltin

@defbuiltin{{unsigned int} __builtin_ia32_crc32si (unsigned int, unsigned int)}
Generates the @code{crc32l} machine instruction.
@enddefbuiltin

@defbuiltin{{unsigned long long} __builtin_ia32_crc32di (unsigned long long, unsigned long long)}
Generates the @code{crc32q} machine instruction.
@enddefbuiltin

The following built-in functions are changed to generate new SSE4.2
instructions when @option{-msse4.2} is used.

@defbuiltin{int __builtin_popcount (unsigned int)}
Generates the @code{popcntl} machine instruction.
@enddefbuiltin

@defbuiltin{int __builtin_popcountl (unsigned long)}
Generates the @code{popcntl} or @code{popcntq} machine instruction,
depending on the size of @code{unsigned long}.
@enddefbuiltin

@defbuiltin{int __builtin_popcountll (unsigned long long)}
Generates the @code{popcntq} machine instruction.
@enddefbuiltin

The following built-in functions are available when @option{-mavx} is
used. All of them generate the machine instruction that is part of the
name.

@smallexample
v4df __builtin_ia32_addpd256 (v4df,v4df);
v8sf __builtin_ia32_addps256 (v8sf,v8sf);
v4df __builtin_ia32_addsubpd256 (v4df,v4df);
v8sf __builtin_ia32_addsubps256 (v8sf,v8sf);
v4df __builtin_ia32_andnpd256 (v4df,v4df);
v8sf __builtin_ia32_andnps256 (v8sf,v8sf);
v4df __builtin_ia32_andpd256 (v4df,v4df);
v8sf __builtin_ia32_andps256 (v8sf,v8sf);
v4df __builtin_ia32_blendpd256 (v4df,v4df,int);
v8sf __builtin_ia32_blendps256 (v8sf,v8sf,int);
v4df __builtin_ia32_blendvpd256 (v4df,v4df,v4df);
v8sf __builtin_ia32_blendvps256 (v8sf,v8sf,v8sf);
v2df __builtin_ia32_cmppd (v2df,v2df,int);
v4df __builtin_ia32_cmppd256 (v4df,v4df,int);
v4sf __builtin_ia32_cmpps (v4sf,v4sf,int);
v8sf __builtin_ia32_cmpps256 (v8sf,v8sf,int);
v2df __builtin_ia32_cmpsd (v2df,v2df,int);
v4sf __builtin_ia32_cmpss (v4sf,v4sf,int);
v4df __builtin_ia32_cvtdq2pd256 (v4si);
v8sf __builtin_ia32_cvtdq2ps256 (v8si);
v4si __builtin_ia32_cvtpd2dq256 (v4df);
v4sf __builtin_ia32_cvtpd2ps256 (v4df);
v8si __builtin_ia32_cvtps2dq256 (v8sf);
v4df __builtin_ia32_cvtps2pd256 (v4sf);
v4si __builtin_ia32_cvttpd2dq256 (v4df);
v8si __builtin_ia32_cvttps2dq256 (v8sf);
v4df __builtin_ia32_divpd256 (v4df,v4df);
v8sf __builtin_ia32_divps256 (v8sf,v8sf);
v8sf __builtin_ia32_dpps256 (v8sf,v8sf,int);
v4df __builtin_ia32_haddpd256 (v4df,v4df);
v8sf __builtin_ia32_haddps256 (v8sf,v8sf);
v4df __builtin_ia32_hsubpd256 (v4df,v4df);
v8sf __builtin_ia32_hsubps256 (v8sf,v8sf);
v32qi __builtin_ia32_lddqu256 (pcchar);
v32qi __builtin_ia32_loaddqu256 (pcchar);
v4df __builtin_ia32_loadupd256 (pcdouble);
v8sf __builtin_ia32_loadups256 (pcfloat);
v2df __builtin_ia32_maskloadpd (pcv2df,v2df);
v4df __builtin_ia32_maskloadpd256 (pcv4df,v4df);
v4sf __builtin_ia32_maskloadps (pcv4sf,v4sf);
v8sf __builtin_ia32_maskloadps256 (pcv8sf,v8sf);
void __builtin_ia32_maskstorepd (pv2df,v2df,v2df);
void __builtin_ia32_maskstorepd256 (pv4df,v4df,v4df);
void __builtin_ia32_maskstoreps (pv4sf,v4sf,v4sf);
void __builtin_ia32_maskstoreps256 (pv8sf,v8sf,v8sf);
v4df __builtin_ia32_maxpd256 (v4df,v4df);
v8sf __builtin_ia32_maxps256 (v8sf,v8sf);
v4df __builtin_ia32_minpd256 (v4df,v4df);
v8sf __builtin_ia32_minps256 (v8sf,v8sf);
v4df __builtin_ia32_movddup256 (v4df);
int __builtin_ia32_movmskpd256 (v4df);
int __builtin_ia32_movmskps256 (v8sf);
v8sf __builtin_ia32_movshdup256 (v8sf);
v8sf __builtin_ia32_movsldup256 (v8sf);
v4df __builtin_ia32_mulpd256 (v4df,v4df);
v8sf __builtin_ia32_mulps256 (v8sf,v8sf);
v4df __builtin_ia32_orpd256 (v4df,v4df);
v8sf __builtin_ia32_orps256 (v8sf,v8sf);
v2df __builtin_ia32_pd_pd256 (v4df);
v4df __builtin_ia32_pd256_pd (v2df);
v4sf __builtin_ia32_ps_ps256 (v8sf);
v8sf __builtin_ia32_ps256_ps (v4sf);
int __builtin_ia32_ptestc256 (v4di,v4di,ptest);
int __builtin_ia32_ptestnzc256 (v4di,v4di,ptest);
int __builtin_ia32_ptestz256 (v4di,v4di,ptest);
v8sf __builtin_ia32_rcpps256 (v8sf);
v4df __builtin_ia32_roundpd256 (v4df,int);
v8sf __builtin_ia32_roundps256 (v8sf,int);
v8sf __builtin_ia32_rsqrtps_nr256 (v8sf);
v8sf __builtin_ia32_rsqrtps256 (v8sf);
v4df __builtin_ia32_shufpd256 (v4df,v4df,int);
v8sf __builtin_ia32_shufps256 (v8sf,v8sf,int);
v4si __builtin_ia32_si_si256 (v8si);
v8si __builtin_ia32_si256_si (v4si);
v4df __builtin_ia32_sqrtpd256 (v4df);
v8sf __builtin_ia32_sqrtps_nr256 (v8sf);
v8sf __builtin_ia32_sqrtps256 (v8sf);
void __builtin_ia32_storedqu256 (pchar,v32qi);
void __builtin_ia32_storeupd256 (pdouble,v4df);
void __builtin_ia32_storeups256 (pfloat,v8sf);
v4df __builtin_ia32_subpd256 (v4df,v4df);
v8sf __builtin_ia32_subps256 (v8sf,v8sf);
v4df __builtin_ia32_unpckhpd256 (v4df,v4df);
v8sf __builtin_ia32_unpckhps256 (v8sf,v8sf);
v4df __builtin_ia32_unpcklpd256 (v4df,v4df);
v8sf __builtin_ia32_unpcklps256 (v8sf,v8sf);
v4df __builtin_ia32_vbroadcastf128_pd256 (pcv2df);
v8sf __builtin_ia32_vbroadcastf128_ps256 (pcv4sf);
v4df __builtin_ia32_vbroadcastsd256 (pcdouble);
v4sf __builtin_ia32_vbroadcastss (pcfloat);
v8sf __builtin_ia32_vbroadcastss256 (pcfloat);
v2df __builtin_ia32_vextractf128_pd256 (v4df,int);
v4sf __builtin_ia32_vextractf128_ps256 (v8sf,int);
v4si __builtin_ia32_vextractf128_si256 (v8si,int);
v4df __builtin_ia32_vinsertf128_pd256 (v4df,v2df,int);
v8sf __builtin_ia32_vinsertf128_ps256 (v8sf,v4sf,int);
v8si __builtin_ia32_vinsertf128_si256 (v8si,v4si,int);
v4df __builtin_ia32_vperm2f128_pd256 (v4df,v4df,int);
v8sf __builtin_ia32_vperm2f128_ps256 (v8sf,v8sf,int);
v8si __builtin_ia32_vperm2f128_si256 (v8si,v8si,int);
v2df __builtin_ia32_vpermil2pd (v2df,v2df,v2di,int);
v4df __builtin_ia32_vpermil2pd256 (v4df,v4df,v4di,int);
v4sf __builtin_ia32_vpermil2ps (v4sf,v4sf,v4si,int);
v8sf __builtin_ia32_vpermil2ps256 (v8sf,v8sf,v8si,int);
v2df __builtin_ia32_vpermilpd (v2df,int);
v4df __builtin_ia32_vpermilpd256 (v4df,int);
v4sf __builtin_ia32_vpermilps (v4sf,int);
v8sf __builtin_ia32_vpermilps256 (v8sf,int);
v2df __builtin_ia32_vpermilvarpd (v2df,v2di);
v4df __builtin_ia32_vpermilvarpd256 (v4df,v4di);
v4sf __builtin_ia32_vpermilvarps (v4sf,v4si);
v8sf __builtin_ia32_vpermilvarps256 (v8sf,v8si);
int __builtin_ia32_vtestcpd (v2df,v2df,ptest);
int __builtin_ia32_vtestcpd256 (v4df,v4df,ptest);
int __builtin_ia32_vtestcps (v4sf,v4sf,ptest);
int __builtin_ia32_vtestcps256 (v8sf,v8sf,ptest);
int __builtin_ia32_vtestnzcpd (v2df,v2df,ptest);
int __builtin_ia32_vtestnzcpd256 (v4df,v4df,ptest);
int __builtin_ia32_vtestnzcps (v4sf,v4sf,ptest);
int __builtin_ia32_vtestnzcps256 (v8sf,v8sf,ptest);
int __builtin_ia32_vtestzpd (v2df,v2df,ptest);
int __builtin_ia32_vtestzpd256 (v4df,v4df,ptest);
int __builtin_ia32_vtestzps (v4sf,v4sf,ptest);
int __builtin_ia32_vtestzps256 (v8sf,v8sf,ptest);
void __builtin_ia32_vzeroall (void);
void __builtin_ia32_vzeroupper (void);
v4df __builtin_ia32_xorpd256 (v4df,v4df);
v8sf __builtin_ia32_xorps256 (v8sf,v8sf);
@end smallexample

The following built-in functions are available when @option{-mavx2} is
used. All of them generate the machine instruction that is part of the
name.

@smallexample
v32qi __builtin_ia32_mpsadbw256 (v32qi,v32qi,int);
v32qi __builtin_ia32_pabsb256 (v32qi);
v16hi __builtin_ia32_pabsw256 (v16hi);
v8si __builtin_ia32_pabsd256 (v8si);
v16hi __builtin_ia32_packssdw256 (v8si,v8si);
v32qi __builtin_ia32_packsswb256 (v16hi,v16hi);
v16hi __builtin_ia32_packusdw256 (v8si,v8si);
v32qi __builtin_ia32_packuswb256 (v16hi,v16hi);
v32qi __builtin_ia32_paddb256 (v32qi,v32qi);
v16hi __builtin_ia32_paddw256 (v16hi,v16hi);
v8si __builtin_ia32_paddd256 (v8si,v8si);
v4di __builtin_ia32_paddq256 (v4di,v4di);
v32qi __builtin_ia32_paddsb256 (v32qi,v32qi);
v16hi __builtin_ia32_paddsw256 (v16hi,v16hi);
v32qi __builtin_ia32_paddusb256 (v32qi,v32qi);
v16hi __builtin_ia32_paddusw256 (v16hi,v16hi);
v4di __builtin_ia32_palignr256 (v4di,v4di,int);
v4di __builtin_ia32_andsi256 (v4di,v4di);
v4di __builtin_ia32_andnotsi256 (v4di,v4di);
v32qi __builtin_ia32_pavgb256 (v32qi,v32qi);
v16hi __builtin_ia32_pavgw256 (v16hi,v16hi);
v32qi __builtin_ia32_pblendvb256 (v32qi,v32qi,v32qi);
v16hi __builtin_ia32_pblendw256 (v16hi,v16hi,int);
v32qi __builtin_ia32_pcmpeqb256 (v32qi,v32qi);
v16hi __builtin_ia32_pcmpeqw256 (v16hi,v16hi);
v8si __builtin_ia32_pcmpeqd256 (c8si,v8si);
v4di __builtin_ia32_pcmpeqq256 (v4di,v4di);
v32qi __builtin_ia32_pcmpgtb256 (v32qi,v32qi);
v16hi __builtin_ia32_pcmpgtw256 (16hi,v16hi);
v8si __builtin_ia32_pcmpgtd256 (v8si,v8si);
v4di __builtin_ia32_pcmpgtq256 (v4di,v4di);
v16hi __builtin_ia32_phaddw256 (v16hi,v16hi);
v8si __builtin_ia32_phaddd256 (v8si,v8si);
v16hi __builtin_ia32_phaddsw256 (v16hi,v16hi);
v16hi __builtin_ia32_phsubw256 (v16hi,v16hi);
v8si __builtin_ia32_phsubd256 (v8si,v8si);
v16hi __builtin_ia32_phsubsw256 (v16hi,v16hi);
v32qi __builtin_ia32_pmaddubsw256 (v32qi,v32qi);
v16hi __builtin_ia32_pmaddwd256 (v16hi,v16hi);
v32qi __builtin_ia32_pmaxsb256 (v32qi,v32qi);
v16hi __builtin_ia32_pmaxsw256 (v16hi,v16hi);
v8si __builtin_ia32_pmaxsd256 (v8si,v8si);
v32qi __builtin_ia32_pmaxub256 (v32qi,v32qi);
v16hi __builtin_ia32_pmaxuw256 (v16hi,v16hi);
v8si __builtin_ia32_pmaxud256 (v8si,v8si);
v32qi __builtin_ia32_pminsb256 (v32qi,v32qi);
v16hi __builtin_ia32_pminsw256 (v16hi,v16hi);
v8si __builtin_ia32_pminsd256 (v8si,v8si);
v32qi __builtin_ia32_pminub256 (v32qi,v32qi);
v16hi __builtin_ia32_pminuw256 (v16hi,v16hi);
v8si __builtin_ia32_pminud256 (v8si,v8si);
int __builtin_ia32_pmovmskb256 (v32qi);
v16hi __builtin_ia32_pmovsxbw256 (v16qi);
v8si __builtin_ia32_pmovsxbd256 (v16qi);
v4di __builtin_ia32_pmovsxbq256 (v16qi);
v8si __builtin_ia32_pmovsxwd256 (v8hi);
v4di __builtin_ia32_pmovsxwq256 (v8hi);
v4di __builtin_ia32_pmovsxdq256 (v4si);
v16hi __builtin_ia32_pmovzxbw256 (v16qi);
v8si __builtin_ia32_pmovzxbd256 (v16qi);
v4di __builtin_ia32_pmovzxbq256 (v16qi);
v8si __builtin_ia32_pmovzxwd256 (v8hi);
v4di __builtin_ia32_pmovzxwq256 (v8hi);
v4di __builtin_ia32_pmovzxdq256 (v4si);
v4di __builtin_ia32_pmuldq256 (v8si,v8si);
v16hi __builtin_ia32_pmulhrsw256 (v16hi, v16hi);
v16hi __builtin_ia32_pmulhuw256 (v16hi,v16hi);
v16hi __builtin_ia32_pmulhw256 (v16hi,v16hi);
v16hi __builtin_ia32_pmullw256 (v16hi,v16hi);
v8si __builtin_ia32_pmulld256 (v8si,v8si);
v4di __builtin_ia32_pmuludq256 (v8si,v8si);
v4di __builtin_ia32_por256 (v4di,v4di);
v16hi __builtin_ia32_psadbw256 (v32qi,v32qi);
v32qi __builtin_ia32_pshufb256 (v32qi,v32qi);
v8si __builtin_ia32_pshufd256 (v8si,int);
v16hi __builtin_ia32_pshufhw256 (v16hi,int);
v16hi __builtin_ia32_pshuflw256 (v16hi,int);
v32qi __builtin_ia32_psignb256 (v32qi,v32qi);
v16hi __builtin_ia32_psignw256 (v16hi,v16hi);
v8si __builtin_ia32_psignd256 (v8si,v8si);
v4di __builtin_ia32_pslldqi256 (v4di,int);
v16hi __builtin_ia32_psllwi256 (16hi,int);
v16hi __builtin_ia32_psllw256(v16hi,v8hi);
v8si __builtin_ia32_pslldi256 (v8si,int);
v8si __builtin_ia32_pslld256(v8si,v4si);
v4di __builtin_ia32_psllqi256 (v4di,int);
v4di __builtin_ia32_psllq256(v4di,v2di);
v16hi __builtin_ia32_psrawi256 (v16hi,int);
v16hi __builtin_ia32_psraw256 (v16hi,v8hi);
v8si __builtin_ia32_psradi256 (v8si,int);
v8si __builtin_ia32_psrad256 (v8si,v4si);
v4di __builtin_ia32_psrldqi256 (v4di, int);
v16hi __builtin_ia32_psrlwi256 (v16hi,int);
v16hi __builtin_ia32_psrlw256 (v16hi,v8hi);
v8si __builtin_ia32_psrldi256 (v8si,int);
v8si __builtin_ia32_psrld256 (v8si,v4si);
v4di __builtin_ia32_psrlqi256 (v4di,int);
v4di __builtin_ia32_psrlq256(v4di,v2di);
v32qi __builtin_ia32_psubb256 (v32qi,v32qi);
v32hi __builtin_ia32_psubw256 (v16hi,v16hi);
v8si __builtin_ia32_psubd256 (v8si,v8si);
v4di __builtin_ia32_psubq256 (v4di,v4di);
v32qi __builtin_ia32_psubsb256 (v32qi,v32qi);
v16hi __builtin_ia32_psubsw256 (v16hi,v16hi);
v32qi __builtin_ia32_psubusb256 (v32qi,v32qi);
v16hi __builtin_ia32_psubusw256 (v16hi,v16hi);
v32qi __builtin_ia32_punpckhbw256 (v32qi,v32qi);
v16hi __builtin_ia32_punpckhwd256 (v16hi,v16hi);
v8si __builtin_ia32_punpckhdq256 (v8si,v8si);
v4di __builtin_ia32_punpckhqdq256 (v4di,v4di);
v32qi __builtin_ia32_punpcklbw256 (v32qi,v32qi);
v16hi __builtin_ia32_punpcklwd256 (v16hi,v16hi);
v8si __builtin_ia32_punpckldq256 (v8si,v8si);
v4di __builtin_ia32_punpcklqdq256 (v4di,v4di);
v4di __builtin_ia32_pxor256 (v4di,v4di);
v4di __builtin_ia32_movntdqa256 (pv4di);
v4sf __builtin_ia32_vbroadcastss_ps (v4sf);
v8sf __builtin_ia32_vbroadcastss_ps256 (v4sf);
v4df __builtin_ia32_vbroadcastsd_pd256 (v2df);
v4di __builtin_ia32_vbroadcastsi256 (v2di);
v4si __builtin_ia32_pblendd128 (v4si,v4si);
v8si __builtin_ia32_pblendd256 (v8si,v8si);
v32qi __builtin_ia32_pbroadcastb256 (v16qi);
v16hi __builtin_ia32_pbroadcastw256 (v8hi);
v8si __builtin_ia32_pbroadcastd256 (v4si);
v4di __builtin_ia32_pbroadcastq256 (v2di);
v16qi __builtin_ia32_pbroadcastb128 (v16qi);
v8hi __builtin_ia32_pbroadcastw128 (v8hi);
v4si __builtin_ia32_pbroadcastd128 (v4si);
v2di __builtin_ia32_pbroadcastq128 (v2di);
v8si __builtin_ia32_permvarsi256 (v8si,v8si);
v4df __builtin_ia32_permdf256 (v4df,int);
v8sf __builtin_ia32_permvarsf256 (v8sf,v8sf);
v4di __builtin_ia32_permdi256 (v4di,int);
v4di __builtin_ia32_permti256 (v4di,v4di,int);
v4di __builtin_ia32_extract128i256 (v4di,int);
v4di __builtin_ia32_insert128i256 (v4di,v2di,int);
v8si __builtin_ia32_maskloadd256 (pcv8si,v8si);
v4di __builtin_ia32_maskloadq256 (pcv4di,v4di);
v4si __builtin_ia32_maskloadd (pcv4si,v4si);
v2di __builtin_ia32_maskloadq (pcv2di,v2di);
void __builtin_ia32_maskstored256 (pv8si,v8si,v8si);
void __builtin_ia32_maskstoreq256 (pv4di,v4di,v4di);
void __builtin_ia32_maskstored (pv4si,v4si,v4si);
void __builtin_ia32_maskstoreq (pv2di,v2di,v2di);
v8si __builtin_ia32_psllv8si (v8si,v8si);
v4si __builtin_ia32_psllv4si (v4si,v4si);
v4di __builtin_ia32_psllv4di (v4di,v4di);
v2di __builtin_ia32_psllv2di (v2di,v2di);
v8si __builtin_ia32_psrav8si (v8si,v8si);
v4si __builtin_ia32_psrav4si (v4si,v4si);
v8si __builtin_ia32_psrlv8si (v8si,v8si);
v4si __builtin_ia32_psrlv4si (v4si,v4si);
v4di __builtin_ia32_psrlv4di (v4di,v4di);
v2di __builtin_ia32_psrlv2di (v2di,v2di);
v2df __builtin_ia32_gathersiv2df (v2df, pcdouble,v4si,v2df,int);
v4df __builtin_ia32_gathersiv4df (v4df, pcdouble,v4si,v4df,int);
v2df __builtin_ia32_gatherdiv2df (v2df, pcdouble,v2di,v2df,int);
v4df __builtin_ia32_gatherdiv4df (v4df, pcdouble,v4di,v4df,int);
v4sf __builtin_ia32_gathersiv4sf (v4sf, pcfloat,v4si,v4sf,int);
v8sf __builtin_ia32_gathersiv8sf (v8sf, pcfloat,v8si,v8sf,int);
v4sf __builtin_ia32_gatherdiv4sf (v4sf, pcfloat,v2di,v4sf,int);
v4sf __builtin_ia32_gatherdiv4sf256 (v4sf, pcfloat,v4di,v4sf,int);
v2di __builtin_ia32_gathersiv2di (v2di, pcint64,v4si,v2di,int);
v4di __builtin_ia32_gathersiv4di (v4di, pcint64,v4si,v4di,int);
v2di __builtin_ia32_gatherdiv2di (v2di, pcint64,v2di,v2di,int);
v4di __builtin_ia32_gatherdiv4di (v4di, pcint64,v4di,v4di,int);
v4si __builtin_ia32_gathersiv4si (v4si, pcint,v4si,v4si,int);
v8si __builtin_ia32_gathersiv8si (v8si, pcint,v8si,v8si,int);
v4si __builtin_ia32_gatherdiv4si (v4si, pcint,v2di,v4si,int);
v4si __builtin_ia32_gatherdiv4si256 (v4si, pcint,v4di,v4si,int);
@end smallexample

The following built-in functions are available when @option{-maes} is
used.  All of them generate the machine instruction that is part of the
name.

@smallexample
v2di __builtin_ia32_aesenc128 (v2di, v2di);
v2di __builtin_ia32_aesenclast128 (v2di, v2di);
v2di __builtin_ia32_aesdec128 (v2di, v2di);
v2di __builtin_ia32_aesdeclast128 (v2di, v2di);
v2di __builtin_ia32_aeskeygenassist128 (v2di, const int);
v2di __builtin_ia32_aesimc128 (v2di);
@end smallexample

The following built-in function is available when @option{-mpclmul} is
used.

@defbuiltin{v2di __builtin_ia32_pclmulqdq128 (v2di, v2di, const int)}
Generates the @code{pclmulqdq} machine instruction.
@enddefbuiltin

The following built-in function is available when @option{-mfsgsbase} is
used.  All of them generate the machine instruction that is part of the
name.

@smallexample
unsigned int __builtin_ia32_rdfsbase32 (void);
unsigned long long __builtin_ia32_rdfsbase64 (void);
unsigned int __builtin_ia32_rdgsbase32 (void);
unsigned long long __builtin_ia32_rdgsbase64 (void);
void _writefsbase_u32 (unsigned int);
void _writefsbase_u64 (unsigned long long);
void _writegsbase_u32 (unsigned int);
void _writegsbase_u64 (unsigned long long);
@end smallexample

The following built-in function is available when @option{-mrdrnd} is
used.  All of them generate the machine instruction that is part of the
name.

@smallexample
unsigned int __builtin_ia32_rdrand16_step (unsigned short *);
unsigned int __builtin_ia32_rdrand32_step (unsigned int *);
unsigned int __builtin_ia32_rdrand64_step (unsigned long long *);
@end smallexample

The following built-in function is available when @option{-mptwrite} is
used.  All of them generate the machine instruction that is part of the
name.

@smallexample
void __builtin_ia32_ptwrite32 (unsigned);
void __builtin_ia32_ptwrite64 (unsigned long long);
@end smallexample

The following built-in functions are available when @option{-msse4a} is used.
All of them generate the machine instruction that is part of the name.

@smallexample
void __builtin_ia32_movntsd (double *, v2df);
void __builtin_ia32_movntss (float *, v4sf);
v2di __builtin_ia32_extrq  (v2di, v16qi);
v2di __builtin_ia32_extrqi (v2di, const unsigned int, const unsigned int);
v2di __builtin_ia32_insertq (v2di, v2di);
v2di __builtin_ia32_insertqi (v2di, v2di, const unsigned int, const unsigned int);
@end smallexample

The following built-in functions are available when @option{-mxop} is used.
@smallexample
v2df __builtin_ia32_vfrczpd (v2df);
v4sf __builtin_ia32_vfrczps (v4sf);
v2df __builtin_ia32_vfrczsd (v2df);
v4sf __builtin_ia32_vfrczss (v4sf);
v4df __builtin_ia32_vfrczpd256 (v4df);
v8sf __builtin_ia32_vfrczps256 (v8sf);
v2di __builtin_ia32_vpcmov (v2di, v2di, v2di);
v2di __builtin_ia32_vpcmov_v2di (v2di, v2di, v2di);
v4si __builtin_ia32_vpcmov_v4si (v4si, v4si, v4si);
v8hi __builtin_ia32_vpcmov_v8hi (v8hi, v8hi, v8hi);
v16qi __builtin_ia32_vpcmov_v16qi (v16qi, v16qi, v16qi);
v2df __builtin_ia32_vpcmov_v2df (v2df, v2df, v2df);
v4sf __builtin_ia32_vpcmov_v4sf (v4sf, v4sf, v4sf);
v4di __builtin_ia32_vpcmov_v4di256 (v4di, v4di, v4di);
v8si __builtin_ia32_vpcmov_v8si256 (v8si, v8si, v8si);
v16hi __builtin_ia32_vpcmov_v16hi256 (v16hi, v16hi, v16hi);
v32qi __builtin_ia32_vpcmov_v32qi256 (v32qi, v32qi, v32qi);
v4df __builtin_ia32_vpcmov_v4df256 (v4df, v4df, v4df);
v8sf __builtin_ia32_vpcmov_v8sf256 (v8sf, v8sf, v8sf);
v16qi __builtin_ia32_vpcomeqb (v16qi, v16qi);
v8hi __builtin_ia32_vpcomeqw (v8hi, v8hi);
v4si __builtin_ia32_vpcomeqd (v4si, v4si);
v2di __builtin_ia32_vpcomeqq (v2di, v2di);
v16qi __builtin_ia32_vpcomequb (v16qi, v16qi);
v4si __builtin_ia32_vpcomequd (v4si, v4si);
v2di __builtin_ia32_vpcomequq (v2di, v2di);
v8hi __builtin_ia32_vpcomequw (v8hi, v8hi);
v8hi __builtin_ia32_vpcomeqw (v8hi, v8hi);
v16qi __builtin_ia32_vpcomfalseb (v16qi, v16qi);
v4si __builtin_ia32_vpcomfalsed (v4si, v4si);
v2di __builtin_ia32_vpcomfalseq (v2di, v2di);
v16qi __builtin_ia32_vpcomfalseub (v16qi, v16qi);
v4si __builtin_ia32_vpcomfalseud (v4si, v4si);
v2di __builtin_ia32_vpcomfalseuq (v2di, v2di);
v8hi __builtin_ia32_vpcomfalseuw (v8hi, v8hi);
v8hi __builtin_ia32_vpcomfalsew (v8hi, v8hi);
v16qi __builtin_ia32_vpcomgeb (v16qi, v16qi);
v4si __builtin_ia32_vpcomged (v4si, v4si);
v2di __builtin_ia32_vpcomgeq (v2di, v2di);
v16qi __builtin_ia32_vpcomgeub (v16qi, v16qi);
v4si __builtin_ia32_vpcomgeud (v4si, v4si);
v2di __builtin_ia32_vpcomgeuq (v2di, v2di);
v8hi __builtin_ia32_vpcomgeuw (v8hi, v8hi);
v8hi __builtin_ia32_vpcomgew (v8hi, v8hi);
v16qi __builtin_ia32_vpcomgtb (v16qi, v16qi);
v4si __builtin_ia32_vpcomgtd (v4si, v4si);
v2di __builtin_ia32_vpcomgtq (v2di, v2di);
v16qi __builtin_ia32_vpcomgtub (v16qi, v16qi);
v4si __builtin_ia32_vpcomgtud (v4si, v4si);
v2di __builtin_ia32_vpcomgtuq (v2di, v2di);
v8hi __builtin_ia32_vpcomgtuw (v8hi, v8hi);
v8hi __builtin_ia32_vpcomgtw (v8hi, v8hi);
v16qi __builtin_ia32_vpcomleb (v16qi, v16qi);
v4si __builtin_ia32_vpcomled (v4si, v4si);
v2di __builtin_ia32_vpcomleq (v2di, v2di);
v16qi __builtin_ia32_vpcomleub (v16qi, v16qi);
v4si __builtin_ia32_vpcomleud (v4si, v4si);
v2di __builtin_ia32_vpcomleuq (v2di, v2di);
v8hi __builtin_ia32_vpcomleuw (v8hi, v8hi);
v8hi __builtin_ia32_vpcomlew (v8hi, v8hi);
v16qi __builtin_ia32_vpcomltb (v16qi, v16qi);
v4si __builtin_ia32_vpcomltd (v4si, v4si);
v2di __builtin_ia32_vpcomltq (v2di, v2di);
v16qi __builtin_ia32_vpcomltub (v16qi, v16qi);
v4si __builtin_ia32_vpcomltud (v4si, v4si);
v2di __builtin_ia32_vpcomltuq (v2di, v2di);
v8hi __builtin_ia32_vpcomltuw (v8hi, v8hi);
v8hi __builtin_ia32_vpcomltw (v8hi, v8hi);
v16qi __builtin_ia32_vpcomneb (v16qi, v16qi);
v4si __builtin_ia32_vpcomned (v4si, v4si);
v2di __builtin_ia32_vpcomneq (v2di, v2di);
v16qi __builtin_ia32_vpcomneub (v16qi, v16qi);
v4si __builtin_ia32_vpcomneud (v4si, v4si);
v2di __builtin_ia32_vpcomneuq (v2di, v2di);
v8hi __builtin_ia32_vpcomneuw (v8hi, v8hi);
v8hi __builtin_ia32_vpcomnew (v8hi, v8hi);
v16qi __builtin_ia32_vpcomtrueb (v16qi, v16qi);
v4si __builtin_ia32_vpcomtrued (v4si, v4si);
v2di __builtin_ia32_vpcomtrueq (v2di, v2di);
v16qi __builtin_ia32_vpcomtrueub (v16qi, v16qi);
v4si __builtin_ia32_vpcomtrueud (v4si, v4si);
v2di __builtin_ia32_vpcomtrueuq (v2di, v2di);
v8hi __builtin_ia32_vpcomtrueuw (v8hi, v8hi);
v8hi __builtin_ia32_vpcomtruew (v8hi, v8hi);
v4si __builtin_ia32_vphaddbd (v16qi);
v2di __builtin_ia32_vphaddbq (v16qi);
v8hi __builtin_ia32_vphaddbw (v16qi);
v2di __builtin_ia32_vphadddq (v4si);
v4si __builtin_ia32_vphaddubd (v16qi);
v2di __builtin_ia32_vphaddubq (v16qi);
v8hi __builtin_ia32_vphaddubw (v16qi);
v2di __builtin_ia32_vphaddudq (v4si);
v4si __builtin_ia32_vphadduwd (v8hi);
v2di __builtin_ia32_vphadduwq (v8hi);
v4si __builtin_ia32_vphaddwd (v8hi);
v2di __builtin_ia32_vphaddwq (v8hi);
v8hi __builtin_ia32_vphsubbw (v16qi);
v2di __builtin_ia32_vphsubdq (v4si);
v4si __builtin_ia32_vphsubwd (v8hi);
v4si __builtin_ia32_vpmacsdd (v4si, v4si, v4si);
v2di __builtin_ia32_vpmacsdqh (v4si, v4si, v2di);
v2di __builtin_ia32_vpmacsdql (v4si, v4si, v2di);
v4si __builtin_ia32_vpmacssdd (v4si, v4si, v4si);
v2di __builtin_ia32_vpmacssdqh (v4si, v4si, v2di);
v2di __builtin_ia32_vpmacssdql (v4si, v4si, v2di);
v4si __builtin_ia32_vpmacsswd (v8hi, v8hi, v4si);
v8hi __builtin_ia32_vpmacssww (v8hi, v8hi, v8hi);
v4si __builtin_ia32_vpmacswd (v8hi, v8hi, v4si);
v8hi __builtin_ia32_vpmacsww (v8hi, v8hi, v8hi);
v4si __builtin_ia32_vpmadcsswd (v8hi, v8hi, v4si);
v4si __builtin_ia32_vpmadcswd (v8hi, v8hi, v4si);
v16qi __builtin_ia32_vpperm (v16qi, v16qi, v16qi);
v16qi __builtin_ia32_vprotb (v16qi, v16qi);
v4si __builtin_ia32_vprotd (v4si, v4si);
v2di __builtin_ia32_vprotq (v2di, v2di);
v8hi __builtin_ia32_vprotw (v8hi, v8hi);
v16qi __builtin_ia32_vpshab (v16qi, v16qi);
v4si __builtin_ia32_vpshad (v4si, v4si);
v2di __builtin_ia32_vpshaq (v2di, v2di);
v8hi __builtin_ia32_vpshaw (v8hi, v8hi);
v16qi __builtin_ia32_vpshlb (v16qi, v16qi);
v4si __builtin_ia32_vpshld (v4si, v4si);
v2di __builtin_ia32_vpshlq (v2di, v2di);
v8hi __builtin_ia32_vpshlw (v8hi, v8hi);
@end smallexample

The following built-in functions are available when @option{-mfma4} is used.
All of them generate the machine instruction that is part of the name.

@smallexample
v2df __builtin_ia32_vfmaddpd (v2df, v2df, v2df);
v4sf __builtin_ia32_vfmaddps (v4sf, v4sf, v4sf);
v2df __builtin_ia32_vfmaddsd (v2df, v2df, v2df);
v4sf __builtin_ia32_vfmaddss (v4sf, v4sf, v4sf);
v2df __builtin_ia32_vfmsubpd (v2df, v2df, v2df);
v4sf __builtin_ia32_vfmsubps (v4sf, v4sf, v4sf);
v2df __builtin_ia32_vfmsubsd (v2df, v2df, v2df);
v4sf __builtin_ia32_vfmsubss (v4sf, v4sf, v4sf);
v2df __builtin_ia32_vfnmaddpd (v2df, v2df, v2df);
v4sf __builtin_ia32_vfnmaddps (v4sf, v4sf, v4sf);
v2df __builtin_ia32_vfnmaddsd (v2df, v2df, v2df);
v4sf __builtin_ia32_vfnmaddss (v4sf, v4sf, v4sf);
v2df __builtin_ia32_vfnmsubpd (v2df, v2df, v2df);
v4sf __builtin_ia32_vfnmsubps (v4sf, v4sf, v4sf);
v2df __builtin_ia32_vfnmsubsd (v2df, v2df, v2df);
v4sf __builtin_ia32_vfnmsubss (v4sf, v4sf, v4sf);
v2df __builtin_ia32_vfmaddsubpd  (v2df, v2df, v2df);
v4sf __builtin_ia32_vfmaddsubps  (v4sf, v4sf, v4sf);
v2df __builtin_ia32_vfmsubaddpd  (v2df, v2df, v2df);
v4sf __builtin_ia32_vfmsubaddps  (v4sf, v4sf, v4sf);
v4df __builtin_ia32_vfmaddpd256 (v4df, v4df, v4df);
v8sf __builtin_ia32_vfmaddps256 (v8sf, v8sf, v8sf);
v4df __builtin_ia32_vfmsubpd256 (v4df, v4df, v4df);
v8sf __builtin_ia32_vfmsubps256 (v8sf, v8sf, v8sf);
v4df __builtin_ia32_vfnmaddpd256 (v4df, v4df, v4df);
v8sf __builtin_ia32_vfnmaddps256 (v8sf, v8sf, v8sf);
v4df __builtin_ia32_vfnmsubpd256 (v4df, v4df, v4df);
v8sf __builtin_ia32_vfnmsubps256 (v8sf, v8sf, v8sf);
v4df __builtin_ia32_vfmaddsubpd256 (v4df, v4df, v4df);
v8sf __builtin_ia32_vfmaddsubps256 (v8sf, v8sf, v8sf);
v4df __builtin_ia32_vfmsubaddpd256 (v4df, v4df, v4df);
v8sf __builtin_ia32_vfmsubaddps256 (v8sf, v8sf, v8sf);

@end smallexample

The following built-in functions are available when @option{-mlwp} is used.

@smallexample
void __builtin_ia32_llwpcb16 (void *);
void __builtin_ia32_llwpcb32 (void *);
void __builtin_ia32_llwpcb64 (void *);
void * __builtin_ia32_llwpcb16 (void);
void * __builtin_ia32_llwpcb32 (void);
void * __builtin_ia32_llwpcb64 (void);
void __builtin_ia32_lwpval16 (unsigned short, unsigned int, unsigned short);
void __builtin_ia32_lwpval32 (unsigned int, unsigned int, unsigned int);
void __builtin_ia32_lwpval64 (unsigned __int64, unsigned int, unsigned int);
unsigned char __builtin_ia32_lwpins16 (unsigned short, unsigned int, unsigned short);
unsigned char __builtin_ia32_lwpins32 (unsigned int, unsigned int, unsigned int);
unsigned char __builtin_ia32_lwpins64 (unsigned __int64, unsigned int, unsigned int);
@end smallexample

The following built-in functions are available when @option{-mbmi} is used.
All of them generate the machine instruction that is part of the name.
@smallexample
unsigned int __builtin_ia32_bextr_u32(unsigned int, unsigned int);
unsigned long long __builtin_ia32_bextr_u64 (unsigned long long, unsigned long long);
@end smallexample

The following built-in functions are available when @option{-mbmi2} is used.
All of them generate the machine instruction that is part of the name.
@smallexample
unsigned int _bzhi_u32 (unsigned int, unsigned int);
unsigned int _pdep_u32 (unsigned int, unsigned int);
unsigned int _pext_u32 (unsigned int, unsigned int);
unsigned long long _bzhi_u64 (unsigned long long, unsigned long long);
unsigned long long _pdep_u64 (unsigned long long, unsigned long long);
unsigned long long _pext_u64 (unsigned long long, unsigned long long);
@end smallexample

The following built-in functions are available when @option{-mlzcnt} is used.
All of them generate the machine instruction that is part of the name.
@smallexample
unsigned short __builtin_ia32_lzcnt_u16(unsigned short);
unsigned int __builtin_ia32_lzcnt_u32(unsigned int);
unsigned long long __builtin_ia32_lzcnt_u64 (unsigned long long);
@end smallexample

The following built-in functions are available when @option{-mfxsr} is used.
All of them generate the machine instruction that is part of the name.
@smallexample
void __builtin_ia32_fxsave (void *);
void __builtin_ia32_fxrstor (void *);
void __builtin_ia32_fxsave64 (void *);
void __builtin_ia32_fxrstor64 (void *);
@end smallexample

The following built-in functions are available when @option{-mxsave} is used.
All of them generate the machine instruction that is part of the name.
@smallexample
void __builtin_ia32_xsave (void *, long long);
void __builtin_ia32_xrstor (void *, long long);
void __builtin_ia32_xsave64 (void *, long long);
void __builtin_ia32_xrstor64 (void *, long long);
@end smallexample

The following built-in functions are available when @option{-mxsaveopt} is used.
All of them generate the machine instruction that is part of the name.
@smallexample
void __builtin_ia32_xsaveopt (void *, long long);
void __builtin_ia32_xsaveopt64 (void *, long long);
@end smallexample

The following built-in functions are available when @option{-mtbm} is used.
Both of them generate the immediate form of the bextr machine instruction.
@smallexample
unsigned int __builtin_ia32_bextri_u32 (unsigned int,
                                        const unsigned int);
unsigned long long __builtin_ia32_bextri_u64 (unsigned long long,
                                              const unsigned long long);
@end smallexample


The following built-in functions are available when @option{-m3dnow} is used.
All of them generate the machine instruction that is part of the name.

@smallexample
void __builtin_ia32_femms (void);
v8qi __builtin_ia32_pavgusb (v8qi, v8qi);
v2si __builtin_ia32_pf2id (v2sf);
v2sf __builtin_ia32_pfacc (v2sf, v2sf);
v2sf __builtin_ia32_pfadd (v2sf, v2sf);
v2si __builtin_ia32_pfcmpeq (v2sf, v2sf);
v2si __builtin_ia32_pfcmpge (v2sf, v2sf);
v2si __builtin_ia32_pfcmpgt (v2sf, v2sf);
v2sf __builtin_ia32_pfmax (v2sf, v2sf);
v2sf __builtin_ia32_pfmin (v2sf, v2sf);
v2sf __builtin_ia32_pfmul (v2sf, v2sf);
v2sf __builtin_ia32_pfrcp (v2sf);
v2sf __builtin_ia32_pfrcpit1 (v2sf, v2sf);
v2sf __builtin_ia32_pfrcpit2 (v2sf, v2sf);
v2sf __builtin_ia32_pfrsqrt (v2sf);
v2sf __builtin_ia32_pfsub (v2sf, v2sf);
v2sf __builtin_ia32_pfsubr (v2sf, v2sf);
v2sf __builtin_ia32_pi2fd (v2si);
v4hi __builtin_ia32_pmulhrw (v4hi, v4hi);
@end smallexample

The following built-in functions are available when @option{-m3dnowa} is used.
All of them generate the machine instruction that is part of the name.

@smallexample
v2si __builtin_ia32_pf2iw (v2sf);
v2sf __builtin_ia32_pfnacc (v2sf, v2sf);
v2sf __builtin_ia32_pfpnacc (v2sf, v2sf);
v2sf __builtin_ia32_pi2fw (v2si);
v2sf __builtin_ia32_pswapdsf (v2sf);
v2si __builtin_ia32_pswapdsi (v2si);
@end smallexample

The following built-in functions are available when @option{-mrtm} is used
They are used for restricted transactional memory. These are the internal
low level functions. Normally the functions in 
@ref{x86 transactional memory intrinsics} should be used instead.

@smallexample
int __builtin_ia32_xbegin ();
void __builtin_ia32_xend ();
void __builtin_ia32_xabort (status);
int __builtin_ia32_xtest ();
@end smallexample

The following built-in functions are available when @option{-mmwaitx} is used.
All of them generate the machine instruction that is part of the name.
@smallexample
void __builtin_ia32_monitorx (void *, unsigned int, unsigned int);
void __builtin_ia32_mwaitx (unsigned int, unsigned int, unsigned int);
@end smallexample

The following built-in functions are available when @option{-mclzero} is used.
All of them generate the machine instruction that is part of the name.
@smallexample
void __builtin_i32_clzero (void *);
@end smallexample

The following built-in functions are available when @option{-mpku} is used.
They generate reads and writes to PKRU.
@smallexample
void __builtin_ia32_wrpkru (unsigned int);
unsigned int __builtin_ia32_rdpkru ();
@end smallexample

The following built-in functions are available when
@option{-mshstk} option is used.  They support shadow stack
machine instructions from Intel Control-flow Enforcement Technology (CET).
Each built-in function generates the  machine instruction that is part
of the function's name.  These are the internal low-level functions.
Normally the functions in @ref{x86 control-flow protection intrinsics}
should be used instead.

@smallexample
unsigned int __builtin_ia32_rdsspd (void);
unsigned long long __builtin_ia32_rdsspq (void);
void __builtin_ia32_incsspd (unsigned int);
void __builtin_ia32_incsspq (unsigned long long);
void __builtin_ia32_saveprevssp(void);
void __builtin_ia32_rstorssp(void *);
void __builtin_ia32_wrssd(unsigned int, void *);
void __builtin_ia32_wrssq(unsigned long long, void *);
void __builtin_ia32_wrussd(unsigned int, void *);
void __builtin_ia32_wrussq(unsigned long long, void *);
void __builtin_ia32_setssbsy(void);
void __builtin_ia32_clrssbsy(void *);
@end smallexample

@node x86 transactional memory intrinsics
@subsection x86 Transactional Memory Intrinsics

These hardware transactional memory intrinsics for x86 allow you to use
memory transactions with RTM (Restricted Transactional Memory).
This support is enabled with the @option{-mrtm} option.
For using HLE (Hardware Lock Elision) see 
@ref{x86 specific memory model extensions for transactional memory} instead.

A memory transaction commits all changes to memory in an atomic way,
as visible to other threads. If the transaction fails it is rolled back
and all side effects discarded.

Generally there is no guarantee that a memory transaction ever succeeds
and suitable fallback code always needs to be supplied.

@deftypefn {RTM Function} {unsigned} _xbegin ()
Start a RTM (Restricted Transactional Memory) transaction. 
Returns @code{_XBEGIN_STARTED} when the transaction
started successfully (note this is not 0, so the constant has to be 
explicitly tested).  

If the transaction aborts, all side effects
are undone and an abort code encoded as a bit mask is returned.
The following macros are defined:

@defmac{_XABORT_EXPLICIT}
Transaction was explicitly aborted with @code{_xabort}.  The parameter passed
to @code{_xabort} is available with @code{_XABORT_CODE(status)}.
@end defmac

@defmac{_XABORT_RETRY}
Transaction retry is possible.
@end defmac

@defmac{_XABORT_CONFLICT}
Transaction abort due to a memory conflict with another thread.
@end defmac

@defmac{_XABORT_CAPACITY}
Transaction abort due to the transaction using too much memory.
@end defmac

@defmac{_XABORT_DEBUG}
Transaction abort due to a debug trap.
@end defmac

@defmac{_XABORT_NESTED}
Transaction abort in an inner nested transaction.
@end defmac

There is no guarantee
any transaction ever succeeds, so there always needs to be a valid
fallback path.
@end deftypefn

@deftypefn {RTM Function} {void} _xend ()
Commit the current transaction. When no transaction is active this faults.
All memory side effects of the transaction become visible
to other threads in an atomic manner.
@end deftypefn

@deftypefn {RTM Function} {int} _xtest ()
Return a nonzero value if a transaction is currently active, otherwise 0.
@end deftypefn

@deftypefn {RTM Function} {void} _xabort (status)
Abort the current transaction. When no transaction is active this is a no-op.
The @var{status} is an 8-bit constant; its value is encoded in the return 
value from @code{_xbegin}.
@end deftypefn

Here is an example showing handling for @code{_XABORT_RETRY}
and a fallback path for other failures:

@smallexample
#include <immintrin.h>

int n_tries, max_tries;
unsigned status = _XABORT_EXPLICIT;
...

for (n_tries = 0; n_tries < max_tries; n_tries++) 
  @{
    status = _xbegin ();
    if (status == _XBEGIN_STARTED || !(status & _XABORT_RETRY))
      break;
  @}
if (status == _XBEGIN_STARTED) 
  @{
    ... transaction code...
    _xend ();
  @} 
else 
  @{
    ... non-transactional fallback path...
  @}
@end smallexample

@noindent
Note that, in most cases, the transactional and non-transactional code
must synchronize together to ensure consistency.

@node x86 control-flow protection intrinsics
@subsection x86 Control-Flow Protection Intrinsics

@deftypefn {CET Function} {ret_type} _get_ssp (void)
Get the current value of shadow stack pointer if shadow stack support
from Intel CET is enabled in the hardware or @code{0} otherwise.
The @code{ret_type} is @code{unsigned long long} for 64-bit targets 
and @code{unsigned int} for 32-bit targets.
@end deftypefn

@deftypefn {CET Function} void _inc_ssp (unsigned int)
Increment the current shadow stack pointer by the size specified by the
function argument.  The argument is masked to a byte value for security
reasons, so to increment by more than 255 bytes you must call the function
multiple times.
@end deftypefn

The shadow stack unwind code looks like:

@smallexample
#include <immintrin.h>

/* Unwind the shadow stack for EH.  */
#define _Unwind_Frames_Extra(x)       \
  do                                  \
    @{                                \
      _Unwind_Word ssp = _get_ssp (); \
      if (ssp != 0)                   \
        @{                            \
          _Unwind_Word tmp = (x);     \
          while (tmp > 255)           \
            @{                        \
              _inc_ssp (tmp);         \
              tmp -= 255;             \
            @}                        \
          _inc_ssp (tmp);             \
        @}                            \
    @}                                \
    while (0)
@end smallexample

@noindent
This code runs unconditionally on all 64-bit processors.  For 32-bit
processors the code runs on those that support multi-byte NOP instructions.

@node Target Format Checks
@section Format Checks Specific to Particular Target Machines

For some target machines, GCC supports additional options to the
format attribute
(@pxref{Function Attributes,,Declaring Attributes of Functions}).

@menu
* Solaris Format Checks::
* Darwin Format Checks::
@end menu

@node Solaris Format Checks
@subsection Solaris Format Checks

Solaris targets support the @code{cmn_err} (or @code{__cmn_err__}) format
check.  @code{cmn_err} accepts a subset of the standard @code{printf}
conversions, and the two-argument @code{%b} conversion for displaying
bit-fields.  See the Solaris man page for @code{cmn_err} for more information.

@node Darwin Format Checks
@subsection Darwin Format Checks

In addition to the full set of format archetypes (attribute format style
arguments such as @code{printf}, @code{scanf}, @code{strftime}, and
@code{strfmon}), Darwin targets also support the @code{CFString} (or
@code{__CFString__}) archetype in the @code{format} attribute.
Declarations with this archetype are parsed for correct syntax
and argument types.  However, parsing of the format string itself and
validating arguments against it in calls to such functions is currently
not performed.

Additionally, @code{CFStringRefs} (defined by the @code{CoreFoundation} headers) may
also be used as format arguments.  Note that the relevant headers are only likely to be
available on Darwin (OSX) installations.  On such installations, the XCode and system
documentation provide descriptions of @code{CFString}, @code{CFStringRefs} and
associated functions.

@node Pragmas
@section Pragmas Accepted by GCC
@cindex pragmas
@cindex @code{#pragma}

GCC supports several types of pragmas, primarily in order to compile
code originally written for other compilers.  Note that in general
we do not recommend the use of pragmas; @xref{Function Attributes},
for further explanation.

The GNU C preprocessor recognizes several pragmas in addition to the
compiler pragmas documented here.  Refer to the CPP manual for more
information.

@menu
* AArch64 Pragmas::
* ARM Pragmas::
* M32C Pragmas::
* PRU Pragmas::
* RS/6000 and PowerPC Pragmas::
* S/390 Pragmas::
* Darwin Pragmas::
* Solaris Pragmas::
* Symbol-Renaming Pragmas::
* Structure-Layout Pragmas::
* Weak Pragmas::
* Diagnostic Pragmas::
* Visibility Pragmas::
* Push/Pop Macro Pragmas::
* Function Specific Option Pragmas::
* Loop-Specific Pragmas::
@end menu

@node AArch64 Pragmas
@subsection AArch64 Pragmas

The pragmas defined by the AArch64 target correspond to the AArch64
target function attributes.  They can be specified as below:
@smallexample
#pragma GCC target("string")
@end smallexample

where @code{@var{string}} can be any string accepted as an AArch64 target
attribute.  @xref{AArch64 Function Attributes}, for more details
on the permissible values of @code{string}.

@node ARM Pragmas
@subsection ARM Pragmas

The ARM target defines pragmas for controlling the default addition of
@code{long_call} and @code{short_call} attributes to functions.
@xref{Function Attributes}, for information about the effects of these
attributes.

@table @code
@cindex pragma, long_calls
@item long_calls
Set all subsequent functions to have the @code{long_call} attribute.

@cindex pragma, no_long_calls
@item no_long_calls
Set all subsequent functions to have the @code{short_call} attribute.

@cindex pragma, long_calls_off
@item long_calls_off
Do not affect the @code{long_call} or @code{short_call} attributes of
subsequent functions.
@end table

@node M32C Pragmas
@subsection M32C Pragmas

@table @code
@cindex pragma, memregs
@item GCC memregs @var{number}
Overrides the command-line option @code{-memregs=} for the current
file.  Use with care!  This pragma must be before any function in the
file, and mixing different memregs values in different objects may
make them incompatible.  This pragma is useful when a
performance-critical function uses a memreg for temporary values,
as it may allow you to reduce the number of memregs used.

@cindex pragma, address
@item ADDRESS @var{name} @var{address}
For any declared symbols matching @var{name}, this does three things
to that symbol: it forces the symbol to be located at the given
address (a number), it forces the symbol to be volatile, and it
changes the symbol's scope to be static.  This pragma exists for
compatibility with other compilers, but note that the common
@code{1234H} numeric syntax is not supported (use @code{0x1234}
instead).  Example:

@smallexample
#pragma ADDRESS port3 0x103
char port3;
@end smallexample

@end table

@node PRU Pragmas
@subsection PRU Pragmas

@table @code

@cindex pragma, ctable_entry
@item ctable_entry @var{index} @var{constant_address}
Specifies that the PRU CTABLE entry given by @var{index} has the value
@var{constant_address}.  This enables GCC to emit LBCO/SBCO instructions
when the load/store address is known and can be addressed with some CTABLE
entry.  For example:

@smallexample
/* will compile to "sbco Rx, 2, 0x10, 4" */
#pragma ctable_entry 2 0x4802a000
*(unsigned int *)0x4802a010 = val;
@end smallexample

@end table

@node RS/6000 and PowerPC Pragmas
@subsection RS/6000 and PowerPC Pragmas

The RS/6000 and PowerPC targets define one pragma for controlling
whether or not the @code{longcall} attribute is added to function
declarations by default.  This pragma overrides the @option{-mlongcall}
option, but not the @code{longcall} and @code{shortcall} attributes.
@xref{RS/6000 and PowerPC Options}, for more information about when long
calls are and are not necessary.

@table @code
@cindex pragma, longcall
@item longcall (1)
Apply the @code{longcall} attribute to all subsequent function
declarations.

@item longcall (0)
Do not apply the @code{longcall} attribute to subsequent function
declarations.
@end table

@c Describe h8300 pragmas here.
@c Describe sh pragmas here.
@c Describe v850 pragmas here.

@node S/390 Pragmas
@subsection S/390 Pragmas

The pragmas defined by the S/390 target correspond to the S/390
target function attributes and some the additional options:

@table @samp
@item zvector
@itemx no-zvector
@end table

Note that options of the pragma, unlike options of the target
attribute, do change the value of preprocessor macros like
@code{__VEC__}.  They can be specified as below:

@smallexample
#pragma GCC target("string[,string]...")
#pragma GCC target("string"[,"string"]...)
@end smallexample

@node Darwin Pragmas
@subsection Darwin Pragmas

The following pragmas are available for all architectures running the
Darwin operating system.  These are useful for compatibility with other
macOS compilers.

@table @code
@cindex pragma, mark
@item mark @var{tokens}@dots{}
This pragma is accepted, but has no effect.

@cindex pragma, options align
@item options align=@var{alignment}
This pragma sets the alignment of fields in structures.  The values of
@var{alignment} may be @code{mac68k}, to emulate m68k alignment, or
@code{power}, to emulate PowerPC alignment.  Uses of this pragma nest
properly; to restore the previous setting, use @code{reset} for the
@var{alignment}.

@cindex pragma, segment
@item segment @var{tokens}@dots{}
This pragma is accepted, but has no effect.

@cindex pragma, unused
@item unused (@var{var} [, @var{var}]@dots{})
This pragma declares variables to be possibly unused.  GCC does not
produce warnings for the listed variables.  The effect is similar to
that of the @code{unused} attribute, except that this pragma may appear
anywhere within the variables' scopes.
@end table

@node Solaris Pragmas
@subsection Solaris Pragmas

The Solaris target supports @code{#pragma redefine_extname}
(@pxref{Symbol-Renaming Pragmas}).  It also supports additional
@code{#pragma} directives for compatibility with the system compiler.

@table @code
@cindex pragma, align
@item align @var{alignment} (@var{variable} [, @var{variable}]...)

Increase the minimum alignment of each @var{variable} to @var{alignment}.
This is the same as GCC's @code{aligned} attribute @pxref{Variable
Attributes}).  Macro expansion occurs on the arguments to this pragma
when compiling C and Objective-C@.  It does not currently occur when
compiling C++, but this is a bug which may be fixed in a future
release.

@cindex pragma, fini
@item fini (@var{function} [, @var{function}]...)

This pragma causes each listed @var{function} to be called after
main, or during shared module unloading, by adding a call to the
@code{.fini} section.

@cindex pragma, init
@item init (@var{function} [, @var{function}]...)

This pragma causes each listed @var{function} to be called during
initialization (before @code{main}) or during shared module loading, by
adding a call to the @code{.init} section.

@end table

@node Symbol-Renaming Pragmas
@subsection Symbol-Renaming Pragmas

GCC supports a @code{#pragma} directive that changes the name used in
assembly for a given declaration. While this pragma is supported on all
platforms, it is intended primarily to provide compatibility with the
Solaris system headers. This effect can also be achieved using the asm
labels extension (@pxref{Asm Labels}).

@table @code
@cindex pragma, redefine_extname
@item redefine_extname @var{oldname} @var{newname}

This pragma gives the C function @var{oldname} the assembly symbol
@var{newname}.  The preprocessor macro @code{__PRAGMA_REDEFINE_EXTNAME}
is defined if this pragma is available (currently on all platforms).
@end table

This pragma and the @code{asm} labels extension interact in a complicated
manner.  Here are some corner cases you may want to be aware of:

@enumerate
@item This pragma silently applies only to declarations with external
linkage.  The @code{asm} label feature does not have this restriction.

@item In C++, this pragma silently applies only to declarations with
``C'' linkage.  Again, @code{asm} labels do not have this restriction.

@item If either of the ways of changing the assembly name of a
declaration are applied to a declaration whose assembly name has
already been determined (either by a previous use of one of these
features, or because the compiler needed the assembly name in order to
generate code), and the new name is different, a warning issues and
the name does not change.

@item The @var{oldname} used by @code{#pragma redefine_extname} is
always the C-language name.
@end enumerate

@node Structure-Layout Pragmas
@subsection Structure-Layout Pragmas

For compatibility with Microsoft Windows compilers, GCC supports a
set of @code{#pragma} directives that change the maximum alignment of
members of structures (other than zero-width bit-fields), unions, and
classes subsequently defined. The @var{n} value below always is required
to be a small power of two and specifies the new alignment in bytes.

@enumerate
@item @code{#pragma pack(@var{n})} simply sets the new alignment.
@item @code{#pragma pack()} sets the alignment to the one that was in
effect when compilation started (see also command-line option
@option{-fpack-struct[=@var{n}]} @pxref{Code Gen Options}).
@item @code{#pragma pack(push[,@var{n}])} pushes the current alignment
setting on an internal stack and then optionally sets the new alignment.
@item @code{#pragma pack(pop)} restores the alignment setting to the one
saved at the top of the internal stack (and removes that stack entry).
Note that @code{#pragma pack([@var{n}])} does not influence this internal
stack; thus it is possible to have @code{#pragma pack(push)} followed by
multiple @code{#pragma pack(@var{n})} instances and finalized by a single
@code{#pragma pack(pop)}.
@end enumerate

Some targets, e.g.@: x86 and PowerPC, support the @code{#pragma ms_struct}
directive which lays out structures and unions subsequently defined as the
documented @code{__attribute__ ((ms_struct))}.

@enumerate
@item @code{#pragma ms_struct on} turns on the Microsoft layout.
@item @code{#pragma ms_struct off} turns off the Microsoft layout.
@item @code{#pragma ms_struct reset} goes back to the default layout.
@end enumerate

Most targets also support the @code{#pragma scalar_storage_order} directive
which lays out structures and unions subsequently defined as the documented
@code{__attribute__ ((scalar_storage_order))}.

@enumerate
@item @code{#pragma scalar_storage_order big-endian} sets the storage order
of the scalar fields to big-endian.
@item @code{#pragma scalar_storage_order little-endian} sets the storage order
of the scalar fields to little-endian.
@item @code{#pragma scalar_storage_order default} goes back to the endianness
that was in effect when compilation started (see also command-line option
@option{-fsso-struct=@var{endianness}} @pxref{C Dialect Options}).
@end enumerate

@node Weak Pragmas
@subsection Weak Pragmas

For compatibility with SVR4, GCC supports a set of @code{#pragma}
directives for declaring symbols to be weak, and defining weak
aliases.

@table @code
@cindex pragma, weak
@item #pragma weak @var{symbol}
This pragma declares @var{symbol} to be weak, as if the declaration
had the attribute of the same name.  The pragma may appear before
or after the declaration of @var{symbol}.  It is not an error for
@var{symbol} to never be defined at all.

@item #pragma weak @var{symbol1} = @var{symbol2}
This pragma declares @var{symbol1} to be a weak alias of @var{symbol2}.
It is an error if @var{symbol2} is not defined in the current
translation unit.
@end table

@node Diagnostic Pragmas
@subsection Diagnostic Pragmas

GCC allows the user to selectively enable or disable certain types of
diagnostics, and change the kind of the diagnostic.  For example, a
project's policy might require that all sources compile with
@option{-Werror} but certain files might have exceptions allowing
specific types of warnings.  Or, a project might selectively enable
diagnostics and treat them as errors depending on which preprocessor
macros are defined.

@table @code
@cindex pragma, diagnostic
@item #pragma GCC diagnostic @var{kind} @var{option}

Modifies the disposition of a diagnostic.  Note that not all
diagnostics are modifiable; at the moment only warnings (normally
controlled by @samp{-W@dots{}}) can be controlled, and not all of them.
Use @option{-fdiagnostics-show-option} to determine which diagnostics
are controllable and which option controls them.

@var{kind} is @samp{error} to treat this diagnostic as an error,
@samp{warning} to treat it like a warning (even if @option{-Werror} is
in effect), or @samp{ignored} if the diagnostic is to be ignored.
@var{option} is a double quoted string that matches the command-line
option.

@smallexample
#pragma GCC diagnostic warning "-Wformat"
#pragma GCC diagnostic error "-Wformat"
#pragma GCC diagnostic ignored "-Wformat"
@end smallexample

Note that these pragmas override any command-line options.  GCC keeps
track of the location of each pragma, and issues diagnostics according
to the state as of that point in the source file.  Thus, pragmas occurring
after a line do not affect diagnostics caused by that line.

@item #pragma GCC diagnostic push
@itemx #pragma GCC diagnostic pop

Causes GCC to remember the state of the diagnostics as of each
@code{push}, and restore to that point at each @code{pop}.  If a
@code{pop} has no matching @code{push}, the command-line options are
restored.

@smallexample
#pragma GCC diagnostic error "-Wuninitialized"
  foo(a);                       /* error is given for this one */
#pragma GCC diagnostic push
#pragma GCC diagnostic ignored "-Wuninitialized"
  foo(b);                       /* no diagnostic for this one */
#pragma GCC diagnostic pop
  foo(c);                       /* error is given for this one */
#pragma GCC diagnostic pop
  foo(d);                       /* depends on command-line options */
@end smallexample

@item #pragma GCC diagnostic ignored_attributes

Similarly to @option{-Wno-attributes=}, this pragma allows users to suppress
warnings about unknown scoped attributes (in C++11 and C23).  For example,
@code{#pragma GCC diagnostic ignored_attributes "vendor::attr"} disables
warning about the following declaration:

@smallexample
[[vendor::attr]] void f();
@end smallexample

whereas @code{#pragma GCC diagnostic ignored_attributes "vendor::"} prevents
warning about both of these declarations:

@smallexample
[[vendor::safe]] void f();
[[vendor::unsafe]] void f2();
@end smallexample

@end table

GCC also offers a simple mechanism for printing messages during
compilation.

@table @code
@cindex pragma, diagnostic
@item #pragma message @var{string}

Prints @var{string} as a compiler message on compilation.  The message
is informational only, and is neither a compilation warning nor an
error.  Newlines can be included in the string by using the @samp{\n}
escape sequence.

@smallexample
#pragma message "Compiling " __FILE__ "..."
@end smallexample

@var{string} may be parenthesized, and is printed with location
information.  For example,

@smallexample
#define DO_PRAGMA(x) _Pragma (#x)
#define TODO(x) DO_PRAGMA(message ("TODO - " #x))

TODO(Remember to fix this)
@end smallexample

@noindent
prints @samp{/tmp/file.c:4: note: #pragma message:
TODO - Remember to fix this}.

@cindex pragma, diagnostic
@item #pragma GCC error @var{message}
Generates an error message.  This pragma @emph{is} considered to
indicate an error in the compilation, and it will be treated as such.

Newlines can be included in the string by using the @samp{\n}
escape sequence.  They will be displayed as newlines even if the
@option{-fmessage-length} option is set to zero.

The error is only generated if the pragma is present in the code after
pre-processing has been completed.  It does not matter however if the
code containing the pragma is unreachable:

@smallexample
#if 0
#pragma GCC error "this error is not seen"
#endif
void foo (void)
@{
  return;
#pragma GCC error "this error is seen"
@}
@end smallexample

@cindex pragma, diagnostic
@item #pragma GCC warning @var{message}
This is just like @samp{pragma GCC error} except that a warning
message is issued instead of an error message.  Unless
@option{-Werror} is in effect, in which case this pragma will generate
an error as well.

@end table

@node Visibility Pragmas
@subsection Visibility Pragmas

@table @code
@cindex pragma, visibility
@item #pragma GCC visibility push(@var{visibility})
@itemx #pragma GCC visibility pop

This pragma allows the user to set the visibility for multiple
declarations without having to give each a visibility attribute
(@pxref{Function Attributes}).

In C++, @samp{#pragma GCC visibility} affects only namespace-scope
declarations.  Class members and template specializations are not
affected; if you want to override the visibility for a particular
member or instantiation, you must use an attribute.

@end table


@node Push/Pop Macro Pragmas
@subsection Push/Pop Macro Pragmas

For compatibility with Microsoft Windows compilers, GCC supports
@samp{#pragma push_macro(@var{"macro_name"})}
and @samp{#pragma pop_macro(@var{"macro_name"})}.

@table @code
@cindex pragma, push_macro
@item #pragma push_macro(@var{"macro_name"})
This pragma saves the value of the macro named as @var{macro_name} to
the top of the stack for this macro.

@cindex pragma, pop_macro
@item #pragma pop_macro(@var{"macro_name"})
This pragma sets the value of the macro named as @var{macro_name} to
the value on top of the stack for this macro. If the stack for
@var{macro_name} is empty, the value of the macro remains unchanged.
@end table

For example:

@smallexample
#define X  1
#pragma push_macro("X")
#undef X
#define X -1
#pragma pop_macro("X")
int x [X];
@end smallexample

@noindent
In this example, the definition of X as 1 is saved by @code{#pragma
push_macro} and restored by @code{#pragma pop_macro}.

@node Function Specific Option Pragmas
@subsection Function Specific Option Pragmas

@table @code
@cindex pragma GCC target
@item #pragma GCC target (@var{string}, @dots{})

This pragma allows you to set target-specific options for functions
defined later in the source file.  One or more strings can be
specified.  Each function that is defined after this point is treated
as if it had been declared with one @code{target(}@var{string}@code{)}
attribute for each @var{string} argument.  The parentheses around
the strings in the pragma are optional.  @xref{Function Attributes},
for more information about the @code{target} attribute and the attribute
syntax.

The @code{#pragma GCC target} pragma is presently implemented for
x86, ARM, AArch64, PowerPC, S/390, and Nios II targets only.

@cindex pragma GCC optimize
@item #pragma GCC optimize (@var{string}, @dots{})

This pragma allows you to set global optimization options for functions
defined later in the source file.  One or more strings can be
specified.  Each function that is defined after this point is treated
as if it had been declared with one @code{optimize(}@var{string}@code{)}
attribute for each @var{string} argument.  The parentheses around
the strings in the pragma are optional.  @xref{Function Attributes},
for more information about the @code{optimize} attribute and the attribute
syntax.

@cindex pragma GCC push_options
@cindex pragma GCC pop_options
@item #pragma GCC push_options
@itemx #pragma GCC pop_options

These pragmas maintain a stack of the current target and optimization
options.  It is intended for include files where you temporarily want
to switch to using a different @samp{#pragma GCC target} or
@samp{#pragma GCC optimize} and then to pop back to the previous
options.

@cindex pragma GCC reset_options
@item #pragma GCC reset_options

This pragma clears the current @code{#pragma GCC target} and
@code{#pragma GCC optimize} to use the default switches as specified
on the command line.

@end table

@node Loop-Specific Pragmas
@subsection Loop-Specific Pragmas

@table @code
@cindex pragma GCC ivdep
@item #pragma GCC ivdep

With this pragma, the programmer asserts that there are no loop-carried
dependencies which would prevent consecutive iterations of
the following loop from executing concurrently with SIMD
(single instruction multiple data) instructions.

For example, the compiler can only unconditionally vectorize the following
loop with the pragma:

@smallexample
void foo (int n, int *a, int *b, int *c)
@{
  int i, j;
#pragma GCC ivdep
  for (i = 0; i < n; ++i)
    a[i] = b[i] + c[i];
@}
@end smallexample

@noindent
In this example, using the @code{restrict} qualifier had the same
effect. In the following example, that would not be possible. Assume
@math{k < -m} or @math{k >= m}. Only with the pragma, the compiler knows
that it can unconditionally vectorize the following loop:

@smallexample
void ignore_vec_dep (int *a, int k, int c, int m)
@{
#pragma GCC ivdep
  for (int i = 0; i < m; i++)
    a[i] = a[i + k] * c;
@}
@end smallexample

@cindex pragma GCC novector
@item #pragma GCC novector

With this pragma, the programmer asserts that the following loop should be
prevented from executing concurrently with SIMD (single instruction multiple
data) instructions.

For example, the compiler cannot vectorize the following loop with the pragma:

@smallexample
void foo (int n, int *a, int *b, int *c)
@{
  int i, j;
#pragma GCC novector
  for (i = 0; i < n; ++i)
    a[i] = b[i] + c[i];
@}
@end smallexample

@cindex pragma GCC unroll @var{n}
@item #pragma GCC unroll @var{n}

You can use this pragma to control how many times a loop should be unrolled.
It must be placed immediately before a @code{for}, @code{while} or @code{do}
loop or a @code{#pragma GCC ivdep}, and applies only to the loop that follows.
@var{n} is an integer constant expression specifying the unrolling factor.
The values of @math{0} and @math{1} block any unrolling of the loop.

@end table

@node Unnamed Fields
@section Unnamed Structure and Union Fields
@cindex @code{struct}
@cindex @code{union}

As permitted by ISO C11 and for compatibility with other compilers,
GCC allows you to define
a structure or union that contains, as fields, structures and unions
without names.  For example:

@smallexample
struct @{
  int a;
  union @{
    int b;
    float c;
  @};
  int d;
@} foo;
@end smallexample

@noindent
In this example, you are able to access members of the unnamed
union with code like @samp{foo.b}.  Note that only unnamed structs and
unions are allowed, you may not have, for example, an unnamed
@code{int}.

You must never create such structures that cause ambiguous field definitions.
For example, in this structure:

@smallexample
struct @{
  int a;
  struct @{
    int a;
  @};
@} foo;
@end smallexample

@noindent
it is ambiguous which @code{a} is being referred to with @samp{foo.a}.
The compiler gives errors for such constructs.

@opindex fms-extensions
Unless @option{-fms-extensions} is used, the unnamed field must be a
structure or union definition without a tag (for example, @samp{struct
@{ int a; @};}).  If @option{-fms-extensions} is used, the field may
also be a definition with a tag such as @samp{struct foo @{ int a;
@};}, a reference to a previously defined structure or union such as
@samp{struct foo;}, or a reference to a @code{typedef} name for a
previously defined structure or union type.

@opindex fplan9-extensions
The option @option{-fplan9-extensions} enables
@option{-fms-extensions} as well as two other extensions.  First, a
pointer to a structure is automatically converted to a pointer to an
anonymous field for assignments and function calls.  For example:

@smallexample
struct s1 @{ int a; @};
struct s2 @{ struct s1; @};
extern void f1 (struct s1 *);
void f2 (struct s2 *p) @{ f1 (p); @}
@end smallexample

@noindent
In the call to @code{f1} inside @code{f2}, the pointer @code{p} is
converted into a pointer to the anonymous field.

Second, when the type of an anonymous field is a @code{typedef} for a
@code{struct} or @code{union}, code may refer to the field using the
name of the @code{typedef}.

@smallexample
typedef struct @{ int a; @} s1;
struct s2 @{ s1; @};
s1 f1 (struct s2 *p) @{ return p->s1; @}
@end smallexample

These usages are only permitted when they are not ambiguous.

@node Thread-Local
@section Thread-Local Storage
@cindex Thread-Local Storage
@cindex @acronym{TLS}
@cindex @code{__thread}

Thread-local storage (@acronym{TLS}) is a mechanism by which variables
are allocated such that there is one instance of the variable per extant
thread.  The runtime model GCC uses to implement this originates
in the IA-64 processor-specific ABI, but has since been migrated
to other processors as well.  It requires significant support from
the linker (@command{ld}), dynamic linker (@command{ld.so}), and
system libraries (@file{libc.so} and @file{libpthread.so}), so it
is not available everywhere.

At the user level, the extension is visible with a new storage
class keyword: @code{__thread}.  For example:

@smallexample
__thread int i;
extern __thread struct state s;
static __thread char *p;
@end smallexample

The @code{__thread} specifier may be used alone, with the @code{extern}
or @code{static} specifiers, but with no other storage class specifier.
When used with @code{extern} or @code{static}, @code{__thread} must appear
immediately after the other storage class specifier.

The @code{__thread} specifier may be applied to any global, file-scoped
static, function-scoped static, or static data member of a class.  It may
not be applied to block-scoped automatic or non-static data member.

When the address-of operator is applied to a thread-local variable, it is
evaluated at run time and returns the address of the current thread's
instance of that variable.  An address so obtained may be used by any
thread.  When a thread terminates, any pointers to thread-local variables
in that thread become invalid.

No static initialization may refer to the address of a thread-local variable.

In C++, if an initializer is present for a thread-local variable, it must
be a @var{constant-expression}, as defined in 5.19.2 of the ANSI/ISO C++
standard.

See @uref{https://www.akkadia.org/drepper/tls.pdf,
ELF Handling For Thread-Local Storage} for a detailed explanation of
the four thread-local storage addressing models, and how the runtime
is expected to function.

@menu
* C99 Thread-Local Edits::
* C++98 Thread-Local Edits::
@end menu

@node C99 Thread-Local Edits
@subsection ISO/IEC 9899:1999 Edits for Thread-Local Storage

The following are a set of changes to ISO/IEC 9899:1999 (aka C99)
that document the exact semantics of the language extension.

@itemize @bullet
@item
@cite{5.1.2  Execution environments}

Add new text after paragraph 1

@quotation
Within either execution environment, a @dfn{thread} is a flow of
control within a program.  It is implementation defined whether
or not there may be more than one thread associated with a program.
It is implementation defined how threads beyond the first are
created, the name and type of the function called at thread
startup, and how threads may be terminated.  However, objects
with thread storage duration shall be initialized before thread
startup.
@end quotation

@item
@cite{6.2.4  Storage durations of objects}

Add new text before paragraph 3

@quotation
An object whose identifier is declared with the storage-class
specifier @w{@code{__thread}} has @dfn{thread storage duration}.
Its lifetime is the entire execution of the thread, and its
stored value is initialized only once, prior to thread startup.
@end quotation

@item
@cite{6.4.1  Keywords}

Add @code{__thread}.

@item
@cite{6.7.1  Storage-class specifiers}

Add @code{__thread} to the list of storage class specifiers in
paragraph 1.

Change paragraph 2 to

@quotation
With the exception of @code{__thread}, at most one storage-class
specifier may be given [@dots{}].  The @code{__thread} specifier may
be used alone, or immediately following @code{extern} or
@code{static}.
@end quotation

Add new text after paragraph 6

@quotation
The declaration of an identifier for a variable that has
block scope that specifies @code{__thread} shall also
specify either @code{extern} or @code{static}.

The @code{__thread} specifier shall be used only with
variables.
@end quotation
@end itemize

@node C++98 Thread-Local Edits
@subsection ISO/IEC 14882:1998 Edits for Thread-Local Storage

The following are a set of changes to ISO/IEC 14882:1998 (aka C++98)
that document the exact semantics of the language extension.

@itemize @bullet
@item
@b{[intro.execution]}

New text after paragraph 4

@quotation
A @dfn{thread} is a flow of control within the abstract machine.
It is implementation defined whether or not there may be more than
one thread.
@end quotation

New text after paragraph 7

@quotation
It is unspecified whether additional action must be taken to
ensure when and whether side effects are visible to other threads.
@end quotation

@item
@b{[lex.key]}

Add @code{__thread}.

@item
@b{[basic.start.main]}

Add after paragraph 5

@quotation
The thread that begins execution at the @code{main} function is called
the @dfn{main thread}.  It is implementation defined how functions
beginning threads other than the main thread are designated or typed.
A function so designated, as well as the @code{main} function, is called
a @dfn{thread startup function}.  It is implementation defined what
happens if a thread startup function returns.  It is implementation
defined what happens to other threads when any thread calls @code{exit}.
@end quotation

@item
@b{[basic.start.init]}

Add after paragraph 4

@quotation
The storage for an object of thread storage duration shall be
statically initialized before the first statement of the thread startup
function.  An object of thread storage duration shall not require
dynamic initialization.
@end quotation

@item
@b{[basic.start.term]}

Add after paragraph 3

@quotation
The type of an object with thread storage duration shall not have a
non-trivial destructor, nor shall it be an array type whose elements
(directly or indirectly) have non-trivial destructors.
@end quotation

@item
@b{[basic.stc]}

Add ``thread storage duration'' to the list in paragraph 1.

Change paragraph 2

@quotation
Thread, static, and automatic storage durations are associated with
objects introduced by declarations [@dots{}].
@end quotation

Add @code{__thread} to the list of specifiers in paragraph 3.

@item
@b{[basic.stc.thread]}

New section before @b{[basic.stc.static]}

@quotation
The keyword @code{__thread} applied to a non-local object gives the
object thread storage duration.

A local variable or class data member declared both @code{static}
and @code{__thread} gives the variable or member thread storage
duration.
@end quotation

@item
@b{[basic.stc.static]}

Change paragraph 1

@quotation
All objects that have neither thread storage duration, dynamic
storage duration nor are local [@dots{}].
@end quotation

@item
@b{[dcl.stc]}

Add @code{__thread} to the list in paragraph 1.

Change paragraph 1

@quotation
With the exception of @code{__thread}, at most one
@var{storage-class-specifier} shall appear in a given
@var{decl-specifier-seq}.  The @code{__thread} specifier may
be used alone, or immediately following the @code{extern} or
@code{static} specifiers.  [@dots{}]
@end quotation

Add after paragraph 5

@quotation
The @code{__thread} specifier can be applied only to the names of objects
and to anonymous unions.
@end quotation

@item
@b{[class.mem]}

Add after paragraph 6

@quotation
Non-@code{static} members shall not be @code{__thread}.
@end quotation
@end itemize

@node Binary constants
@section Binary Constants using the @samp{0b} Prefix
@cindex Binary constants using the @samp{0b} prefix

Integer constants can be written as binary constants, consisting of a
sequence of @samp{0} and @samp{1} digits, prefixed by @samp{0b} or
@samp{0B}.  This is particularly useful in environments that operate a
lot on the bit level (like microcontrollers).

The following statements are identical:

@smallexample
i =       42;
i =     0x2a;
i =      052;
i = 0b101010;
@end smallexample

The type of these constants follows the same rules as for octal or
hexadecimal integer constants, so suffixes like @samp{L} or @samp{UL}
can be applied.

@node C++ Extensions
@chapter Extensions to the C++ Language
@cindex extensions, C++ language
@cindex C++ language extensions

The GNU compiler provides these extensions to the C++ language (and you
can also use most of the C language extensions in your C++ programs).  If you
want to write code that checks whether these features are available, you can
test for the GNU compiler the same way as for C programs: check for a
predefined macro @code{__GNUC__}.  You can also use @code{__GNUG__} to
test specifically for GNU C++ (@pxref{Common Predefined Macros,,
Predefined Macros,cpp,The GNU C Preprocessor}).

@menu
* C++ Volatiles::       What constitutes an access to a volatile object.
* Restricted Pointers:: C99 restricted pointers and references.
* Vague Linkage::       Where G++ puts inlines, vtables and such.
* C++ Interface::       You can use a single C++ header file for both
                        declarations and definitions.
* Template Instantiation:: Methods for ensuring that exactly one copy of
                        each needed template instantiation is emitted.
* Bound member functions:: You can extract a function pointer to the
                        method denoted by a @samp{->*} or @samp{.*} expression.
* C++ Attributes::      Variable, function, and type attributes for C++ only.
* Function Multiversioning::   Declaring multiple function versions.
* Type Traits::         Compiler support for type traits.
* C++ Concepts::        Improved support for generic programming.
* Deprecated Features:: Things will disappear from G++.
* Backwards Compatibility:: Compatibilities with earlier definitions of C++.
@end menu

@node C++ Volatiles
@section When is a Volatile C++ Object Accessed?
@cindex accessing volatiles
@cindex volatile read
@cindex volatile write
@cindex volatile access

The C++ standard differs from the C standard in its treatment of
volatile objects.  It fails to specify what constitutes a volatile
access, except to say that C++ should behave in a similar manner to C
with respect to volatiles, where possible.  However, the different
lvalueness of expressions between C and C++ complicate the behavior.
G++ behaves the same as GCC for volatile access, @xref{C
Extensions,,Volatiles}, for a description of GCC's behavior.

The C and C++ language specifications differ when an object is
accessed in a void context:

@smallexample
volatile int *src = @var{somevalue};
*src;
@end smallexample

The C++ standard specifies that such expressions do not undergo lvalue
to rvalue conversion, and that the type of the dereferenced object may
be incomplete.  The C++ standard does not specify explicitly that it
is lvalue to rvalue conversion that is responsible for causing an
access.  There is reason to believe that it is, because otherwise
certain simple expressions become undefined.  However, because it
would surprise most programmers, G++ treats dereferencing a pointer to
volatile object of complete type as GCC would do for an equivalent
type in C@.  When the object has incomplete type, G++ issues a
warning; if you wish to force an error, you must force a conversion to
rvalue with, for instance, a static cast.

When using a reference to volatile, G++ does not treat equivalent
expressions as accesses to volatiles, but instead issues a warning that
no volatile is accessed.  The rationale for this is that otherwise it
becomes difficult to determine where volatile access occur, and not
possible to ignore the return value from functions returning volatile
references.  Again, if you wish to force a read, cast the reference to
an rvalue.

G++ implements the same behavior as GCC does when assigning to a
volatile object---there is no reread of the assigned-to object, the
assigned rvalue is reused.  Note that in C++ assignment expressions
are lvalues, and if used as an lvalue, the volatile object is
referred to.  For instance, @var{vref} refers to @var{vobj}, as
expected, in the following example:

@smallexample
volatile int vobj;
volatile int &vref = vobj = @var{something};
@end smallexample

@node Restricted Pointers
@section Restricting Pointer Aliasing
@cindex restricted pointers
@cindex restricted references
@cindex restricted this pointer

As with the C front end, G++ understands the C99 feature of restricted pointers,
specified with the @code{__restrict__}, or @code{__restrict} type
qualifier.  Because you cannot compile C++ by specifying the @option{-std=c99}
language flag, @code{restrict} is not a keyword in C++.

In addition to allowing restricted pointers, you can specify restricted
references, which indicate that the reference is not aliased in the local
context.

@smallexample
void fn (int *__restrict__ rptr, int &__restrict__ rref)
@{
  /* @r{@dots{}} */
@}
@end smallexample

@noindent
In the body of @code{fn}, @var{rptr} points to an unaliased integer and
@var{rref} refers to a (different) unaliased integer.

You may also specify whether a member function's @var{this} pointer is
unaliased by using @code{__restrict__} as a member function qualifier.

@smallexample
void T::fn () __restrict__
@{
  /* @r{@dots{}} */
@}
@end smallexample

@noindent
Within the body of @code{T::fn}, @var{this} has the effective
definition @code{T *__restrict__ const this}.  Notice that the
interpretation of a @code{__restrict__} member function qualifier is
different to that of @code{const} or @code{volatile} qualifier, in that it
is applied to the pointer rather than the object.  This is consistent with
other compilers that implement restricted pointers.

As with all outermost parameter qualifiers, @code{__restrict__} is
ignored in function definition matching.  This means you only need to
specify @code{__restrict__} in a function definition, rather than
in a function prototype as well.

@node Vague Linkage
@section Vague Linkage
@cindex vague linkage

There are several constructs in C++ that require space in the object
file but are not clearly tied to a single translation unit.  We say that
these constructs have ``vague linkage''.  Typically such constructs are
emitted wherever they are needed, though sometimes we can be more
clever.

@table @asis
@item Inline Functions
Inline functions are typically defined in a header file which can be
included in many different compilations.  Hopefully they can usually be
inlined, but sometimes an out-of-line copy is necessary, if the address
of the function is taken or if inlining fails.  In general, we emit an
out-of-line copy in all translation units where one is needed.  As an
exception, we only emit inline virtual functions with the vtable, since
it always requires a copy.

Local static variables and string constants used in an inline function
are also considered to have vague linkage, since they must be shared
between all inlined and out-of-line instances of the function.

@cindex vtable
@item VTables
C++ virtual functions are implemented in most compilers using a lookup
table, known as a vtable.  The vtable contains pointers to the virtual
functions provided by a class, and each object of the class contains a
pointer to its vtable (or vtables, in some multiple-inheritance
situations).  If the class declares any non-inline, non-pure virtual
functions, the first one is chosen as the ``key method'' for the class,
and the vtable is only emitted in the translation unit where the key
method is defined.

@emph{Note:} If the chosen key method is later defined as inline, the
vtable is still emitted in every translation unit that defines it.
Make sure that any inline virtuals are declared inline in the class
body, even if they are not defined there.

@cindex @code{type_info}
@cindex RTTI
@item @code{type_info} objects
C++ requires information about types to be written out in order to
implement @samp{dynamic_cast}, @samp{typeid} and exception handling.
For polymorphic classes (classes with virtual functions), the @samp{type_info}
object is written out along with the vtable so that @samp{dynamic_cast}
can determine the dynamic type of a class object at run time.  For all
other types, we write out the @samp{type_info} object when it is used: when
applying @samp{typeid} to an expression, throwing an object, or
referring to a type in a catch clause or exception specification.

@item Template Instantiations
Most everything in this section also applies to template instantiations,
but there are other options as well.
@xref{Template Instantiation,,Where's the Template?}.

@end table

When used with GNU ld version 2.8 or later on an ELF system such as
GNU/Linux or Solaris 2, or on Microsoft Windows, duplicate copies of
these constructs will be discarded at link time.  This is known as
COMDAT support.

On targets that don't support COMDAT, but do support weak symbols, GCC
uses them.  This way one copy overrides all the others, but
the unused copies still take up space in the executable.

For targets that do not support either COMDAT or weak symbols,
most entities with vague linkage are emitted as local symbols to
avoid duplicate definition errors from the linker.  This does not happen
for local statics in inlines, however, as having multiple copies
almost certainly breaks things.

@xref{C++ Interface,,Declarations and Definitions in One Header}, for
another way to control placement of these constructs.

@node C++ Interface
@section C++ Interface and Implementation Pragmas

@cindex interface and implementation headers, C++
@cindex C++ interface and implementation headers
@cindex pragmas, interface and implementation

@code{#pragma interface} and @code{#pragma implementation} provide the
user with a way of explicitly directing the compiler to emit entities
with vague linkage (and debugging information) in a particular
translation unit.

@emph{Note:} These @code{#pragma}s have been superceded as of GCC 2.7.2
by COMDAT support and the ``key method'' heuristic
mentioned in @ref{Vague Linkage}.  Using them can actually cause your
program to grow due to unnecessary out-of-line copies of inline
functions.

@table @code
@kindex #pragma interface
@item #pragma interface
@itemx #pragma interface "@var{subdir}/@var{objects}.h"
Use this directive in @emph{header files} that define object classes, to save
space in most of the object files that use those classes.  Normally,
local copies of certain information (backup copies of inline member
functions, debugging information, and the internal tables that implement
virtual functions) must be kept in each object file that includes class
definitions.  You can use this pragma to avoid such duplication.  When a
header file containing @samp{#pragma interface} is included in a
compilation, this auxiliary information is not generated (unless
the main input source file itself uses @samp{#pragma implementation}).
Instead, the object files contain references to be resolved at link
time.

The second form of this directive is useful for the case where you have
multiple headers with the same name in different directories.  If you
use this form, you must specify the same string to @samp{#pragma
implementation}.

@kindex #pragma implementation
@item #pragma implementation
@itemx #pragma implementation "@var{objects}.h"
Use this pragma in a @emph{main input file}, when you want full output from
included header files to be generated (and made globally visible).  The
included header file, in turn, should use @samp{#pragma interface}.
Backup copies of inline member functions, debugging information, and the
internal tables used to implement virtual functions are all generated in
implementation files.

@cindex implied @code{#pragma implementation}
@cindex @code{#pragma implementation}, implied
@cindex naming convention, implementation headers
If you use @samp{#pragma implementation} with no argument, it applies to
an include file with the same basename@footnote{A file's @dfn{basename}
is the name stripped of all leading path information and of trailing
suffixes, such as @samp{.h} or @samp{.C} or @samp{.cc}.} as your source
file.  For example, in @file{allclass.cc}, giving just
@samp{#pragma implementation}
by itself is equivalent to @samp{#pragma implementation "allclass.h"}.

Use the string argument if you want a single implementation file to
include code from multiple header files.  (You must also use
@samp{#include} to include the header file; @samp{#pragma
implementation} only specifies how to use the file---it doesn't actually
include it.)

There is no way to split up the contents of a single header file into
multiple implementation files.
@end table

@cindex inlining and C++ pragmas
@cindex C++ pragmas, effect on inlining
@cindex pragmas in C++, effect on inlining
@samp{#pragma implementation} and @samp{#pragma interface} also have an
effect on function inlining.

If you define a class in a header file marked with @samp{#pragma
interface}, the effect on an inline function defined in that class is
similar to an explicit @code{extern} declaration---the compiler emits
no code at all to define an independent version of the function.  Its
definition is used only for inlining with its callers.

@opindex fno-implement-inlines
Conversely, when you include the same header file in a main source file
that declares it as @samp{#pragma implementation}, the compiler emits
code for the function itself; this defines a version of the function
that can be found via pointers (or by callers compiled without
inlining).  If all calls to the function can be inlined, you can avoid
emitting the function by compiling with @option{-fno-implement-inlines}.
If any calls are not inlined, you will get linker errors.

@node Template Instantiation
@section Where's the Template?
@cindex template instantiation

C++ templates were the first language feature to require more
intelligence from the environment than was traditionally found on a UNIX
system.  Somehow the compiler and linker have to make sure that each
template instance occurs exactly once in the executable if it is needed,
and not at all otherwise.  There are two basic approaches to this
problem, which are referred to as the Borland model and the Cfront model.

@table @asis
@item Borland model
Borland C++ solved the template instantiation problem by adding the code
equivalent of common blocks to their linker; the compiler emits template
instances in each translation unit that uses them, and the linker
collapses them together.  The advantage of this model is that the linker
only has to consider the object files themselves; there is no external
complexity to worry about.  The disadvantage is that compilation time
is increased because the template code is being compiled repeatedly.
Code written for this model tends to include definitions of all
templates in the header file, since they must be seen to be
instantiated.

@item Cfront model
The AT&T C++ translator, Cfront, solved the template instantiation
problem by creating the notion of a template repository, an
automatically maintained place where template instances are stored.  A
more modern version of the repository works as follows: As individual
object files are built, the compiler places any template definitions and
instantiations encountered in the repository.  At link time, the link
wrapper adds in the objects in the repository and compiles any needed
instances that were not previously emitted.  The advantages of this
model are more optimal compilation speed and the ability to use the
system linker; to implement the Borland model a compiler vendor also
needs to replace the linker.  The disadvantages are vastly increased
complexity, and thus potential for error; for some code this can be
just as transparent, but in practice it can been very difficult to build
multiple programs in one directory and one program in multiple
directories.  Code written for this model tends to separate definitions
of non-inline member templates into a separate file, which should be
compiled separately.
@end table

G++ implements the Borland model on targets where the linker supports it,
including ELF targets (such as GNU/Linux), macOS and Microsoft Windows.
Otherwise G++ implements neither automatic model.

You have the following options for dealing with template instantiations:

@enumerate
@item
Do nothing.  Code written for the Borland model works fine, but
each translation unit contains instances of each of the templates it
uses.  The duplicate instances will be discarded by the linker, but in
a large program, this can lead to an unacceptable amount of code
duplication in object files or shared libraries.

Duplicate instances of a template can be avoided by defining an explicit
instantiation in one object file, and preventing the compiler from doing
implicit instantiations in any other object files by using an explicit
instantiation declaration, using the @code{extern template} syntax:

@smallexample
extern template int max (int, int);
@end smallexample

This syntax is defined in the C++ 2011 standard, but has been supported by
G++ and other compilers since well before 2011.

Explicit instantiations can be used for the largest or most frequently
duplicated instances, without having to know exactly which other instances
are used in the rest of the program.  You can scatter the explicit
instantiations throughout your program, perhaps putting them in the
translation units where the instances are used or the translation units
that define the templates themselves; you can put all of the explicit
instantiations you need into one big file; or you can create small files
like

@smallexample
#include "Foo.h"
#include "Foo.cc"

template class Foo<int>;
template ostream& operator <<
                (ostream&, const Foo<int>&);
@end smallexample

@noindent
for each of the instances you need, and create a template instantiation
library from those.

This is the simplest option, but also offers flexibility and
fine-grained control when necessary. It is also the most portable
alternative and programs using this approach will work with most modern
compilers.

@opindex fno-implicit-templates
@item
Compile your code with @option{-fno-implicit-templates} to disable the
implicit generation of template instances, and explicitly instantiate
all the ones you use.  This approach requires more knowledge of exactly
which instances you need than do the others, but it's less
mysterious and allows greater control if you want to ensure that only
the intended instances are used.

If you are using Cfront-model code, you can probably get away with not
using @option{-fno-implicit-templates} when compiling files that don't
@samp{#include} the member template definitions.

If you use one big file to do the instantiations, you may want to
compile it without @option{-fno-implicit-templates} so you get all of the
instances required by your explicit instantiations (but not by any
other files) without having to specify them as well.

In addition to forward declaration of explicit instantiations
(with @code{extern}), G++ has extended the template instantiation
syntax to support instantiation of the compiler support data for a
template class (i.e.@: the vtable) without instantiating any of its
members (with @code{inline}), and instantiation of only the static data
members of a template class, without the support data or member
functions (with @code{static}):

@smallexample
inline template class Foo<int>;
static template class Foo<int>;
@end smallexample
@end enumerate

@node Bound member functions
@section Extracting the Function Pointer from a Bound Pointer to Member Function
@cindex pmf
@cindex pointer to member function
@cindex bound pointer to member function

In C++, pointer to member functions (PMFs) are implemented using a wide
pointer of sorts to handle all the possible call mechanisms; the PMF
needs to store information about how to adjust the @samp{this} pointer,
and if the function pointed to is virtual, where to find the vtable, and
where in the vtable to look for the member function.  If you are using
PMFs in an inner loop, you should really reconsider that decision.  If
that is not an option, you can extract the pointer to the function that
would be called for a given object/PMF pair and call it directly inside
the inner loop, to save a bit of time.

Note that you still pay the penalty for the call through a
function pointer; on most modern architectures, such a call defeats the
branch prediction features of the CPU@.  This is also true of normal
virtual function calls.

The syntax for this extension is

@smallexample
extern A a;
extern int (A::*fp)();
typedef int (*fptr)(A *);

fptr p = (fptr)(a.*fp);
@end smallexample

For PMF constants (i.e.@: expressions of the form @samp{&Klasse::Member}),
no object is needed to obtain the address of the function.  They can be
converted to function pointers directly:

@smallexample
fptr p1 = (fptr)(&A::foo);
@end smallexample

@opindex Wno-pmf-conversions
You must specify @option{-Wno-pmf-conversions} to use this extension.

@node C++ Attributes
@section C++-Specific Variable, Function, and Type Attributes

Some attributes only make sense for C++ programs.

@table @code
@cindex @code{abi_tag} function attribute
@cindex @code{abi_tag} variable attribute
@cindex @code{abi_tag} type attribute
@item abi_tag ("@var{tag}", ...)
The @code{abi_tag} attribute can be applied to a function, variable, or class
declaration.  It modifies the mangled name of the entity to
incorporate the tag name, in order to distinguish the function or
class from an earlier version with a different ABI; perhaps the class
has changed size, or the function has a different return type that is
not encoded in the mangled name.

The attribute can also be applied to an inline namespace, but does not
affect the mangled name of the namespace; in this case it is only used
for @option{-Wabi-tag} warnings and automatic tagging of functions and
variables.  Tagging inline namespaces is generally preferable to
tagging individual declarations, but the latter is sometimes
necessary, such as when only certain members of a class need to be
tagged.

The argument can be a list of strings of arbitrary length.  The
strings are sorted on output, so the order of the list is
unimportant.

A redeclaration of an entity must not add new ABI tags,
since doing so would change the mangled name.

The ABI tags apply to a name, so all instantiations and
specializations of a template have the same tags.  The attribute will
be ignored if applied to an explicit specialization or instantiation.

The @option{-Wabi-tag} flag enables a warning about a class which does
not have all the ABI tags used by its subobjects and virtual functions; for users with code
that needs to coexist with an earlier ABI, using this option can help
to find all affected types that need to be tagged.

When a type involving an ABI tag is used as the type of a variable or
return type of a function where that tag is not already present in the
signature of the function, the tag is automatically applied to the
variable or function.  @option{-Wabi-tag} also warns about this
situation; this warning can be avoided by explicitly tagging the
variable or function or moving it into a tagged inline namespace.

@cindex @code{init_priority} variable attribute
@item init_priority (@var{priority})

In Standard C++, objects defined at namespace scope are guaranteed to be
initialized in an order in strict accordance with that of their definitions
@emph{in a given translation unit}.  No guarantee is made for initializations
across translation units.  However, GNU C++ allows users to control the
order of initialization of objects defined at namespace scope with the
@code{init_priority} attribute by specifying a relative @var{priority},
a constant integral expression currently bounded between 101 and 65535
inclusive.  Lower numbers indicate a higher priority.

In the following example, @code{A} would normally be created before
@code{B}, but the @code{init_priority} attribute reverses that order:

@smallexample
Some_Class  A  __attribute__ ((init_priority (2000)));
Some_Class  B  __attribute__ ((init_priority (543)));
@end smallexample

@noindent
Note that the particular values of @var{priority} do not matter; only their
relative ordering.

@cindex @code{no_dangling} type attribute
@cindex @code{no_dangling} function attribute
@item no_dangling

This attribute can be applied on a class type, function, or member
function.  Dangling references to classes marked with this attribute
will have the @option{-Wdangling-reference} diagnostic suppressed; so
will references returned from the @code{gnu::no_dangling}-marked
functions.  For example:

@smallexample
class [[gnu::no_dangling]] S @{ @dots{} @};
@end smallexample

Or:

@smallexample
class A @{
  int *p;
  [[gnu::no_dangling]] int &foo() @{ return *p; @}
@};

[[gnu::no_dangling]] const int &
foo (const int &i)
@{
  @dots{}
@}
@end smallexample

This attribute takes an optional argument, which must be an expression that
evaluates to true or false:

@smallexample
template <typename T>
struct [[gnu::no_dangling(std::is_reference_v<T>)]] S @{
  @dots{}
@};
@end smallexample

Or:

@smallexample
template <typename T>
[[gnu::no_dangling(std::is_lvalue_reference_v<T>)]]
decltype(auto) foo(T&& t) @{
  @dots{}
@};
@end smallexample

@cindex @code{warn_unused} type attribute
@item warn_unused

For C++ types with non-trivial constructors and/or destructors it is
impossible for the compiler to determine whether a variable of this
type is truly unused if it is not referenced. This type attribute
informs the compiler that variables of this type should be warned
about if they appear to be unused, just like variables of fundamental
types.

This attribute is appropriate for types which just represent a value,
such as @code{std::string}; it is not appropriate for types which
control a resource, such as @code{std::lock_guard}.

This attribute is also accepted in C, but it is unnecessary because C
does not have constructors or destructors.

@cindex @code{cold} type attribute
@item cold

In addition to functions and labels, GNU C++ allows the @code{cold}
attribute to be used on C++ classes, structs, or unions.  Applying
the @code{cold} attribute on a type has the effect of treating every
member function of the type, including implicit special member
functions, as cold.  If a member function is marked with the
@code{hot} function attribute, the @code{hot} attribute takes
precedence and the @code{cold} attribute is not propagated.

For the effects of the @code{cold} attribute on functions, see
@ref{Common Function Attributes}.

@cindex @code{hot} type attribute
@item hot

In addition to functions and labels, GNU C++ allows the @code{hot}
attribute to be used on C++ classes, structs, or unions.  Applying
the @code{hot} attribute on a type has the effect of treating every
member function of the type, including implicit special member
functions, as hot.  If a member function is marked with the
@code{cold} function attribute, the @code{cold} attribute takes
precedence and the @code{hot} attribute is not propagated.

For the effects of the @code{hot} attribute on functions, see
@ref{Common Function Attributes}.

@end table

@node Function Multiversioning
@section Function Multiversioning
@cindex function versions

With the GNU C++ front end, for x86 targets, you may specify multiple
versions of a function, where each function is specialized for a
specific target feature.  At runtime, the appropriate version of the
function is automatically executed depending on the characteristics of
the execution platform.  Here is an example.

@smallexample
__attribute__ ((target ("default")))
int foo ()
@{
  // The default version of foo.
  return 0;
@}

__attribute__ ((target ("sse4.2")))
int foo ()
@{
  // foo version for SSE4.2
  return 1;
@}

__attribute__ ((target ("arch=atom")))
int foo ()
@{
  // foo version for the Intel ATOM processor
  return 2;
@}

__attribute__ ((target ("arch=amdfam10")))
int foo ()
@{
  // foo version for the AMD Family 0x10 processors.
  return 3;
@}

int main ()
@{
  int (*p)() = &foo;
  assert ((*p) () == foo ());
  return 0;
@}
@end smallexample

In the above example, four versions of function foo are created. The
first version of foo with the target attribute "default" is the default
version.  This version gets executed when no other target specific
version qualifies for execution on a particular platform. A new version
of foo is created by using the same function signature but with a
different target string.  Function foo is called or a pointer to it is
taken just like a regular function.  GCC takes care of doing the
dispatching to call the right version at runtime.  Refer to the
@uref{https://gcc.gnu.org/wiki/FunctionMultiVersioning, GCC wiki on
Function Multiversioning} for more details.

@node Type Traits
@section Type Traits

The C++ front end implements syntactic extensions that allow
compile-time determination of 
various characteristics of a type (or of a
pair of types).

@defbuiltin{bool __has_nothrow_assign (@var{type})}
If @var{type} is @code{const}-qualified or is a reference type then
the trait is @code{false}.  Otherwise if @code{__has_trivial_assign (type)}
is @code{true} then the trait is @code{true}, else if @var{type} is
a cv-qualified class or union type with copy assignment operators that are
known not to throw an exception then the trait is @code{true}, else it is
@code{false}.
Requires: @var{type} shall be a complete type, (possibly cv-qualified)
@code{void}, or an array of unknown bound.
@enddefbuiltin

@defbuiltin{bool __has_nothrow_copy (@var{type})}
If @code{__has_trivial_copy (type)} is @code{true} then the trait is
@code{true}, else if @var{type} is a cv-qualified class or union type
with copy constructors that are known not to throw an exception then
the trait is @code{true}, else it is @code{false}.
Requires: @var{type} shall be a complete type, (possibly cv-qualified)
@code{void}, or an array of unknown bound.
@enddefbuiltin

@defbuiltin{bool __has_nothrow_constructor (@var{type})}
If @code{__has_trivial_constructor (type)} is @code{true} then the trait
is @code{true}, else if @var{type} is a cv class or union type (or array
thereof) with a default constructor that is known not to throw an
exception then the trait is @code{true}, else it is @code{false}.
Requires: @var{type} shall be a complete type, (possibly cv-qualified)
@code{void}, or an array of unknown bound.
@enddefbuiltin

@defbuiltin{bool __has_trivial_assign (@var{type})}
If @var{type} is @code{const}- qualified or is a reference type then
the trait is @code{false}.  Otherwise if @code{__is_trivial (type)} is
@code{true} then the trait is @code{true}, else if @var{type} is
a cv-qualified class or union type with a trivial copy assignment
([class.copy]) then the trait is @code{true}, else it is @code{false}.
Requires: @var{type} shall be a complete type, (possibly cv-qualified)
@code{void}, or an array of unknown bound.
@enddefbuiltin

@defbuiltin{bool __has_trivial_copy (@var{type})}
If @code{__is_trivial (type)} is @code{true} or @var{type} is a reference
type then the trait is @code{true}, else if @var{type} is a cv class
or union type with a trivial copy constructor ([class.copy]) then the trait
is @code{true}, else it is @code{false}.  Requires: @var{type} shall be
a complete type, (possibly cv-qualified) @code{void}, or an array of unknown
bound.
@enddefbuiltin

@defbuiltin{bool __has_trivial_constructor (@var{type})}
If @code{__is_trivial (type)} is @code{true} then the trait is @code{true},
else if @var{type} is a cv-qualified class or union type (or array thereof)
with a trivial default constructor ([class.ctor]) then the trait is @code{true},
else it is @code{false}.
Requires: @var{type} shall be a complete type, (possibly cv-qualified)
@code{void}, or an array of unknown bound.
@enddefbuiltin

@defbuiltin{bool __has_trivial_destructor (@var{type})}
If @code{__is_trivial (type)} is @code{true} or @var{type} is a reference type
then the trait is @code{true}, else if @var{type} is a cv class or union
type (or array thereof) with a trivial destructor ([class.dtor]) then
the trait is @code{true}, else it is @code{false}.
Requires: @var{type} shall be a complete type, (possibly cv-qualified)
@code{void}, or an array of unknown bound.
@enddefbuiltin

@defbuiltin{bool __has_virtual_destructor (@var{type})}
If @var{type} is a class type with a virtual destructor
([class.dtor]) then the trait is @code{true}, else it is @code{false}.
Requires: If @var{type} is a non-union class type, it shall be a complete type.
@enddefbuiltin

@defbuiltin{bool __is_abstract (@var{type})}
If @var{type} is an abstract class ([class.abstract]) then the trait
is @code{true}, else it is @code{false}.
Requires: If @var{type} is a non-union class type, it shall be a complete type.
@enddefbuiltin

@defbuiltin{bool __is_aggregate (@var{type})}
If @var{type} is an aggregate type ([dcl.init.aggr]) the trait is
@code{true}, else it is @code{false}.
Requires: If @var{type} is a class type, it shall be a complete type.
@enddefbuiltin

@defbuiltin{bool __is_base_of (@var{base_type}, @var{derived_type})}
If @var{base_type} is a base class of @var{derived_type}
([class.derived]) then the trait is @code{true}, otherwise it is @code{false}.
Top-level cv-qualifications of @var{base_type} and
@var{derived_type} are ignored.  For the purposes of this trait, a
class type is considered is own base.
Requires: if @code{__is_class (base_type)} and @code{__is_class (derived_type)}
are @code{true} and @var{base_type} and @var{derived_type} are not the same
type (disregarding cv-qualifiers), @var{derived_type} shall be a complete
type.  A diagnostic is produced if this requirement is not met.
@enddefbuiltin

@defbuiltin{bool __is_class (@var{type})}
If @var{type} is a cv-qualified class type, and not a union type
([basic.compound]) the trait is @code{true}, else it is @code{false}.
@enddefbuiltin

@c FIXME Commented out for GCC 13, discuss user interface for GCC 14.
@c @defbuiltin{bool __is_deducible (@var{template}, @var{type})}
@c If template arguments for @code{template} can be deduced from
@c @code{type} or obtained from default template arguments.
@c @enddefbuiltin

@defbuiltin{bool __is_empty (@var{type})}
If @code{__is_class (type)} is @code{false} then the trait is @code{false}.
Otherwise @var{type} is considered empty if and only if: @var{type}
has no non-static data members, or all non-static data members, if
any, are bit-fields of length 0, and @var{type} has no virtual
members, and @var{type} has no virtual base classes, and @var{type}
has no base classes @var{base_type} for which
@code{__is_empty (base_type)} is @code{false}.
Requires: If @var{type} is a non-union class type, it shall be a complete type.
@enddefbuiltin

@defbuiltin{bool __is_enum (@var{type})}
If @var{type} is a cv enumeration type ([basic.compound]) the trait is
@code{true}, else it is @code{false}.
@enddefbuiltin

@defbuiltin{bool __is_final (@var{type})}
If @var{type} is a class or union type marked @code{final}, then the trait
is @code{true}, else it is @code{false}.
Requires: If @var{type} is a class type, it shall be a complete type.
@enddefbuiltin

@defbuiltin{bool __is_literal_type (@var{type})}
If @var{type} is a literal type ([basic.types]) the trait is
@code{true}, else it is @code{false}.
Requires: @var{type} shall be a complete type, (possibly cv-qualified)
@code{void}, or an array of unknown bound.
@enddefbuiltin

@defbuiltin{bool __is_pod (@var{type})}
If @var{type} is a cv POD type ([basic.types]) then the trait is @code{true},
else it is @code{false}.
Requires: @var{type} shall be a complete type, (possibly cv-qualified)
@code{void}, or an array of unknown bound.
@enddefbuiltin

@defbuiltin{bool __is_polymorphic (@var{type})}
If @var{type} is a polymorphic class ([class.virtual]) then the trait
is @code{true}, else it is @code{false}.
Requires: If @var{type} is a non-union class type, it shall be a complete type.
@enddefbuiltin

@defbuiltin{bool __is_standard_layout (@var{type})}
If @var{type} is a standard-layout type ([basic.types]) the trait is
@code{true}, else it is @code{false}.
Requires: @var{type} shall be a complete type, an array of complete types,
or (possibly cv-qualified) @code{void}.
@enddefbuiltin

@defbuiltin{bool __is_trivial (@var{type})}
If @var{type} is a trivial type ([basic.types]) the trait is
@code{true}, else it is @code{false}.
Requires: @var{type} shall be a complete type, an array of complete types,
or (possibly cv-qualified) @code{void}.
@enddefbuiltin

@defbuiltin{bool __is_union (@var{type})}
If @var{type} is a cv union type ([basic.compound]) the trait is
@code{true}, else it is @code{false}.
@enddefbuiltin

@defbuiltin{bool __underlying_type (@var{type})}
The underlying type of @var{type}.
Requires: @var{type} shall be an enumeration type ([dcl.enum]).
@enddefbuiltin

@defbuiltin{bool __integer_pack (@var{length})}
When used as the pattern of a pack expansion within a template
definition, expands to a template argument pack containing integers
from @code{0} to @code{@var{length}-1}.  This is provided for
efficient implementation of @code{std::make_integer_sequence}.
@enddefbuiltin


@node C++ Concepts
@section C++ Concepts

C++ concepts provide much-improved support for generic programming. In
particular, they allow the specification of constraints on template arguments.
The constraints are used to extend the usual overloading and partial
specialization capabilities of the language, allowing generic data structures
and algorithms to be ``refined'' based on their properties rather than their
type names.

The following keywords are reserved for concepts.

@table @code
@kindex assumes
@item assumes
States an expression as an assumption, and if possible, verifies that the
assumption is valid. For example, @code{assume(n > 0)}.

@kindex axiom
@item axiom
Introduces an axiom definition. Axioms introduce requirements on values.

@kindex forall
@item forall
Introduces a universally quantified object in an axiom. For example,
@code{forall (int n) n + 0 == n}.

@kindex concept
@item concept
Introduces a concept definition. Concepts are sets of syntactic and semantic
requirements on types and their values.

@kindex requires
@item requires
Introduces constraints on template arguments or requirements for a member
function of a class template.
@end table

The front end also exposes a number of internal mechanism that can be used
to simplify the writing of type traits. Note that some of these traits are
likely to be removed in the future.

@defbuiltin{bool __is_same (@var{type1}, @var{type2})}
A binary type trait: @code{true} whenever the @var{type1} and
@var{type2} refer to the same type.
@enddefbuiltin


@node Deprecated Features
@section Deprecated Features

In the past, the GNU C++ compiler was extended to experiment with new
features, at a time when the C++ language was still evolving.  Now that
the C++ standard is complete, some of those features are superseded by
superior alternatives.  Using the old features might cause a warning in
some cases that the feature will be dropped in the future.  In other
cases, the feature might be gone already.

G++ allows a virtual function returning @samp{void *} to be overridden
by one returning a different pointer type.  This extension to the
covariant return type rules is now deprecated and will be removed from a
future version.

The use of default arguments in function pointers, function typedefs
and other places where they are not permitted by the standard is
deprecated and will be removed from a future version of G++.

G++ allows floating-point literals to appear in integral constant expressions,
e.g.@: @samp{ enum E @{ e = int(2.2 * 3.7) @} }
This extension is deprecated and will be removed from a future version.

G++ allows static data members of const floating-point type to be declared
with an initializer in a class definition. The standard only allows
initializers for static members of const integral types and const
enumeration types so this extension has been deprecated and will be removed
from a future version.

G++ allows attributes to follow a parenthesized direct initializer,
e.g.@: @samp{ int f (0) __attribute__ ((something)); } This extension
has been ignored since G++ 3.3 and is deprecated.

G++ allows anonymous structs and unions to have members that are not
public non-static data members (i.e.@: fields).  These extensions are
deprecated.

@node Backwards Compatibility
@section Backwards Compatibility
@cindex Backwards Compatibility
@cindex ARM [Annotated C++ Reference Manual]

Now that there is a definitive ISO standard C++, G++ has a specification
to adhere to.  The C++ language evolved over time, and features that
used to be acceptable in previous drafts of the standard, such as the ARM
[Annotated C++ Reference Manual], are no longer accepted.  In order to allow
compilation of C++ written to such drafts, G++ contains some backwards
compatibilities.  @emph{All such backwards compatibility features are
liable to disappear in future versions of G++.} They should be considered
deprecated.   @xref{Deprecated Features}.

@table @code

@item Implicit C language
Old C system header files did not contain an @code{extern "C" @{@dots{}@}}
scope to set the language.  On such systems, all system header files are
implicitly scoped inside a C language scope.  Such headers must
correctly prototype function argument types, there is no leeway for
@code{()} to indicate an unspecified set of arguments.

@end table

@c  LocalWords:  emph deftypefn builtin ARCv2EM SIMD builtins msimd
@c  LocalWords:  typedef v4si v8hi DMA dma vdiwr vdowr