<html><head><meta name="color-scheme" content="light dark"></head><body><pre style="word-wrap: break-word; white-space: pre-wrap;">/* Definitions of target machine for GNU compiler, for IBM RS/6000.
   Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
   Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)

   This file is part of GCC.

   GCC is free software; you can redistribute it and/or modify it
   under the terms of the GNU General Public License as published
   by the Free Software Foundation; either version 2, or (at your
   option) any later version.

   GCC is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
   License for more details.

   You should have received a copy of the GNU General Public License
   along with GCC; see the file COPYING.  If not, write to the
   Free Software Foundation, 59 Temple Place - Suite 330, Boston,
   MA 02111-1307, USA.  */

/* 128-bit floating point.  ABI_V4 uses IEEE quad, AIX/Darwin
   adjust this in rs6000_override_options.  */
FLOAT_MODE (TF, 16, ieee_quad_format);

/* PSImode is used for the XER register.  The XER register
   is not used for anything; perhaps it should be deleted,
   except that that would change register numbers.  */
PARTIAL_INT_MODE (SI);

/* Add any extra modes needed to represent the condition code.

   For the RS/6000, we need separate modes when unsigned (logical) comparisons
   are being done and we need a separate mode for floating-point.  We also
   use a mode for the case when we are comparing the results of two
   comparisons, as then only the EQ bit is valid in the register.  */

CC_MODE (CCUNS);
CC_MODE (CCFP);
CC_MODE (CCEQ);

/* Vector modes.  */
VECTOR_MODES (INT, 8);        /*       V8QI V4HI V2SI */
VECTOR_MODES (INT, 16);       /* V16QI V8HI V4SI V2DI */
VECTOR_MODE (INT, DI, 1);
VECTOR_MODES (FLOAT, 8);      /*            V4HF V2SF */
VECTOR_MODES (FLOAT, 16);     /*       V8HF V4SF V2DF */
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