/* Definitions of target machine for GNU compiler, for the pdp-11
   Copyright (C) 2002-2019 Free Software Foundation, Inc.
   Contributed by Michael K. Gschwind (mike@vlsivie.tuwien.ac.at).

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3, or (at your option)
any later version.

GCC is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
GNU General Public License for more details.

You should have received a copy of the GNU General Public License
along with GCC; see the file COPYING3.  If not see
<http://www.gnu.org/licenses/>.  */

/* Add any extra modes needed to represent the condition code.

   The default CCmode is the CPU condition codes, as set by compare;
   all conditional branches are valid with this.

   CCNZmode is the CPU condition code as a side effect of arithmetic
   or logic operations where N and Z reflect sign and zero status of
   the result, but the V bit is not meaningful.  Unsigned conditional
   branches don't apply then (no such thing when comparing with zero)
   and signed branches that use V need to clear V first if they are to
   be used.  CCNZ mode appears in side effects (implicit compare with
   zero) if V is not forced to 0 by the instruction.  In such cases, V
   often reflects signed overflow of the operation, which means a
   signed branch will get the sign backwards.  This applies both to
   some float and integer operations.

   These modes are used both in the FPU and the CPU, since they have
   the same meaning, and also because the FPU condition codes are
   copied to the CPU before being used in conditional branches.  */

CC_MODE (CCNZ);

RESET_FLOAT_FORMAT (SF, pdp11_f_format);
RESET_FLOAT_FORMAT (DF, pdp11_d_format);
