/* Copyright (C) 2024-2025 Free Software Foundation, Inc.

   This file is free software; you can redistribute it and/or modify it under
   the terms of the GNU General Public License as published by the Free
   Software Foundation; either version 3 of the License, or (at your option)
   any later version.

   This file is distributed in the hope that it will be useful, but WITHOUT
   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
   for more details.

   You should have received a copy of the GNU General Public License
   along with GCC; see the file COPYING3.  If not see
   <http://www.gnu.org/licenses/>.  */

/* GCN Device Configurations.

   This file contains all the device-specific information needed for both
   GCC and Libgomp.  Please respect the formatting and field comments as
   this file is read by Awk scripts in addition to the C++ preprocessor.

   To add a new device:
    1. Add a new GCN_DEVICE instance below.
    2. Add the name to the list in config.gcc.
    3. Allow gcn-tables.opt to regenerate.
    4. Implement target-specific metadata and new features using
       PROCESSOR_<NAME> (or a new ISA feature flag).
    5. Consider adding to the set of device-specific tests in the libgomp
       testsuite.

    New ISA variants are defined in gcn-opts.h.  Please use the feature macros
    in any conditionals, rather than depending on specific devices or ISAs
    directly.

    GCN_DEVICE field descriptions:
      0  "name"  (text, external)
        Lower case device name used in -march=name, diagnostics,
	assembler directives, etc.
      1  "NAME"  (text, external)
        Upper case device name used in macros.
      2  "ELF"   (hex integer, external)
        Magic number used assigned to this device for use in elf_flags.
      3  "ISA"   (enum gcn_isa, internal)
        ISA variant for instruction selection, etc.
      4  "XNACK default"   (enum hsaco_attr_type, internal)
        Default value for the -mattr=[-+]xnack setting.  May need to correspond
	to the assembler expectations for this device.
      5  "SRAM_ECC default"   (enum hsaco_attr_type, internal)
        Default value for the -mattr=[-+]sram-ecc setting.  Only really used
	to ensure that the binary is in a known state mkoffload can match.
      6  "WAVE64 mode"    (enum hsaco_attr_type, internal)
        Set "on" for devices where this needs to be configured, "unsupported"
	otherwise (meaning no special treatment needed).  GCC does not support
	wave32 mode.
      7  "CU mode"    (enum hsaco_attr_type, internal)
        Set "on" for devices that have this feature, "unsupported" otherwise
	(meaning that CU mode is not optional on the device).  GCC does not
	support CU mode off.
      8  "Max ISA VGPRs"   (integer, internal)
        Define how many registers there are in the VGPR register file, for the
	purposes of calculating maximum occupancy.  Some devices have AVGPRs
	in the same register file, some have more registers than are
	addressable from a single kernel.  Used by libgomp's plugin-gcn.c.
      9  "Generic Processor Version"  (unsigned, external)
	Used as version field for generic processor support. For non-generic
	code it is 0; otherwise, between 1 and 255. Initially, it is 1 for
	each generic device, but incremented (for a given generic device) if
	an new device of that series requires a code change;
	cf. EF_AMDGPU_GENERIC_VERSION_V.  The version shall be the same as
	generated by the used llvm-mc assembler.
      10 "Architecture Family Name"  (string, external)
	Used to #define '__GFX<...>__'.

    Fields marked "external", above, have values defined elsewhere (HSA, ROCM,
    LLVM, ELF, etc.) and must have matching definitions here.  Fields marked
    "internal" are defined and used only in GCC (although some may have
    user-visible effects) and may be refactored as needed.  */

/* GCN GFX9 (Vega)  */

GCN_DEVICE(gfx900, GFX900, 0x2c, ISA_GCN5,
	   /* XNACK default */ HSACO_ATTR_OFF,
	   /* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
	   /* WAVE64 mode */ HSACO_ATTR_UNSUPPORTED,
	   /* CU mode */ HSACO_ATTR_UNSUPPORTED,
	   /* Max ISA VGPRs */ 256,
	   /* Generic code obj version */ 0,  /* non-generic */
	   /* Architecture Family */ GFX9
	   )

GCN_DEVICE(gfx906, GFX906, 0x2f, ISA_GCN5,
	   /* XNACK default */ HSACO_ATTR_OFF,
	   /* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
	   /* WAVE64 mode */ HSACO_ATTR_UNSUPPORTED,
	   /* CU mode */ HSACO_ATTR_UNSUPPORTED,
	   /* Max ISA VGPRs */ 256,
	   /* Generic code obj version */ 0,  /* non-generic */
	   /* Architecture Family */ GFX9
	   )

GCN_DEVICE(gfx908, GFX908, 0x30, ISA_CDNA1,
	   /* XNACK default */ HSACO_ATTR_OFF,
	   /* SRAM_ECC default */ HSACO_ATTR_ANY,
	   /* WAVE64 mode */ HSACO_ATTR_UNSUPPORTED,
	   /* CU mode */ HSACO_ATTR_UNSUPPORTED,
	   /* Max ISA VGPRs */ 256,
	   /* Generic code obj version */ 0,  /* non-generic */
	   /* Architecture Family */ GFX9
	   )

GCN_DEVICE(gfx90a, GFX90A, 0x3f, ISA_CDNA2,
	   /* XNACK default */ HSACO_ATTR_ANY,
	   /* SRAM_ECC default */ HSACO_ATTR_ANY,
	   /* WAVE64 mode */ HSACO_ATTR_UNSUPPORTED,
	   /* CU mode */ HSACO_ATTR_UNSUPPORTED,
	   /* Max ISA VGPRs */ 512,
	   /* Generic code obj version */ 0,  /* non-generic */
	   /* Architecture Family */ GFX9
	   )

GCN_DEVICE(gfx90c, GFX90C, 0x32, ISA_GCN5,
	   /* XNACK default */ HSACO_ATTR_ANY,
	   /* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
	   /* WAVE64 mode */ HSACO_ATTR_UNSUPPORTED,
	   /* CU mode */ HSACO_ATTR_UNSUPPORTED,
	   /* Max ISA VGPRs */ 256,
	   /* Generic code obj version */ 0,  /* non-generic */
	   /* Architecture Family */ GFX9
	   )

/* GCN GFX10.3 (RDNA 2) */

GCN_DEVICE(gfx1030, GFX1030, 0x36, ISA_RDNA2,
	   /* XNACK default */ HSACO_ATTR_UNSUPPORTED,
	   /* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
	   /* WAVE64 mode */ HSACO_ATTR_ON,
	   /* CU mode */ HSACO_ATTR_ON,
	   /* Max ISA VGPRs */ 512, /* 512 SIMD32 = 256 wavefrontsize64.  */
	   /* Generic code obj version */ 0,  /* non-generic */
	   /* Architecture Family */ GFX10
	   )

GCN_DEVICE(gfx1036, GFX1036, 0x45, ISA_RDNA2,
	   /* XNACK default */ HSACO_ATTR_UNSUPPORTED,
	   /* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
	   /* WAVE64 mode */ HSACO_ATTR_ON,
	   /* CU mode */ HSACO_ATTR_ON,
	   /* Max ISA VGPRs */ 512, /* 512 SIMD32 = 256 wavefrontsize64.  */
	   /* Generic code obj version */ 0,  /* non-generic */
	   /* Architecture Family */ GFX10
	   )

GCN_DEVICE(gfx10-3-generic, GFX10_3_GENERIC, 0x053, ISA_RDNA2,
	   /* XNACK default */ HSACO_ATTR_UNSUPPORTED,
	   /* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
	   /* WAVE64 mode */ HSACO_ATTR_ON,
	   /* CU mode */ HSACO_ATTR_ON,
	   /* Max ISA VGPRs */ 512, /* 512 SIMD32 = 256 wavefrontsize64.  */
	   /* Generic code obj version */ 1,
	   /* Architecture Family */ GFX10
	   )

/* GCN GFX11 (RDNA 3)  */

GCN_DEVICE(gfx1100, GFX1100, 0x41, ISA_RDNA3,
	   /* XNACK default */ HSACO_ATTR_UNSUPPORTED,
	   /* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
	   /* WAVE64 mode */ HSACO_ATTR_ON,
	   /* CU mode */ HSACO_ATTR_ON,
	   /* Max ISA VGPRs */ 1536, /* 1536 SIMD32 = 768 wavefrontsize64.  */
	   /* Generic code obj version */ 0,  /* non-generic */
	   /* Architecture Family */ GFX11
	   )

GCN_DEVICE(gfx1103, GFX1103, 0x44, ISA_RDNA3,
	   /* XNACK default */ HSACO_ATTR_UNSUPPORTED,
	   /* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
	   /* WAVE64 mode */ HSACO_ATTR_ON,
	   /* CU mode */ HSACO_ATTR_ON,
	   /* Max ISA VGPRs */ 1536,
	   /* Generic code obj version */ 0,  /* non-generic */
	   /* Architecture Family */ GFX11
	   )

GCN_DEVICE(gfx11-generic, GFX11_GENERIC, 0x054, ISA_RDNA3,
	   /* XNACK default */ HSACO_ATTR_UNSUPPORTED,
	   /* SRAM_ECC default */ HSACO_ATTR_UNSUPPORTED,
	   /* WAVE64 mode */ HSACO_ATTR_ON,
	   /* CU mode */ HSACO_ATTR_ON,
	   /* Max ISA VGPRs */ 1536,
	   /* Generic code obj version */ 1,
	   /* Architecture Family */ GFX11
	   )

#undef GCN_DEVICE