2024-03-08 Martin Jambor PR ipa/113757 * tree-inline.cc (redirect_all_calls): Remove code adding SSAs to id->killed_new_ssa_names. 2024-03-08 Vladimir N. Makarov PR target/113790 * lra-assigns.cc (assign_by_spills): Set up all_spilled_pseudos for non-reload pseudo too. 2024-03-08 David Faust * config/bpf/bpf.cc (bpf_expand_cpymem, bpf_expand_setmem): Do not attempt inline expansion if size is above threshold. * config/bpf/bpf.opt (-minline-memops-threshold): New option. * doc/invoke.texi (eBPF Options) <-minline-memops-threshold>: Document. 2024-03-08 Richard Biener PR tree-optimization/114269 PR tree-optimization/114074 * tree-chrec.cc (chrec_fold_plus_1): Handle sign-conversions in the third CASE_CONVERT case as well. (chrec_fold_multiply): Handle sign-conversions from unsigned by performing the operation in the unsigned type. 2024-03-08 Georg-Johann Lay * config/avr/avr.md (*addhi3_zero_extend.ashift1): New pattern. * config/avr/avr.cc (avr_rtx_costs_1) [PLUS]: Compute its cost. 2024-03-08 Jakub Jelinek * bb-reorder.cc (fix_up_fall_thru_edges): Fix up checking assert, asm_noperands < 0 means it is not asm goto too. 2024-03-08 Jakub Jelinek PR target/38534 * config/i386/i386.opt (mnoreturn-no-callee-saved-registers): New option. * config/i386/i386-options.cc (ix86_set_func_type): Don't use TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP unless ix86_noreturn_no_callee_saved_registers is enabled. * doc/invoke.texi (-mnoreturn-no-callee-saved-registers): Document. 2024-03-08 Jakub Jelinek PR debug/113918 * dwarf2out.cc (gen_field_die): Emit DW_AT_export_symbols on anonymous unions or structs for -gdwarf-5 or -gno-strict-dwarf. 2024-03-08 demin.han PR target/114264 * config/riscv/riscv-vector-costs.cc: Fix ICE 2024-03-08 Haochen Gui * fwprop.cc (forward_propagate_into): Return false for volatile set source rtx. 2024-03-07 Wilco Dijkstra PR target/113618 * config/aarch64/aarch64.cc (aarch64_copy_one_block): Remove. (aarch64_expand_cpymem): Emit single load/store only. (aarch64_set_one_block): Emit single stores only. 2024-03-07 Robin Dapp PR middle-end/114196 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Merge vectorization guards. 2024-03-07 Jonathan Wakely * doc/cppopts.texi: Remove incorrect claim about -dD not outputting predefined macros. 2024-03-07 Jeevitha Palanisamy PR target/113950 * config/rs6000/vsx.md (vsx_splat_): Correct assignment to operand1 and simplify else if with else. 2024-03-07 Francois-Xavier Coudert * system.h: Include safe-ctype.h after C++ standard headers. 2024-03-07 Jakub Jelinek PR rtl-optimization/110079 * bb-reorder.cc (fix_crossing_unconditional_branches): Don't adjust asm goto. 2024-03-07 Jakub Jelinek PR middle-end/105533 * expmed.cc (choose_mult_variant): Only try the val - 1 variant if val is not HOST_WIDE_INT_MIN or if mode has exactly HOST_BITS_PER_WIDE_INT precision. Avoid triggering UB while computing val - 1. 2024-03-07 Jakub Jelinek PR middle-end/105533 * tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference) : Multiple op->off by BITS_PER_UNIT instead of shifting it left by LOG2_BITS_PER_UNIT. 2024-03-07 Yang Yujie * config.gcc: Add a case for loongarch*-*-linux-musl*. * config/loongarch/linux.h: Disable the multilib-compatible treatment for *musl* targets. * config/loongarch/musl.h: New file. 2024-03-07 Jakub Jelinek PR tree-optimization/114009 * genmatch.cc (decision_tree::gen): Emit ARG_UNUSED for captures argument even for GENERIC, not just for GIMPLE. * match.pd (a * !a -> 0): New simplifications. 2024-03-07 demin.han * config/riscv/riscv-protos.h (expand_vec_cmp): Change proto * config/riscv/riscv-v.cc (expand_vec_cmp): Use default arguments (expand_vec_cmp_float): Adapt arguments 2024-03-06 Uros Bizjak PR target/114232 * config/i386/mmx.md (negv2qi2): Enable for optimize_size instead of optimize_function_for_size_p. Explictily enable for TARGET_SSE2. (negv2qi SSE reg splitter): Enable for TARGET_SSE2 only. (v2qi3): Enable for optimize_size instead of optimize_function_for_size_p. Explictily enable for TARGET_SSE2. (v2qi SSE reg splitter): Enable for TARGET_SSE2 only. (v2qi3): Enable for optimize_size instead of optimize_function_for_size_p. 2024-03-06 Robin Dapp PR target/114200 PR target/114202 * config/riscv/vector.md: Use vmv[1248]r.v instead of vmv.v.v. 2024-03-06 Robin Dapp * config/riscv/riscv-vector-costs.cc (adjust_stmt_cost): Move... (costs::adjust_stmt_cost): ... to here and add vec_load/vec_store offset handling. (costs::add_stmt_cost): Also adjust cost for statements without stmt_info. * config/riscv/riscv-vector-costs.h: Define zero constant. 2024-03-06 Wilco Dijkstra PR target/113915 * config/arm/arm.md (NOCOND): Improve comment. (arm_rev*) Add predicable. * config/arm/arm.cc (arm_final_prescan_insn): Add check for PREDICABLE_YES. 2024-03-06 Jeff Law PR target/113001 PR target/112871 * config/riscv/riscv.cc (expand_conditional_move): Do not swap operands when the comparison operand is the same as the false arm for a NE test. 2024-03-06 Uros Bizjak * config/i386/i386-expand.cc (ix86_expand_move) [TARGET_MACHO]: Eliminate common code and use generic code instead. 2024-03-06 Georg-Johann Lay * config/avr/avr.cc (avr_rtx_costs_1) [PLUS+ZERO_EXTEND]: Adjust rtx cost. 2024-03-06 Richard Biener PR tree-optimization/114239 * tree-vect-loop.cc (vect_get_vect_def): Remove. (vect_create_epilog_for_reduction): The passed in stmt_info should now be the live stmt that produces the scalar reduction result. Revert PR114192 fix. Base reduction info off info_for_reduction. Remove special handling of early-break/peeled, restore original vector def gathering. Make sure to pick the correct exit PHIs. (vectorizable_live_operation): Pass in the proper stmt_info for early break exits. 2024-03-06 Richard Sandiford * config/aarch64/aarch64-feature-deps.h (feature_deps::info): Add out-of-class definitions of static constants. 2024-03-06 Richard Biener PR tree-optimization/114249 * tree-vect-slp.cc (vect_build_slp_instance): Move making a BB reduction lane number even ... (vect_slp_check_for_roots): ... here to avoid leaking pattern defs. 2024-03-06 Richard Biener PR tree-optimization/114246 * tree-ssa-dse.cc (increment_start_addr): Strip useless type conversions from the adjusted address. 2024-03-06 Jakub Jelinek PR rtl-optimization/114190 * config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper): Call df_remove_problem for df_note before calling df_analyze. 2024-03-05 Cupertino Miranda Indu Bhagat PR debug/114186 * dwarf2ctf.cc (gen_ctf_array_type): Invoke the ctf_add_array () in the correct order of the dimensions. (gen_ctf_subrange_type): Refactor out handling of DW_TAG_subrange_type DIE to here. 2024-03-05 Richard Sandiford PR sanitizer/97696 * asan.cc (asan_expand_mark_ifn): Allow the length to be a poly_int. 2024-03-05 Richard Sandiford * config/aarch64/aarch64.md (stride_type): Remove luti_consecutive and luti_strided. * config/aarch64/aarch64-sme.md (@aarch64_sme_lut): Remove stride_type attribute. (@aarch64_sme_lut_strided2): Delete. (@aarch64_sme_lut_strided4): Likewise. * config/aarch64/aarch64-early-ra.cc (is_stride_candidate) (early_ra::maybe_convert_to_strided_access): Remove support for strided LUTI2 and LUTI4. 2024-03-05 Richard Earnshaw PR target/113510 * config/arm/thumb1.md (peephole2 to fuse mov imm/add SP): Use low_register_operand. 2024-03-05 Georg-Johann Lay * config/avr/avr.md: Add two RTL peepholes for PLUS, IOR and AND in HI, PSI, SI that swap operation order from "X = CST, X o= Y" to "X = Y, X o= CST". 2024-03-05 Xi Ruoyao * config/loongarch/loongarch.h (ADDITIONAL_REGISTER_NAMES): Add s9 as an alias of r22. 2024-03-05 Roger Sayle * config/avr/avr-protos.h (avr_out_insv): New proto. * config/avr/avr.cc (avr_out_insv): New function. (avr_adjust_insn_length) [ADJUST_LEN_INSV]: Handle case. (avr_cbranch_cost) [ZERO_EXTRACT]: Adjust rtx costs. * config/avr/avr.md (define_attr "adjust_len") Add insv. (andhi3, *andhi3, andpsi3, *andpsi3, andsi3, *andsi3): Add constraint alternative where the 3rd operand is a power of 2, and the source register may differ from the destination. (*insv.any_shift._split): Call avr_out_insv to output instructions. Set attr "length" to "insv". * config/avr/constraints.md (Cb2, Cb3, Cb4): New constraints. 2024-03-05 Richard Biener PR tree-optimization/114231 * tree-vect-slp.cc (vect_analyze_slp): Lookup patterns when processing a BB SLP root. 2024-03-05 Jakub Jelinek PR rtl-optimization/114211 * lower-subreg.cc (resolve_simple_move): For double-word rotates by BITS_PER_WORD if there is overlap between source and destination use a temporary. 2024-03-05 Jakub Jelinek PR middle-end/114157 * gimple-lower-bitint.cc: Include stor-layout.h. (mergeable_op): Return true for BIT_FIELD_REF. (struct bitint_large_huge): Declare handle_bit_field_ref method. (bitint_large_huge::handle_bit_field_ref): New method. (bitint_large_huge::handle_stmt): Use it for BIT_FIELD_REF. 2024-03-05 Jakub Jelinek PR target/114116 * config/i386/i386.h (enum call_saved_registers_type): Add TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP enumerator. * config/i386/i386-options.cc (ix86_set_func_type): Remove has_no_callee_saved_registers variable, add no_callee_saved_registers instead, initialize it depending on whether it is no_callee_saved_registers function or not. Don't set it if no_caller_saved_registers attribute is present. Adjust users. * config/i386/i386.cc (ix86_function_ok_for_sibcall): Handle TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP like TYPE_NO_CALLEE_SAVED_REGISTERS. (ix86_save_reg): Handle TYPE_NO_CALLEE_SAVED_REGISTERS_EXCEPT_BP. 2024-03-05 Pan Li * config/riscv/riscv.cc (riscv_v_adjust_bytesize): Cleanup unused mode_size related code. 2024-03-05 Patrick Palka * doc/invoke.texi (-Wno-global-module): Document. 2024-03-04 David Faust * config/bpf/bpf-protos.h (bpf_expand_setmem): New prototype. * config/bpf/bpf.cc (bpf_expand_setmem): New. * config/bpf/bpf.md (setmemdi): New define_expand. 2024-03-04 Jakub Jelinek PR rtl-optimization/113010 * combine.cc (simplify_comparison): Guard the WORD_REGISTER_OPERATIONS check on scalar_int_mode of SUBREG_REG and initialize inner_mode. 2024-03-04 Andre Vieira * config/arm/iterators.md (supf): Remove VMLALDAVXQ_U, VMLALDAVXQ_P_U, VMLALDAVAXQ_U cases. (VMLALDAVXQ): Remove iterator. (VMLALDAVXQ_P): Likewise. (VMLALDAVAXQ): Likewise. * config/arm/mve.md (mve_vstrwq_p_fv4sf): Replace use of mode iterator attribute with V4BI mode. * config/arm/unspecs.md (VMLALDAVXQ_U, VMLALDAVXQ_P_U, VMLALDAVAXQ_U): Remove unused unspecs. 2024-03-04 Andre Vieira * config/arm/arm.md (mve_safe_imp_xlane_pred): New attribute. * config/arm/iterators.md (mve_vmaxmin_safe_imp): New iterator attribute. * config/arm/mve.md (vaddvq_s, vaddvq_u, vaddlvq_s, vaddlvq_u, vaddvaq_s, vaddvaq_u, vmaxavq_s, vmaxvq_u, vmladavq_s, vmladavq_u, vmladavxq_s, vmlsdavq_s, vmlsdavxq_s, vaddlvaq_s, vaddlvaq_u, vmlaldavq_u, vmlaldavq_s, vmlaldavq_u, vmlaldavxq_s, vmlsldavq_s, vmlsldavxq_s, vrmlaldavhq_u, vrmlaldavhq_s, vrmlaldavhxq_s, vrmlsldavhq_s, vrmlsldavhxq_s, vrmlaldavhaq_s, vrmlaldavhaq_u, vrmlaldavhaxq_s, vrmlsldavhaq_s, vrmlsldavhaxq_s, vabavq_s, vabavq_u, vmladavaq_u, vmladavaq_s, vmladavaxq_s, vmlsdavaq_s, vmlsdavaxq_s, vmlaldavaq_s, vmlaldavaq_u, vmlaldavaxq_s, vmlsldavaq_s, vmlsldavaxq_s): Added mve_safe_imp_xlane_pred. 2024-03-04 Stam Markianos-Wright * config/arm/arm.md (mve_unpredicated_insn): New attribute. * config/arm/arm.h (MVE_VPT_PREDICATED_INSN_P): New define. (MVE_VPT_UNPREDICATED_INSN_P): Likewise. (MVE_VPT_PREDICABLE_INSN_P): Likewise. * config/arm/vec-common.md (mve_vshlq_): Add attribute. * config/arm/mve.md (arm_vcx1q_p_v16qi): Add attribute. (arm_vcx1qv16qi): Likewise. (arm_vcx1qav16qi): Likewise. (arm_vcx1qv16qi): Likewise. (arm_vcx2q_p_v16qi): Likewise. (arm_vcx2qv16qi): Likewise. (arm_vcx2qav16qi): Likewise. (arm_vcx2qv16qi): Likewise. (arm_vcx3q_p_v16qi): Likewise. (arm_vcx3qv16qi): Likewise. (arm_vcx3qav16qi): Likewise. (arm_vcx3qv16qi): Likewise. (@mve_q_): Likewise. (@mve_q_int_): Likewise. (@mve_q_v4si): Likewise. (@mve_q_n_): Likewise. (@mve_q_r_): Likewise. (@mve_q_f): Likewise. (@mve_q_m_): Likewise. (@mve_q_m_n_): Likewise. (@mve_q_m_r_): Likewise. (@mve_q_m_f): Likewise. (@mve_q_int_m_): Likewise. (@mve_q_p_v4si): Likewise. (@mve_q_p_): Likewise. (@mve_q_): Likewise. (@mve_q_f): Likewise. (@mve_q_m_): Likewise. (@mve_q_m_f): Likewise. (mve_vq_f): Likewise. (mve_q): Likewise. (mve_q_f): Likewise. (mve_vadciq_v4si): Likewise. (mve_vadciq_m_v4si): Likewise. (mve_vadcq_v4si): Likewise. (mve_vadcq_m_v4si): Likewise. (mve_vandq_): Likewise. (mve_vandq_f): Likewise. (mve_vandq_m_): Likewise. (mve_vandq_m_f): Likewise. (mve_vandq_s): Likewise. (mve_vandq_u): Likewise. (mve_vbicq_): Likewise. (mve_vbicq_f): Likewise. (mve_vbicq_m_): Likewise. (mve_vbicq_m_f): Likewise. (mve_vbicq_m_n_): Likewise. (mve_vbicq_n_): Likewise. (mve_vbicq_s): Likewise. (mve_vbicq_u): Likewise. (@mve_vclzq_s): Likewise. (mve_vclzq_u): Likewise. (@mve_vcmp_q_): Likewise. (@mve_vcmp_q_n_): Likewise. (@mve_vcmp_q_f): Likewise. (@mve_vcmp_q_n_f): Likewise. (@mve_vcmp_q_m_f): Likewise. (@mve_vcmp_q_m_n_): Likewise. (@mve_vcmp_q_m_): Likewise. (@mve_vcmp_q_m_n_f): Likewise. (mve_vctpq): Likewise. (mve_vctpq_m): Likewise. (mve_vcvtaq_): Likewise. (mve_vcvtaq_m_): Likewise. (mve_vcvtbq_f16_f32v8hf): Likewise. (mve_vcvtbq_f32_f16v4sf): Likewise. (mve_vcvtbq_m_f16_f32v8hf): Likewise. (mve_vcvtbq_m_f32_f16v4sf): Likewise. (mve_vcvtmq_): Likewise. (mve_vcvtmq_m_): Likewise. (mve_vcvtnq_): Likewise. (mve_vcvtnq_m_): Likewise. (mve_vcvtpq_): Likewise. (mve_vcvtpq_m_): Likewise. (mve_vcvtq_from_f_): Likewise. (mve_vcvtq_m_from_f_): Likewise. (mve_vcvtq_m_n_from_f_): Likewise. (mve_vcvtq_m_n_to_f_): Likewise. (mve_vcvtq_m_to_f_): Likewise. (mve_vcvtq_n_from_f_): Likewise. (mve_vcvtq_n_to_f_): Likewise. (mve_vcvtq_to_f_): Likewise. (mve_vcvttq_f16_f32v8hf): Likewise. (mve_vcvttq_f32_f16v4sf): Likewise. (mve_vcvttq_m_f16_f32v8hf): Likewise. (mve_vcvttq_m_f32_f16v4sf): Likewise. (mve_vdwdupq_m_wb_u_insn): Likewise. (mve_vdwdupq_wb_u_insn): Likewise. (mve_veorq_s>): Likewise. (mve_veorq_u>): Likewise. (mve_veorq_f): Likewise. (mve_vidupq_m_wb_u_insn): Likewise. (mve_vidupq_u_insn): Likewise. (mve_viwdupq_m_wb_u_insn): Likewise. (mve_viwdupq_wb_u_insn): Likewise. (mve_vldrbq_): Likewise. (mve_vldrbq_gather_offset_): Likewise. (mve_vldrbq_gather_offset_z_): Likewise. (mve_vldrbq_z_): Likewise. (mve_vldrdq_gather_base_v2di): Likewise. (mve_vldrdq_gather_base_wb_v2di_insn): Likewise. (mve_vldrdq_gather_base_wb_z_v2di_insn): Likewise. (mve_vldrdq_gather_base_z_v2di): Likewise. (mve_vldrdq_gather_offset_v2di): Likewise. (mve_vldrdq_gather_offset_z_v2di): Likewise. (mve_vldrdq_gather_shifted_offset_v2di): Likewise. (mve_vldrdq_gather_shifted_offset_z_v2di): Likewise. (mve_vldrhq_): Likewise. (mve_vldrhq_fv8hf): Likewise. (mve_vldrhq_gather_offset_): Likewise. (mve_vldrhq_gather_offset_fv8hf): Likewise. (mve_vldrhq_gather_offset_z_): Likewise. (mve_vldrhq_gather_offset_z_fv8hf): Likewise. (mve_vldrhq_gather_shifted_offset_): Likewise. (mve_vldrhq_gather_shifted_offset_fv8hf): Likewise. (mve_vldrhq_gather_shifted_offset_z_): Likewise. (mve_vldrhq_gather_shifted_offset_z_fv8hf): Likewise. (mve_vldrhq_z_): Likewise. (mve_vldrhq_z_fv8hf): Likewise. (mve_vldrwq_v4si): Likewise. (mve_vldrwq_fv4sf): Likewise. (mve_vldrwq_gather_base_v4si): Likewise. (mve_vldrwq_gather_base_fv4sf): Likewise. (mve_vldrwq_gather_base_wb_v4si_insn): Likewise. (mve_vldrwq_gather_base_wb_fv4sf_insn): Likewise. (mve_vldrwq_gather_base_wb_z_v4si_insn): Likewise. (mve_vldrwq_gather_base_wb_z_fv4sf_insn): Likewise. (mve_vldrwq_gather_base_z_v4si): Likewise. (mve_vldrwq_gather_base_z_fv4sf): Likewise. (mve_vldrwq_gather_offset_v4si): Likewise. (mve_vldrwq_gather_offset_fv4sf): Likewise. (mve_vldrwq_gather_offset_z_v4si): Likewise. (mve_vldrwq_gather_offset_z_fv4sf): Likewise. (mve_vldrwq_gather_shifted_offset_v4si): Likewise. (mve_vldrwq_gather_shifted_offset_fv4sf): Likewise. (mve_vldrwq_gather_shifted_offset_z_v4si): Likewise. (mve_vldrwq_gather_shifted_offset_z_fv4sf): Likewise. (mve_vldrwq_z_v4si): Likewise. (mve_vldrwq_z_fv4sf): Likewise. (mve_vmvnq_s): Likewise. (mve_vmvnq_u): Likewise. (mve_vornq_): Likewise. (mve_vornq_f): Likewise. (mve_vornq_m_): Likewise. (mve_vornq_m_f): Likewise. (mve_vornq_s): Likewise. (mve_vornq_u): Likewise. (mve_vorrq_): Likewise. (mve_vorrq_f): Likewise. (mve_vorrq_m_): Likewise. (mve_vorrq_m_f): Likewise. (mve_vorrq_m_n_): Likewise. (mve_vorrq_n_): Likewise. (mve_vorrq_s): Likewise. (mve_vorrq_s): Likewise. (mve_vsbciq_v4si): Likewise. (mve_vsbciq_m_v4si): Likewise. (mve_vsbcq_v4si): Likewise. (mve_vsbcq_m_v4si): Likewise. (mve_vshlcq_): Likewise. (mve_vshlcq_m_): Likewise. (mve_vshrq_m_n_): Likewise. (mve_vshrq_n_): Likewise. (mve_vstrbq_): Likewise. (mve_vstrbq_p_): Likewise. (mve_vstrbq_scatter_offset__insn): Likewise. (mve_vstrbq_scatter_offset_p__insn): Likewise. (mve_vstrdq_scatter_base_v2di): Likewise. (mve_vstrdq_scatter_base_p_v2di): Likewise. (mve_vstrdq_scatter_base_wb_v2di): Likewise. (mve_vstrdq_scatter_base_wb_p_v2di): Likewise. (mve_vstrdq_scatter_offset_v2di_insn): Likewise. (mve_vstrdq_scatter_offset_p_v2di_insn): Likewise. (mve_vstrdq_scatter_shifted_offset_v2di_insn): Likewise. (mve_vstrdq_scatter_shifted_offset_p_v2di_insn): Likewise. (mve_vstrhq_): Likewise. (mve_vstrhq_fv8hf): Likewise. (mve_vstrhq_p_): Likewise. (mve_vstrhq_p_fv8hf): Likewise. (mve_vstrhq_scatter_offset__insn): Likewise. (mve_vstrhq_scatter_offset_fv8hf_insn): Likewise. (mve_vstrhq_scatter_offset_p__insn): Likewise. (mve_vstrhq_scatter_offset_p_fv8hf_insn): Likewise. (mve_vstrhq_scatter_shifted_offset__insn): Likewise. (mve_vstrhq_scatter_shifted_offset_fv8hf_insn): Likewise. (mve_vstrhq_scatter_shifted_offset_p__insn): Likewise. (mve_vstrhq_scatter_shifted_offset_p_fv8hf_insn): Likewise. (mve_vstrwq_v4si): Likewise. (mve_vstrwq_fv4sf): Likewise. (mve_vstrwq_p_v4si): Likewise. (mve_vstrwq_p_fv4sf): Likewise. (mve_vstrwq_scatter_base_v4si): Likewise. (mve_vstrwq_scatter_base_fv4sf): Likewise. (mve_vstrwq_scatter_base_p_v4si): Likewise. (mve_vstrwq_scatter_base_p_fv4sf): Likewise. (mve_vstrwq_scatter_base_wb_v4si): Likewise. (mve_vstrwq_scatter_base_wb_fv4sf): Likewise. (mve_vstrwq_scatter_base_wb_p_v4si): Likewise. (mve_vstrwq_scatter_base_wb_p_fv4sf): Likewise. (mve_vstrwq_scatter_offset_v4si_insn): Likewise. (mve_vstrwq_scatter_offset_fv4sf_insn): Likewise. (mve_vstrwq_scatter_offset_p_v4si_insn): Likewise. (mve_vstrwq_scatter_offset_p_fv4sf_insn): Likewise. (mve_vstrwq_scatter_shifted_offset_v4si_insn): Likewise. (mve_vstrwq_scatter_shifted_offset_fv4sf_insn): Likewise. (mve_vstrwq_scatter_shifted_offset_p_v4si_insn): Likewise. (mve_vstrwq_scatter_shifted_offset_p_fv4sf_insn): Likewise. 2024-03-04 Marek Polacek * doc/extend.texi: Update [[gnu::no_dangling]]. 2024-03-04 Andrew Stubbs * dojump.cc (do_compare_and_jump): Use full-width integers for shifts. * expr.cc (store_constructor): Likewise. (do_store_flag): Likewise. 2024-03-04 Mark Wielaard * common.opt.urls: Regenerate. * config/avr/avr.opt.urls: Likewise. * config/i386/i386.opt.urls: Likewise. * config/pru/pru.opt.urls: Likewise. * config/riscv/riscv.opt.urls: Likewise. * config/rs6000/rs6000.opt.urls: Likewise. 2024-03-04 Richard Biener PR tree-optimization/114197 * tree-if-conv.cc (bitfields_to_lower_p): Do not lower if there are volatile bitfield accesses. (pass_if_conversion::execute): Throw away result if the if-converted and original loops are not nested as expected. 2024-03-04 Richard Biener PR tree-optimization/114164 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Fail if the code generated for mask argument setup is not supported. 2024-03-04 Richard Biener PR tree-optimization/114203 * tree-ssa-loop-niter.cc (build_cltz_expr): Apply CTZ->CLZ adjustment before making the result defined at zero. 2024-03-04 Richard Biener PR tree-optimization/114192 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Use the appropriate def for the live out stmt in case of an alternate exit. 2024-03-04 Jakub Jelinek PR middle-end/114209 * gimple-lower-bitint.cc (bitint_large_huge::limb_access): Call unshare_expr when creating a MEM_REF from MEM_REF. (bitint_large_huge::lower_stmt): Call unshare_expr. 2024-03-04 Jakub Jelinek PR target/114184 * config/i386/i386-expand.cc (ix86_expand_move): If XFmode op1 is SUBREG of CONSTANT_P, force the SUBREG_REG into memory or register. 2024-03-04 Roger Sayle PR target/114187 * simplify-rtx.cc (simplify_context::simplify_subreg): Call lowpart_subreg to perform type conversion, to avoid confusion over the offset to use in the call to simplify_reg_subreg. 2024-03-03 Greg McGary PR rtl-optimization/113010 * combine.cc (simplify_comparison): Simplify a SUBREG on WORD_REGISTER_OPERATIONS targets only if it is a zero-extending MEM load. 2024-03-03 Georg-Johann Lay * config/avr/avr.cc: Resolve ATTRIBUTE_UNUSED. Use bool in place of int for boolean logic (if possible). Move declarations to definitions (if possible). * config/avr/avr.md: Use C++ comments. Fix some indentation glitches. * config/avr/avr-dimode.md: Same. * config/avr/constraints.md: Same. * config/avr/predicates.md: Same. 2024-03-03 Uros Bizjak PR target/113720 * config/alpha/alpha.md (umuldi3_highpart): Remove expander. (*umuldi3_highpart_reg): Rename to umuldi3_highpart and simplify insn RTX using UMUL_HIGHPART rtx_code. (*umuldi3_highpart_const): Remove. 2024-03-03 Georg-Johann Lay PR target/114100 * config/avr/avr-protos.h (_reg_unused_after): Remove proto. * config/avr/avr.cc (_reg_unused_after): Make static. And add 3rd argument to skip the current insn. (reg_unused_after): Adjust call of reg_unused_after. (avr_out_plus_1) [AVR_TINY && -mfuse-add >= 2]: Don't output unneeded frame pointer adjustments. 2024-03-03 Georg-Johann Lay PR target/92729 * config/avr/avr.md (define_attr "cc"): Remove. * config/avr/avr-protos.h (avr_out_plus): Remove pcc argument from prototype. * config/avr/avr.cc (avr_out_plus_1): Remove pcc argument and its uses. Add insn argument. (avr_out_plus_symbol): Remove pcc argument and its uses. (avr_out_plus): Remove pcc argument and its uses. Adjust calls of avr_out_plus_symbol and avr_out_plus_1. (avr_out_round): Adjust call of avr_out_plus. 2024-03-03 Georg-Johann Lay * config/avr/avr.cc (avr_init_cumulative_args): Fix a typo from r14-9273. 2024-03-03 Oleg Endo PR target/101737 * config/sh/sh.cc (sh_is_nott_insn): Handle case where the input is not an insn, but e.g. a code label. 2024-03-02 Georg-Johann Lay * config/avr/avr.md (REG_0, ... REG_36): New define_constants. * config/avr/avr.cc: Use them instead of magic numbers when it means a register number. 2024-03-02 Georg-Johann Lay * config/avr/avr.cc: Adjust some comments. 2024-03-02 Georg-Johann Lay PR target/114100 * config/avr/avr.cc (avr_out_plus_1) [-mtiny-stack]: Only adjust the low part of the frame pointer with 8-bit stack pointer. 2024-03-01 Patrick Palka PR c++/104919 PR c++/106009 * tree-inline.cc (remap_decl): Handle copy_decl returning the original decl. (remap_decls): Handle remap_decl returning the original decl. (copy_fn): Adjust copy_decl callback to skip TYPE_DECL and CONST_DECL. 2024-03-01 Jeff Law * config/riscv/riscv.md (zero_extendqi2_internal): Fix type attribute. (extendsidi2_internal, movhf_hardfloat, movhf_softfloat): Likewise. (movdi_32bit, movdi_64bit, movsi_internal): Likewise. (movhi_internal, movqi_internal): Likewise. (movsf_softfloat, movsf_hardfloat): Likewise. (movdf_hardfloat_rv32, movdf_hardfloat_rv64): Likewise. (movdf_softfloat): Likewise. 2024-03-01 Marek Polacek PR c++/110358 PR c++/109642 * doc/extend.texi: Document gnu::no_dangling. * doc/invoke.texi: Mention that gnu::no_dangling disables -Wdangling-reference. 2024-03-01 Georg-Johann Lay * config/avr/avr.opt: Overhaul help screen. 2024-03-01 Jakub Jelinek Tobias Burnus PR c++/110347 * gimplify.cc (omp_notice_variable): Fix 'shared' arg to lang_hooks.decls.omp_disregard_value_expr for (first)private in target regions. 2024-03-01 Jakub Jelinek PR middle-end/114136 * calls.cc (expand_call): For TYPE_NO_NAMED_ARGS_STDARG_P set n_named_args initially before INIT_CUMULATIVE_ARGS to structure_value_addr_parm rather than 0, after it don't modify it if strict_argument_naming and clear only if !pretend_outgoing_varargs_named. 2024-03-01 Jakub Jelinek PR debug/114015 * dwarf2out.cc (should_move_die_to_comdat): Return false for aggregates without DW_AT_byte_size attribute or with non-constant DW_AT_byte_size. 2024-03-01 Georg-Johann Lay * doc/invoke.texi (AVR Options) <-mfuse-add=level>: Document valid values for level. 2024-03-01 Richard Biener PR middle-end/114070 * match.pd ((c ? a : b) op d --> c ? (a op d) : (b op d)): Allow the folding if before lowering and the current IL isn't supported with vcond_mask. 2024-03-01 xuli * config/riscv/riscv.cc (TARGET_GNU_ATTRIBUTES): Add riscv_vector_cc attribute to riscv_attribute_table. (riscv_vector_cc_function_p): Return true if FUNC is a riscv_vector_cc function. (riscv_fntype_abi): Add riscv_vector_cc attribute check. * doc/extend.texi: Add riscv_vector_cc attribute description. 2024-03-01 Pan Li PR target/112817 * config/riscv/riscv-avlprop.cc (pass_avlprop::execute): Replace RVV_FIXED_VLMAX to RVV_VECTOR_BITS_ZVL. * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Remove. (enum rvv_vector_bits_enum): New enum for different RVV vector bits. * config/riscv/riscv-selftests.cc (riscv_run_selftests): Update comments for option replacement. * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Replace enum of riscv_autovec_preference to rvv_vector_bits. (vls_mode_valid_p): Ditto. (estimated_poly_value): Ditto. * config/riscv/riscv.cc (riscv_convert_vector_chunks): Rename to vector chunks and honor new option mrvv-vector-bits. (riscv_override_options_internal): Update comments and rename the vector chunks. * config/riscv/riscv.opt: Add option mrvv-vector-bits and remove internal option param=riscv-autovec-preference. 2024-03-01 Jakub Jelinek * function.cc (assign_parms): Only call assign_parms_setup_varargs early for TYPE_NO_NAMED_ARGS_STDARG_P functions if fnargs is empty. 2024-03-01 Jakub Jelinek PR middle-end/114156 * gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Allow rhs1 of a VCE to have no underlying variable if it is a load and handle that case. 2024-02-29 David Malcolm PR analyzer/114159 * function.cc (function_name): Make param const. * function.h (function_name): Likewise. 2024-02-29 Georg-Johann Lay PR target/114100 * doc/invoke.texi (AVR Options) <-mfuse-add>: Document. * config/avr/avr.opt (-mfuse-add=): New target option. * common/config/avr/avr-common.cc (avr_option_optimization_table) [OPT_LEVELS_1_PLUS]: Set -mfuse-add=1. [OPT_LEVELS_2_PLUS]: Set -mfuse-add=2. * config/avr/avr-passes.def (avr_pass_fuse_add): Insert new pass. * config/avr/avr-protos.h (avr_split_tiny_move) (make_avr_pass_fuse_add): New protos. * config/avr/avr.md [AVR_TINY]: New post-reload splitter uses avr_split_tiny_move to split indirect memory accesses. (gen_move_clobbercc): New define_expand helper. * config/avr/avr.cc (avr_pass_data_fuse_add): New pass data. (avr_pass_fuse_add): New class from rtl_opt_pass. (make_avr_pass_fuse_add, avr_split_tiny_move): New functions. (reg_seen_between_p, emit_move_ccc, emit_move_ccc_after): New functions. (avr_legitimate_address_p) [AVR_TINY]: Don't restrict offsets of PLUS addressing for AVR_TINY. (avr_regno_mode_code_ok_for_base_p) [AVR_TINY]: Ignore -mstrict-X. (avr_out_plus_1) [AVR_TINY]: Tweak ++Y and --Y. (avr_mode_code_base_reg_class) [AVR_TINY]: Always return POINTER_REGS. 2024-02-29 Georg-Johann Lay PR target/114132 * config/avr/avr.h (CUMULATIVE_ARGS) : New field. * config/avr/avr.cc (avr_init_cumulative_args): Initialize it. (avr_function_arg): Set it. (avr_frame_pointer_required_p): Use it instead of .nregs. 2024-02-29 Andrew Pinski PR target/108174 * config/aarch64/aarch64-builtins.cc (aarch64_memtag_builtin_data): Make static and mark with GTY. 2024-02-29 Xi Ruoyao * config/loongarch/loongarch.md (loongarch__w__w_extended): New define_insn. 2024-02-29 Xi Ruoyao * config/loongarch/loongarch.md (CRC): New define_int_iterator. (crc): New define_int_attr. (loongarch_crc_w__w, loongarch_crcc_w__w): Unify into ... (loongarch__w__w): ... here. 2024-02-29 Kito Cheng PR target/114130 * config/riscv/sync.md (atomic_compare_and_swap): Sign extend the expected value if needed. 2024-02-28 Cupertino Miranda * config.gcc (target_gtfiles): Change coreout to btfext-out. (extra_objs): Change coreout to btfext-out. * config/bpf/coreout.cc: Rename to btfext-out.cc. * config/bpf/btfext-out.cc: Add. * config/bpf/coreout.h: Rename to btfext-out.h. * config/bpf/btfext-out.h: Add. * config/bpf/core-builtins.cc: Change include. * config/bpf/core-builtins.h: Change include. * config/bpf/t-bpf: Accomodate renamed files. 2024-02-28 Cupertino Miranda PR target/113453 * config/bpf/bpf.cc (bpf_function_prologue): Define target hook. * config/bpf/coreout.cc (brf_ext_info_section) (btf_ext_info): Move from coreout.h (btf_ext_funcinfo, btf_ext_lineinfo): Add struct. (bpf_core_reloc): Rename to btf_ext_core_reloc. (btf_ext): Add static variable. (btfext_info_sec_find_or_add, SEARCH_NODE_AND_RETURN) (bpf_create_or_find_funcinfo, bpt_create_core_reloc) (btf_ext_add_string, btf_funcinfo_type_callback) (btf_add_func_info_for, btf_validate_funcinfo) (btf_ext_info_len, output_btfext_func_info): Add function. (output_btfext_header, bpf_core_reloc_add) (output_btfext_core_relocs, btf_ext_init, btf_ext_output): Change to support new structs. * config/bpf/coreout.h (btf_ext_funcinfo, btf_ext_lineinfo): Move and change in coreout.cc. (btf_add_func_info_for, btf_ext_add_string): Add prototypes. 2024-02-28 Cupertino Miranda * config/bpf/bpf.cc (bpf_option_override): Make .BTF.ext enabled by default for BPF. (bpf_file_end): Call BTF deallocation. (bpf_asm_init_sections): Correct condition. * dwarf2ctf.cc (ctf_debug_finalize): Conditionally execute BTF deallocation. (ctf_debuf_finish): Correct condition for calling ctf_debug_finalize. 2024-02-28 Cupertino Miranda * btfout.cc (output_btf_func_types): Use FOR_EACH_VEC_ELT. (traverse_btf_func_types): Define function. * ctfc.h (funcs_traverse_callback): Typedef for function prototype. (traverse_btf_func_types): Add prototype. 2024-02-28 Cupertino Miranda * btfout.cc (btf_collect_dataset): Corrects BTF type id. 2024-02-28 Richard Biener PR tree-optimization/113831 PR tree-optimization/108355 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): Revert PR113831 fix. 2024-02-28 Richard Biener PR tree-optimization/114121 * tree-ssa-sccvn.h (vn_reference_s::offset, vn_reference_s::max_size): New fields. (vn_reference_insert_pieces): Adjust prototype. * tree-ssa-pre.cc (phi_translate_1): Preserve offset/max_size. * tree-ssa-sccvn.cc (vn_reference_eq): Compare offset and size, allow using "don't know" state. (vn_walk_cb_data::finish): Pass along offset/max_size. (vn_reference_lookup_or_insert_for_pieces): Take offset and max_size as argument and use it. (vn_reference_lookup_3): Properly adjust offset and max_size according to the adjusted ao_ref. (vn_reference_lookup_pieces): Initialize offset and max_size. (vn_reference_lookup): Likewise. (vn_reference_lookup_call): Likewise. (vn_reference_insert): Likewise. (visit_reference_op_call): Likewise. (vn_reference_insert_pieces): Take offset and max_size as argument and use it. 2024-02-28 Juergen Christ PR tree-optimization/114075 * tree-vect-stmts.cc (vectorizable_operation): Don't emulate floating point vectors 2024-02-28 Jakub Jelinek PR tree-optimization/114041 * graphite-sese-to-poly.cc (add_conditions_to_domain): Check for INTEGRAL_TYPE_P check rather than INTEGER_TYPE. 2024-02-28 Jakub Jelinek PR tree-optimization/113988 * stor-layout.h (bitwise_mode_for_size): Declare. * stor-layout.cc (bitwise_mode_for_size): New function. * gimple-fold.cc (gimple_fold_builtin_memory_op): Use it. Use bitwise_type_for_mode instead of build_nonstandard_integer_type. Use BITS_PER_UNIT instead of 8. 2024-02-27 Uros Bizjak PR target/113871 * config/i386/mmx.md (V248FI): Add V2BF mode. (V24FI_32): Ditto. 2024-02-27 Eric Botcazou * tree-ssa-dse.cc (compute_trims): Fix description. Return early if either ref->offset is not byte aligned or ref->size is not known to be equal to ref->max_size. (maybe_trim_complex_store): Fix description. (maybe_trim_constructor_store): Likewise. (maybe_trim_partially_dead_store): Likewise. 2024-02-27 Richard Earnshaw * config/arm/mmintrin.h: Warn if this header is included without defining __ENABLE_DEPRECATED_IWMMXT. 2024-02-27 Richard Biener PR tree-optimization/114074 * tree-chrec.h (chrec_convert_rhs): Default at_stmt arg to NULL. * tree-chrec.cc (chrec_fold_multiply): Canonicalize inputs. Handle poly vs. non-poly multiplication correctly with respect to undefined behavior on overflow. 2024-02-27 Jakub Jelinek PR rtl-optimization/114044 * internal-fn.def (CLRSB, CLZ, CTZ, FFS, PARITY): Use DEF_INTERNAL_INT_EXT_FN macro rather than DEF_INTERNAL_INT_FN. * internal-fn.h (expand_CLRSB, expand_CLZ, expand_CTZ, expand_FFS, expand_PARITY): Declare. * internal-fn.cc (expand_bitquery, expand_CLRSB, expand_CLZ, expand_CTZ, expand_FFS, expand_PARITY): New functions. (expand_POPCOUNT): Use expand_bitquery. 2024-02-27 Richard Biener PR tree-optimization/114081 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Perform manual dominator update for prologue peeling. (vect_do_peeling): Properly update dominators after adding the prologue-around guard. 2024-02-26 Georg-Johann Lay * config/avr/avr.opt (mcall-prologues, mrelax, maccumulate-args) (mstrict-X): Tag as "Optimization". 2024-02-26 Georg-Johann Lay * config/avr/avr.cc (avr_out_compare) [AVR_TINY]: Remove code in an "if avr_adiw_reg_p()" block that's dead for AVR_TINY. 2024-02-26 Jakub Jelinek H.J. Lu PR rtl-optimization/113617 * varasm.cc (default_elf_select_rtx_section): For references to private symbols in comdat sections use .data.relro.local.pool., .data.relro.pool. or .rodata. comdat sections. 2024-02-26 Richard Biener PR tree-optimization/114099 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Create and fill in a needed virtual LC PHI for the alternate exits. Remove code dealing with that missing. 2024-02-26 Richard Biener PR tree-optimization/114068 * tree-vect-loop-manip.cc (get_live_virtual_operand_on_edge): New function. (slpeel_tree_duplicate_loop_to_edge_cfg): Add a virtual LC PHI on the main exit if needed. Remove band-aid for the case it was missing. 2024-02-26 H.J. Lu PR target/114097 * config/i386/i386-options.cc (ix86_set_func_type): Check interrupt instead of noreturn attribute. 2024-02-26 Jakub Jelinek * config/i386/i386.cc (ix86_bitint_type_info): Add support for !TARGET_64BIT. 2024-02-26 Jakub Jelinek PR tree-optimization/114090 * match.pd ((x >= 0 ? x : 0) + (x <= 0 ? -x : 0) -> abs x): Restrict pattern to ANY_INTEGRAL_TYPE_P and TYPE_OVERFLOW_UNDEFINED types. ((x <= 0 ? -x : 0) -> max(-x, 0)): Likewise. 2024-02-26 Jakub Jelinek PR middle-end/114084 * fold-const.cc (fold_binary_loc): Avoid the final associate_trees if all subtrees of var0 come from one of the op0 or op1 operands and all subtrees of con0 come from the other one. Don't clear variables which are never used afterwards. 2024-02-26 Richard Biener PR middle-end/114070 * genmatch.cc (parser::parse_c_expr): Do not record operand lists but only mark operators used. * match.pd ((c ? a : b) op (c ? d : e) --> c ? (a op d) : (b op e)): Properly guard the case of tcc_comparison changing the VEC_COND value operand type. 2024-02-26 Jakub Jelinek PR target/114094 * config/i386/i386.cc (x86_function_profiler): Add missing new-line to printed instruction. 2024-02-26 H.J. Lu PR target/114098 * config/i386/amxtileintrin.h (_tile_loadconfig): Use __builtin_ia32_ldtilecfg. (_tile_storeconfig): Use __builtin_ia32_sttilecfg. * config/i386/i386-builtin.def (BDESC): Add __builtin_ia32_ldtilecfg and __builtin_ia32_sttilecfg. * config/i386/i386-expand.cc (ix86_expand_builtin): Handle IX86_BUILTIN_LDTILECFG and IX86_BUILTIN_STTILECFG. * config/i386/i386.md (ldtilecfg): New pattern. (sttilecfg): Likewise. 2024-02-24 Richard Sandiford PR tree-optimization/113205 * tree-vect-slp.cc (vect_optimize_slp_pass::forward_cost): Reject the proposed layout if it does not allow a source partition with layout 2 to keep that layout. 2024-02-24 Jakub Jelinek * builtins.cc (fold_builtin_isascii): Use HOST_WIDE_INT_UC macro. * combine.cc (make_field_assignment): Use HOST_WIDE_INT_1U macro. * double-int.cc (double_int::mask): Use HOST_WIDE_INT_UC macros. * genattrtab.cc (attr_alt_complement): Use HOST_WIDE_INT_1 macro. (mk_attr_alt): Use HOST_WIDE_INT_0 macro. * genautomata.cc (bitmap_set_bit, CLEAR_BIT): Use HOST_WIDE_INT_1 macros. * ipa-strub.cc (can_strub_internally_p): Use HOST_WIDE_INT_1 macro. * loop-iv.cc (implies_p): Use HOST_WIDE_INT_1U macro. * pretty-print.cc (test_pp_format): Use HOST_WIDE_INT_C and HOST_WIDE_INT_UC macros. * rtlanal.cc (nonzero_bits1): Use HOST_WIDE_INT_UC macro. * tree.cc (build_replicated_int_cst): Use HOST_WIDE_INT_1U macro. * tree.h (DECL_OFFSET_ALIGN): Use HOST_WIDE_INT_1U macro. * tree-ssa-structalias.cc (dump_varinfo): Use ~HOST_WIDE_INT_0U macros. * wide-int.cc (divmod_internal_2): Use HOST_WIDE_INT_1U macro. * config/i386/constraints.md (define_constraint "L"): Use HOST_WIDE_INT_C macro. * config/i386/i386.md (movabsq split peephole2): Use HOST_WIDE_INT_C macro. (movl + movb peephole2): Likewise. * config/i386/predicates.md (x86_64_zext_immediate_operand): Likewise. (const_32bit_mask): Likewise. 2024-02-24 Jakub Jelinek PR middle-end/114073 * gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Handle VIEW_CONVERT_EXPRs between large/huge _BitInt and non-integer/pointer types like vector or complex types. (gimple_lower_bitint): Don't merge VIEW_CONVERT_EXPRs to non-integral types. Fix up VIEW_CONVERT_EXPR handling. Allow merging VIEW_CONVERT_EXPR from non-integral/pointer types with a store. 2024-02-23 Robin Dapp PR target/114028 * config/riscv/riscv-v.cc (rvv_builder::can_duplicate_repeating_sequence_p): Return false if inner mode is already Pmode. (rvv_builder::is_all_same_sequence): New function. (expand_vec_init): Emit broadcast if sequence is all same. 2024-02-23 Richard Sandiford PR target/113613 * config/aarch64/aarch64-early-ra.cc (early_ra::m_current_region): New member variable. (early_ra::m_fpr_recency): Likewise. (early_ra::start_new_region): Bump m_current_region. (early_ra::allocate_colors): Prefer less recently used registers in the event of a tie. Add a comment to explain why we prefer(ed) higher-numbered registers. (early_ra::find_oldest_color): Prefer less recently used registers here too. (early_ra::finalize_allocation): Update recency information for allocated registers. (early_ra::process_blocks): Initialize m_current_region and m_fpr_recency. 2024-02-23 Richard Sandiford PR target/113295 * config/aarch64/aarch64-early-ra.cc (early_ra::test_strictness): New enum. (early_ra::is_chain_candidate): Add a strictness parameter to control whether only correctness matters, or whether both correctness and heuristics should be used. Handle multiple levels of equivalence. (early_ra::find_related_start): Update call accordingly. (early_ra::strided_polarity_pref): Likewise. (early_ra::form_chains): Likewise. (early_ra::try_to_chain_allocnos): Use is_chain_candidate in correctness mode rather than trying to inline the test. 2024-02-23 Richard Sandiford PR target/113295 * config/aarch64/aarch64-early-ra.cc (early_ra::find_related_start): Account for definitions by shared registers when testing for a single register definition. (early_ra::accumulate_defs): New function. (early_ra::record_copy): If A shares B's register, fold A's definition information into B's. Fold A's use information into B's. 2024-02-23 H.J. Lu * configure.ac (HAVE_AS_R_X86_64_CODE_6_GOTTPOFF): Defined as 1 if R_X86_64_CODE_6_GOTTPOFF is supported. * config.in: Regenerated. * configure: Likewise. * config/i386/predicates.md (apx_ndd_add_memory_operand): Allow UNSPEC_GOTNTPOFF if R_X86_64_CODE_6_GOTTPOFF is supported. 2024-02-23 Richard Earnshaw PR target/108120 * config/arm/neon.md (div3): Rename from div3. Gate with ARM_HAVE_NEON__ARITH. 2024-02-23 Jakub Jelinek PR rtl-optimization/114054 * expr.cc (expand_expr_real_2) : Use temp variable instead of target parameter for result. 2024-02-23 Jakub Jelinek PR tree-optimization/114040 * gimple-lower-bitint.cc (bitint_large_huge::lower_addsub_overflow): Use EQ_EXPR rather than LT_EXPR for g2 condition and change its probability from likely to unlikely. When handling the true true store, first cast to limb_access_type and then to l's type. 2024-02-23 Richard Biener PR target/90785 * config.gcc: Add ia64*-*-* to the list of obsoleted targets. 2024-02-23 Palmer Dabbelt PR other/109668 * config/riscv/arch-canonicalize: Move to python3 * config/riscv/multilib-generator: Likewise 2024-02-23 Palmer Dabbelt * doc/invoke.texi: Document -mcpu. 2024-02-23 Lulu Cheng * configure: Regenerate. * configure.ac: Add parameter "--fatal-warnings" to assemble when checking whether the assemble support conditional branch relaxation. 2024-02-22 Jakub Jelinek PR c/114007 * doc/extend.texi: (__extension__): Remove comments about scope tokens vs. two colons. 2024-02-22 Andrew Pinski PR tree-optimization/109804 * gimple-ssa-warn-access.cc (new_delete_mismatch_p): Handle DEMANGLE_COMPONENT_UNNAMED_TYPE. 2024-02-22 Richard Biener PR tree-optimization/114048 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): MEM_REF can also produce -1 off. 2024-02-22 Richard Biener PR tree-optimization/114027 * tree-vect-loop.cc (vecctorizable_reduction): Use optimized condition reduction classification only for single-element chains. 2024-02-22 Jakub Jelinek PR ipa/111960 * profile-count.h (profile_count::dump): Remove overload with char * first argument. * profile-count.cc (profile_count::dump): Change overload with char * first argument which uses sprintf into the overfload with FILE * first argument and use fprintf instead. Remove overload which wrapped it. 2024-02-22 Jakub Jelinek PR tree-optimization/113993 * tree-call-cdce.cc (get_no_error_domain): Handle BUILT_IN_{COSH,SINH,EXP{,M1,2}}{F32X,F64X}. Handle BUILT_IN_{COSH,SINH,EXP{,M1,2}}L for REAL_MODE_FORMAT (TYPE_MODE (long_double_type_node))->emax == 16384 the as the F128 suffixed cases, otherwise as non-suffixed ones. Handle BUILT_IN_{EXP,POW}10L for REAL_MODE_FORMAT (TYPE_MODE (long_double_type_node))->emax == 16384 as (-inf, 4932). 2024-02-22 Jakub Jelinek PR tree-optimization/114038 * gimple-lower-bitint.cc (bitint_large_huge::lower_mul_overflow): Fix loop exit condition if end is divisible by limb_prec. 2024-02-22 YunQiang Su * doc/invoke.texi(MIPS Options): Fix skipping UrlSuffix problem of mabi=, mno-flush-func, mexplicit-relocs; add missing leading - of mbranch-cost option. * config/mips/mips.opt.urls: Regenerate. 2024-02-22 Kewen Lin PR target/109987 * config/rs6000/constraints.md (we): Update internal doc without referring to option -mpower9-vector. * config/rs6000/driver-rs6000.cc (asm_names): Remove mpower9-vector special handlings. * config/rs6000/rs6000-cpus.def (OTHER_P9_VECTOR_MASKS, OTHER_P8_VECTOR_MASKS): Merge to ... (OTHER_VSX_VECTOR_MASKS): ... here. * config/rs6000/rs6000.cc (rs6000_option_override_internal): Remove some error message handlings and explicit option mask adjustments on explicit option power{8,9}-vector conflicting with other options. (rs6000_print_isa_options): Update comments. (rs6000_disable_incompatible_switches): Remove power{8,9}-vector related array items and handlings. * config/rs6000/rs6000.h (ASM_CPU_SPEC): Remove mpower9-vector special handlings. * config/rs6000/rs6000.opt: Make option power{8,9}-vector as WarnRemoved. * doc/extend.texi: Remove documentation referring to option -mpower8-vector. * doc/invoke.texi: Remove documentation for option -mpower{8,9}-vector and adjust some documentation referring to them. * doc/md.texi: Update documentation for constraint we. * doc/sourcebuild.texi: Remove documentation for powerpc_p8vector_ok. 2024-02-22 Pan Li PR target/114017 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Upgrade the version to 0.12. 2024-02-21 Edwin Lu * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert 2024-02-21 Edwin Lu Robin Dapp * config/riscv/generic-ooo.md (generic_ooo): Move reservation (generic_ooo_vec_load): Ditto (generic_ooo_vec_store): Ditto (generic_ooo_vec_loadstore_seg): Ditto (generic_ooo_vec_alu): Ditto (generic_ooo_vec_fcmp): Ditto (generic_ooo_vec_imul): Ditto (generic_ooo_vec_fadd): Ditto (generic_ooo_vec_fmul): Ditto (generic_ooo_crypto): Ditto (generic_ooo_perm): Ditto (generic_ooo_vec_reduction): Ditto (generic_ooo_vec_ordered_reduction): Ditto (generic_ooo_vec_idiv): Ditto (generic_ooo_vec_float_divsqrt): Ditto (generic_ooo_vec_mask): Ditto (generic_ooo_vec_vesetvl): Ditto (generic_ooo_vec_setrm): Ditto (generic_ooo_vec_readlen): Ditto * config/riscv/riscv.md: Include generic-vector-ooo * config/riscv/generic-vector-ooo.md: New file. To here 2024-02-21 Edwin Lu * config/riscv/generic-ooo.md (generic_ooo_sfb_alu): Add reservation (generic_ooo_branch): Ditto * config/riscv/generic.md (generic_sfb_alu): Ditto (generic_fmul_half): Ditto * config/riscv/riscv.md: Remove cbo, pushpop, and rdfrm types * config/riscv/sifive-7.md (sifive_7_hfma): Add reservation (sifive_7_popcount): Ditto * config/riscv/sifive-p400.md (sifive_p400_clmul): Ditto * config/riscv/sifive-p600.md (sifive_p600_clmul): Ditto * config/riscv/vector.md: Change rdfrm to fmove * config/riscv/zc.md: Change pushpop to load/store 2024-02-21 Jonathan Wakely * doc/invoke.texi (Warning Options): Fix typos. 2024-02-21 David Faust * config/bpf/bpf-protos.h (bpf_expand_cpymem): New. * config/bpf/bpf.cc: (emit_move_loop, bpf_expand_cpymem): New. * config/bpf/bpf.md: (cpymemdi, movmemdi): New define_expands. 2024-02-21 Martin Jambor PR ipa/113476 * ipa-prop.h (ipa_node_params): Convert lattices to a vector, adjust initializers in the contructor. (ipa_node_params::~ipa_node_params): Release lattices as a vector. * ipa-cp.h: New file. * ipa-cp.cc: Include sreal.h and ipa-cp.h. (ipcp_value_source): Move to ipa-cp.h. (ipcp_value_base): Likewise. (ipcp_value): Likewise. (ipcp_lattice): Likewise. (ipcp_agg_lattice): Likewise. (ipcp_bits_lattice): Likewise. (ipcp_vr_lattice): Likewise. (ipcp_param_lattices): Likewise. (ipa_get_parm_lattices): Remove assert latticess is non-NULL. (ipa_value_from_jfunc): Adjust a check for empty lattices. (ipa_context_from_jfunc): Likewise. (ipa_agg_value_from_jfunc): Likewise. (merge_agg_lats_step): Do not memset new aggregate lattices to zero. (ipcp_propagate_stage): Allocate lattices in a vector as opposed to just in contiguous memory. (ipcp_store_vr_results): Adjust a check for empty lattices. * auto-profile.cc: Include sreal.h and ipa-cp.h. * cgraph.cc: Likewise. * cgraphclones.cc: Likewise. * cgraphunit.cc: Likewise. * config/aarch64/aarch64.cc: Likewise. * config/i386/i386-builtins.cc: Likewise. * config/i386/i386-expand.cc: Likewise. * config/i386/i386-features.cc: Likewise. * config/i386/i386-options.cc: Likewise. * config/i386/i386.cc: Likewise. * config/rs6000/rs6000.cc: Likewise. * config/s390/s390.cc: Likewise. * gengtype.cc (open_base_files): Added sreal.h and ipa-cp.h to the files to be included in gtype-desc.cc. * gimple-range-fold.cc: Include sreal.h and ipa-cp.h. * ipa-devirt.cc: Likewise. * ipa-fnsummary.cc: Likewise. * ipa-icf.cc: Likewise. * ipa-inline-analysis.cc: Likewise. * ipa-inline-transform.cc: Likewise. * ipa-inline.cc: Include ipa-cp.h, move inclusion of sreal.h higher. * ipa-modref.cc: Include sreal.h and ipa-cp.h. * ipa-param-manipulation.cc: Likewise. * ipa-predicate.cc: Likewise. * ipa-profile.cc: Likewise. * ipa-prop.cc: Likewise. (ipa_node_params_t::duplicate): Assert new lattices remain empty instead of setting them to NULL. * ipa-pure-const.cc: Include sreal.h and ipa-cp.h. * ipa-split.cc: Likewise. * ipa-sra.cc: Likewise. * ipa-strub.cc: Likewise. * ipa-utils.cc: Likewise. * ipa.cc: Likewise. * toplev.cc: Likewise. * tree-ssa-ccp.cc: Likewise. * tree-ssa-sccvn.cc: Likewise. * tree-vrp.cc: Likewise. 2024-02-21 Tamar Christina * config/aarch64/aarch64-arches.def (AARCH64_ARCH): Remove LS64 from Armv8.7-a. 2024-02-21 Richard Sandiford * config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state): Use aarch64_gen_compare_zero_and_branch rather than emitting a CBZ directly. 2024-02-21 Richard Sandiford * config/aarch64/aarch64.cc (aarch64_option_valid_attribute_p): Remove duplicated call. 2024-02-21 Richard Sandiford * config/aarch64/aarch64.cc (aarch64_function_ok_for_sibcall): Check that each individual piece of state is shared in the same way, rather than using an aggregate check for PSTATE.ZA. 2024-02-21 Richard Sandiford * config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state): In the code that commits a lazy save, only zero ZA if the function has ZA state. Similarly zero ZT0 if the function has ZT0 state. 2024-02-21 Richard Sandiford * config/aarch64/aarch64-sme.md (aarch64_commit_lazy_save): Remove, directly inserting the associated sequence * config/aarch64/aarch64.cc (aarch64_mode_emit_local_sme_state): ...here instead. 2024-02-21 Richard Sandiford PR target/113995 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Don't fold the SVE allocation into the initial allocation if the initial allocation includes a VG save. 2024-02-21 Richard Sandiford PR target/113220 * cfgrtl.cc (commit_one_edge_insertion): Handle sequences that contain jumps even if called after initial RTL expansion. * mode-switching.cc: Include cfgbuild.h. (optimize_mode_switching): Allow the sequence returned by the emit hook to contain internal jumps. Record which blocks contain such jumps and split the blocks at the end. * config/aarch64/aarch64.cc (aarch64_mode_emit): Check for non-debug insns when scanning the sequence. 2024-02-21 Tobias Burnus * config/nvptx/gen-omp-device-properties.sh: Add 'nvptx64' to arch. * config/nvptx/nvptx.cc (nvptx_omp_device_kind_arch_isa): Likewise. 2024-02-21 Dimitar Dimitrov * doc/invoke.texi (-mmcu): Add information about MCU specs. 2024-02-21 Dimitar Dimitrov * doc/invoke.texi (-minrt): Clarify that main must take no arguments. 2024-02-20 Georg-Johann Lay * config/avr/builtins.def: Use function prototypes of given size and signedness. * config/avr/avr.cc (avr_init_builtins): Adjust types required by builtins.def. * doc/extend.texi (AVR Built-in Functions): Adjust accordingly. 2024-02-20 Georg-Johann Lay * doc/extend.texi (AVR Built-in Functions): Use @defbuiltin instead of @table. 2024-02-20 Will Hawkins * config/bpf/bpf.opt: Add help information for -mcpu. 2024-02-20 Richard Sandiford PR target/113805 * config/aarch64/aarch64-passes.def (pass_late_track_speculation): New pass. * config/aarch64/aarch64-protos.h (make_pass_late_track_speculation): Declare. * config/aarch64/aarch64.md (is_call): New attribute. (*and3nr_compare0): Rename to... (@aarch64_and3nr_compare0): ...this. * config/aarch64/aarch64-sme.md (aarch64_get_sme_state) (aarch64_tpidr2_save, aarch64_tpidr2_restore): Add is_call attributes. * config/aarch64/aarch64-speculation.cc: Update file comment to describe the new late pass. (aarch64_do_track_speculation): Handle is_call insns like other calls. (pass_track_speculation): Add an is_late member variable. (pass_track_speculation::gate): Run the late pass for streaming- compatible functions and the early pass for other functions. (make_pass_track_speculation): Update accordingly. (make_pass_late_track_speculation): New function. * config/aarch64/aarch64.cc (aarch64_gen_test_and_branch): New function. (aarch64_guard_switch_pstate_sm): Use it. 2024-02-19 Iain Sandoe * config/aarch64/aarch64-builtins.cc (aarch64_init_rng_builtins): Register these builtins with a pointer to uint64_t rather than unsigned DI mode. 2024-02-19 Thomas Schwinge PR target/113615 * config/gcn/gcn-valu.md (define_expand "reduc__scal_"): Conditionalize on '!TARGET_RDNA2_PLUS'. * config/gcn/gcn.cc (gcn_expand_dpp_shr_insn) (gcn_expand_reduc_scalar): 'gcc_checking_assert (!TARGET_RDNA2_PLUS);'. 2024-02-19 Thomas Schwinge * config/gcn/gcn.h (TARGET_CPU_CPP_BUILTINS): Restore lost '__gfx90a__' target CPU definition. Add some safeguards for the future. 2024-02-19 Richard Biener PR rtl-optimization/54052 * rtl-ssa/blocks.cc (function_info::place_phis): Filter local defs by LR_OUT. 2024-02-19 Jakub Jelinek PR tree-optimization/113967 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): Require in condition that @rpos is multiple of vector element size. 2024-02-19 Juzhe-Zhong PR target/113696 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info): Suppress vsetvl fusion. 2024-02-18 H.J. Lu PR target/113912 * config/i386/i386.cc (ix86_can_use_push2pop2): New. (ix86_pro_and_epilogue_can_use_push2pop2): Use it. (ix86_emit_save_regs): Don't generate push2 if ix86_can_use_push2pop2 return false. (ix86_expand_epilogue): Don't generate pop2 if ix86_can_use_push2pop2 return false. 2024-02-18 Georg-Johann Lay * doc/invoke.texi (AVR Options) <-mmcu>: Remove "Atmel". Note on complete device support. 2024-02-18 Georg-Johann Lay * doc/extend.texi (AVR Function Attributes): Fuse description of "signal" and "interrupt" attribute. Link pseudo instruction. 2024-02-18 Lulu Cheng * config/loongarch/larchintrin.h (__movgr2fcsr): Remove redundant symbol type conversions. (__cacop_d): Likewise. (__cpucfg): Likewise. (__asrtle_d): Likewise. (__asrtgt_d): Likewise. (__lddir_d): Likewise. (__ldpte_d): Likewise. (__crc_w_b_w): Likewise. (__crc_w_h_w): Likewise. (__crc_w_w_w): Likewise. (__crc_w_d_w): Likewise. (__crcc_w_b_w): Likewise. (__crcc_w_h_w): Likewise. (__crcc_w_w_w): Likewise. (__crcc_w_d_w): Likewise. (__csrrd_w): Likewise. (__csrwr_w): Likewise. (__csrxchg_w): Likewise. (__csrrd_d): Likewise. (__csrwr_d): Likewise. (__csrxchg_d): Likewise. (__iocsrrd_b): Likewise. (__iocsrrd_h): Likewise. (__iocsrrd_w): Likewise. (__iocsrrd_d): Likewise. (__iocsrwr_b): Likewise. (__iocsrwr_h): Likewise. (__iocsrwr_w): Likewise. (__iocsrwr_d): Likewise. (__frecipe_s): Likewise. (__frecipe_d): Likewise. (__frsqrte_s): Likewise. (__frsqrte_d): Likewise. 2024-02-18 Lulu Cheng * config/loongarch/larchintrin.h (__iocsrrd_h): Modify the function return value type to unsigned short. 2024-02-16 Edwin Lu * doc/sourcebuild.texi: add scan-assembler-bound 2024-02-16 Jason Merrill * gdbhooks.py: Fix regex syntax. 2024-02-16 Richard Biener PR tree-optimization/113895 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): Disable consistency checking when there are out-of-bound array accesses. Allow -1 off when from an array reference with constant index. 2024-02-16 Kito Cheng PR target/106543 * config/riscv/riscv.md (*sge_): Fix asm pattern. 2024-02-16 Rainer Orth * doc/sourcebuild.texi (Effective-Target Keywords, Other attribugs): Document linker_plugin. (Require Support): Document dg-require-linker-plugin. 2024-02-16 Kito Cheng PR target/109349 * common/config/riscv/riscv-common.cc (riscv_arch_help): New. * config/riscv/riscv-protos.h (RISCV_MAJOR_VERSION_BASE): New. (RISCV_MINOR_VERSION_BASE): Ditto. (RISCV_REVISION_VERSION_BASE): Ditto. * config/riscv/riscv-c.cc (riscv_ext_version_value): Use enum rather than magic number. * config/riscv/riscv.h (riscv_arch_help): New. (EXTRA_SPEC_FUNCTIONS): Add riscv_arch_help. (DRIVER_SELF_SPECS): Handle -march=help, -print-supported-extensions and --print-supported-extensions. * config/riscv/riscv.opt (march=help): New. (print-supported-extensions): New. (-print-supported-extensions): New. * doc/invoke.texi (RISC-V Options): Document -march=help. 2024-02-16 Tejas Belagod PR target/113780 * config/arm/arm.cc (arm_function_ok_for_sibcall): Don't allow tailcalls for indirect calls with 4 or more arguments in pac-enabled functions. 2024-02-15 David Faust * config/bpf/bpf.md (zero_extendqidi2): Correct asm template to use ldxb instead of ldxh. 2024-02-15 Jakub Jelinek PR middle-end/113921 * cfgrtl.h (prepend_insn_to_edge): New declaration. * cfgrtl.cc (insert_insn_on_edge): Clarify behavior in function comment. (prepend_insn_to_edge): New function. * cfgexpand.cc (expand_asm_stmt): Use prepend_insn_to_edge instead of insert_insn_on_edge. 2024-02-15 Richard Biener PR tree-optimization/111156 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): Look at the pattern stmt if any. 2024-02-15 Georg-Johann Lay PR target/113927 * config/avr/avr.h (AVR_HAVE_ADIW): New macro. * config/avr/avr-protos.h (avr_adiw_reg_p): New proto. * config/avr/avr.cc (avr_adiw_reg_p): New function. (avr_conditional_register_usage) [AVR_TINY]: Don't clear ADDW_REGS. Replace test_hard_reg_class (ADDW_REGS, ...) with calls to * config/avr/avr.md: Same. (attr "isa") : Remove. : Add. (define_insn, define_insn_and_split): When an alternative has constraint "w", then set attribute "isa" to "adiw". * config/avr/avr-c.cc (avr_cpu_cpp_builtins) [AVR_HAVE_ADIW]: Built-in define __AVR_HAVE_ADIW__. * doc/invoke.texi (AVR Options): Document it. 2024-02-15 Andrew Stubbs * config/gcn/gcn-valu.md (vec_extract): Add conditions for RDNA. * config/gcn/gcn.cc (gcn_vectorize_vec_perm_const): Check permutation details are supported on RDNA devices. 2024-02-15 Andrew Pinski PR middle-end/113508 * doc/md.texi (sdot_prod@var{m}, udot_prod@var{m}, usdot_prod@var{m}, ssad@var{m}, usad@var{m}, widen_usum@var{m}3, smulhs@var{m}3, umulhs@var{m}3, smulhrs@var{m}3, umulhrs@var{m}3): Add sentence about what the mode m is. 2024-02-15 Andrew Pinski * doc/md.texi (widen_ssum, widen_usum, smulhs, umulhs, smulhrs, umulhrs, sdiv_pow2): Move the 3 outside of the var. 2024-02-15 Richard Biener * tree-ssa-tail-merge.cc (same_succ_hash): Skip debug stmts. 2024-02-15 Jakub Jelinek PR tree-optimization/113567 * gimple-lower-bitint.cc (gimple_lower_bitint): For large/huge _BitInt multiplication, division or modulo with SSA_NAME_OCCURS_IN_ABNORMAL_PHI lhs and at least one of rhs1 and rhs2 force the affected inputs into a new SSA_NAME. 2024-02-14 Uros Bizjak PR target/113871 * config/i386/mmx.md (V248FI): New mode iterator. (V24FI_32): DItto. (vec_shl_): New expander. (vec_shl_): Ditto. (vec_shr_): Ditto. (vec_shr_): Ditto. * config/i386/sse.md (vec_shl_): Simplify expander. (vec_shr_): Ditto. 2024-02-14 Jan Hubicka PR tree-optimization/111054 * tree-ssa-loop-split.cc (split_loop): Check for profile being present. 2024-02-14 Tamar Christina * tree-cfg.cc (replace_loop_annotate): Inspect loop edges for annotations. 2024-02-14 Richard Biener PR tree-optimization/113910 * bitmap.cc (bitmap_hash): Mix the full element "hash" to the hashval_t hash. 2024-02-14 Jakub Jelinek * pretty-print.cc (PTRDIFF_MAX): Define if not yet defined. (pp_integer_with_precision): For unsigned ptrdiff_t printing with u, o or x print ptrdiff_t argument converted to unsigned long long and masked with 2ULL * PTRDIFF_MAX + 1. 2024-02-14 Richard Biener PR middle-end/113576 * expr.cc (do_store_flag): For vector bool compares of vectors with padding zero that. * dojump.cc (do_compare_and_jump): Likewise. 2024-02-14 Gerald Pfeifer * doc/install.texi (Prerequisites): Update gettext link. 2024-02-13 H.J. Lu PR target/113876 * config/i386/i386.cc (ix86_pro_and_epilogue_can_use_push2pop2): Return false if the incoming stack isn't 16-byte aligned. 2024-02-13 Tobias Burnus PR middle-end/113904 * omp-general.cc (struct omp_ts_info): Update for splitting of OMP_TRAIT_PROPERTY_EXPR into OMP_TRAIT_PROPERTY_{DEV_NUM,BOOL}_EXPR. * omp-selectors.h (enum omp_tp_type): Replace OMP_TRAIT_PROPERTY_EXPR by OMP_TRAIT_PROPERTY_{DEV_NUM,BOOL}_EXPR. 2024-02-13 Monk Chiang PR target/113742 * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Fix recognizes UNSPEC_AUIPC for RISCV_FUSE_LUI_ADDI. 2024-02-13 Richard Biener PR tree-optimization/113895 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): Track offset to discover constant array indices in bits, handle COMPONENT_REF to bitfields. 2024-02-13 Richard Biener PR tree-optimization/113831 * tree-ssa-sccvn.cc (ao_ref_init_from_vn_reference): Fix typo in comment. 2024-02-13 Richard Biener PR tree-optimization/113902 * tree-vect-loop.cc (move_early_exit_stmts): Track last_seen_vuse for VUSE updating. 2024-02-13 Tamar Christina PR tree-optimization/113734 * tree-vect-loop.cc (vect_transform_loop): Treat the final iteration of an early break loop as partial. 2024-02-13 Richard Biener PR tree-optimization/113898 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): Add missing accumulated off adjustment. 2024-02-13 Jakub Jelinek * hwint.h (GCC_PRISZ, fmt_size_t): Fix preprocessor conditions, instead of comparing SIZE_MAX against INT_MAX and LONG_MAX compare it against UINT_MAX and ULONG_MAX. 2024-02-13 David Malcolm * diagnostic-core.h (emit_diagnostic_valist): Rename overload to... (emit_diagnostic_valist_meta): ...this. * diagnostic.cc (emit_diagnostic_valist): Likewise, to... (emit_diagnostic_valist_meta): ...this. 2024-02-12 Jakub Jelinek PR tree-optimization/113849 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): Don't use fast path for widening casts where !m_upwards_2limb and lhs_type has precision which is a multiple of limb_prec. 2024-02-12 Jakub Jelinek PR c++/113674 * attribs.cc (extract_attribute_substring): Remove. (lookup_scoped_attribute_spec): Don't call it. 2024-02-12 Jakub Jelinek * gengtype.cc (adjust_field_rtx_def): Use HOST_SIZE_T_PRINT_UNSIGNED and cast to fmt_size_t instead of %lu and cast to unsigned long. 2024-02-12 Christophe Lyon * Makefile.in: Add no-info dependency. * configure.ac: Set BUILD_INFO=no-info if makeinfo is not available. * configure: Regenerate. 2024-02-12 Iain Sandoe PR target/113855 * config/i386/darwin.h (DARWIN_HEAP_T_LIB): Moved to be available to all sub-targets. * config/i386/darwin32-biarch.h (DARWIN_HEAP_T_LIB): Delete. * config/i386/darwin64-biarch.h (DARWIN_HEAP_T_LIB): Delete. 2024-02-12 Richard Biener PR tree-optimization/113831 PR tree-optimization/108355 * tree-ssa-sccvn.cc (copy_reference_ops_from_ref): When we see variable array indices and get_ref_base_and_extent can resolve those to constants fix up the ops to constants as well. (ao_ref_init_from_vn_reference): Use 'off' member for ARRAY_REF and ARRAY_RANGE_REF instead of recomputing it. (valueize_refs_1): Also fixup 'off' of ARRAY_RANGE_REF. 2024-02-12 Pan Li * config/riscv/riscv-vector-builtins.cc (resolve_overloaded_builtin): Replace args to arguments for misspelled term. 2024-02-12 Georg-Johann Lay PR target/112944 * config/avr/gen-avr-mmcu-specs.cc (print_mcu) [have_flmap]: <*link_rodata_in_ram>: Spec undefs symbol __do_flmap_init when not linked with -mrodata-in-ram. 2024-02-12 Richard Biener PR tree-optimization/113863 * tree-vect-data-refs.cc (vect_analyze_early_break_dependences): Record crossed virtual PHIs. * tree-vect-loop.cc (move_early_exit_stmts): Elide crossed virtual PHIs. 2024-02-10 Marek Polacek DR 2237 PR c++/107126 PR c++/97202 * doc/invoke.texi: Document -Wtemplate-id-cdtor. 2024-02-10 Jakub Jelinek * gimple-lower-bitint.cc (itint_large_huge::lower_addsub_overflow): Fix computation of idx for i == 4 of bitint_prec_huge. 2024-02-10 Jakub Jelinek PR middle-end/110754 * gimple-low.cc (assumption_copy_decl): For TREE_THIS_VOLATILE decls create PARM_DECL with pointer to original type, set TREE_READONLY and keep TREE_THIS_VOLATILE, TREE_ADDRESSABLE, DECL_NOT_GIMPLE_REG_P and DECL_BY_REFERENCE cleared. (adjust_assumption_stmt_op): For remapped TREE_THIS_VOLATILE decls wrap PARM_DECL into a simple TREE_THIS_NO_TRAP MEM_REF. (lower_assumption): For TREE_THIS_VOLATILE vars pass ADDR_EXPR of the var as argument. 2024-02-10 Jakub Jelinek * pretty-print.cc (pp_integer_with_precision): Handle precision 3 for size_t and precision 4 for ptrdiff_t. Formatting fix. (pp_format): Document %{t,z}{d,i,u,o,x}. Implement t and z modifiers. Formatting fixes. (test_pp_format): Test t and z modifiers. * gcc.cc (read_specs): Use %td instead of %ld and casts to long. 2024-02-10 Jakub Jelinek * ipa-icf.cc (sem_item_optimizer::process_cong_reduction, sem_item_optimizer::dump_cong_classes): Use HOST_SIZE_T_PRINT_UNSIGNED and casts to fmt_size_t instead of "%lu" and casts to unsigned long. * tree.cc (print_debug_expr_statistics): Use HOST_SIZE_T_PRINT_DEC and casts to fmt_size_t instead of "%ld" and casts to long. (print_value_expr_statistics, print_type_hash_statistics): Likewise. * dwarf2out.cc (output_macinfo_op): Use HOST_WIDE_INT_PRINT_UNSIGNED instead of "%lu" and casts to unsigned long. * gcov-dump.cc (dump_gcov_file): Use %u instead of %lu and casts to unsigned long. * tree-ssa-dom.cc (htab_statistics): Use HOST_SIZE_T_PRINT_DEC and casts to fmt_size_t instead of "%ld" and casts to long. * cfgexpand.cc (dump_stack_var_partition): Use HOST_SIZE_T_PRINT_UNSIGNED and casts to fmt_size_t instead of "%lu" and casts to unsigned long. * gengtype.cc (adjust_field_rtx_def): Likewise. * tree-into-ssa.cc (htab_statistics): Use HOST_SIZE_T_PRINT_DEC and casts to fmt_size_t instead of "%ld" and casts to long. * postreload-gcse.cc (dump_hash_table): Likewise. * ggc-page.cc (alloc_page): Use HOST_SIZE_T_PRINT_UNSIGNED and casts to fmt_size_t instead of "%lu" and casts to unsigned long. (ggc_internal_alloc, ggc_free): Likewise. * genpreds.cc (write_lookup_constraint_1): Likewise. (write_insn_constraint_len): Likewise. * tree-dfa.cc (dump_dfa_stats): Use HOST_SIZE_T_PRINT_DEC and casts to fmt_size_t instead of "%ld" and casts to long. * varasm.cc (output_constant_pool_contents): Use HOST_WIDE_INT_PRINT_DEC instead of "%ld" and casts to long. * var-tracking.cc (dump_var): Likewise. 2024-02-09 Jakub Jelinek PR tree-optimization/113783 * gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Look through VIEW_CONVERT_EXPR for final cast checks. Handle VIEW_CONVERT_EXPRs from large/huge _BitInt to > MAX_FIXED_MODE_SIZE INTEGER_TYPEs. (gimple_lower_bitint): Don't merge mergeable operations or other casts with VIEW_CONVERT_EXPRs to > MAX_FIXED_MODE_SIZE INTEGER_TYPEs. * expr.cc (expand_expr_real_1): Don't use convert_modes if either mode is BLKmode. 2024-02-09 Jakub Jelinek * hwint.h (GCC_PRISZ, fmt_size_t, HOST_SIZE_T_PRINT_DEC, HOST_SIZE_T_PRINT_UNSIGNED, HOST_SIZE_T_PRINT_HEX, HOST_SIZE_T_PRINT_HEX_PURE): Define. * ira-conflicts.cc (build_conflict_bit_table): Use it. Formatting fixes. 2024-02-09 Jakub Jelinek PR middle-end/113415 * cfgexpand.cc (expand_asm_stmt): For asm goto, use duplicate_insn_chain to duplicate after_rtl_seq sequence instead of hand written loop with emit_insn of copy_insn and emit original after_rtl_seq on the last edge. 2024-02-09 Jakub Jelinek PR tree-optimization/113818 * gimple-lower-bitint.cc (add_eh_edge): New function. (bitint_large_huge::handle_load, bitint_large_huge::lower_mergeable_stmt, bitint_large_huge::lower_muldiv_stmt): Use it. 2024-02-09 Jakub Jelinek PR tree-optimization/113774 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): Don't emit any comparison if m_first and low + 1 is equal to m_upwards_2limb, simplify condition for that. If not single_comparison, not m_first and we can prove that the idx <= low comparison will be always true, emit instead of idx <= low comparison low <= low such that cfg cleanup will optimize it at the end of the pass. 2024-02-08 Aldy Hernandez PR tree-optimization/113735 * value-relation.cc (equiv_oracle::add_equiv_to_block): Call limit_check(). 2024-02-08 Georg-Johann Lay * config/avr/gen-avr-mmcu-specs.cc (struct McuInfo): New. (main, print_mcu, diagnose_mrodata_in_ram): Pass it down. 2024-02-08 H.J. Lu PR target/113711 PR target/113733 * config/i386/constraints.md: List all constraints with j prefix. (j>): Change auto-dec to auto-inc in documentation. (je): Changed to a memory constraint with APX NDD TLS operand check. (jM): New memory constraint for APX NDD instructions. (jO): Likewise. * config/i386/i386-protos.h (x86_poff_operand_p): Removed. * config/i386/i386.cc (x86_poff_operand_p): Likewise. * config/i386/i386.md (*add3_doubleword): Use rjO. (*add_1[SWI48]): Use je and jM. (addsi_1_zext): Use jM. (*addv4_doubleword_1[DWI]): Likewise. (*sub_1[SWI]): Use jM. (@add3_cc_overflow_1[SWI]): Likewise. (*add3_doubleword_cc_overflow_1): Use rjO. (*and3_doubleword): Likewise. (*anddi_1): Use jM. (*andsi_1_zext): Likewise. (*and_1[SWI24]): Likewise. (*3_doubleword[any_or]): Use rjO (*code_1[any_or SWI248]): Use jM. (*si_1_zext[zero_extend + any_or]): Likewise. * config/i386/predicates.md (apx_ndd_memory_operand): New. (apx_ndd_add_memory_operand): Likewise. 2024-02-08 Georg-Johann Lay PR target/113824 * config/avr/avr-mcus.def (ata5797): Move from avr5 to avr4. * doc/avr-mmcu.texi: Rebuild. 2024-02-08 Tamar Christina PR tree-optimization/113808 * tree-vect-loop.cc (vectorizable_live_operation): Don't cache the value cross iterations. 2024-02-08 Georg-Johann Lay * config/avr/gen-avr-mmcu-specs.cc (print_mcu) <*cpp_mcu>: Spec always defines __AVR_PM_BASE_ADDRESS__ if the core has it. 2024-02-08 Richard Biener * tree-vect-data-refs.cc (vect_analyze_early_break_dependences): Revert last change to dr_may_alias_p. 2024-02-08 Georg-Johann Lay * config/avr/gen-avr-mmcu-specs.cc: Rename spec cc1_misc to cc1_rodata_in_ram. Rename spec link_misc to link_rodata_in_ram. Remove spec asm_misc. * config/avr/specs.h: Same. 2024-02-08 Pan Li PR target/113766 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Make sure the c.arg_num is >= 2 before checking. (struct build_frm_base): Ditto. (struct narrow_alu_def): Ditto. 2024-02-07 Richard Biener PR tree-optimization/113796 * tree-if-conv.cc (combine_blocks): Wipe range-info before replacing PHIs and inserting predicates. 2024-02-07 Roger Sayle Uros Bizjak PR target/113690 * config/i386/i386-features.cc (timode_convert_cst): New helper function to convert a TImode CONST_SCALAR_INT_P to a V1TImode CONST_VECTOR. (timode_scalar_chain::convert_op): Use timode_convert_cst. (timode_scalar_chain::convert_insn): Delete REG_EQUAL notes. Use timode_convert_cst. 2024-02-07 Victor Do Nascimento * config/aarch64/aarch64-sys-regs.def: Copy from Binutils. * config/aarch64/aarch64.h (AARCH64_FL_AIE): New. (AARCH64_FL_DEBUGv8p9): Likewise. (AARCH64_FL_FGT2): Likewise.Likewise. (AARCH64_FL_ITE): Likewise. (AARCH64_FL_PFAR): Likewise. (AARCH64_FL_PMUv3_ICNTR): Likewise. (AARCH64_FL_PMUv3_SS): Likewise. (AARCH64_FL_PMUv3p9): Likewise. (AARCH64_FL_RASv2): Likewise. (AARCH64_FL_S1PIE): Likewise. (AARCH64_FL_S1POE): Likewise. (AARCH64_FL_S2PIE): Likewise. (AARCH64_FL_S2POE): Likewise. (AARCH64_FL_SCTLR2): Likewise. (AARCH64_FL_SEBEP): Likewise. (AARCH64_FL_SPE_FDS): Likewise. (AARCH64_FL_TCR2): Likewise. 2024-02-07 Richard Biener * tree-vect-data-refs.cc (vect_analyze_early_break_dependences): Only check whether reads are in-bound in places that are not safe. Fix dependence check. Add missing newline. Clarify comments. 2024-02-07 Tamar Christina PR tree-optimization/113750 * tree-vect-data-refs.cc (vect_analyze_early_break_dependences): Check for single predecessor when doing early break vect. * tree-vect-loop.cc (move_early_exit_stmts): Get gsi at the start but after labels. 2024-02-07 Tamar Christina PR tree-optimization/113731 * gimple-iterator.cc (gsi_move_before): Take new parameter for update method. * gimple-iterator.h (gsi_move_before): Default new param to GSI_SAME_STMT. * tree-vect-loop.cc (move_early_exit_stmts): Call gsi_move_before with GSI_NEW_STMT. 2024-02-07 Jakub Jelinek PR tree-optimization/113756 * range-op.cc (update_known_bitmask): For GIMPLE_UNARY_RHS, use TYPE_SIGN (lh.type ()) instead of sign for widest_int::from of lh_bits value and mask. 2024-02-07 Jakub Jelinek PR tree-optimization/113753 * wide-int.cc (wi::mul_internal): Unpack op1val and op2val with UNSIGNED rather than SIGNED. If high or needs_overflow and prec is not a multiple of HOST_BITS_PER_WIDE_INT, shift left bits above prec so that they start with r[half_blocks_needed] lowest bit. Fix up computation of top mask for SIGNED. 2024-02-07 Pan Li PR target/113766 * config/riscv/riscv-protos.h (resolve_overloaded_builtin): Adjust the signature of func. * config/riscv/riscv-c.cc (riscv_resolve_overloaded_builtin): Ditto. * config/riscv/riscv-vector-builtins.cc (resolve_overloaded_builtin): Make overloaded func with empty args error. 2024-02-06 H.J. Lu PR target/113689 * config/i386/i386.cc (x86_64_select_profile_regnum): Return R10_REG after sorry. 2024-02-06 Andrew Carlotti * config/aarch64/aarch64.cc (aarch64_mangle_decl_assembler_name): Move before new caller, and add ".default" suffix. (get_suffixed_assembler_name): New. (make_resolver_func): Use get_suffixed_assembler_name. (aarch64_generate_version_dispatcher_body): Redo name mangling. 2024-02-06 Jakub Jelinek PR target/113763 * config/aarch64/aarch64.cc (aarch64_output_sme_zero_za): Change tiles element from std::pair to an unnamed struct. Adjust uses of tile range variable. 2024-02-06 Juzhe-Zhong * config/riscv/riscv-vsetvl.cc (pre_vsetvl::emit_vsetvl): Fix inifinite compilation. (pre_vsetvl::remove_vsetvl_pre_insns): Ditto. 2024-02-06 Jakub Jelinek PR sanitizer/110676 * gimple-fold.cc (gimple_fold_builtin_strlen): For -fsanitize=address reset maxlen to sizetype maximum. 2024-02-06 Jakub Jelinek PR tree-optimization/113736 * gimple-lower-bitint.cc (bitint_large_huge::limb_access): Use var's address space for MEM_REF or VIEW_CONVERT_EXPRs. 2024-02-06 Jakub Jelinek PR tree-optimization/113759 * tree-ssa-math-opts.cc (convert_mult_to_widen): If actual_precision or from_unsignedN differs from properties of typeN, update typeN to build_nonstandard_integer_type. If TREE_TYPE (rhsN) is not uselessly convertible to typeN, convert it using fold_convert or build_and_insert_cast depending on if rhsN is INTEGER_CST or not. (convert_plusminus_to_widen): Likewise. 2024-02-06 Tejas Belagod PR target/112577 * config/aarch64/aarch64.cc (aarch64_class_max_nregs): Handle 64-bit vector structure modes correctly. 2024-02-05 Christoph Müllner * config/riscv/thead.cc (th_print_operand_address): Fix compiler warning. 2024-02-05 H.J. Lu PR target/113689 * config/i386/i386.cc (x86_64_select_profile_regnum): New. (x86_function_profiler): Call x86_64_select_profile_regnum to get a scratch register for large model profiling. 2024-02-05 Richard Ball * config/arm/arm.cc (arm_output_mi_thunk): Emit insn for bti_c when bti is enabled. 2024-02-05 Xi Ruoyao * config/mips/mips-msa.md (neg2): Add missing mode for neg. 2024-02-05 Xi Ruoyao * config/mips/mips-msa.md (elmsgnbit): New define_mode_attr. (neg2): Change the mode iterator from MSA to IMSA because in FP arithmetic we cannot use (0 - x) for -x. (neg2): New define_insn to implement FP vector negation, using a bnegi instruction to negate the sign bit. 2024-02-05 Richard Biener PR tree-optimization/113707 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): After checking the avail set treat out-of-region defines as available. 2024-02-05 Richard Biener * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Use the default mode when building a pointer. 2024-02-05 Jakub Jelinek PR tree-optimization/113737 * gimple-lower-bitint.cc (gimple_lower_bitint): If GIMPLE_SWITCH has just a single label, remove it and make single successor edge EDGE_FALLTHRU. 2024-02-05 Jakub Jelinek PR target/113059 * config/i386/i386-features.cc (rest_of_handle_insert_vzeroupper): Remove REG_DEAD/REG_UNUSED notes at the end of the pass before df_analyze call. 2024-02-05 Richard Biener PR target/113255 * config/i386/i386-expand.cc (expand_set_or_cpymem_prologue_epilogue_by_misaligned_moves): Use a new pseudo for the skipped number of bytes. 2024-02-05 Monk Chiang * config/riscv/riscv-cores.def: Add sifive-p450, sifive-p670. * doc/invoke.texi (RISC-V Options): Add sifive-p450, sifive-p670. 2024-02-05 Monk Chiang * config/riscv/riscv.md: Include sifive-p400.md. * config/riscv/sifive-p400.md: New file. * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter. * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type): Add sifive_p400. * config/riscv/riscv.cc (sifive_p400_tune_info): New. * config/riscv/riscv.h (TARGET_SFB_ALU): Update. * doc/invoke.texi (RISC-V Options): Add sifive-p400-series 2024-02-04 Takayuki 'January June' Suwa * config/xtensa/xtensa.md (*eqne_zero_masked_bits): Add missing ":SI" to the match_operator. 2024-02-04 Takayuki 'January June' Suwa * config/xtensa/xtensa.md (SHI): New mode iterator. (2 split patterns related to constsynth): Change to also accept HImode operands. 2024-02-04 Jeff Law * config/riscv/riscv.cc (riscv_rtx_costs): Handle SUBREG and REG similarly. 2024-02-04 Xi Ruoyao * config/loongarch/lsx.md (neg2): Remove the incorrect expand. * config/loongarch/simd.md (simdfmt_as_i): New define_mode_attr. (elmsgnbit): Likewise. (neg2): New define_insn. * config/loongarch/lasx.md (negv4df2, negv8sf2): Remove as they are now instantiated in simd.md. 2024-02-04 Xi Ruoyao * config/loongarch/loongarch.cc (loongarch_symbol_insns): Do not use LSX_SUPPORTED_MODE_P or LASX_SUPPORTED_MODE_P if mode is MAX_MACHINE_MODE. 2024-02-04 Li Wei * config/loongarch/loongarch.cc (loongarch_expand_vselect): Adjust. (loongarch_expand_vselect_vconcat): Ditto. (loongarch_try_expand_lsx_vshuf_const): New, use vshuf to implement all 128-bit constant permutation situations. (loongarch_expand_lsx_shuffle): Adjust and rename function name. (loongarch_is_imm_set_shuffle): Renamed function name. (loongarch_expand_vec_perm_even_odd): Function forward declaration. (loongarch_expand_vec_perm_even_odd_1): Add implement for 128-bit extract-even and extract-odd permutations. (loongarch_is_odd_extraction): Delete. (loongarch_is_even_extraction): Ditto. (loongarch_expand_vec_perm_const): Adjust. 2024-02-03 Jakub Jelinek PR middle-end/113722 * wide-int.cc (wi::bswap_large): Rename third argument from len to xlen and adjust use in safe_uhwi. Add len variable, set it to BLOCKS_NEEDED (precision) and use it for clearing of val and as canonize argument. Clear val using memset instead of a loop. 2024-02-03 Jakub Jelinek * ggc-common.cc (gt_pch_save): Allow addr to be equal to mmi.preferred_base + mmi.size - sizeof (void *). 2024-02-03 Xi Ruoyao * config/loongarch/loongarch-def.h (abi_minimal_isa): Declare. * config/loongarch/loongarch-opts.cc (abi_minimal_isa): Remove the ODR-violating locale declaration. 2024-02-02 Tamar Christina PR tree-optimization/113588 PR tree-optimization/113467 * tree-vect-data-refs.cc (vect_analyze_data_ref_dependence): Choose correct dest and fix checks. (vect_analyze_early_break_dependences): Update comments. 2024-02-02 John David Anglin PR target/59778 * config/pa/pa.cc (enum pa_builtins): Add PA_BUILTIN_GET_FPSR and PA_BUILTIN_SET_FPSR builtins. * (pa_builtins_icode): Declare. * (def_builtin, pa_fpu_init_builtins): New. * (pa_init_builtins): Initialize FPU builtins. * (pa_builtin_decl, pa_expand_builtin_1): New. * (pa_expand_builtin): Handle PA_BUILTIN_GET_FPSR and PA_BUILTIN_SET_FPSR builtins. * (pa_atomic_assign_expand_fenv): New. * config/pa/pa.md (UNSPECV_GET_FPSR, UNSPECV_SET_FPSR): New UNSPECV constants. (get_fpsr, put_fpsr): New expanders. (get_fpsr_32, get_fpsr_64, set_fpsr_32, set_fpsr_64): New insn patterns. 2024-02-02 Juzhe-Zhong PR target/113697 * config/riscv/riscv-v.cc (expand_reduction): Pass VLMAX avl to scalar move. 2024-02-02 Jonathan Wakely * doc/extend.texi (Common Type Attributes): Fix typo in description of hardbool. 2024-02-02 Jakub Jelinek PR tree-optimization/113692 * gimple-lower-bitint.cc (bitint_large_huge::lower_stmt): Handle casts from large/huge BITINT_TYPEs to POINTER_TYPE/REFERENCE_TYPE as final_cast_p. 2024-02-02 Jakub Jelinek PR middle-end/113699 * gimple-lower-bitint.cc (bitint_large_huge::lower_asm): Handle uninitialized large/huge _BitInt SSA_NAME inputs. 2024-02-02 Jakub Jelinek PR middle-end/113705 * tree-ssa-math-opts.cc (is_widening_mult_rhs_p): Use wide_int_from around wi::to_wide in order to compare value in prec precision. 2024-02-02 Lehua Ding Revert: 2024-02-02 Juzhe-Zhong * config/riscv/riscv.cc (riscv_legitimize_move): Fix poly_int dest generation. 2024-02-02 Juzhe-Zhong * config/riscv/riscv.cc (riscv_legitimize_move): Fix poly_int dest generation. 2024-02-02 Pan Li * config/riscv/riscv.cc (riscv_get_arg_info): Cleanup comments. (riscv_pass_by_reference): Ditto. (riscv_fntype_abi): Ditto. 2024-02-02 Juzhe-Zhong * config/riscv/riscv-vsetvl.cc (vsetvl_pre_insn_p): New function. (pre_vsetvl::cleaup): Remove vsetvl_pre. (pre_vsetvl::remove_vsetvl_pre_insns): New function. 2024-02-02 Jiahao Xu * config/loongarch/larchintrin.h (__frecipe_s): Update function return type. (__frecipe_d): Ditto. (__frsqrte_s): Ditto. (__frsqrte_d): Ditto. 2024-02-02 Li Wei * config/loongarch/loongarch.cc (loongarch_multiply_add_p): New. (loongarch_vector_costs::add_stmt_cost): Adjust. 2024-02-02 Xi Ruoyao * config/loongarch/loongarch.md (unspec): Add UNSPEC_LA_PCREL_64_PART1 and UNSPEC_LA_PCREL_64_PART2. (la_pcrel64_two_parts): New define_insn. * config/loongarch/loongarch.cc (loongarch_tls_symbol): Fix a typo in the comment. (loongarch_call_tls_get_addr): If -mcmodel=extreme -mexplicit-relocs={always,auto}, use la_pcrel64_two_parts for addressing the TLS symbol and __tls_get_addr. Emit an REG_EQUAL note to allow CSE addressing __tls_get_addr. (loongarch_legitimize_tls_address): If -mcmodel=extreme -mexplicit-relocs={always,auto}, address TLS IE symbols with la_pcrel64_two_parts. (loongarch_split_symbol): If -mcmodel=extreme -mexplicit-relocs={always,auto}, address symbols with la_pcrel64_two_parts. (loongarch_output_mi_thunk): Clean up unreachable code. If -mcmodel=extreme -mexplicit-relocs={always,auto}, address the MI thunks with la_pcrel64_two_parts. 2024-02-02 Lulu Cheng * config/loongarch/loongarch.cc (loongarch_call_tls_get_addr): Add support for call36. 2024-02-02 Lulu Cheng * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p): When the code model of the symbol is extreme and -mexplicit-relocs=auto, the macro instruction loading symbol address is not applicable. (loongarch_call_tls_get_addr): Adjust code. (loongarch_legitimize_tls_address): Likewise. 2024-02-02 Lulu Cheng * config/loongarch/loongarch-protos.h (loongarch_symbol_extreme_p): Add function declaration. * config/loongarch/loongarch.cc (loongarch_symbolic_constant_p): For SYMBOL_PCREL64, non-zero addend of "la.local $rd,$rt,sym+addend" is not allowed (loongarch_load_tls): Added macro support in extreme mode. (loongarch_call_tls_get_addr): Likewise. (loongarch_legitimize_tls_address): Likewise. (loongarch_force_address): Likewise. (loongarch_legitimize_move): Likewise. (loongarch_output_mi_thunk): Likewise. (loongarch_option_override_internal): Remove the code that detects explicit relocs status. (loongarch_handle_model_attribute): Likewise. * config/loongarch/loongarch.md (movdi_symbolic_off64): New template. * config/loongarch/predicates.md (symbolic_off64_operand): New predicate. (symbolic_off64_or_reg_operand): Likewise. 2024-02-02 Lulu Cheng * config/loongarch/loongarch.cc (loongarch_load_tls): Load all types of tls symbols through one function. (loongarch_got_load_tls_gd): Delete. (loongarch_got_load_tls_ld): Delete. (loongarch_got_load_tls_ie): Delete. (loongarch_got_load_tls_le): Delete. (loongarch_call_tls_get_addr): Modify the called function name. (loongarch_legitimize_tls_address): Likewise. * config/loongarch/loongarch.md (@got_load_tls_gd): Delete. (@load_tls): New template. (@got_load_tls_ld): Delete. (@got_load_tls_le): Delete. (@got_load_tls_ie): Delete. 2024-02-02 Lulu Cheng * config/loongarch/loongarch.cc (mem_shadd_or_shadd_rtx_p): New function. (loongarch_legitimize_address): Add logical transformation code. 2024-02-01 Marek Polacek * doc/invoke.texi: Update -Wdangling-reference documentation. 2024-02-01 Uros Bizjak PR target/113701 * config/i386/i386.md (*cmp_doubleword): Do not force SUBREG pieces to pseudos. 2024-02-01 John David Anglin * config/pa/pa.md (atomic_storedi_1): Fix bug in alternative 1. 2024-02-01 Georg-Johann Lay * config/avr/avr.cc: Tabify. 2024-02-01 Richard Ball PR tree-optimization/111268 * tree-vect-slp.cc (vectorizable_slp_permutation_1): Add variable-length check for vector input arguments to a function. 2024-02-01 Thomas Schwinge * config/gcn/gcn.cc (gcn_hsa_declare_function_name): Don't hard-code number of SGPR/VGPR/AVGPR registers. * config/gcn/gcn.h: Add a 'STATIC_ASSERT's for number of SGPR/VGPR/AVGPR registers. 2024-02-01 Monk Chiang * config/riscv/riscv.md: Add "fcvt_i2f", "fcvt_f2i" type attribute, and include sifive-p600.md. * config/riscv/generic-ooo.md: Update type attribute. * config/riscv/generic.md: Update type attribute. * config/riscv/sifive-7.md: Update type attribute. * config/riscv/sifive-p600.md: New file. * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter. * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type): Add sifive_p600. * config/riscv/riscv.cc (sifive_p600_tune_info): New. * config/riscv/riscv.h (TARGET_SFB_ALU): Update. * doc/invoke.texi (RISC-V Options): Add sifive-p600-series 2024-02-01 Monk Chiang * common/config/riscv/riscv-common.cc: Add Za64rs, Za128rs, Ziccif, Ziccrse, Ziccamoa, Zicclsm, Zic64b items. * config/riscv/riscv.opt: New macro for 7 new unprivileged extensions. * doc/invoke.texi (RISC-V Options): Add Za64rs, Za128rs, Ziccif, Ziccrse, Ziccamoa, Zicclsm, Zic64b extensions. 2024-02-01 Rainer Orth * config/sol2.h (LIBASAN_EARLY_SPEC): Add -z now unless -static-libasan. Add missing whitespace. 2024-02-01 Thomas Schwinge * config/gcn/gcn.md (FIRST_SGPR_REG, LAST_SGPR_REG) (FIRST_VGPR_REG, LAST_VGPR_REG, FIRST_AVGPR_REG, LAST_AVGPR_REG): Don't 'define_constants'. 2024-02-01 Thomas Schwinge * config/gcn/gcn.h (SGPR_OR_VGPR_REGNO_P): Remove. 2024-02-01 Thomas Schwinge * config/gcn/gcn.md (sync_compare_and_swap_lds_insn) [TARGET_RDNA3]: Adjust. 2024-02-01 Richard Biener PR tree-optimization/113693 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Honor avail data when available. 2024-02-01 Jakub Jelinek Jason Merrill PR c++/113531 * gimple-low.cc (lower_stmt): Remove .ASAN_MARK calls on variables which were promoted to TREE_STATIC. 2024-02-01 Roger Sayle Richard Biener PR target/113560 * tree-ssa-math-opts.cc (is_widening_mult_rhs_p): Use range information via tree_non_zero_bits to check if this operand is suitably extended for a widening (or highpart) multiplication. (convert_mult_to_widen): Insert explicit casts if the RHS or LHS isn't already of the claimed type. 2024-02-01 Edwin Lu Revert: 2024-02-01 Edwin Lu * config/riscv/generic-ooo.md (generic_ooo_sfb_alu): Add reservation (generic_ooo_branch): ditto * config/riscv/generic.md (generic_sfb_alu): ditto (generic_fmul_half): ditto * config/riscv/riscv.md: Remove cbo, pushpop, and rdfrm types * config/riscv/sifive-7.md (sifive_7_hfma):Add reservation (sifive_7_popcount): ditto * config/riscv/vector.md: change rdfrm to fmove * config/riscv/zc.md: change pushpop to load/store 2024-02-01 Edwin Lu Revert: 2024-02-01 Edwin Lu Robin Dapp * config/riscv/generic-ooo.md (generic_ooo): Move reservation (generic_ooo_vec_load): ditto (generic_ooo_vec_store): ditto (generic_ooo_vec_loadstore_seg): ditto (generic_ooo_vec_alu): ditto (generic_ooo_vec_fcmp): ditto (generic_ooo_vec_imul): ditto (generic_ooo_vec_fadd): ditto (generic_ooo_vec_fmul): ditto (generic_ooo_crypto): ditto (generic_ooo_perm): ditto (generic_ooo_vec_reduction): ditto (generic_ooo_vec_ordered_reduction): ditto (generic_ooo_vec_idiv): ditto (generic_ooo_vec_float_divsqrt): ditto (generic_ooo_vec_mask): ditto (generic_ooo_vec_vesetvl): ditto (generic_ooo_vec_setrm): ditto (generic_ooo_vec_readlen): ditto * config/riscv/riscv.md: include generic-vector-ooo * config/riscv/generic-vector-ooo.md: New file. to here 2024-02-01 Edwin Lu Revert: 2024-02-01 Edwin Lu * config/riscv/riscv.cc (riscv_sched_variable_issue): enable assert 2024-02-01 Edwin Lu * config/riscv/riscv.cc (riscv_sched_variable_issue): enable assert 2024-02-01 Edwin Lu Robin Dapp * config/riscv/generic-ooo.md (generic_ooo): Move reservation (generic_ooo_vec_load): ditto (generic_ooo_vec_store): ditto (generic_ooo_vec_loadstore_seg): ditto (generic_ooo_vec_alu): ditto (generic_ooo_vec_fcmp): ditto (generic_ooo_vec_imul): ditto (generic_ooo_vec_fadd): ditto (generic_ooo_vec_fmul): ditto (generic_ooo_crypto): ditto (generic_ooo_perm): ditto (generic_ooo_vec_reduction): ditto (generic_ooo_vec_ordered_reduction): ditto (generic_ooo_vec_idiv): ditto (generic_ooo_vec_float_divsqrt): ditto (generic_ooo_vec_mask): ditto (generic_ooo_vec_vesetvl): ditto (generic_ooo_vec_setrm): ditto (generic_ooo_vec_readlen): ditto * config/riscv/riscv.md: include generic-vector-ooo * config/riscv/generic-vector-ooo.md: New file. to here 2024-02-01 Edwin Lu * config/riscv/generic-ooo.md (generic_ooo_sfb_alu): Add reservation (generic_ooo_branch): ditto * config/riscv/generic.md (generic_sfb_alu): ditto (generic_fmul_half): ditto * config/riscv/riscv.md: Remove cbo, pushpop, and rdfrm types * config/riscv/sifive-7.md (sifive_7_hfma):Add reservation (sifive_7_popcount): ditto * config/riscv/vector.md: change rdfrm to fmove * config/riscv/zc.md: change pushpop to load/store 2024-02-01 Andrew Pinski PR target/113657 * config/aarch64/aarch64-simd.md (split for movv8di): For strict aligned mode, use DImode instead of TImode. 2024-01-31 Robin Dapp PR middle-end/113607 * match.pd: Make sure else values match when folding a vec_cond into a conditional operation. 2024-01-31 Marek Polacek * doc/invoke.texi: Mention that -fconcepts-ts was deprecated in GCC 14. 2024-01-31 Tamar Christina Matthew Malcomson PR sanitizer/112644 * asan.h (asan_intercepted_p): Incercept memset, memmove, memcpy and memcmp. * builtins.cc (expand_builtin): Include HWASAN when checking for builtin inlining. 2024-01-31 Richard Biener PR middle-end/110176 * match.pd (zext (bool) <= (int) 4294967295u): Make sure to match INTEGER_CST only without outstanding conversion. 2024-01-31 Alex Coplan PR target/111677 * config/aarch64/aarch64.cc (aarch64_reg_save_mode): Use V16QImode for the full 16-byte FPR saves in the vector PCS case. 2024-01-31 Richard Biener PR tree-optimization/111444 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Do not use vn_reference_lookup_2 when optimistically skipping may-defs. 2024-01-31 Richard Biener PR tree-optimization/113630 * tree-ssa-pre.cc (compute_avail): Avoid registering a reference with a representation with not matching base access size. 2024-01-31 Jakub Jelinek PR rtl-optimization/113656 * simplify-rtx.cc (simplify_context::simplify_unary_operation_1) : Fix up last argument to simplify_gen_unary. 2024-01-31 Jakub Jelinek PR debug/113637 * dwarf2out.cc (loc_list_from_tree_1): Assume integral types with BLKmode are larger than DWARF2_ADDR_SIZE. 2024-01-31 Jakub Jelinek PR tree-optimization/113639 * gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr): For VIEW_CONVERT_EXPR set rhs1 to its operand. 2024-01-31 Richard Biener PR tree-optimization/113670 * tree-vect-data-refs.cc (vect_check_gather_scatter): Make sure we can take the address of the reference base. 2024-01-31 Georg-Johann Lay * config/avr/avr-mcus.def: Add AVR64DU28, AVR64DU32, ATA5787, ATA5835, ATtiny64AUTO, ATA5700M322. * doc/avr-mmcu.texi: Rebuild. 2024-01-31 Alexandre Oliva PR debug/113394 * ipa-strub.cc (build_ref_type_for): Drop nonaliased. Adjust caller. 2024-01-31 Alexandre Oliva PR middle-end/112917 PR middle-end/113100 * builtins.cc (expand_builtin_stack_address): Use STACK_ADDRESS_OFFSET. * doc/extend.texi (__builtin_stack_address): Adjust. * config/sparc/sparc.h (STACK_ADDRESS_OFFSET): Define. * doc/tm.texi.in (STACK_ADDRESS_OFFSET): Document. * doc/tm.texi: Rebuilt. 2024-01-31 Juzhe-Zhong PR target/113495 * config/riscv/riscv-vsetvl.cc (extract_single_source): Remove. (pre_vsetvl::compute_vsetvl_def_data): Fix compile time issue. (pre_vsetvl::compute_transparent): New function. (pre_vsetvl::compute_lcm_local_properties): Fix compile time time issue. 2024-01-30 Fangrui Song PR target/105576 * config/i386/constraints.md: Define constraint "Ws". * doc/md.texi: Document it. 2024-01-30 Marek Polacek PR c++/110358 PR c++/109640 * doc/invoke.texi: Update -Wdangling-reference description. 2024-01-30 Takayuki 'January June' Suwa * config/xtensa/constraints.md (R, T, U): Change define_constraint to define_memory_constraint. * config/xtensa/predicates.md (move_operand): Don't check that a constant pool operand size is a multiple of UNITS_PER_WORD. * config/xtensa/xtensa.cc (xtensa_lra_p, TARGET_LRA_P): Remove. (xtensa_emit_move_sequence): Remove "if (reload_in_progress)" clause as it can no longer be true. (fixup_subreg_mem): Drop function. (xtensa_output_integer_literal_parts): Consider 16-bit wide constants. (xtensa_legitimate_constant_p): Add short-circuit path for integer load instructions. Don't check that mode size is at least UNITS_PER_WORD. * config/xtensa/xtensa.md (movsf): Use can_create_pseudo_p() rather reload_in_progress and reload_completed. (doloop_end): Drop operand 2. (movhi_internal): Add alternative loading constant from a literal pool. (define_split for DI register_operand): Don't limit to !TARGET_AUTO_LITPOOLS. * config/xtensa/xtensa.opt (mlra): Change to no effect. 2024-01-30 Pan Li * config/riscv/riscv.cc (riscv_v_vls_mode_aggregate_gpr_count): New function to calculate the gpr count required by vls mode. (riscv_v_vls_to_gpr_mode): New function convert vls mode to gpr mode. (riscv_pass_vls_aggregate_in_gpr): New function to return the rtx of gpr for vls mode. (riscv_get_arg_info): Add vls mode handling. (riscv_pass_by_reference): Return false if arg info has no zero gpr count. 2024-01-30 Richard Biener PR tree-optimization/113659 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Handle main exit without virtual use. 2024-01-30 Christoph Müllner * config/riscv/riscv.md: Move UNSPEC_XTHEADFMV* to unspec enum. 2024-01-30 Iain Sandoe PR libgcc/113403 * config/darwin.h (DARWIN_SHARED_WEAK_ADDS, DARWIN_WEAK_CRTS): New. (REAL_LIBGCC_SPEC): Move weak CRT handling to separate spec. * config/i386/darwin.h (DARWIN_HEAP_T_LIB): New. * config/i386/darwin32-biarch.h (DARWIN_HEAP_T_LIB): New. * config/i386/darwin64-biarch.h (DARWIN_HEAP_T_LIB): New. * config/rs6000/darwin.h (DARWIN_HEAP_T_LIB): New. 2024-01-30 Richard Sandiford PR target/113623 * config/aarch64/aarch64-early-ra.cc (early_ra::preprocess_insns): Mark all registers that occur in addresses as needing a GPR. 2024-01-30 Richard Sandiford PR target/113636 * config/aarch64/aarch64-early-ra.cc (early_ra::replace_regs): Take the containing insn as an extra parameter. Reset debug instructions if they reference a register that is no longer used by real insns. (early_ra::apply_allocation): Update calls accordingly. 2024-01-30 Jakub Jelinek PR tree-optimization/113603 * tree-ssa-strlen.cc (strlen_pass::handle_store): After count_nonzero_bytes call refetch si using get_strinfo in case it has been unshared in the meantime. 2024-01-30 Jakub Jelinek PR middle-end/101195 * except.cc (expand_builtin_eh_return_data_regno): If which doesn't fit into unsigned HOST_WIDE_INT, return constm1_rtx. 2024-01-30 Jin Ma * config/riscv/thead.cc (th_print_operand_address): Change %ld to %lld. 2024-01-29 Manos Anagnostakis Manolis Tsamis Philipp Tomsich * config/aarch64/aarch64-ldpstp.md: Remove unused mode. * config/aarch64/aarch64-protos.h (aarch64_operands_ok_for_ldpstp): Likewise. * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Call on framework moved later. 2024-01-29 Jose E. Marchesi * config/bpf/bpf.cc (bpf_expand_epilogue): Do not emit a return instruction in naked function epilogues. 2024-01-29 YunQiang Su PR target/113655 * configure.ac: Fix typo gcc_cv_as_mips_explicit should be gcc_cv_as_mips_explicit_relocs. * configure: Regnerated. 2024-01-29 Matthieu Longo PR target/108933 * config/arm/arm.md (arm_rev16si2): Convert to define_insn. Correct generated RTL. (arm_rev16si2_alt1): Correctly handle conditional execution. (arm_rev16si2_alt2): Likewise. 2024-01-29 Richard Biener PR middle-end/113622 * expr.cc (expand_assignment): Spill hard registers if we index them with a variable offset. 2024-01-29 Richard Biener PR middle-end/113622 * gimple-isel.cc (gimple_expand_vec_set_extract_expr): Also allow DECL_HARD_REGISTER variables. 2024-01-29 Alex Coplan PR target/113616 * config/aarch64/aarch64-ldp-fusion.cc (fixup_debug_uses_trailing_add): Use iterate_safely when iterating over debug uses. (fixup_debug_uses): Likewise. (ldp_bb_info::cleanup_tombstones): Use iterate_safely to iterate over nondebug insns instead of manually maintaining the next insn. * iterator-utils.h (class safe_iterator): New. (iterate_safely): New. 2024-01-29 H.J. Lu PR target/38534 * config/i386/i386-options.cc (ix86_set_func_type): Save callee-saved registers in noreturn functions for -O0/-Og. 2024-01-29 Tobias Burnus PR target/113615 * config/gcn/gcn-valu.md (fold_left_plus_): Only define for !TARGET_RDNA2_PLUS. 2024-01-29 Richard Sandiford PR target/113281 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Remove workaround for right shifts. (vect_truncatable_operation_p): Handle NEGATE_EXPR and BIT_NOT_EXPR. (vect_determine_precisions_from_range): Be more selective about which codes can be narrowed based on their input and output ranges. For shifts, require at least one more bit of precision than the maximum shift amount. 2024-01-29 Tobias Burnus * config/nvptx/nvptx.opt (march-map=): Add sm_89 and sm_90a. 2024-01-29 Tobias Burnus * doc/install.texi (amdgcn): Recommend LLVM 15+ and newlib 4.4+, but keep requiring only newlib 4.3+ and, if gfx1100 is disabled, LLVM 13.0.1+. 2024-01-29 Tobias Burnus PR other/111966 * config/gcn/mkoffload.cc (SET_XNACK_UNSET, TEST_SRAM_ECC_UNSET): New. (SET_SRAM_ECC_UNSUPPORTED): Renamed to ... (SET_SRAM_ECC_UNSET): ... this. (copy_early_debug_info): Remove gfx900 special case, now handled as part of the generic handling. (main): Update SRAM_ECC and XNACK for the -march as done in gcn-hsa.h. 2024-01-29 Jakub Jelinek PR tree-optimization/110603 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Remove incorrect setting of pdata->maxlen to vr.upper_bound (which is unconditionally overwritten anyway). Avoid creating invalid range with minlen larger than maxlen. Formatting fix. 2024-01-29 Richard Biener PR debug/103047 * tree-inline.cc (initialize_inlined_parameters): Reverse the decl chain of inlined parameters. 2024-01-28 Iain Sandoe * config/darwin.cc (darwin_build_constant_cfstring): Prevent over- alignment of CFString constants by setting DECL_USER_ALIGN. 2024-01-28 Iain Sandoe Jakub Jelinek PR libgcc/113402 * builtins.cc (expand_builtin): Handle BUILT_IN_GCC_NESTED_PTR_CREATED and BUILT_IN_GCC_NESTED_PTR_DELETED. * builtins.def (BUILT_IN_GCC_NESTED_PTR_CREATED, BUILT_IN_GCC_NESTED_PTR_DELETED): Make these builtins LIB-EXT and rename the library fallbacks to __gcc_nested_func_ptr_created and __gcc_nested_func_ptr_deleted. * doc/invoke.texi: Rename these to __gcc_nested_func_ptr_created and __gcc_nested_func_ptr_deleted. * tree-nested.cc (finalize_nesting_tree_1): Use builtin_explicit for BUILT_IN_GCC_NESTED_PTR_CREATED and BUILT_IN_GCC_NESTED_PTR_DELETED. * tree.cc (build_common_builtin_nodes): Build the BUILT_IN_GCC_NESTED_PTR_CREATED and BUILT_IN_GCC_NESTED_PTR_DELETED local builtins only for non-explicit. 2024-01-28 YunQiang Su * doc/invoke.texi: Remove duplicate MIPS explicit-relocs option. 2024-01-27 H.J. Lu PR target/38534 * config/i386/i386-options.cc (ix86_set_func_type): Don't save and restore callee saved registers for a noreturn function with nothrow or compiled with -fno-exceptions. 2024-01-27 H.J. Lu PR target/103503 PR target/113312 * config/i386/i386-expand.cc (ix86_expand_call): Replace no_caller_saved_registers check with call_saved_registers check. Clobber all registers that are not used by the callee with no_callee_saved_registers attribute. * config/i386/i386-options.cc (ix86_set_func_type): Set call_saved_registers to TYPE_NO_CALLEE_SAVED_REGISTERS for noreturn function. Disallow no_callee_saved_registers with interrupt or no_caller_saved_registers attributes together. (ix86_set_current_function): Replace no_caller_saved_registers check with call_saved_registers check. (ix86_handle_no_caller_saved_registers_attribute): Renamed to ... (ix86_handle_call_saved_registers_attribute): This. (ix86_gnu_attributes): Add ix86_handle_call_saved_registers_attribute. * config/i386/i386.cc (ix86_conditional_register_usage): Replace no_caller_saved_registers check with call_saved_registers check. (ix86_function_ok_for_sibcall): Don't allow callee with no_callee_saved_registers attribute when the calling function has callee-saved registers. (ix86_comp_type_attributes): Also check no_callee_saved_registers. (ix86_epilogue_uses): Replace no_caller_saved_registers check with call_saved_registers check. (ix86_hard_regno_scratch_ok): Likewise. (ix86_save_reg): Replace no_caller_saved_registers check with call_saved_registers check. Don't save any registers for TYPE_NO_CALLEE_SAVED_REGISTERS. Save all registers with TYPE_DEFAULT_CALL_SAVED_REGISTERS if function with no_callee_saved_registers attribute is called. (find_drap_reg): Replace no_caller_saved_registers check with call_saved_registers check. * config/i386/i386.h (call_saved_registers_type): New enum. (machine_function): Replace no_caller_saved_registers with call_saved_registers. * doc/extend.texi: Document no_callee_saved_registers attribute. 2024-01-27 Jakub Jelinek PR tree-optimization/113614 * gimple-lower-bitint.cc (gimple_lower_bitint): Don't merge widening casts from signed to unsigned types with TRUNC_DIV_EXPR, TRUNC_MOD_EXPR or FLOAT_EXPR uses. 2024-01-27 Jakub Jelinek PR tree-optimization/113568 * gimple-lower-bitint.cc (bitint_large_huge::lower_mergeable_stmt): For VIEW_CONVERT_EXPR use first operand of rhs1 instead of rhs1 in the widening extension checks. 2024-01-27 Jakub Jelinek * gimple-lower-bitint.cc (gimple_lower_bitint): For TDF_DETAILS dump mapping of SSA_NAMEs to decls. 2024-01-26 Hans-Peter Nilsson * cgraphunit.cc (process_function_and_variable_attributes): Tweak the warning for an attribute-always_inline without inline declaration. 2024-01-26 Robin Dapp PR other/113575 * genopinit.cc (main): Split init_all_optabs into functions of 1000 patterns each. 2024-01-26 Tobias Burnus * config.gcc (amdgcn-*-*): Add gfx1030 and gfx1100 to TM_MULTILIB_CONFIG. * doc/install.texi (Configuration amdgcn-*-*): Mention gfx1030/gfx1100. * doc/invoke.texi (AMD GCN Options): Add gfx1030 and gfx1100 to -march/-mtune. 2024-01-26 Andrew Stubbs * config/gcn/gcn-opts.h (TARGET_PACKED_WORK_ITEMS): Add TARGET_RDNA3. * config/gcn/gcn-valu.md (all_convert): New iterator. (2): New define_expand, and rename the old one to ... (*_sdwa): ... this. (extend2): Likewise, to ... (extend_sdwa): .. this. (*_shift): New. * config/gcn/gcn.cc (gcn_global_address_p): Use "offsetbits" correctly. (gcn_hsa_declare_function_name): Update the vgpr counting for gfx1100. * config/gcn/gcn.md (mulhisi3): Disable on RDNA3. (mulqihi3_scalar): Likewise. 2024-01-26 Richard Biener PR tree-optimization/113602 * tree-data-ref.cc (dr_analyze_innermost): Fail when the base object isn't addressable. 2024-01-26 Tobias Burnus * config/gcn/gcn-hsa.h (ABI_VERSION_SPEC): New; creates the "--amdhsa-code-object-version=" argument. (ASM_SPEC): Use it; replace previous version of it. 2024-01-26 Juzhe-Zhong * config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info): Refine some codes. (pre_vsetvl::emit_vsetvl): Ditto. 2024-01-26 Jiahao Xu * config/loongarch/lasx.md (vec_extract_0): New define_insn_and_split patten. 2024-01-26 Jiahao Xu * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Define. 2024-01-26 Li Wei * config/loongarch/loongarch.cc (loongarch_emit_swdivsf): Adjust. 2024-01-26 Juzhe-Zhong PR target/113469 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_lcm_local_properties): Fix bug. 2024-01-26 Andrew Pinski PR target/100212 * config/aarch64/aarch64.cc (aarch64_classify_index): Avoid undefined shift after the call to exact_log2. 2024-01-25 Andrew Pinski PR target/100204 * config/aarch64/constraints.md (J): Cast to `unsigned HOST_WIDE_INT` before taking the negative of it. 2024-01-25 Vladimir N. Makarov PR target/113526 * lra-constraints.cc (curr_insn_transform): Change class even for spilled pseudo successfully matched with with NO_REGS. 2024-01-25 Georg-Johann Lay PR target/113601 * config/avr/avr-mcus.def (atmega3208, atmega3209): Fix data_section_start. 2024-01-25 Szabolcs Nagy PR target/112987 * config/aarch64/aarch64.cc (aarch64_gen_compare_zero_and_branch): New. (aarch64_expand_epilogue): Use the new function. (aarch64_split_compare_and_swap): Likewise. (aarch64_split_atomic_op): Likewise. 2024-01-25 Robin Dapp PR middle-end/112971 * fold-const.cc (simplify_const_binop): New function for binop simplification of two constant vectors when element-wise handling is not necessary. (const_binop): Call new function. 2024-01-25 Mary Bennett * common/config/riscv/riscv-common.cc: Add XCVbitmanip. * config/riscv/constraints.md: Likewise. * config/riscv/corev.def: Likewise. * config/riscv/corev.md: Likewise. * config/riscv/predicates.md: Likewise. * config/riscv/riscv-builtins.cc (AVAIL): Likewise. * config/riscv/riscv-ftypes.def: Likewise. * config/riscv/riscv.opt: Likewise. * config/riscv/riscv.cc (riscv_print_operand): Add new operand 'Y'. * doc/extend.texi: Add XCVbitmanip builtin documentation. * doc/sourcebuild.texi: Likewise. 2024-01-25 Tobias Burnus * config/gcn/gcn-hsa.h (ASM_SPEC): Add space after -mxnack= argument. 2024-01-25 Yanzhang Wang PR target/113538 * config/riscv/riscv.cc (riscv_get_arg_info): Remove the flag. (riscv_fntype_abi): Ditto. * config/riscv/riscv.opt: Ditto. 2024-01-25 Jakub Jelinek PR middle-end/113574 * convert.cc (convert_to_integer_1) : Compare shift count against TYPE_PRECISION rather than TYPE_SIZE. 2024-01-25 Richard Sandiford PR target/113572 * config/aarch64/aarch64-sve-builtins.cc (vector_cst_all_same): Check VECTOR_CST_ELT instead of VECTOR_CST_ENCODED_ELT 2024-01-25 Richard Sandiford PR target/113550 * config/aarch64/aarch64-simd.md: In the movv8di splitter, check whether each split instruction is a load that clobbers the source address. Emit that instruction last if so. 2024-01-25 Richard Sandiford PR target/113485 * config/aarch64/aarch64-simd.md (aarch64_zip1_low): New pattern. (2): Use it instead of generating a paradoxical subreg for the input. 2024-01-25 Juzhe-Zhong * config/riscv/riscv-vsetvl.cc (get_all_predecessors): New function. (pre_vsetvl::pre_global_vsetvl_info): Add LCM delete block all predecessors dump information. 2024-01-25 Juzhe-Zhong * config/riscv/riscv-vsetvl.cc (pre_vsetvl::compute_vsetvl_def_data): Remove redundant full available computation. (pre_vsetvl::pre_global_vsetvl_info): Ditto. 2024-01-25 Jakub Jelinek * doc/generic.texi (VECTOR_CST): Fix typo - petterns -> patterns. * doc/rtl.texi (CONST_VECTOR): Likewise. 2024-01-25 Juzhe-Zhong * config/riscv/riscv-opts.h (enum vsetvl_strategy_enum): Add optim-no-fusion option. * config/riscv/riscv-vsetvl.cc (pass_vsetvl::lazy_vsetvl): Ditto. (pass_vsetvl::execute): Ditto. * config/riscv/riscv.opt: Ditto. 2024-01-25 Jiahao Xu * config/loongarch/lasx.md (@vec_concatz): Remove this define_insn pattern. * config/loongarch/loongarch.cc (loongarch_expand_vector_group_init): Use vec_concat. 2024-01-25 Richard Biener PR tree-optimization/113576 * tree-vect-loop.cc (vec_init_loop_exit_info): Only allow exits with may_be_zero niters when its the last one. 2024-01-25 Lulu Cheng * config/loongarch/loongarch.cc (loongarch_symbolic_constant_p): For symbols of type tls, non-zero Offset is not generated. 2024-01-25 Haochen Gui * config/rs6000/rs6000-string.cc (expand_block_compare): Enable P9 with m32 and mpowerpc64. 2024-01-25 liuhongt * config/i386/i386-options.cc (ix86_option_override_internal): Enable -mlam=u57 by default when compiled with -fsanitize=hwaddress. 2024-01-25 Palmer Dabbelt * common/config/riscv/riscv-common.cc (riscv_implied_info): Remove {"ztso", "a"}. 2024-01-24 Martin Jambor PR ipa/108007 PR ipa/112616 * cgraph.h (cgraph_edge): Add a parameter to redirect_call_stmt_to_callee. * ipa-param-manipulation.h (ipa_param_adjustments): Add a parameter to modify_call. (ipa_release_ssas_in_hash): Declare. * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New parameter killed_ssas, pass it to padjs->modify_call. * ipa-param-manipulation.cc (purge_all_uses): New function. (ipa_param_adjustments::modify_call): New parameter killed_ssas. Instead of substituting uses, invoke purge_all_uses. If hash of killed SSAs has not been provided, create a temporary one and release SSAs that have been added to it. (compare_ssa_versions): New function. (ipa_release_ssas_in_hash): Likewise. * tree-inline.cc (redirect_all_calls): Create id->killed_new_ssa_names earlier, pass it to edge redirection, adjust a comment. (copy_body): Release SSAs in id->killed_new_ssa_names. 2024-01-24 Andrew Pinski PR target/113486 * config/aarch64/aarch64.cc (aarch64_get_reg_raw_mode): For TARGET_GENERAL_REGS_ONLY, return VOIDmode for non-GP_REGNUM_P regno. 2024-01-24 Monk Chiang PR target/113095 * config/riscv/sfb.md: New splitters to rewrite single bit sign extension as the condition to SFB instructions. 2024-01-24 Jan Hubicka PR middle-end/88345 * common.opt: (flimit-function-alignment): Reorder alphabeticaly (fmin-function-alignment): New parameter. * doc/invoke.texi: (-fmin-function-alignment): Document. (-falign-functions,-falign-loops,-falign-labels): Mention that aglinments are ignored in cold code. * varasm.cc (assemble_start_function): Handle min-function-alignment. 2024-01-24 Tamar Christina PR target/109636 * config/aarch64/aarch64-simd.md (div3, mulv2di3): Remove. * config/aarch64/iterators.md (VQDIV): Remove. (SVE_FULL_SDI_SIMD, SVE_FULL_HSDI_SIMD_DI, SVE_I_SIMD_DI): New. (VPRED, sve_lane_con): Add V4SI and V2DI. * config/aarch64/aarch64-sve.md (3, @aarch64_pred_): Support Advanced SIMD types. (mul3): New, split from 3. (@aarch64_pred_, *post_ra_3): New. * config/aarch64/aarch64-sve2.md (@aarch64_mul_lane_, *aarch64_mul_unpredicated_): Change SVE_FULL_HSDI to SVE_FULL_HSDI_SIMD_DI. 2024-01-24 Tamar Christina PR tree-optimization/113552 * config/aarch64/aarch64.cc (aarch64_simd_clone_compute_vecsize_and_simdlen): Block simdlen 1. 2024-01-24 Martin Jambor PR ipa/113490 * ipa-cp.cc (ipcp_lattice::add_value): Bail out if value count is equal or greater than the limit. Use the limit from the callee. 2024-01-24 YunQiang Su * configure.ac: Detect the explicit relocs support for mips, and define C macro MIPS_EXPLICIT_RELOCS. * config.in: Regenerated. * configure: Regenerated. * doc/invoke.texi(MIPS Options): Add -mexplicit-relocs. * config/mips/mips-opts.h: Define enum mips_explicit_relocs. * config/mips/mips.cc(mips_set_compression_mode): Sorry if !TARGET_EXPLICIT_RELOCS instead of just set it. * config/mips/mips.h: Define TARGET_EXPLICIT_RELOCS and TARGET_EXPLICIT_RELOCS_PCREL with mips_opt_explicit_relocs. * config/mips/mips.opt: Introduce -mexplicit-relocs= option and define -m(no-)explicit-relocs as aliases. 2024-01-24 Alex Coplan * config/aarch64/aarch64.opt (-mearly-ldp-fusion): Set default to 1. (-mlate-ldp-fusion): Likewise. 2024-01-24 Tamar Christina * tree-vect-loop.cc (vect_get_vect_def, vect_create_epilog_for_reduction): Rename main_exit_p to last_val_reduc_p. 2024-01-24 Tamar Christina PR tree-optimization/113364 * tree-vect-loop.cc (vect_create_epilog_for_reduction): If all exits all early exits then we must reduce from the first offset for all of them. 2024-01-24 Juzhe-Zhong PR target/113495 * config/riscv/riscv-vsetvl.cc (get_expr_id): Remove. (get_regno): Ditto. (get_bb_index): Ditto. (pre_vsetvl::compute_avl_def_data): Ditto. (pre_vsetvl::earliest_fuse_vsetvl_info): Fix large memory usage. (pre_vsetvl::pre_global_vsetvl_info): Ditto. 2024-01-23 Andrew Pinski Richard Sandiford PR target/100942 * ccmp.cc (ccmp_candidate_p): Add outer argument. Allow if the outer is true and the lhs is used more than once. (expand_ccmp_expr): Update call to ccmp_candidate_p. * expr.h (expand_expr_real_gassign): Declare. * expr.cc (expand_expr_real_gassign): New function, split out from... (expand_expr_real_1): ...here. * cfgexpand.cc (expand_gimple_stmt_1): Use expand_expr_real_gassign. 2024-01-23 Alex Coplan PR target/113089 * config/aarch64/aarch64-ldp-fusion.cc (reset_debug_use): New. (fixup_debug_use): New. (fixup_debug_uses_trailing_add): New. (fixup_debug_uses): New. Use it ... (ldp_bb_info::fuse_pair): ... here. (try_promote_writeback): Call fixup_debug_uses_trailing_add to fix up debug uses of the base register that are affected by folding in the trailing add insn. 2024-01-23 Alex Coplan PR target/113089 * config/aarch64/aarch64-ldp-fusion.cc (ldp_bb_info::fuse_pair): Update trailing nondebug uses of the base register in the case of cancelling writeback. 2024-01-23 Alex Coplan PR target/113089 * rtl-ssa/accesses.h (use_info::next_debug_insn_use): New. (debug_insn_use_iterator): New. (set_info::first_debug_insn_use): New. (set_info::debug_insn_uses): New. * rtl-ssa/member-fns.inl (use_info::next_debug_insn_use): New. (set_info::first_debug_insn_use): New. (set_info::debug_insn_uses): New. 2024-01-23 Alex Coplan PR target/113356 * config/aarch64/aarch64-ldp-fusion.cc (ldp_bb_info::try_fuse_pair): Don't record hazards against the opposite insn in the pair. 2024-01-23 Alex Coplan PR target/113070 * config/aarch64/aarch64-ldp-fusion.cc (struct stp_change_builder): New. (decide_stp_strategy): Reanme to ... (try_repurpose_store): ... this. (ldp_bb_info::fuse_pair): Refactor to use stp_change_builder to construct stp changes. Fix up uses when inserting new stp insns. 2024-01-23 Alex Coplan PR target/113070 * rtl-ssa.h: Include hash-set.h. * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Add new_sets parameter and use it to keep track of new user-created sets. (function_info::apply_changes_to_insn): Also call add_def on new sets. (function_info::change_insns): Add hash_set to keep track of new user-created defs. Plumb it through. * rtl-ssa/functions.h: Add hash_set parameter to finalize_new_accesses and apply_changes_to_insn. 2024-01-23 Alex Coplan PR target/113070 * rtl-ssa/accesses.cc (function_info::create_use): New. * rtl-ssa/changes.cc (function_info::finalize_new_accesses): Ensure new uses end up referring to permanent defs. * rtl-ssa/functions.h (function_info::create_use): Declare. 2024-01-23 Alex Coplan PR target/113070 * rtl-ssa/changes.cc (function_info::change_insns): Split out the call to finalize_new_accesses from the backwards placement loop, run it forwards in a separate loop. 2024-01-23 Richard Biener PR tree-optimization/113552 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Use floor_log2 instead of exact_log2 on the number of calls. 2024-01-23 Jeff Law Jakub Jelinek * config/ia64/ia64.cc (ia64_start_function): Add ATTRIBUTE_UNUSED to decl. 2024-01-23 Richard Biener * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Separate single and multi-exit case when creating PHIs between the main and epilogue. 2024-01-23 Richard Sandiford PR target/112989 * config/aarch64/aarch64-sve-builtins-shapes.cc (build_one): Skip MODE_single variants of functions that don't take tuple arguments. 2024-01-23 Alex Coplan PR target/113114 * config/aarch64/aarch64-ldp-fusion.cc (try_promote_writeback): Don't assert recog success, just punt if the writeback pair isn't recognized. 2024-01-23 Jakub Jelinek * config/gcn/gcn.cc (gcn_hsa_declare_function_name): Add ATTRIBUTE_UNUSED to decl. 2024-01-23 Richard Biener PR debug/107058 * dwarf2out.cc (dwarf2out_die_ref_for_decl): Gracefully handle unexpected but bogus DIE contexts when not checking enabled. 2024-01-23 Jakub Jelinek PR tree-optimization/113462 * fold-const.cc (native_interpret_int): Don't punt if total_bytes is larger than HOST_BITS_PER_DOUBLE_INT / BITS_PER_UNIT. (fold_view_convert_expr): Use XALLOCAVEC buffers for types with sizes between 129 and 8192 bytes. 2024-01-23 Xi Ruoyao * config/loongarch/loongarch.cc (loongarch_explicit_relocs_p): If la_opt_explicit_relocs is EXPLICIT_RELOCS_AUTO, return false for SYMBOL_TLS_LDM and SYMBOL_TLS_GD. (loongarch_call_tls_get_addr): Do not split symbols of SYMBOL_TLS_LDM or SYMBOL_TLS_GD if la_opt_explicit_relocs is EXPLICIT_RELOCS_AUTO. 2024-01-23 Richard Biener * alias.cc (known_base_value_p): Remove. (find_base_value): Remove PLUS/MINUS handling when both operands are not CONST_INT_P. 2024-01-23 Richard Biener PR rtl-optimization/113255 * alias.cc (find_base_term): Remove PLUS/MINUS handling when both operands are not CONST_INT_P. 2024-01-23 Richard Biener PR debug/112718 * dwarf2out.cc (dwarf2out_finish): Reset all type units for the fat part of an LTO compile. 2024-01-23 chenxiaolong * doc/sourcebuild.texi: Add attributes for keywords. 2024-01-23 Sandra Loosemore PR c++/90463 * doc/invoke.texi (Warning Options): Correct lists of options enabled by -Wall and -Wextra by checking against common.opt and c-family/c.opt. 2024-01-22 Andrew Pinski PR target/113030 * config/arm/parsecpu.awk (check_cpu): Use cpu_opt_alias instead of cpu_optaliases. (check_arch): Use arch_opt_alias instead of arch_optaliases. 2024-01-22 Juzhe-Zhong * config/riscv/riscv-protos.h (splat_to_scalar_move_p): New function. * config/riscv/riscv-v.cc (splat_to_scalar_move_p): Ditto. * config/riscv/vector.md: Simplify vmv.v.x. into vmv.s.x. 2024-01-22 Juzhe-Zhong PR target/109092 * config/riscv/riscv.md: Use reg instead of subreg. 2024-01-22 Tobias Burnus PR other/111966 * config/gcn/mkoffload.cc (elf_arch): Change default to gfx900 to match the compiler default. (simple_object_copy_lto_debug_sections): Never unlink the outfile on error as the caller does so. (maybe_unlink, compile_native): Use %<...%> and %qs in fatal_error. (main): Likewise. Fix 'mkoffload.dbg.o' cleanup. 2024-01-22 Richard Biener PR tree-optimization/113373 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Create LC PHIs in the exit blocks where necessary. * tree-vect-loop.cc (vectorizable_live_operation): Do not try to handle missing LC PHIs. (find_connected_edge): Remove. (vect_create_epilog_for_reduction): Cleanup use of auto_vec. 2024-01-22 Juzhe-Zhong * config/riscv/vector.md: Fix vfirst/vmsbf/vmsof ratio attributes. 2024-01-22 xuli PR target/113420 * config/riscv/riscv-vector-builtins.cc (has_vxrm_or_frm_p):remove. (registered_function::overloaded_hash):refactor. (resolve_overloaded_builtin):avoid internal ICE. 2024-01-21 Mikael Pettersson PR target/82420 PR target/111279 * calls.cc (emit_library_call_value_1): Pass valid TYPE to emit_push_insn. * expr.cc (emit_push_insn): Likewise. 2024-01-21 Jeff Law * config/riscv/riscv.cc (riscv_init_cumulative_args): Install correcction version of last change. 2024-01-21 Jeff Law * config/riscv/riscv.cc (riscv_init_cumulative_args): Update and fix bugs in signature. 2024-01-21 Roger Sayle Richard Biener PR rtl-optimization/111267 * fwprop.cc (fwprop_propagation::profitabe_p): Rename profitable_p method to likely_profitable_p. (try_fwprop_subst_node): Update call to likely_profitable_p. Only bail-out early when !prop.likely_profitable_p for instructions that are not single sets. When comparing costs, bail-out if the cost is unchanged and !prop.likely_profitable_p. 2024-01-21 Sandra Loosemore PR c++/90464 * doc/invoke.texi (Warning Options): Document that -Wunused-parameter isn't enabled by -Wunused unless -Wextra is provided, and that -Wunused does enable -Wunused-const-variable=1 for C. Clarify that -Wunused doesn't enable -Wunused-* options documented as behaving otherwise, and list them explicitly. 2024-01-21 Sandra Loosemore PR c/109708 * doc/invoke.texi (Warning Options): Fix broken example and clean up/reorganize the others. Also describe what the short-form options mean. 2024-01-20 Sandra Loosemore PR c/102998 * doc/invoke.texi (Option Summary): Add -Warray-parameter. (Warning Options): Correct/edit discussion of -Warray-parameter to make the first example less confusing, and fill in missing info. 2024-01-20 Jakub Jelinek PR tree-optimization/113462 * gimple-lower-bitint.cc (bitint_large_huge::handle_cast): Handle rhs1 INTEGER_CST like SSA_NAME. 2024-01-20 Jakub Jelinek PR tree-optimization/113491 * tree-switch-conversion.cc (switch_conversion::build_constructors): If elt.index has precision higher than sizetype, fold_convert it to sizetype. (switch_conversion::array_value_type): Return type if type is BITINT_TYPE with precision above MAX_FIXED_MODE_SIZE or with BLKmode. (switch_conversion::build_arrays): Use unsigned_type_for rather than lang_hooks.types.type_for_mode if utype is BITINT_TYPE with precision above MAX_FIXED_MODE_SIZE or with BLKmode. If utype has precision higher than sizetype, use sizetype as tidx type and fold_convert the subtraction to sizetype. 2024-01-20 Juzhe-Zhong * config/riscv/riscv.cc (riscv_init_cumulative_args): Suppress warning. (riscv_vector_mode_supported_any_target_p): Ditto. 2024-01-19 Mikael Pettersson PR target/110934 * config/m68k/m68k.cc (m68k_zero_call_used_regs): New function. (TARGET_ZERO_CALL_USED_REGS): Define. 2024-01-19 Mikael Pettersson PR target/108640 * config/m68k/m68k.cc (output_andsi3): Use QImode for address adjusted for 1-byte RMW access. (output_iorsi3): Likewise. (output_xorsi3): Likewise. 2024-01-19 Kito Cheng * doc/invoke.texi (RISC-V Options): Add list of supported extensions. 2024-01-19 Juzhe-Zhong PR target/113495 * config/riscv/riscv-protos.h (RVV_VLMAX): Change to regno_reg_rtx[X0_REGNUM]. (RVV_VUNDEF): Ditto. * config/riscv/riscv-vsetvl.cc: Add timevar. 2024-01-19 Richard Biener PR debug/113488 * lto-streamer-in.cc (lto_read_tree_1): When there isn't an early DIE but there should be, do not pretend there is. 2024-01-19 Richard Biener PR tree-optimization/113494 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Handle endless loop on exit. Handle re-allocated PHI. 2024-01-19 Jakub Jelinek PR tree-optimization/113464 * gimple-lower-bitint.cc (gimple_lower_bitint): Don't try to optimize loads into GIMPLE_ASM stmts. 2024-01-19 Jakub Jelinek PR tree-optimization/113463 * gimple-ssa-warn-restrict.cc (builtin_memref::extend_offset_range): Only look through NOP_EXPRs if rhs1 doesn't have wider type than lhs. 2024-01-19 Jakub Jelinek PR tree-optimization/113459 * tree-ssa-sccvn.cc (vn_walk_cb_data::push_partial_def): Use TREE_INT_CST_LOW of TYPE_SIZE_UNIT rather than GET_MODE_SIZE of SCALAR_INT_TYPE_MODE if type has BLKmode. (vn_reference_lookup_3): Likewise. Formatting fix. 2024-01-19 Jakub Jelinek Richard Biener * cfgexpand.cc (discover_nonconstant_array_refs_r): Force non-BLKmode VAR_DECLs referenced in BLKmode VIEW_CONVERT_EXPRs into memory. * expr.cc (expand_expr_real_1) : Do nothing but adjust_address also for BLKmode mode and MEM op0. 2024-01-19 Palmer Dabbelt * common/config/riscv/riscv-common.cc: Add Zihpm and Zicnttr extensions. 2024-01-19 Kito Cheng * doc/invoke.texi (RISC-V Options): Document the syntax of -march. 2024-01-19 Kito Cheng * common/config/riscv/riscv-common.cc (riscv_subset_list::parse_std_ext): Remove. (riscv_subset_list::parse_multiletter_ext): Remove. * config/riscv/riscv-subset.h (riscv_subset_list::parse_std_ext): Remove. (riscv_subset_list::parse_multiletter_ext): Remove. 2024-01-19 Kito Cheng * common/config/riscv/riscv-common.cc (riscv_subset_list::parse_single_std_ext): New parameter. (riscv_subset_list::parse_single_multiletter_ext): Ditto. (riscv_subset_list::parse_single_ext): Ditto. (riscv_subset_list::parse): Relax the order for the input of ISA string. * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext): New parameter. (riscv_subset_list::parse_single_multiletter_ext): Ditto. (riscv_subset_list::parse_single_ext): Ditto. 2024-01-19 Kito Cheng * common/config/riscv/riscv-common.cc (riscv_subset_list::parse_base_ext): New. (riscv_subset_list::parse): Extract part of logic into riscv_subset_list::parse_base_ext. * config/riscv/riscv-subset.h (riscv_subset_list::parse_base_ext): New. 2024-01-19 Kito Cheng * config/riscv/riscv.cc (riscv_override_options_internal): Tweak sorry message. 2024-01-19 Kuan-Lin Chen * config/riscv/vector-crypto.md (UNSPEC_CLMUL): Rename to UNSPEC_CLMUL_VC. 2024-01-19 Sandra Loosemore PR c/110029 * doc/extend.texi (Common Variable Attributes): Explain what happens when multiple variables with cleanups are in the same scope. 2024-01-18 Sandra Loosemore PR ipa/108470 * doc/extend.texi (Common Function Attributes): Document that noinline also disables some interprocedural optimizations and improve flow to the part about using inline asm instead to disable calls from being optimized away completely. Remove the sentence that says noipa is mainly for internal compiler testing. 2024-01-18 John David Anglin PR tree-optimization/69807 * config/pa/pa.cc (pa_option_override): Set flag_pie on TARGET_64BIT. 2024-01-18 Brian Inglis PR target/108521 * doc/invoke.texi (Option Summary): Remove -mcygwin and -mno-cygwin from x86 Windows Options. 2024-01-18 Sandra Loosemore PR c/107942 * doc/extend.texi (C Extensions): Add new section to menu. (Function Attributes): Move dangling index entries to.... (Const and Volatile Functions): New section. 2024-01-18 David Malcolm PR middle-end/112684 * toplev.cc (toplev::main): Don't ICE in -fdiagnostics-generate-patch when exiting after options, since no edit context will have been created. 2024-01-18 Richard Biener * tree-vect-stmts.cc (vectorizable_store): Do not pre-allocate operands vector. 2024-01-18 Iain Sandoe * Makefile.in: Emit ENABLE_DARWIN_AT_RPATH into site.exp when ENABLE_DARWIN_AT_RPATH_TRUE is not '#'. 2024-01-18 Jun Sha (Joshua) Jin Ma Xianmiao Qu Christoph Müllner * config/riscv/thead.cc (th_asm_output_opcode): Rewrite some instructions. 2024-01-18 Jun Sha (Joshua) Jin Ma Xianmiao Qu Christoph Müllner * config/riscv/riscv.md (none,thv,rvv): New attribute. (no,yes): Add an attribute to disable alternative for xtheadvector or RVV1.0. * config/riscv/vector.md: Disable alternatives that destination register overlaps source register group for xtheadvector. 2024-01-18 Jun Sha (Joshua) Jin Ma Xianmiao Qu Christoph Müllner * config/riscv/riscv-vector-builtins-bases.cc (class th_loadstore_width): Define new builtin bases. (class th_extract): Define new builtin bases. (BASE): Define new builtin bases. * config/riscv/riscv-vector-builtins-bases.h: Define new builtin class. * config/riscv/riscv-vector-builtins-shapes.cc (struct th_loadstore_width_def): Define new builtin shapes. (struct th_indexed_loadstore_width_def): Define new builtin shapes. (struct th_extract_def): Define new builtin shapes. (SHAPE): Define new builtin shapes. * config/riscv/riscv-vector-builtins-shapes.h: Define new builtin shapes. * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FUNCTION): Redefine DEF_RVV_FUNCTION for XTheadVector special intrinsics. * config/riscv/riscv-vector-builtins.h (enum required_ext): Add new XTheadVector member. (struct function_group_info): Likewise. * config/riscv/t-riscv: Add thead-vector-builtins-functions.def * config/riscv/thead-vector.md (@pred_mov_width): Add new patterns. (*pred_mov_width): Likewise. (@pred_store_width): Likewise. (@pred_strided_load_width): Likewise. (@pred_strided_store_width): Likewise. (@pred_indexed_load_width): Likewise. (@pred_th_extract): Likewise. (*pred_th_extract): Likewise. * config/riscv/thead-vector-builtins-functions.def: New file. 2024-01-18 Jun Sha (Joshua) Jin Ma Xianmiao Qu Christoph Müllner * config.gcc: Add files for XTheadVector intrinsics. * config/riscv/autovec.md: Guard XTheadVector. * config/riscv/predicates.md: Disable immediate vl for XTheadVector. * config/riscv/riscv-c.cc (riscv_pragma_intrinsic): Add pragma for XTheadVector. * config/riscv/riscv-string.cc (riscv_expand_block_move): Guard XTheadVector. * config/riscv/riscv-v.cc (vls_mode_valid_p): Avoid autovec. * config/riscv/riscv-vector-builtins-bases.cc: Do not normalize vsetvl instructions for XTheadVector. * config/riscv/riscv-vector-builtins-shapes.cc (check_type): New check type function. (build_one): Adjust for XTheadVector. * config/riscv/riscv-vector-switch.def (ENTRY): Disable fractional mode for the XTheadVector extension. (TUPLE_ENTRY): Likewise. * config/riscv/riscv.cc (riscv_v_adjust_bytesize): Guard XTheadVector. (riscv_preferred_simd_mode): Likewsie. (riscv_autovectorize_vector_modes): Likewise. (riscv_vector_mode_supported_any_target_p): Likewise. (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise. * config/riscv/thead.cc (th_asm_output_opcode): Rewrite vsetvl instructions. * config/riscv/vector.md: Include thead-vector.md and change fractional LMUL into 1 for vbool. * config/riscv/riscv_th_vector.h: New file. * config/riscv/thead-vector.md: New file. 2024-01-18 Jun Sha (Joshua) Jin Ma Xianmiao Qu Christoph Müllner * config/riscv/riscv-protos.h (riscv_asm_output_opcode): Add new function to add assembler insn code prefix/suffix. (th_asm_output_opcode): Add Thead function to add assembler insn code prefix/suffix. * config/riscv/riscv.cc (riscv_asm_output_opcode): Implement function to add assembler insn code prefix/suffix. * config/riscv/riscv.h (ASM_OUTPUT_OPCODE): Add new function to add assembler insn code prefix/suffix. * config/riscv/thead.cc (th_asm_output_opcode): Implement Thead function to add assembler insn code prefix/suffix. 2024-01-18 Jun Sha (Joshua) Jin Ma Xianmiao Qu Christoph Müllner * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): Add new vendor extension. * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Add test marco. * config/riscv/riscv.opt: Add new mask. 2024-01-18 Iain Sandoe * config/darwin.h (DARWIN_RPATH_SPEC): Arrange for the %P spec to be conditional on macosx-version-min. 2024-01-18 Iain Sandoe * config/darwin.cc (darwin_objc1_section): Use the correct meta-data version for constant strings. (machopic_select_section): Assert if we fail to handle CFString sections as Obejctive-C meta-data or drectly. 2024-01-18 Iain Sandoe * lto-section-names.h (OFFLOAD_SECTION_NAME_PREFIX, OFFLOAD_VAR_TABLE_SECTION_NAME, OFFLOAD_FUNC_TABLE_SECTION_NAME, OFFLOAD_IND_FUNC_TABLE_SECTION_NAME): Provide Mach-O syntax versions when the object format is Mach-O. 2024-01-18 Iain Sandoe PR target/105522 * config/darwin.cc (machopic_select_section): Handle C and C++ CFStrings. (darwin_rename_builtins): Move this out of the CFString code. (darwin_libc_has_function): Likewise. (darwin_build_constant_cfstring): Create an anonymous var to hold each CFString. * config/darwin.h (ASM_OUTPUT_LABELREF): Handle constant CFstrings. 2024-01-18 Maxim Kuvyrkov PR bootstrap/113445 * haifa-sched.cc (dep_list_size): Make global. * sched-deps.cc (find_inc): Use instead of sd_lists_size(). * sched-int.h (dep_list_size): Declare. 2024-01-18 Martin Jambor PR tree-optimization/110422 * tree-sra.cc (scan_function): Disqualify bases of operands of asm gotos. 2024-01-18 Richard Biener PR tree-optimization/113475 * gimple-range-phi.h (phi_analyzer::m_phi_groups): New. * gimple-range-phi.cc (phi_analyzer::phi_analyzer): Initialize. (phi_analyzer::~phi_analyzer): Deallocate and free collected phi_grous. (phi_analyzer::process_phi): Record allocated phi_groups. 2024-01-18 Richard Biener * tree-vect-stmts.cc (vectorizable_store): Do not allocate storage for gvec_oprnds elements. 2024-01-18 Richard Biener * tree-vect-loop.cc (vec_init_loop_exit_info): Adjust comment, prefer all later exits we can handle. (vect_analyze_loop_form): Free the allocated loop body. Adjust comments. 2024-01-18 Georg-Johann Lay * config/avr/avr-log.cc: Tabify. 2024-01-18 Juzhe-Zhong * config/riscv/autovec.md: Support vi variant. 2024-01-18 Georg-Johann Lay * config/avr/avr-devices.cc: Tabify. 2024-01-18 Georg-Johann Lay * config/avr/avr-c.cc: Tabify. 2024-01-18 Georg-Johann Lay * config/avr/driver-avr.cc: Tabify. 2024-01-18 Georg-Johann Lay * config/avr/gen-avr-mmcu-texi.cc: Tabify. 2024-01-18 Georg-Johann Lay * config/avr/gen-avr-mmcu-specs.cc: Tabify. 2024-01-18 Jakub Jelinek * config/riscv/riscv.opt (mshorten-memrefs, mrelax, mcsr-check, minline-strcmp, minline-strncmp, minline-strlen, -param=riscv-vector-abi): Remove Bool keywords. 2024-01-18 Jakub Jelinek PR target/113122 * config/i386/i386.cc (x86_function_profiler): Add -masm=intel support. Add missing space after , in emitted assembly in some cases. Formatting fixes. 2024-01-18 Xi Ruoyao * config/loongarch/loongarch.md (movsi_internal): Remove constraint z. 2024-01-18 Georg-Johann Lay * config/avr/gen-avr-mmcu-specs.cc (diagnose_rodata_in_ram): Fix typo in the diagnostic, and capitalize the device name. (print_mcu): Generate specs such that: <*check_rodata_in_ram>: New. <*cc1_misc>: Use check_rodata_in_ram instead of cc1_rodata_in_ram. <*link_misc>: Use check_rodata_in_ram instead of link_rodata_in_ram. <*cc1_rodata_in_ram, *link_rodata_in_ram>: Remove. 2024-01-18 Jakub Jelinek PR other/113399 * common.opt (ffold-mem-offsets): Remove Target and Bool keywords, add Common and Optimization. 2024-01-18 Richard Biener PR tree-optimization/113431 * tree-vect-data-refs.cc (vect_preserves_scalar_order_p): When there is an invariant load we might not preserve scalar order. 2024-01-18 Richard Biener PR tree-optimization/113374 * tree-ssa-operands.h (SET_PHI_ARG_DEF_ON_EDGE): New. * tree-vect-loop.cc (move_early_exit_stmts): Update virtual LC PHIs. * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Refactor. Preserve virtual LC PHIs on all exits. 2024-01-18 Lulu Cheng * config/loongarch/loongarch.cc (loongarch_split_symbol): Assign the '/u' attribute to the mem. 2024-01-18 Sandra Loosemore PR middle-end/110847 * doc/invoke.texi (Option Summary): Document negative forms of -Wtsan and -Wxor-used-as-pow. (Warning Options): Likewise. 2024-01-18 Juzhe-Zhong PR target/113429 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::earliest_fuse_vsetvl_info): Fix bug. 2024-01-18 Sandra Loosemore * doc/extend.texi (Common Function Attributes): Re-alphabetize the table. (Common Variable Attributes): Likewise. (Common Type Attributes): Likewise. 2024-01-17 Sandra Loosemore PR middle-end/111659 * doc/extend.texi (Common Variable Attributes): Fix long lines in documentation of strict_flex_array + other minor copy-editing. Add a cross-reference to -Wstrict-flex-arrays. * doc/invoke.texi (Option Summary): Fix whitespace in tables before -fstrict-flex-arrays and -Wstrict-flex-arrays. (C Dialect Options): Combine the docs for the two -fstrict-flex-arrays forms into a single entry. Note this option is for C/C++ only. Add a cross-reference to -Wstrict-flex-arrays. (Warning Options): Note -Wstrict-flex-arrays is for C/C++ only. Minor copy-editing. Add cross references to the strict_flex_array attribute and -fstrict-flex-arrays option. Add note that this option depends on -ftree-vrp. 2024-01-17 Andrew Pinski PR target/113221 * config/aarch64/predicates.md (aarch64_ldp_reg_operand): For subreg, only allow REG operands instead of allowing all. 2024-01-17 Vineet Gupta * config/riscv/riscv-vsetvl.cc (earliest_fuse_vsetvl_info): Remove redundant checks in else condition for readablity. (earliest_fuse_vsetvl_info) Print iteration count in debug prints. (earliest_fuse_vsetvl_info) Fix misleading vsetvl info dump details in certain cases. 2024-01-17 Vineet Gupta * config/riscv/riscv.opt: New -param=vsetvl-strategy. * config/riscv/riscv-opts.h: New enum vsetvl_strategy_enum. * config/riscv/riscv-vsetvl.cc (pre_vsetvl::pre_global_vsetvl_info): Use vsetvl_strategy. (pass_vsetvl::execute): Use vsetvl_strategy. 2024-01-17 Jan Hubicka * ipa-polymorphic-call.cc (ipa_polymorphic_call_context::set_by_invariant): Remove accidental hack reseting offset. 2024-01-17 Jan Hubicka * config/i386/i386-options.cc (ix86_option_override_internal): Fix handling of X86_TUNE_AVOID_512FMA_CHAINS. 2024-01-17 Jan Hubicka Jakub Jelinek PR tree-optimization/110852 * predict.cc (expr_expected_value_1): Fix profile merging of PHI and binary operations (get_predictor_value): Handle PRED_COMBINED_VALUE_PREDICTIONS and PRED_COMBINED_VALUE_PREDICTIONS_PHI * predict.def (PRED_COMBINED_VALUE_PREDICTIONS): New predictor. (PRED_COMBINED_VALUE_PREDICTIONS_PHI): New predictor. 2024-01-17 Jakub Jelinek PR tree-optimization/113421 * gimple-lower-bitint.cc (stmt_needs_operand_addr): Adjust function comment. (bitint_dom_walker::before_dom_children): Add g temporary to simplify formatting. Start at vop rather than cvop even if stmt is a store and needs_operand_addr. 2024-01-17 Jakub Jelinek PR middle-end/113410 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes): If access_nelts is integral with larger precision than sizetype, fold_convert it to sizetype. 2024-01-17 Jakub Jelinek PR tree-optimization/113408 * gimple-lower-bitint.cc (bitint_large_huge::handle_stmt): For VIEW_CONVERT_EXPR, pass TREE_OPERAND (rhs1, 0) rather than rhs1 to handle_cast. 2024-01-17 Jakub Jelinek PR middle-end/113406 * ipa-strub.cc (pass_ipa_strub::execute): Check aggregate_value_p regardless of whether is_gimple_reg_type (restype) or not. 2024-01-17 Jakub Jelinek * tree-into-ssa.cc (pass_build_ssa::gate): Fix comment typo, funcions -> functions, and use were instead of was. * gengtype.cc (dump_typekind): Fix comment typos, funcion -> function and guaranteee -> guarantee. * attribs.h (struct attr_access): Fix comment typo funcion -> function. 2024-01-17 Jakub Jelinek PR middle-end/113409 * omp-general.cc (omp_adjust_for_condition): Handle BITINT_TYPE like INTEGER_TYPE. (omp_extract_for_data): Use build_bitint_type rather than build_nonstandard_integer_type if either iter_type or loop->v type is BITINT_TYPE. * omp-expand.cc (expand_omp_for_generic, expand_omp_taskloop_for_outer, expand_omp_taskloop_for_inner): Handle BITINT_TYPE like INTEGER_TYPE. 2024-01-17 Richard Biener PR tree-optimization/113371 * tree-vect-data-refs.cc (vect_enhance_data_refs_alignment): Do not peel when LOOP_VINFO_EARLY_BREAKS_VECT_PEELED. * tree-vect-loop-manip.cc (vect_do_peeling): Assert we do not perform prologue peeling when LOOP_VINFO_EARLY_BREAKS_VECT_PEELED. 2024-01-17 Maxim Kuvyrkov PR rtl-optimization/96388 PR rtl-optimization/111554 * sched-deps.cc (find_inc): Avoid exponential behavior. 2024-01-17 Sandra Loosemore PR c/111693 * doc/invoke.texi (Option Summary): Move -Wuseless-cast from C++ Language Options to Warning Options. Add entry for -Wuse-after-free. (C++ Dialect Options): Move -Wuse-after-free and -Wuseless-cast from here.... (Warning Options): ...to here. Minor copy-editing to fix typo and grammar. 2024-01-17 YunQiang Su * config/mips/mips.cc (mips_compute_frame_info): If another register is used as global_pointer, mark $GP live false. 2024-01-17 Sandra Loosemore PR target/112973 * doc/extend.texi (BPF Built-in Functions): Wrap long lines and give the section a light copy-editing pass. 2024-01-16 Wilco Dijkstra * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add 'cobalt-100' CPU. * config/aarch64/aarch64-tune.md: Regenerated. * doc/invoke.texi (-mcpu): Add cobalt-100 core. 2024-01-16 Wilco Dijkstra PR target/112573 * config/aarch64/aarch64.cc (aarch64_legitimize_address): Reassociate badly formed CONST expressions. 2024-01-16 Daniel Cederman * config/sparc/sparc.cc (next_active_non_empty_insn): Length 0 treated as empty 2024-01-16 Daniel Cederman * config/sparc/sparc.cc (atomic_insn_for_leon3_p): Treat membar_storeload as atomic * config/sparc/sync.md (membar_storeload): Turn into named insn and add GR712RC errata workaround. (membar_v8): Add GR712RC errata workaround. 2024-01-16 Andreas Larsson * config/sparc/sync.md (*membar_storeload_leon3): Remove (*membar_storeload): Enable for LEON 2024-01-16 Jakub Jelinek PR tree-optimization/113372 PR middle-end/90348 PR middle-end/110115 PR middle-end/111422 * cfgexpand.cc (add_scope_conflicts_2): New function. (add_scope_conflicts_1): Use it. 2024-01-16 Georg-Johann Lay * config/avr/avr-mcus.def (avr16eb14, avr16eb20, avr16eb28, avr16eb32) (avr16ea28, avr16ea32, avr16ea48, avr32ea28, avr32ea32, avr32ea48): Add. * doc/avr-mmcu.texi: Regenerate. 2024-01-16 Feng Xue PR tree-optimization/113091 * tree-vect-slp.cc (vect_slp_has_scalar_use): New function. (vect_bb_slp_mark_live_stmts): New parameter scalar_use_map, check scalar use with new function. (vect_bb_slp_mark_live_stmts): New function as entry to existing overriden functions with same name. (vect_slp_analyze_operations): Call new entry function to mark live statements. 2024-01-16 Juzhe-Zhong PR target/113404 * config/riscv/riscv.cc (riscv_override_options_internal): Report sorry for RVV in big-endian mode. 2024-01-16 Yanzhang Wang * config/riscv/riscv.cc (riscv_arg_has_vector): Delete. (riscv_pass_in_vector_p): Delete. (riscv_init_cumulative_args): Delete the checking. (riscv_get_arg_info): Delete the checking. (riscv_function_value): Delete the checking. * config/riscv/riscv.h: Delete the member for checking. 2024-01-15 Georg-Johann Lay * doc/invoke.texi (AVR Options) [-mskip-bug]: Add documentation. 2024-01-15 Liao Shihua * config.gcc: Include riscv_bitmanip.h. * config/riscv/bitmanip.md: Changed mode form X to GPR in orcb and clmul pattern. * config/riscv/crypto.md: Changed mode form X to GPR in brev8 pattern. * config/riscv/riscv-builtins.cc (AVAIL): Adding new bitmanip builtins. (RISCV_BUILTIN_NO_PREFIX): New helper macro. * config/riscv/riscv-cmo.def (RISCV_BUILTIN): Add '_32'/'_64' postfix to builtins. * config/riscv/riscv-ftypes.def (2): New ftypes. * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): New builtins. (RISCV_BUILTIN_NO_PREFIX): Likewise. * config/riscv/riscv_bitmanip.h: New file. 2024-01-15 Liao Shihua * config.gcc: Include riscv_crypto.h. * config/riscv/riscv_crypto.h: New file. 2024-01-15 Vladimir N. Makarov PR middle-end/113354 * lra-constraints.cc (curr_insn_transform): Spill pseudo only used in the insn if the corresponding operand does not require hard register anymore. 2024-01-15 Georg-Johann Lay PR target/107201 * config/avr/avr.h (EXTRA_SPEC_FUNCTIONS): Add no-devlib, avr_no_devlib. * config/avr/driver-avr.cc (avr_no_devlib): New function. (avr_devicespecs_file): Use it to remove -nodevicelib from the options for cores only. * config/avr/avr-arch.h (avr_get_parch): New prototype. * config/avr/avr-devices.cc (avr_get_parch): New function. 2024-01-15 Juzhe-Zhong PR target/113247 * config/riscv/riscv-protos.h (struct regmove_vector_cost): Add vector to scalar regmove. * config/riscv/riscv-vector-costs.cc (adjust_stmt_cost): Ditto. * config/riscv/riscv.cc (riscv_builtin_vectorization_cost): Adjust vec_construct cost. 2024-01-15 Juzhe-Zhong PR target/113281 * config/riscv/riscv-vector-costs.cc (costs::adjust_vect_cost_per_loop): New function. (costs::finish_cost): Adjust cost for LOOP LEN with NITERS < VF. * config/riscv/riscv-vector-costs.h: New function. 2024-01-15 Richard Biener PR tree-optimization/113385 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): First redirect, then split the exit edge. 2024-01-15 Juzhe-Zhong * config/riscv/riscv-vector-costs.cc (costs::analyze_loop_vinfo): Remove m_num_vector_iterations. * config/riscv/riscv-vector-costs.h: Ditto. 2024-01-15 Andrew Pinski PR target/113156 * config/avr/avr.opt (-mdouble, -mlong-double): Add "Save" flag. (-mbranch-cost): Set "Optimization" flag. 2024-01-15 Jakub Jelinek PR tree-optimization/113370 * gimple-lower-bitint.cc (bitint_large_huge::handle_operand): Only set rem to prec % (2 * limb_prec) if m_upwards_2limb, otherwise set it to just prec % limb_prec. 2024-01-15 Juzhe-Zhong PR target/113393 * config/riscv/vector.md: Fix ternary attributes. 2024-01-14 Georg-Johann Lay PR target/112944 * configure.ac [target=avr]: Check availability of emulations avrxmega2_flmap and avrxmega4_flmap, resulting in new config vars HAVE_LD_AVR_AVRXMEGA2_FLMAP and HAVE_LD_AVR_AVRXMEGA4_FLMAP. * configure: Regenerate. * config.in: Regenerate. * doc/invoke.texi (AVR Options): Document -mflmap, -mrodata-in-ram, __AVR_HAVE_FLMAP__, __AVR_RODATA_IN_RAM__. * config/avr/avr.opt (-mflmap, -mrodata-in-ram): New options. * config/avr/avr-arch.h (enum avr_device_specific_features): Add AVR_ISA_FLMAP. * config/avr/avr-mcus.def (AVR_MCU) [avr64*, avr128*]: Set isa flag AVR_ISA_FLMAP. * config/avr/avr.cc (avr_arch_index, avr_has_rodata_p): New vars. (avr_set_core_architecture): Set avr_arch_index. (have_avrxmega2_flmap, have_avrxmega4_flmap) (have_avrxmega3_rodata_in_flash): Set new static const bool according to configure results. (avr_rodata_in_flash_p): New function using them. (avr_asm_init_sections): Let readonly_data_section->unnamed.callback track avr_need_copy_data_p only if not avr_rodata_in_flash_p(). (avr_asm_named_section): Track avr_has_rodata_p. (avr_file_end): Emit __do_copy_data also when avr_has_rodata_p and not avr_rodata_in_flash_p (). * config/avr/specs.h (CC1_SPEC): Add %(cc1_rodata_in_ram). (LINK_SPEC): Add %(link_rodata_in_ram). (LINK_ARCH_SPEC): Remove. * config/avr/gen-avr-mmcu-specs.cc (have_avrxmega3_rodata_in_flash) (have_avrxmega2_flmap, have_avrxmega4_flmap): Set new static const bool according to configure results. (diagnose_mrodata_in_ram): New function. (print_mcu): Generate specs with the following changes: <*cc1_misc, *asm_misc, *link_misc>: New specs so that we don't need to extend avr/specs.h each time we add a new bell or whistle. <*cc1_rodata_in_ram, *link_rodata_in_ram>: New specs to diagnose -m[no-]rodata-in-ram. <*cpp_rodata_in_ram>: New. Does -D__AVR_RODATA_IN_RAM__=0/1. <*cpp_mcu>: Add -D__AVR_AVR_FLMAP__ if it applies. <*cpp>: Add %(cpp_rodata_in_ram). <*link_arch>: Use emulation avrxmega2_flmap, avrxmega4_flmap as requested. <*self_spec>: Add -mflmap or % * config/mips/mips.md (ior3_mips16_asmacro): Use SImode, not the GPR iterator. Adjust pattern name and mode attribute accordingly. 2024-01-13 Jakub Jelinek PR tree-optimization/113361 * gimple-lower-bitint.cc (bitint_large_huge::handle_operand_addr): Fix up determination of the type for > limb_prec constants. 2024-01-12 Georg-Johann Lay * doc/extend.texi (AVR Named Address Spaces, Limitations and Caveats): Add web-link to the avr-gcc wiki. 2024-01-12 Georg-Johann Lay * doc/extend.texi (AVR Variable Attributes) [address]: Remove documentation for a version without argument, which is not supported. 2024-01-12 Ezra Sitorus * config/arm/arm_neon.h (vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_u64_x4): New. (vld1_s8_x4, vld1_s16_x4, vld1_s32_x4, vld1_s64_x4): New. (vld1_f16_x4, vld1_f32_x4): New. (vld1_p8_x4, vld1_p16_x4, vld1_p64_x4): New. (vld1_bf16_x4): New. (vld1q_types_x4): Updated to use vld1q_x4 from arm_neon_builtins.def * config/arm/arm_neon_builtins.def (vld1_x4): Updated entries. (vld1q_x4): New entries, but comes from the old vld1_x4 * config/arm/neon.md (neon_vld1q_x4): Updated from neon_vld1_x4. 2024-01-12 Ezra Sitorus * config/arm/arm_neon.h (vld1_u8_x3, vld1_u16_x3, vld1_u32_x3, vld1_u64_x3): New. (vld1_s8_x3, vld1_s16_x3, vld1_s32_x3, vld1_s64_x3): New. (vld1_f16_x3, vld1_f32_x3): New. (vld1_p8_x3, vld1_p16_x3, vld1_p64_x3): New. (vld1_bf16_x3): New. (vld1q_types_x3): Updated to use vld1q_x3 from arm_neon_builtins.def * config/arm/arm_neon_builtins.def (vld1_x3): Updated entries. (vld1q_x3): New entries, but comes from the old vld1_x2 * config/arm/neon.md (neon_vld1q_x3): Updated from neon_vld1_x3. 2024-01-12 Ezra Sitorus * config/arm/arm_neon.h (vld1_u8_x2, vld1_u16_x2, vld1_u32_x2, vld1_u64_x2): New. (vld1_s8_x2, vld1_s16_x2, vld1_s32_x2, vld1_s64_x2): New. (vld1_f16_x2, vld1_f32_x2): New. (vld1_p8_x2, vld1_p16_x2, vld1_p64_x2): New. (vld1_bf16_x2): New. (vld1q_types_x2): Updated to use vld1q_x2 from arm_neon_builtins.def * config/arm/arm_neon_builtins.def (vld1_x2): Updated entries. (vld1q_x2): New entries, but comes from the old vld1_x2 * config/arm/neon.md (neon_vld1_x2): Updated from neon_vld1_x2. 2024-01-12 Ezra Sitorus * config/arm/arm_neon.h (vst1q_u8_x4, vst1q_u16_x4, vst1q_u32_x4, vst1q_u64_x4): New. (vst1q_s8_x4, vst1q_s16_x4, vst1q_s32_x4, vst1q_s64_x4): New. (vst1q_f16_x4, vst1q_f32_x4): New. (vst1q_p8_x4, vst1q_p16_x4, vst1q_p64_x4): New. (vst1q_bf16_x4): New. * config/arm/arm_neon_builtins.def (vst1q_x4): New entries. * config/arm/neon.md (neon_vst1q_x4): New. (neon_vst1x4qa, neon_vst1x4qb): New. * config/arm/unspecs.md (UNSPEC_VST1X4A, UNSPEC_VST1X4B): New. 2024-01-12 Ezra Sitorus * config/arm/arm_neon.h (vst1q_u8_x3, vst1q_u16_x3, vst1q_u32_x3, vst1q_u64_x3): New. (vst1q_s8_x3, vst1q_s16_x3, vst1q_s32_x3, vst1q_s64_x3): New. (vst1q_f16_x3, vst1q_f32_x3): New. (vst1q_p8_x3, vst1q_p16_x3, vst1q_p64_x3): New. (vst1q_bf16_x3): New. * config/arm/arm_neon_builtins.def (vst1q_x3): New entries. * config/arm/neon.md (neon_vst1q_x3): New. (neon_vld1x3qa, neon_vst1x3qb): New. * config/arm/unspecs.md (UNSPEC_VST1X3A, UNSPEC_VST1X3B): New. 2024-01-12 Ezra Sitorus * config/arm/arm_neon.h (vst1q_u8_x2, vst1q_u16_x2, vst1q_u32_x2, vst1q_u64_x2): New. (vst1q_s8_x2, vst1q_s16_x2, vst1q_s32_x2, vst1q_s64_x2): New. (vst1q_f16_x2, vst1q_f32_x2): New. (vst1q_p8_x2, vst1q_p16_x2, vst1q_p64_x2): New. (vst1q_bf16_x2): New. * config/arm/arm_neon_builtins.def (vst1<_x2): New entries. * config/arm/neon.md (neon_vst1_x2): Updated from neon_vst1_x2. * config/arm/iterators.md (VMEMX2): New mode iterator. (VMEMX2_q): New mode attribute. 2024-01-12 Ezra Sitorus * config/arm/arm_neon.h (vst1_u8_x4, vst1_u16_x4, vst1_u32_x4, vst1_u64_x4): New. (vst1_s8_x4, vst1_s16_x4, vst1_s32_x4, vst1_s64_x4): New. (vst1_f16_x4, vst1_f32_x4): New. (vst1_p8_x4, vst1_p16_x4, vst1_p64_x4): New. (vst1_bf16_x4): New. * config/arm/arm_neon_builtins.def (vst1_x4): New entries. * config/arm/neon.md (vst1_x4): New. 2024-01-12 Ezra Sitorus * config/arm/arm_neon.h (vst1_u8_x3, vst1_u16_x3, vst1_u32_x3, vst1_u64_x3): New. (vst1_s8_x3, vst1_s16_x3, vst1_s32_x3, vst1_s64_x3): New. (vst1_f16_x3, vst1_f32_x3): New. (vst1_p8_x3, vst1_p16_x3, vst1_p64_x3): New. (vst1_bf16_x3): New. * config/arm/arm_neon_builtins.def (vst1_x3): New entries. * config/arm/neon.md (vst1_x3): New. 2024-01-12 Ezra Sitorus * config/arm/arm_neon.h (vst1_u8_x2, vst1_u16_x2, vst1_u32_x2, vst1_u64_x2): New. (vst1_s8_x2, vst1_s16_x2, vst1_s32_x2, vst1_s64_x2): New. (vst1_f16_x2, vst1_f32_x2): New. (vst1_p8_x2, vst1_p16_x2, vst1_p64_x2): New. (vst1_bf16_x2): New. * config/arm/arm_neon_builtins.def (vst1_x2): New entries. * config/arm/neon.md (vst1_x2): New. 2024-01-12 Ezra Sitorus * config/arm/arm_neon.h (vld1q_u8_x4, vld1q_u16_x4, vld1q_u32_x4, vld1q_u64_x4): New. (vld1q_s8_x4, vld1q_s16_x4, vld1q_s32_x4, vld1q_s64_x4): New. (vld1q_f16_x4, vld1q_f32_x4): New. (vld1q_p8_x4, vld1q_p16_x4, vld1q_p64_x4): New. (vld1q_bf16_x4): New. * config/arm/arm_neon_builtins.def (vld1_x4): New entries. * config/arm/neon.md (neon_vld1_x4): New. (neon_vld1x4qa, neon_vld1x4qb): New * config/arm/unspecs.md (UNSPEC_VLD1X4A, UNSPEC_VLD1X4B): New. 2024-01-12 Ezra Sitorus * config/arm/arm_neon.h (vld1q_u8_x3, vld1q_u16_x3, vld1q_u32_x3, vld1q_u64_x3): New. (vld1q_s8_x3, vld1q_s16_x3, vld1q_s32_x3, vld1q_s64_x3): New. (vld1q_f16_x3, vld1q_f32_x3): New. (vld1q_p8_x3, vld1q_p16_x3, vld1q_p64_x3): New. (vld1q_bf16_x3): New. * config/arm/arm_neon_builtins.def (vld1_x3): New entries. * config/arm/neon.md (neon_vld1_x3): New. (neon_vld1x3qa, neon_vld1x3qb): New. * config/arm/unspecs.md (UNSPEC_VLD1X3A, UNSPEC_VLD1X3B): New. 2024-01-12 Ezra Sitorus * config/arm/arm_neon.h (vld1q_u8_x2, vld1q_u16_x2, vld1q_u32_x2, vld1q_u64_x2): New. (vld1q_s8_x2, vld1q_s16_x2, vld1q_s32_x2, vld1q_s64_x2): New. (vld1q_f16_x2, vld1q_f32_x2): New. (vld1q_p8_x2, vld1q_p16_x2, vld1q_p64_x2): New. (vld1q_bf16_x2): New. * config/arm/arm_neon_builtins.def (vld1_x2): New entries. * config/arm/neon.md (vld1_x2): New. 2024-01-12 Tamar Christina PR tree-optimization/113287 * doc/sourcebuild.texi (check_effective_target_bitint65535): New. 2024-01-12 Tamar Christina * tree-vect-loop-manip.cc (vect_loop_versioning): Replace single_exit. * tree-vect-loop.cc (vect_transform_loop): Likewise. 2024-01-12 Tamar Christina PR tree-optimization/113178 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Fill in all alternate exits. 2024-01-12 Tamar Christina PR tree-optimization/113237 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Use existing LCSSA variable for exit when all exits are early break. 2024-01-12 Tamar Christina PR tree-optimization/113137 PR tree-optimization/113136 PR tree-optimization/113172 PR tree-optimization/113178 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Maintain PHIs on inverted loops. (vect_do_peeling): Maintain virtual PHIs on inverted loops. * tree-vect-loop.cc (vec_init_loop_exit_info): Pick exit closes to latch. (vect_create_loop_vinfo): Record all conds instead of only alt ones. 2024-01-12 Tamar Christina PR tree-optimization/113135 * tree-vect-data-refs.cc (vect_analyze_early_break_dependences): Rework dependency analysis. 2024-01-12 Iain Sandoe * config/rs6000/host-darwin.cc (segv_handler): Use the revised diagnostics class member name for abort of error. 2024-01-12 Georg-Johann Lay * config/avr/avr.cc (avr_handle_addr_attribute): Move "..." from format string to %s argument. 2024-01-12 John David Anglin Jakub Jelinek PR middle-end/113182 * varasm.cc (process_pending_assemble_externals, assemble_external_libcall): Use targetm.strip_name_encoding before calling get_identifier. 2024-01-12 Richard Sandiford PR target/113196 * config/aarch64/aarch64.h (machine_function::advsimd_zero_insn): New member variable. * config/aarch64/aarch64-protos.h (aarch64_split_simd_shift_p): Declare. * config/aarch64/iterators.md (Vnarrowq2): New mode attribute. * config/aarch64/aarch64-simd.md (vec_unpacku_hi_, vec_unpacks_hi_): Recombine into... (vec_unpack_hi_): ...this. Move the generation of zip2 for zero-extends to... (aarch64_simd_vec_unpack_hi_): ...a split of this instruction. Fix big-endian handling. (vec_unpacku_lo_, vec_unpacks_lo_): Recombine into... (vec_unpack_lo_): ...this. Move the generation of zip1 for zero-extends to... (2): ...a split of this instruction. Fix big-endian handling. (*aarch64_zip1_uxtl): New pattern. (aarch64_usubw_lo_zip, aarch64_uaddw_lo_zip): Delete (aarch64_usubw_hi_zip, aarch64_uaddw_hi_zip): Likewise. * config/aarch64/aarch64.cc (aarch64_get_shareable_reg): New function. (aarch64_gen_shareable_zero): Use it. (aarch64_split_simd_shift_p): New function. 2024-01-12 Richard Sandiford * emit-rtl.h (rtl_data::x_function_beg_note): New member variable. (function_beg_insn): New macro. * function.cc (expand_function_start): Initialize function_beg_insn. 2024-01-12 Richard Sandiford PR target/112989 * config/aarch64/aarch64-sve-builtins.h (function_builder::m_overload_names): Replace with... * config/aarch64/aarch64-sve-builtins.cc (overload_names): ...this new global. (add_overloaded_function): Update accordingly, using get_identifier to get a GGC-friendly record of the name. 2024-01-12 Richard Sandiford PR target/112989 * config/aarch64/aarch64-sve-builtins.def: Don't include aarch64-sve-builtins-sme.def. (DEF_SME_ZA_FUNCTION_GS, DEF_SME_ZA_FUNCTION): Move to... * config/aarch64/aarch64-sve-builtins-sme.def: ...here. (DEF_SME_FUNCTION): New macro. Use it and DEF_SME_FUNCTION_GS instead of DEF_SVE_*. Add AARCH64_FL_SME to anything that requires AARCH64_FL_SME2. * config/aarch64/aarch64-sve-builtins-sve2.def: Make same AARCH64_FL_SME adjustment here. * config/aarch64/aarch64-sve-builtins.cc (function_groups): Don't include SME intrinsics. (sme_function_groups): New array. (handle_arm_sve_h): Remove check for AARCH64_FL_SME. (handle_arm_sme_h): Use sme_function_groups instead of function_groups. 2024-01-12 Juzhe-Zhong PR target/113281 * config/riscv/riscv-protos.h (struct regmove_vector_cost): New struct. (struct cpu_vector_cost): Add regmove struct. (get_vector_costs): Export as global. * config/riscv/riscv-vector-costs.cc (adjust_stmt_cost): Adjust scalar_to_vec cost. (costs::add_stmt_cost): Ditto. * config/riscv/riscv.cc (get_common_costs): Export global function. 2024-01-12 Jakub Jelinek PR tree-optimization/113334 * gimple-lower-bitint.cc (bitint_large_huge::handle_operand): Use wi::neg_p (wi::to_wide (op)) instead of tree_int_cst_sgn (op) < 0 to determine if number should be extended by all ones rather than zero extended. 2024-01-12 Jakub Jelinek PR tree-optimization/113330 * tree-sra.cc (create_access): Punt for BITINT_TYPE accesses with too large size. 2024-01-12 Jakub Jelinek PR tree-optimization/113323 * gimple-lower-bitint.cc (bitint_dom_walker::before_dom_children): Fix check for lhs being large/huge _BitInt not in m_names. 2024-01-12 Jakub Jelinek PR tree-optimization/113316 * gimple-lower-bitint.cc (bitint_large_huge::lower_call): Handle uninitialized large/huge _BitInt arguments to calls. 2024-01-12 Jakub Jelinek * gimple-lower-bitint.cc (mergeable_op): Instead of comparing TYPE_SIZE (t) of large/huge BITINT_TYPEs, compare CEIL (TYPE_PRECISION (t), limb_prec). (bitint_large_huge::handle_cast): Likewise. 2024-01-12 Ilya Leoshkevich PR sanitizer/113284 * config/rs6000/rs6000.cc (rs6000_elf_declare_function_name): Use assemble_function_label_final () for Power ELF V1 ABI. * output.h (assemble_function_label_final): New function. * varasm.cc (assemble_function_label_raw): Use assemble_function_label_final (). (assemble_function_label_final): New function. 2024-01-12 Richard Biener PR middle-end/113344 * match.pd ((double)float CMP (double)float -> float CMP float): Perform result type check only for vectors. * fold-const.cc (fold_binary_loc): Likewise. 2024-01-12 Haochen Jiang * config/i386/sse.md (sdot_prod): Remove redundant SET. (usdot_prod): Ditto. (sdot_prod): Ditto. (udot_prod): Ditto. 2024-01-12 Haochen Jiang PR target/113288 * config/i386/i386-c.cc (ix86_target_macros_internal): Add __AVX10_1__, __AVX10_1_256__ and __AVX10_1_512__. 2024-01-12 Richard Biener PR target/112280 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate): Do not generate code when d.testing_p. 2024-01-12 liuhongt PR target/113039 * doc/invoke.texi (fcf-protection=): Update documents. 2024-01-12 Pan Li * config/riscv/riscv.cc (riscv_v_ext_mode_p): Update the comments of predicate func riscv_v_ext_mode_p. 2024-01-12 Feng Wang * config/riscv/riscv-vector-builtins.def (vfloat16m8_t): Modify ABI-name length of vfloat16m8_t 2024-01-12 Li Wei * config/loongarch/loongarch.cc (loongarch_expand_conditional_move): Adjust. 2024-01-12 Li Wei * config/loongarch/loongarch.md (add3): Removed. (*addsi3): New. (addsi3): Ditto. (adddi3): Ditto. (*addsi3_extended): Removed. (addsi3_extended): New. 2024-01-11 Jin Ma * config/riscv/thead.md: Add limits for splits. 2024-01-11 Andrew Pinski PR middle-end/113322 * expr.cc (do_store_flag): Don't try single bit tests with comparison on vector types. 2024-01-11 Andrew Pinski PR tree-optimization/113301 * match.pd (`1/x`): Delay signed case until late. 2024-01-11 Georg-Johann Lay * doc/invoke.texi (AVR Options): Move -mrmw, -mn-flash, -mshort-calls and -msp8 to... (AVR Internal Options): ...this new @subsubsection. 2024-01-11 Vladimir N. Makarov PR rtl-optimization/112918 * lra-constraints.cc (SMALL_REGISTER_CLASS_P): Move before in_class_p. (in_class_p): Restrict condition for narrowing class in case of allow_all_reload_class_changes_p. (process_alt_operands): Try to match operand without and with narrowing reg class. Discourage narrowing the class. Finish insn matching only if there is no class narrowing. (curr_insn_transform): Pass true to in_class_p for reg operand win. 2024-01-11 Richard Biener PR tree-optimization/112505 * tree-vect-loop.cc (vectorizable_induction): Reject bit-precision induction. 2024-01-11 Richard Biener PR tree-optimization/113126 * match.pd ((double)float CMP (double)float -> float CMP float): Make sure the boolean type is the same. * fold-const.cc (fold_binary_loc): Likewise. 2024-01-11 Richard Biener PR tree-optimization/112636 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Call estimate_numbers_of_iterations before querying get_max_loop_iterations_int. (pass_ch::execute): Initialize SCEV and loops appropriately. 2024-01-11 Georg-Johann Lay * config/avr/avr-devices.cc (avr_texinfo): Adjust documentation for Reduced Tiny. * config/avr/gen-avr-mmcu-texi.cc (main): Add @anchor for each core. * doc/extend.texi (AVR Variable Attributes): Improve documentation of io, io_low and address attributes. * doc/invoke.texi (AVR Options): Add some anchors for external refs. * doc/avr-mmcu.texi: Rebuild. 2024-01-11 Yang Yujie PR target/113233 * config/loongarch/genopts/loongarch.opt.in: Mark options with the "Save" property. * config/loongarch/loongarch.opt: Same. * config/loongarch/loongarch-opts.cc: Refresh -mcmodel= state according to la_target. * config/loongarch/loongarch.cc: Implement TARGET_OPTION_{SAVE, RESTORE} for the la_target structure; Rename option conditions to have the same "la_" prefix. * config/loongarch/loongarch.h: Same. 2024-01-11 Pan Li * loop-unroll.cc (insert_var_expansion_initialization): Leverage MODE_HAS_SIGNED_ZEROS for expansion variable initialization. 2024-01-11 Alex Coplan PR target/113077 * config/aarch64/aarch64-ldp-fusion.cc (filter_notes): Add fr_expr param to extract REG_FRAME_RELATED_EXPR notes. (combine_reg_notes): Handle REG_FRAME_RELATED_EXPR notes, and synthesize these if needed. Update caller ... (ldp_bb_info::fuse_pair): ... here. (ldp_bb_info::try_fuse_pair): Punt if either insn has writeback and either insn is frame-related. (find_trailing_add): Punt on frame-related insns. * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use REG_FRAME_RELATED_EXPR instead of REG_CFA_OFFSET. 2024-01-11 YunQiang Su * config/mips/mips.cc (mips_start_function_definition): Add ATTRIBUTE_UNUSED. 2024-01-11 Richard Biener PR middle-end/112740 * expr.cc (store_constructor): Check the integer vector mask has a single bit per element before using sign-extension to expand an uniform vector. 2024-01-11 Juzhe-Zhong * config/riscv/riscv-vector-costs.cc (costs::better_main_loop_than_p): VLA preempt VLS on unknown NITERS loop. 2024-01-11 Haochen Jiang * doc/invoke.texi: Add -mevex512. 2024-01-11 Lulu Cheng * config/loongarch/loongarch.md (one_cmpl2): Replace GPR with X. (*nor3): Likewise. (nor3): Likewise. (*negsi2_extended): New template. (*si3_internal): Likewise. (*one_cmplsi2_internal): Likewise. (*norsi3_internal): Likewise. (*nsi_internal): Likewise. (bytepick_w__extend): Modify this template according to the modified bit operation to make the optimization work. 2024-01-11 liuhongt PR target/104401 * match.pd (VEC_COND_EXPR: A < B ? A : B -> MIN_EXPR): New patten match. 2024-01-10 Juzhe-Zhong * config/riscv/riscv.cc (get_common_costs): Switch RVV cost model. (get_vector_costs): Ditto. (riscv_builtin_vectorization_cost): Ditto. 2024-01-10 Juzhe-Zhong * config/riscv/riscv-vector-costs.cc (costs::better_main_loop_than_p): Minior tweak. 2024-01-10 Antoni Boucher PR jit/111396 * ipa-fnsummary.cc (ipa_fnsummary_cc_finalize): Call ipa_free_size_summary. * ipa-icf.cc (ipa_icf_cc_finalize): New function. * ipa-profile.cc (ipa_profile_cc_finalize): New function. * ipa-prop.cc (ipa_prop_cc_finalize): New function. * ipa-prop.h (ipa_prop_cc_finalize): New function. * ipa-sra.cc (ipa_sra_cc_finalize): New function. * ipa-utils.h (ipa_profile_cc_finalize, ipa_icf_cc_finalize, ipa_sra_cc_finalize): New functions. * toplev.cc (toplev::finalize): Call ipa_icf_cc_finalize, ipa_prop_cc_finalize, ipa_profile_cc_finalize and ipa_sra_cc_finalize Include ipa-utils.h. 2024-01-10 Jin Ma * config/riscv/riscv-protos.h (th_int_get_mask): New prototype. (th_int_get_save_adjustment): Likewise. (th_int_adjust_cfi_prologue): Likewise. * config/riscv/riscv.cc (BITSET_P): Moved away from here. (TH_INT_INTERRUPT): New macro. (riscv_expand_prologue): Add the processing of XTheadInt. (riscv_expand_epilogue): Likewise. * config/riscv/riscv.h (BITSET_P): Moved to here. * config/riscv/riscv.md: New unspec. * config/riscv/thead.cc (th_int_get_mask): New function. (th_int_get_save_adjustment): Likewise. (th_int_adjust_cfi_prologue): Likewise. * config/riscv/thead.md (th_int_push): New pattern. (th_int_pop): new pattern. 2024-01-10 Tamar Christina PR tree-optimization/112468 * doc/sourcebuild.texi: Document ifn_copysign. * match.pd: Only apply transformation if target supports the IFN. 2024-01-10 Andrew Pinski PR tree-optimization/112581 * gimple-if-to-switch.cc (pass_if_to_switch::execute): Call mark_ssa_maybe_undefs. * tree-ssa-reassoc.cc (can_reassociate_op_p): Uninitialized variables can not be reassociated. (init_range_entry): Check for uninitialized variables too. (init_reassoc): Call mark_ssa_maybe_undefs. 2024-01-10 Maciej W. Rozycki * config/riscv/riscv.cc (riscv_noce_conversion_profitable_p): Also handle sign extension. 2024-01-10 Alex Coplan * config/aarch64/aarch64.opt (-mearly-ldp-fusion): Set default to 0. (-mlate-ldp-fusion): Likewise. 2024-01-10 Tamar Christina PR tree-optimization/113287 * tree-vect-stmts.cc (vectorizable_early_exit): Check the flags on edge instead of using BRANCH_EDGE to determine true edge. 2024-01-10 Richard Biener PR tree-optimization/113078 * tree-vect-loop.cc (check_reduction_path): Canonicalize .COND_SUB to .COND_ADD. 2024-01-10 David Malcolm * gcc-urlifier.cc (gcc_urlifier::get_url_suffix_for_option): Handle prefix mappings before calling find_opt. (selftest::gcc_urlifier_cc_tests): Add example of urlifying a "-fno-"-prefixed command-line option. * opts-common.cc (get_option_prefix_remapping): New. * opts.h (get_option_prefix_remapping): New decl. 2024-01-10 David Malcolm * diagnostic.cc (diagnostic_context::report_diagnostic): Pass m_urlifier to pp_output_formatted_text. * pretty-print.cc: Add #define of INCLUDE_VECTOR. (obstack_append_string): New overload, taking a length. (urlify_quoted_string): Pass in an obstack ptr, rather than using that of the pp's buffer. Generalize to handle trailing text in the buffer beyond the run of quoted text. (class quoting_info): New. (on_begin_quote): New. (on_end_quote): New. (pp_format): Refactor phase 1 and phase 2 quoting support, moving it to calls to on_begin_quote and on_end_quote. (struct auto_obstack): New. (quoting_info::handle_phase_3): New. (pp_output_formatted_text): Add urlifier param. Use it if there is deferred urlification. Delete m_quotes. (selftest::pp_printf_with_urlifier): Pass urlifier to pp_output_formatted_text. (selftest::test_urlification): Update results for the existing case of quoted text stradding chunks; add more such test cases. * pretty-print.h (class quoting_info): New forward decl. (chunk_info::m_quotes): New field. (pp_output_formatted_text): Add optional urlifier param. 2024-01-10 David Malcolm * pretty-print.cc (selftest::test_pp_format): Add selftest coverage for numbered args. 2024-01-10 Tamar Christina PR tree-optimization/113144 PR tree-optimization/113145 * tree-vect-loop-manip.cc (slpeel_tree_duplicate_loop_to_edge_cfg): Update all BB that the original exits dominated. 2024-01-10 Eric Botcazou * dwarf2out.cc (modified_type_die): Extend the support of reverse storage order to enumeration types if -gstrict-dwarf is not passed. (gen_enumeration_type_die): Add REVERSE parameter and generate the DIE immediately after the existing one if it is true. (gen_tagged_type_die): Add REVERSE parameter and pass it in the call to gen_enumeration_type_die. (gen_type_die_with_usage): Add REVERSE parameter and pass it in the first recursive call as well as the call to gen_tagged_type_die. (gen_type_die): Add REVERSE parameter and pass it in the call to gen_type_die_with_usage. 2024-01-10 Jakub Jelinek PR tree-optimization/113120 * tree-sra.cc (analyze_access_subtree): For BITINT_TYPE with root->size TYPE_PRECISION don't build anything new. Otherwise, if root->type is a BITINT_TYPE, use build_bitint_type rather than build_nonstandard_integer_type. 2024-01-10 Hongyu Wang * config/i386/i386.opt: Adjust document. * doc/invoke.texi: Add description for -mapx-inline-asm-use-gpr32. 2024-01-10 Juzhe-Zhong * config/riscv/autovec.md (avg3_floor): Remove. (avg3_floor): New pattern. (avg3_ceil): Remove. (avg3_ceil): New pattern. (uavg3_floor): Ditto. (uavg3_ceil): Ditto. * config/riscv/riscv-protos.h (enum insn_flags): Add for average addition. (enum insn_type): Ditto. * config/riscv/riscv-v.cc: Ditto. * config/riscv/vector-iterators.md (ashiftrt): Remove. (ASHIFTRT): Ditto. * config/riscv/vector.md: Add VLS modes. 2024-01-10 Kewen Lin PR target/111480 * config/rs6000/vsx.md (VCZLSBB): New int iterator. (vczlsbb_char): New int attribute. (vclzlsbb_, vctzlsbb_): Merge to ... (vczlsbb_): ... this. (*vctzlsbb_zext_): Rename to ... (*vczlsbb_zext_): ... this, and extend it to cover vclzlsbb. 2024-01-10 Kewen Lin PR target/112606 * config/rs6000/rs6000.md (copysign3 IEEE128): Change predicate of the last argument from altivec_register_operand to any_operand. If operands[2] is CONST_DOUBLE, emit abs or neg abs depending on its sign otherwise if it doesn't satisfy altivec_register_operand, force it to REG using copy_to_mode_reg. 2024-01-10 Kewen Lin PR middle-end/113100 * builtins.cc (expand_builtin_stack_address): Guard stack point adjustment with SPARC_STACK_BOUNDARY_HACK. 2024-01-10 Yang Yujie * config/loongarch/genopts/loongarch-strings: Remove explicit-reloc argument string definitions. * config/loongarch/loongarch-str.h: Same. * config/loongarch/genopts/loongarch.opt.in: Mark -m[no-]explicit-relocs as aliases to -mexplicit-relocs={always,none} * config/loongarch/loongarch.opt: Regenerate. * config/loongarch/loongarch.cc: Same. 2024-01-10 Yang Yujie * config/loongarch/loongarch-def.h: Define constants with enums instead of Macros. 2024-01-10 Yang Yujie * config/loongarch/genopts/loongarch-strings: Rename. * config/loongarch/genopts/loongarch.opt.in: Same. * config/loongarch/loongarch-cpu.cc: Same. * config/loongarch/loongarch-def.cc: Same. * config/loongarch/loongarch-def.h: Same. * config/loongarch/loongarch-opts.cc: Same. * config/loongarch/loongarch-opts.h: Same. * config/loongarch/loongarch-str.h: Same. * config/loongarch/loongarch.opt: Same. 2024-01-10 Yang Yujie * config/loongarch/genopts/genstr.sh: Prepend the isa_evolution variable with the common la_ prefix. * config/loongarch/genopts/loongarch.opt.in: Mark ISA evolution flags as saved using TargetVariable. * config/loongarch/loongarch.opt: Same. * config/loongarch/loongarch-def.h: Define evolution_set to mark changes to the -march default. * config/loongarch/loongarch-driver.cc: Same. * config/loongarch/loongarch-opts.cc: Same. * config/loongarch/loongarch-opts.h: Define and use ISA evolution conditions around the la_target structure. * config/loongarch/loongarch.cc: Same. * config/loongarch/loongarch.md: Same. * config/loongarch/loongarch-builtins.cc: Same. * config/loongarch/loongarch-c.cc: Same. * config/loongarch/lasx.md: Same. * config/loongarch/lsx.md: Same. * config/loongarch/sync.md: Same. 2024-01-09 Jeff Law * config/epiphany/constraints.md (Car): Allow -1024..1023, no more, no less. 2024-01-09 Richard Sandiford * config/mn10300/mn10300.md (subdi3_degenerate): Add isa attribute. 2024-01-09 Tamar Christina * tree-vect-loop.cc (vectorizable_live_operation_1): Drop unused restart_loop. (vectorizable_live_operation): Likewise. 2024-01-09 Tamar Christina PR tree-optimization/113199 * tree-vect-loop.cc (vectorizable_live_operation_1): Use BIT_FIELD_REF. 2024-01-09 Jakub Jelinek PR target/113270 * config.gcc (aarch64*-*-*): Add aarch64-builtins.h to target_gtfiles. * config/aarch64/aarch64-builtins.cc (aarch64_simd_types): Add extern GTY(()) declaration before the definition, drop GTY(()) drom the definition. 2024-01-09 Richard Biener PR tree-optimization/113026 * tree-vect-loop-manip.cc (vect_do_peeling): Remove redundant and wrong niter bound setting. Move niter bound adjustment down. 2024-01-09 Tamar Christina PR middle-end/113163 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p): Reject non-linear inductions that aren't supported. 2024-01-09 Roger Sayle * config/arc/arc.cc (arc_shift_alg): New enumerated type for left shift implementation strategies. (arc_shift_info): Type for each entry of the shift strategy table. (arc_shift_context_idx): Return a integer value for each code generation context, used as an index (arc_ashl_alg): Table indexed by context and shifted bit count. (arc_split_ashl): Use the arc_ashl_alg table to select SImode left shift implementation. (arc_rtx_costs) : Use the arc_ashl_alg table to provide accurate costs, when optimizing for speed or size. 2024-01-09 Juzhe-Zhong * config/riscv/riscv-vector-costs.cc (loop_invariant_op_p): Fix loop invariant check. 2024-01-09 Julian Brown * gimplify.cc (gimplify_expr): Ensure OMP_ARRAY_SECTION has been processed out before gimplification. * tree-pretty-print.cc (dump_generic_node): Support OMP_ARRAY_SECTION. * tree.def (OMP_ARRAY_SECTION): New tree code. 2024-01-09 Jakub Jelinek PR tree-optimization/113210 * tree-vect-loop.cc (vect_get_loop_niters): If non-INTEGER_CST value in *number_of_iterationsm1 PLUS_EXPR 1 is folded into INTEGER_CST, recompute *number_of_iterationsm1 as the INTEGER_CST minus 1. 2024-01-09 Eric Botcazou PR rtl-optimization/113140 * reorg.cc (fill_slots_from_thread): If we are to branch after the last instruction of the function, create an end label. 2024-01-09 Roger Sayle Hongtao Liu PR target/112992 * config/i386/i386-expand.cc (ix86_convert_const_wide_int_to_broadcast): Allow call to ix86_expand_vector_init_duplicate to fail, and return NULL_RTX. (ix86_broadcast_from_constant): Revert recent change; Return a suitable MEMREF independently of mode/target combinations. (ix86_expand_vector_move): Allow ix86_expand_vector_init_duplicate to decide whether expansion is possible/preferrable. Only try forcing DImode constants to memory (and trying again) if calling ix86_expand_vector_init_duplicate fails with an DImode immediate constant. (ix86_expand_vector_init_duplicate) : Try using V4SImode for suitable immediate constants. : Try using V8SImode for suitable constants. : Fail for CONST_INT_P, i.e. use constant pool. : Likewise. : For CONST_INT_P try using V4SImode via widen. : For CONT_INT_P try using V8HImode via widen.