From b097c7a27fb0796b2653a1d003cbf6b7a69d8961 Mon Sep 17 00:00:00 2001 From: Szabolcs Nagy Date: Thu, 4 Jun 2020 09:33:35 +0100 Subject: libgcc: fix the handling of return address mangling [PR94891] Mangling, currently only used on AArch64 for return address signing, is an internal representation that should not be exposed via __builtin_return_address return value, __builtin_eh_return handler argument, _Unwind_DebugHook handler argument. Note that a mangled address might not even fit into a void *, e.g. with AArch64 ilp32 ABI the return address is stored as 64bit, so the mangled return address cannot be accessed via _Unwind_GetPtr. This patch changes the unwinder hooks as follows: MD_POST_EXTRACT_ROOT_ADDR is removed: root address comes from __builtin_return_address which is not mangled. MD_POST_EXTRACT_FRAME_ADDR is renamed to MD_DEMANGLE_RETURN_ADDR, it now operates on _Unwind_Word instead of void *, so the hook should work when return address signing is enabled on AArch64 ilp32. (But for that __builtin_aarch64_autia1716 should be fixed to operate on 64bit input instead of a void *.) MD_POST_FROB_EH_HANDLER_ADDR is removed: it is the responsibility of __builtin_eh_return to do the mangling if necessary. 2020-07-13 Szabolcs Nagy libgcc/ChangeLog: PR target/94891 * config/aarch64/aarch64-unwind.h (MD_POST_EXTRACT_ROOT_ADDR): Remove. (MD_POST_FROB_EH_HANDLER_ADDR): Remove. (MD_POST_EXTRACT_FRAME_ADDR): Rename to ... (MD_DEMANGLE_RETURN_ADDR): This. (aarch64_post_extract_frame_addr): Rename to ... (aarch64_demangle_return_addr): This. (aarch64_post_frob_eh_handler_addr): Remove. * unwind-dw2.c (uw_update_context): Demangle return address. (uw_frob_return_addr): Remove. --- libgcc/config/aarch64/aarch64-unwind.h | 40 +++++++--------------------------- libgcc/unwind-dw2.c | 34 +++++++---------------------- 2 files changed, 16 insertions(+), 58 deletions(-) (limited to 'libgcc') diff --git a/libgcc/config/aarch64/aarch64-unwind.h b/libgcc/config/aarch64/aarch64-unwind.h index ed84a96..3c5f85b 100644 --- a/libgcc/config/aarch64/aarch64-unwind.h +++ b/libgcc/config/aarch64/aarch64-unwind.h @@ -27,11 +27,8 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define DWARF_REGNUM_AARCH64_RA_STATE 34 -#define MD_POST_EXTRACT_ROOT_ADDR(addr) __builtin_aarch64_xpaclri (addr) -#define MD_POST_EXTRACT_FRAME_ADDR(context, fs, addr) \ - aarch64_post_extract_frame_addr (context, fs, addr) -#define MD_POST_FROB_EH_HANDLER_ADDR(current, target, addr) \ - aarch64_post_frob_eh_handler_addr (current, target, addr) +#define MD_DEMANGLE_RETURN_ADDR(context, fs, addr) \ + aarch64_demangle_return_addr (context, fs, addr) #define MD_FROB_UPDATE_CONTEXT(context, fs) \ aarch64_frob_update_context (context, fs) @@ -52,14 +49,15 @@ aarch64_cie_signed_with_b_key (struct _Unwind_Context *context) return 0; } -/* Do AArch64 private extraction on ADDR based on context info CONTEXT and - unwind frame info FS. If ADDR is signed, we do address authentication on it - using CFA of current frame. */ +/* Do AArch64 private extraction on ADDR_WORD based on context info CONTEXT and + unwind frame info FS. If ADDR_WORD is signed, we do address authentication + on it using CFA of current frame. */ static inline void * -aarch64_post_extract_frame_addr (struct _Unwind_Context *context, - _Unwind_FrameState *fs, void *addr) +aarch64_demangle_return_addr (struct _Unwind_Context *context, + _Unwind_FrameState *fs, _Unwind_Word addr_word) { + void *addr = (void *)addr_word; if (context->flags & RA_SIGNED_BIT) { _Unwind_Word salt = (_Unwind_Word) context->cfa; @@ -71,28 +69,6 @@ aarch64_post_extract_frame_addr (struct _Unwind_Context *context, return addr; } -/* Do AArch64 private frob on exception handler's address HANDLER_ADDR before - installing it into current context CURRENT. TARGET is currently not used. - We need to sign exception handler's address if CURRENT itself is signed. */ - -static inline void * -aarch64_post_frob_eh_handler_addr (struct _Unwind_Context *current, - struct _Unwind_Context *target - ATTRIBUTE_UNUSED, - void *handler_addr) -{ - if (current->flags & RA_SIGNED_BIT) - { - if (aarch64_cie_signed_with_b_key (current)) - return __builtin_aarch64_pacib1716 (handler_addr, - (_Unwind_Word) current->cfa); - return __builtin_aarch64_pacia1716 (handler_addr, - (_Unwind_Word) current->cfa); - } - else - return handler_addr; -} - /* Do AArch64 private initialization on CONTEXT based on frame info FS. Mark CONTEXT as return address signed if bit 0 of DWARF_REGNUM_AARCH64_RA_STATE is set. */ diff --git a/libgcc/unwind-dw2.c b/libgcc/unwind-dw2.c index 62d4a3d..fe89656 100644 --- a/libgcc/unwind-dw2.c +++ b/libgcc/unwind-dw2.c @@ -1538,11 +1538,14 @@ uw_update_context (struct _Unwind_Context *context, _Unwind_FrameState *fs) { /* Compute the return address now, since the return address column can change from frame to frame. */ - context->ra = __builtin_extract_return_addr - (_Unwind_GetPtr (context, fs->retaddr_column)); -#ifdef MD_POST_EXTRACT_FRAME_ADDR - context->ra = MD_POST_EXTRACT_FRAME_ADDR (context, fs, context->ra); + void *ret_addr; +#ifdef MD_DEMANGLE_RETURN_ADDR + _Unwind_Word ra = _Unwind_GetGR (context, fs->retaddr_column); + ret_addr = MD_DEMANGLE_RETURN_ADDR (context, fs, ra); +#else + ret_addr = _Unwind_GetPtr (context, fs->retaddr_column); #endif + context->ra = __builtin_extract_return_addr (ret_addr); } } @@ -1577,9 +1580,6 @@ uw_init_context_1 (struct _Unwind_Context *context, void *outer_cfa, void *outer_ra) { void *ra = __builtin_extract_return_addr (__builtin_return_address (0)); -#ifdef MD_POST_EXTRACT_ROOT_ADDR - ra = MD_POST_EXTRACT_ROOT_ADDR (ra); -#endif _Unwind_FrameState fs; _Unwind_SpTmp sp_slot; _Unwind_Reason_Code code; @@ -1616,9 +1616,6 @@ uw_init_context_1 (struct _Unwind_Context *context, initialization context, then we can't see it in the given call frame data. So have the initialization context tell us. */ context->ra = __builtin_extract_return_addr (outer_ra); -#ifdef MD_POST_EXTRACT_ROOT_ADDR - context->ra = MD_POST_EXTRACT_ROOT_ADDR (context->ra); -#endif } static void _Unwind_DebugHook (void *, void *) @@ -1641,21 +1638,6 @@ _Unwind_DebugHook (void *cfa __attribute__ ((__unused__)), #endif } -/* Frob exception handler's address kept in TARGET before installing into - CURRENT context. */ - -static inline void * -uw_frob_return_addr (struct _Unwind_Context *current - __attribute__ ((__unused__)), - struct _Unwind_Context *target) -{ - void *ret_addr = __builtin_frob_return_addr (target->ra); -#ifdef MD_POST_FROB_EH_HANDLER_ADDR - ret_addr = MD_POST_FROB_EH_HANDLER_ADDR (current, target, ret_addr); -#endif - return ret_addr; -} - /* Install TARGET into CURRENT so that we can return to it. This is a macro because __builtin_eh_return must be invoked in the context of our caller. FRAMES is a number of frames to be unwind. @@ -1667,7 +1649,7 @@ uw_frob_return_addr (struct _Unwind_Context *current do \ { \ long offset = uw_install_context_1 ((CURRENT), (TARGET)); \ - void *handler = uw_frob_return_addr ((CURRENT), (TARGET)); \ + void *handler = __builtin_frob_return_addr ((TARGET)->ra); \ _Unwind_DebugHook ((TARGET)->cfa, handler); \ _Unwind_Frames_Extra (FRAMES); \ __builtin_eh_return (offset, handler); \ -- cgit v1.1 From ea69fcf9a036bbecd63c39f24b155b1c46953e0d Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Tue, 14 Jul 2020 00:16:30 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 13 +++++++++++++ 1 file changed, 13 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 602c907..a05cc0b 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,16 @@ +2020-07-13 Szabolcs Nagy + + PR target/94891 + * config/aarch64/aarch64-unwind.h (MD_POST_EXTRACT_ROOT_ADDR): Remove. + (MD_POST_FROB_EH_HANDLER_ADDR): Remove. + (MD_POST_EXTRACT_FRAME_ADDR): Rename to ... + (MD_DEMANGLE_RETURN_ADDR): This. + (aarch64_post_extract_frame_addr): Rename to ... + (aarch64_demangle_return_addr): This. + (aarch64_post_frob_eh_handler_addr): Remove. + * unwind-dw2.c (uw_update_context): Demangle return address. + (uw_frob_return_addr): Remove. + 2020-07-09 Szabolcs Nagy PR target/96001 -- cgit v1.1 From 4f97bed9a7989e14cbb53e405fbd8b3c08aa75ec Mon Sep 17 00:00:00 2001 From: David Edelsohn Date: Mon, 13 Jul 2020 14:43:39 -0400 Subject: aix: FAT libraries: test native compiler mode directly The FAT libraries config fragments need to know which library is native and which is a multilib to choose the correct multilib from which to append the additional object file or shared object file. Testing the top-level archive is fragile because it will fail if rebuilding. This patch tests the compiler preprocessing macros for the 64 bit AIX specific __64BIT__ to determine the native mode of the compiler in MULTILIBTOP. 2020-07-14 David Edelsohn libatomic/ChangeLog * config/t-aix: Set BITS from compiler cpp macro. libgcc/ChangeLog * config/rs6000/t-slibgcc-aix: Set BITS from compiler cpp macro. libgfortran/ChangeLog * config/t-aix: Set BITS from compiler cpp macro. libgomp/ChangeLog * config/t-aix: Set BITS from compiler cpp macro. libstdc++-v3/ChangeLog * config/os/aix/t-aix: Set BITS from compiler cpp macro. --- libgcc/config/rs6000/t-slibgcc-aix | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'libgcc') diff --git a/libgcc/config/rs6000/t-slibgcc-aix b/libgcc/config/rs6000/t-slibgcc-aix index e5f8a02..b3bdda6 100644 --- a/libgcc/config/rs6000/t-slibgcc-aix +++ b/libgcc/config/rs6000/t-slibgcc-aix @@ -90,7 +90,7 @@ AR_FLAGS_FOR_TARGET = -X32_64 # Build and install AIX-style FAT libraries ifeq ($(MULTIBUILDTOP),) -BITS=$(shell if test -z "`ar -X64 t libgcc_s.a`" ; then \ +BITS=$(shell if test -z "`$(CC) -x c -E /dev/null -g3 -o - | grep 64BIT`" ; then \ echo '64'; else echo '32'; fi) all: all-multi ifeq ($(enable_shared),yes) -- cgit v1.1 From 8ca07a3072438fa5e76f2b2cea9e51a98760a86f Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Wed, 15 Jul 2020 00:16:35 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index a05cc0b..5f5fc06 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,7 @@ +2020-07-14 David Edelsohn + + * config/rs6000/t-slibgcc-aix: Set BITS from compiler cpp macro. + 2020-07-13 Szabolcs Nagy PR target/94891 -- cgit v1.1 From 24c35a5ef3f88cf3c25c8bf17f9ff706e4286f53 Mon Sep 17 00:00:00 2001 From: Martin Liska Date: Fri, 10 Jul 2020 10:56:34 +0200 Subject: gcov: create folders with 0777. libgcc/ChangeLog: PR gcov-profile/96035 * libgcov-driver-system.c: Create gcov folders with 0777 so that it respects a system umask. --- libgcc/libgcov-driver-system.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'libgcc') diff --git a/libgcc/libgcov-driver-system.c b/libgcc/libgcov-driver-system.c index 031f057..216992a 100644 --- a/libgcc/libgcov-driver-system.c +++ b/libgcc/libgcov-driver-system.c @@ -115,7 +115,7 @@ create_file_directory (char *filename) /* Try to make directory if it doesn't already exist. */ if (access (filename, F_OK) == -1 #ifdef TARGET_POSIX_IO - && mkdir (filename, 0755) == -1 + && mkdir (filename, 0777) == -1 #else #ifdef mkdir #undef mkdir -- cgit v1.1 From 9bb403dca6e7d81f54962db87cdefb1cca1600dd Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Fri, 24 Jul 2020 00:16:20 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 5f5fc06..fd86c69 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,9 @@ +2020-07-23 Martin Liska + + PR gcov-profile/96035 + * libgcov-driver-system.c: Create gcov folders with 0777 + so that it respects a system umask. + 2020-07-14 David Edelsohn * config/rs6000/t-slibgcc-aix: Set BITS from compiler cpp macro. -- cgit v1.1 From edfb3a30a6cef8e8c25197a7534628961233d772 Mon Sep 17 00:00:00 2001 From: Szabolcs Nagy Date: Thu, 16 Jul 2020 16:26:10 +0100 Subject: aarch64: add PAC GNU property note to libgcc lse.S This note is not used anywhere currently but it is supposed to mark objects if the return address is protected with PAC on the stack. Since lse.S only has leaf functions the return address is never saved on the stack so we can add the note. The note is only added if pac-ret is enabled because it can cause problems with old linkers and we don't have checks for that. This can be changed later to be unconditional, for now it is consistent with how gcc generates the notes. libgcc/ChangeLog: * config/aarch64/lse.S: Add PAC property note. --- libgcc/config/aarch64/lse.S | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) (limited to 'libgcc') diff --git a/libgcc/config/aarch64/lse.S b/libgcc/config/aarch64/lse.S index 64691c6..aa3e3dc 100644 --- a/libgcc/config/aarch64/lse.S +++ b/libgcc/config/aarch64/lse.S @@ -283,6 +283,19 @@ ENDFN NAME(LDNM) #define FEATURE_1_BTI 1 #define FEATURE_1_PAC 2 +/* Supported features based on the code generation options. */ +#if defined(__ARM_FEATURE_BTI_DEFAULT) +# define BTI_FLAG FEATURE_1_BTI +#else +# define BTI_FLAG 0 +#endif + +#if __ARM_FEATURE_PAC_DEFAULT & 3 +# define PAC_FLAG FEATURE_1_PAC +#else +# define PAC_FLAG 0 +#endif + /* Add a NT_GNU_PROPERTY_TYPE_0 note. */ #define GNU_PROPERTY(type, value) \ .section .note.gnu.property, "a"; \ @@ -300,7 +313,7 @@ ENDFN NAME(LDNM) .section .note.GNU-stack, "", %progbits /* Add GNU property note if built with branch protection. */ -# ifdef __ARM_FEATURE_BTI_DEFAULT -GNU_PROPERTY (FEATURE_1_AND, FEATURE_1_BTI) +# if (BTI_FLAG|PAC_FLAG) != 0 +GNU_PROPERTY (FEATURE_1_AND, BTI_FLAG|PAC_FLAG) # endif #endif -- cgit v1.1 From 53256ee3d582162d0ef914c068b58a02aa20c466 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Sat, 25 Jul 2020 00:16:22 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index fd86c69..24fe1af 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,7 @@ +2020-07-24 Szabolcs Nagy + + * config/aarch64/lse.S: Add PAC property note. + 2020-07-23 Martin Liska PR gcov-profile/96035 -- cgit v1.1 From bc2b1a232b1825b421a1aaa21a0865b2d1e4e08c Mon Sep 17 00:00:00 2001 From: Martin Liska Date: Tue, 2 Jun 2020 13:31:48 +0200 Subject: libgcov: support overloaded malloc gcc/ChangeLog: * gcov-io.h (GCOV_PREALLOCATED_KVP): New. libgcc/ChangeLog: * libgcov-driver.c: Add __gcov_kvp_pool and __gcov_kvp_pool_index variables. * libgcov.h (allocate_gcov_kvp): New. (gcov_topn_add_value): Use it. gcc/testsuite/ChangeLog: * gcc.dg/tree-prof/indir-call-prof-malloc.c: New test. --- libgcc/libgcov-driver.c | 6 ++++++ libgcc/libgcov.h | 49 +++++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 53 insertions(+), 2 deletions(-) (limited to 'libgcc') diff --git a/libgcc/libgcov-driver.c b/libgcc/libgcov-driver.c index 2590593..5891426 100644 --- a/libgcc/libgcov-driver.c +++ b/libgcc/libgcov-driver.c @@ -588,6 +588,12 @@ struct gcov_root __gcov_root; struct gcov_master __gcov_master = {GCOV_VERSION, 0}; +/* Pool of pre-allocated gcov_kvp strutures. */ +struct gcov_kvp __gcov_kvp_pool[GCOV_PREALLOCATED_KVP]; + +/* Index to first free gcov_kvp in the pool. */ +unsigned __gcov_kvp_pool_index; + void __gcov_exit (void) { diff --git a/libgcc/libgcov.h b/libgcc/libgcov.h index 81e1895..8be5beb 100644 --- a/libgcc/libgcov.h +++ b/libgcc/libgcov.h @@ -250,6 +250,8 @@ struct indirect_call_tuple /* Exactly one of these will be active in the process. */ extern struct gcov_master __gcov_master; +extern struct gcov_kvp __gcov_kvp_pool[GCOV_PREALLOCATED_KVP]; +extern unsigned __gcov_kvp_pool_index; /* Dump a set of gcov objects. */ extern void __gcov_dump_one (struct gcov_root *) ATTRIBUTE_HIDDEN; @@ -402,6 +404,47 @@ gcov_counter_add (gcov_type *counter, gcov_type value, *counter += value; } +/* Allocate gcov_kvp from heap. If we are recursively called, then allocate + it from a list of pre-allocated pool. */ + +static inline struct gcov_kvp * +allocate_gcov_kvp (void) +{ + struct gcov_kvp *new_node = NULL; + + static +#if defined(HAVE_CC_TLS) +__thread +#endif + volatile unsigned in_recursion ATTRIBUTE_UNUSED = 0; + +#if !defined(IN_GCOV_TOOL) && !defined(L_gcov_merge_topn) + if (__builtin_expect (in_recursion, 0)) + { + unsigned index; +#if GCOV_SUPPORTS_ATOMIC + index + = __atomic_fetch_add (&__gcov_kvp_pool_index, 1, __ATOMIC_RELAXED); +#else + index = __gcov_kvp_pool_index++; +#endif + if (index < GCOV_PREALLOCATED_KVP) + new_node = &__gcov_kvp_pool[index]; + else + /* Do not crash in the situation. */ + return NULL; + } + else +#endif + { + in_recursion = 1; + new_node = (struct gcov_kvp *)xcalloc (1, sizeof (struct gcov_kvp)); + in_recursion = 0; + } + + return new_node; +} + /* Add key value pair VALUE:COUNT to a top N COUNTERS. When INCREMENT_TOTAL is true, add COUNT to total of the TOP counter. If USE_ATOMIC is true, do it in atomic way. */ @@ -443,8 +486,10 @@ gcov_topn_add_value (gcov_type *counters, gcov_type value, gcov_type count, } else { - struct gcov_kvp *new_node - = (struct gcov_kvp *)xcalloc (1, sizeof (struct gcov_kvp)); + struct gcov_kvp *new_node = allocate_gcov_kvp (); + if (new_node == NULL) + return; + new_node->value = value; new_node->count = count; -- cgit v1.1 From 9fa4023c7aa0ab126b00fe7e640ed9858b249c77 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Fri, 31 Jul 2020 23:52:20 +0100 Subject: RISC-V/libgcc: Reduce the size of RV64 millicode by 6 bytes Rewrite code sequences throughout the 64-bit RISC-V `__riscv_save_*' routines replacing `li t1, -48', `li t1, -64', and `li t1, -80', instructions, which do not have a compressed encoding, respectively with `li t1, 3', `li t1, 4', and `li t1, 4', which do, and then adjusting the remaining code accordingly observing that `sub sp, sp, t1' takes the same amount of space as an `slli t1, t1, 4'/`add sp, sp, t1' instruction pair does, again due to the use of compressed encodings, saving 6 bytes total. This change does increase code size by 4 bytes for RISC-V processors lacking the compressed instruction set, however their users couldn't care about the code size or they would have chosen an implementation that does have the compressed instructions, wouldn't they? libgcc/ * config/riscv/save-restore.S [__riscv_xlen == 64] (__riscv_save_10, __riscv_save_8, __riscv_save_6, __riscv_save_4) (__riscv_save_2): Replace negative immediates used for the final stack pointer adjustment with positive ones, right-shifted by 4. --- libgcc/config/riscv/save-restore.S | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) (limited to 'libgcc') diff --git a/libgcc/config/riscv/save-restore.S b/libgcc/config/riscv/save-restore.S index 7212165..e510009 100644 --- a/libgcc/config/riscv/save-restore.S +++ b/libgcc/config/riscv/save-restore.S @@ -45,7 +45,7 @@ FUNC_BEGIN (__riscv_save_10) .cfi_restore 27 addi sp, sp, -112 .cfi_def_cfa_offset 112 - li t1, -16 + li t1, 1 .Ls10: sd s10, 16(sp) .cfi_offset 26, -96 @@ -60,7 +60,7 @@ FUNC_BEGIN (__riscv_save_8) .cfi_restore 27 addi sp, sp, -112 .cfi_def_cfa_offset 112 - li t1, -32 + li t1, 2 .Ls8: sd s8, 32(sp) .cfi_offset 24, -80 @@ -77,7 +77,7 @@ FUNC_BEGIN (__riscv_save_6) .cfi_restore 27 addi sp, sp, -112 .cfi_def_cfa_offset 112 - li t1, -48 + li t1, 3 .Ls6: sd s6, 48(sp) .cfi_offset 22, -64 @@ -99,7 +99,7 @@ FUNC_BEGIN (__riscv_save_4) .cfi_restore 27 addi sp, sp, -112 .cfi_def_cfa_offset 112 - li t1, -64 + li t1, 4 .Ls4: sd s4, 64(sp) .cfi_offset 20, -48 @@ -123,7 +123,7 @@ FUNC_BEGIN (__riscv_save_2) .cfi_restore 27 addi sp, sp, -112 .cfi_def_cfa_offset 112 - li t1, -80 + li t1, 5 .Ls2: sd s2, 80(sp) .cfi_offset 18, -32 @@ -133,9 +133,10 @@ FUNC_BEGIN (__riscv_save_2) .cfi_offset 8, -16 sd ra, 104(sp) .cfi_offset 1, -8 + slli t1, t1, 4 # CFA info is not correct in next 2 instruction since t1's # value is depend on how may register really save. - sub sp, sp, t1 + add sp, sp, t1 jr t0 .cfi_endproc FUNC_END (__riscv_save_12) -- cgit v1.1 From 48cc2e468cca54ae930e64be01f3b183df2198fb Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Sat, 1 Aug 2020 00:16:25 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 24fe1af..a33ace9 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,17 @@ +2020-07-31 Maciej W. Rozycki + + * config/riscv/save-restore.S [__riscv_xlen == 64] + (__riscv_save_10, __riscv_save_8, __riscv_save_6, __riscv_save_4) + (__riscv_save_2): Replace negative immediates used for the final + stack pointer adjustment with positive ones, right-shifted by 4. + +2020-07-31 Martin Liska + + * libgcov-driver.c: Add __gcov_kvp_pool + and __gcov_kvp_pool_index variables. + * libgcov.h (allocate_gcov_kvp): New. + (gcov_topn_add_value): Use it. + 2020-07-24 Szabolcs Nagy * config/aarch64/lse.S: Add PAC property note. -- cgit v1.1 From 90b43856fdff7d96d93d22970eca8a86c56e0ddc Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Mon, 3 Aug 2020 22:55:28 +0200 Subject: aarch64: Fix up __aarch64_cas16_acq_rel fallback As mentioned in the PR, the fallback path when LSE is unavailable writes incorrect registers to the memory if the previous content compares equal to x0, x1 - it writes copy of x0, x1 from the start of function, but it should write x2, x3. 2020-08-03 Jakub Jelinek PR target/96402 * config/aarch64/lse.S (__aarch64_cas16_acq_rel): Use x2, x3 instead of x(tmp0), x(tmp1) in STXP arguments. * gcc.target/aarch64/pr96402.c: New test. --- libgcc/config/aarch64/lse.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'libgcc') diff --git a/libgcc/config/aarch64/lse.S b/libgcc/config/aarch64/lse.S index aa3e3dc..7496b8b 100644 --- a/libgcc/config/aarch64/lse.S +++ b/libgcc/config/aarch64/lse.S @@ -203,7 +203,7 @@ STARTFN NAME(cas) cmp x0, x(tmp0) ccmp x1, x(tmp1), #0, eq bne 1f - STXP w(tmp2), x(tmp0), x(tmp1), [x4] + STXP w(tmp2), x2, x3, [x4] cbnz w(tmp2), 0b 1: ret -- cgit v1.1 From 2b6a53238f312e8bd05844795b8638a5d12402db Mon Sep 17 00:00:00 2001 From: Ian Lance Taylor Date: Mon, 3 Aug 2020 15:59:45 -0700 Subject: libgcc: increase required stack space for x86_64 -fsplit-stack This accomodates increased space required by use of the xsavec instruction in the dynamic linker trampoline. libgcc/ChangeLog: * config/i386/morestack.S (BACKOFF) [x86_64]: Add 2048 bytes. --- libgcc/config/i386/morestack.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'libgcc') diff --git a/libgcc/config/i386/morestack.S b/libgcc/config/i386/morestack.S index 519bbbc..1c31783 100644 --- a/libgcc/config/i386/morestack.S +++ b/libgcc/config/i386/morestack.S @@ -79,7 +79,7 @@ #ifndef __x86_64__ #define BACKOFF (1024) #else -#define BACKOFF (1536) +#define BACKOFF (3584) #endif -- cgit v1.1 From 6a1ad710ad20ef05296013679dd42724865a0396 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Tue, 4 Aug 2020 00:16:24 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index a33ace9..01c5b50 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,13 @@ +2020-08-03 Ian Lance Taylor + + * config/i386/morestack.S (BACKOFF) [x86_64]: Add 2048 bytes. + +2020-08-03 Jakub Jelinek + + PR target/96402 + * config/aarch64/lse.S (__aarch64_cas16_acq_rel): Use x2, x3 instead + of x(tmp0), x(tmp1) in STXP arguments. + 2020-07-31 Maciej W. Rozycki * config/riscv/save-restore.S [__riscv_xlen == 64] -- cgit v1.1 From 17dc08edc28f4fc25f6cd7b71f0d0a0d1ec2f833 Mon Sep 17 00:00:00 2001 From: Kwok Cheung Yeung Date: Mon, 3 Aug 2020 17:38:13 +0200 Subject: nvptx: Add support for subword compare-and-swap This adds support for __sync_val_compare_and_swap and __sync_bool_compare_and_swap for 1-byte and 2-byte long values, which are not natively supported on nvptx. Build and reg-tested on nvptx. Build and reg-tested libgomp on x86_64 with nvptx accelerator. 2020-07-16 Kwok Cheung Yeung libgcc/ * config/nvptx/atomic.c: New. * config/nvptx/t-nvptx (LIB2ADD): Add atomic.c. gcc/testsuite/ * gcc.target/nvptx/ia64-sync-5.c: New. libgomp/ * testsuite/libgomp.c-c++-common/reduction-16.c: New. --- libgcc/config/nvptx/atomic.c | 73 ++++++++++++++++++++++++++++++++++++++++++++ libgcc/config/nvptx/t-nvptx | 3 +- 2 files changed, 75 insertions(+), 1 deletion(-) create mode 100644 libgcc/config/nvptx/atomic.c (limited to 'libgcc') diff --git a/libgcc/config/nvptx/atomic.c b/libgcc/config/nvptx/atomic.c new file mode 100644 index 0000000..e1ea078 --- /dev/null +++ b/libgcc/config/nvptx/atomic.c @@ -0,0 +1,73 @@ +/* NVPTX atomic operations + Copyright (C) 2020 Free Software Foundation, Inc. + Contributed by Mentor Graphics. + + This file is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the + Free Software Foundation; either version 3, or (at your option) any + later version. + + This file is distributed in the hope that it will be useful, but + WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + General Public License for more details. + + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + + You should have received a copy of the GNU General Public License and + a copy of the GCC Runtime Library Exception along with this program; + see the files COPYING3 and COPYING.RUNTIME respectively. If not, see + . */ + +#include + +/* Implement __sync_val_compare_and_swap and __sync_bool_compare_and_swap + for 1 and 2-byte values (which are not natively supported) in terms of + __sync_val_compare_and_swap for 4-byte values (which is supported). + This assumes that the contents of the word surrounding the subword + value that we are interested in are accessible as well (which should + normally be the case). Note that if the contents of the word surrounding + the subword changes between the __sync_val_compare_and_swap_4 and the + preceeding load of oldword, while the subword does not, the implementation + loops, which may manifest worst-case as a hang. */ + +#define __SYNC_SUBWORD_COMPARE_AND_SWAP(TYPE, SIZE) \ + \ +TYPE \ +__sync_val_compare_and_swap_##SIZE (TYPE *ptr, TYPE oldval, TYPE newval) \ +{ \ + unsigned int *wordptr = (unsigned int *)((__UINTPTR_TYPE__ ) ptr & ~3UL); \ + int shift = ((__UINTPTR_TYPE__ ) ptr & 3UL) * 8; \ + unsigned int valmask = (1 << (SIZE * 8)) - 1; \ + unsigned int wordmask = ~(valmask << shift); \ + unsigned int oldword = *wordptr; \ + for (;;) \ + { \ + TYPE prevval = (oldword >> shift) & valmask; \ + /* Exit if the subword value previously read from memory is not */ \ + /* equal to the expected value OLDVAL. */ \ + if (__builtin_expect (prevval != oldval, 0)) \ + return prevval; \ + unsigned int newword = oldword & wordmask; \ + newword |= ((unsigned int) newval) << shift; \ + unsigned int prevword \ + = __sync_val_compare_and_swap_4 (wordptr, oldword, newword); \ + /* Exit only if the compare-and-swap succeeds on the whole word */ \ + /* (i.e. the contents of *WORDPTR have not changed since the last */ \ + /* memory read). */ \ + if (__builtin_expect (prevword == oldword, 1)) \ + return oldval; \ + oldword = prevword; \ + } \ +} \ + \ +bool \ +__sync_bool_compare_and_swap_##SIZE (TYPE *ptr, TYPE oldval, TYPE newval) \ +{ \ + return __sync_val_compare_and_swap_##SIZE (ptr, oldval, newval) == oldval; \ +} + +__SYNC_SUBWORD_COMPARE_AND_SWAP (unsigned char, 1) +__SYNC_SUBWORD_COMPARE_AND_SWAP (unsigned short, 2) diff --git a/libgcc/config/nvptx/t-nvptx b/libgcc/config/nvptx/t-nvptx index c4d20c9..ede0bf0 100644 --- a/libgcc/config/nvptx/t-nvptx +++ b/libgcc/config/nvptx/t-nvptx @@ -1,5 +1,6 @@ LIB2ADD=$(srcdir)/config/nvptx/reduction.c \ - $(srcdir)/config/nvptx/mgomp.c + $(srcdir)/config/nvptx/mgomp.c \ + $(srcdir)/config/nvptx/atomic.c LIB2ADDEH= LIB2FUNCS_EXCLUDE=__main -- cgit v1.1 From b3cb56060bcdc1cf4d38aa30b5017b802822f8c0 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Fri, 14 Aug 2020 00:16:24 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 01c5b50..588b6f4 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,8 @@ +2020-08-13 Kwok Cheung Yeung + + * config/nvptx/atomic.c: New. + * config/nvptx/t-nvptx (LIB2ADD): Add atomic.c. + 2020-08-03 Ian Lance Taylor * config/i386/morestack.S (BACKOFF) [x86_64]: Add 2048 bytes. -- cgit v1.1 From 703e049aa72e01c15087750fe63deba779c9b2dd Mon Sep 17 00:00:00 2001 From: Jozef Lawrynowicz Date: Wed, 26 Aug 2020 20:50:58 +0100 Subject: MSP430: Simplify and extend shift instruction patterns The implementation of define_expand and define_insn patterns to handle shifts in the MSP430 backend is inconsistent, resulting in missed opportunities to make best use of the architecture's features. There's now a single define_expand used as the entry point for all valid shifts, and the decision to either use a helper function to perform the shift (often required for the 430 ISA), or fall through to the define_insn patterns can be made from that expander function. Shifts by a constant amount have been grouped into one define_insn for each type of shift, instead of having different define_insn patterns for shifts by different amounts. A new target option "-mmax-inline-shift=" has been added to allow tuning of the number of shift instructions to emit inline, instead of using a library helper function. gcc/ChangeLog: * config/msp430/constraints.md (K): Change unused constraint to constraint to a const_int between 1 and 19. (P): New constraint. * config/msp430/msp430-protos.h (msp430x_logical_shift_right): Remove. (msp430_expand_shift): New. (msp430_output_asm_shift_insns): New. * config/msp430/msp430.c (msp430_rtx_costs): Remove shift costs. (CSH): Remove. (msp430_expand_helper): Remove hard-coded generation of some inline shift insns. (use_helper_for_const_shift): New. (msp430_expand_shift): New. (msp430_output_asm_shift_insns): New. (msp430_print_operand): Add new 'W' operand selector. (msp430x_logical_shift_right): Remove. * config/msp430/msp430.md (HPSI): New define_mode_iterator. (HDI): Likewise. (any_shift): New define_code_iterator. (shift_insn): New define_code_attr. Adjust unnamed insn patterns searched for by combine. (ashlhi3): Remove. (slli_1): Remove. (430x_shift_left): Remove. (slll_1): Remove. (slll_2): Remove. (ashlsi3): Remove. (ashldi3): Remove. (ashrhi3): Remove. (srai_1): Remove. (430x_arithmetic_shift_right): Remove. (srap_1): Remove. (srap_2): Remove. (sral_1): Remove. (sral_2): Remove. (ashrsi3): Remove. (ashrdi3): Remove. (lshrhi3): Remove. (srli_1): Remove. (430x_logical_shift_right): Remove. (srlp_1): Remove. (srll_1): Remove. (srll_2x): Remove. (lshrsi3): Remove. (lshrdi3): Remove. (3): New define_expand. (hi3_430): New define_insn. (si3_const): Likewise. (ashl3_430x): Likewise. (ashr3_430x): Likewise. (lshr3_430x): Likewise. (*bitbranch4_z): Replace renamed predicate msp430_bitpos with const_0_to_15_operand. * config/msp430/msp430.opt: New option -mmax-inline-shift=. * config/msp430/predicates.md (const_1_to_8_operand): New predicate. (const_0_to_15_operand): Rename msp430_bitpos predicate. (const_1_to_19_operand): New predicate. * doc/invoke.texi: Document -mmax-inline-shift=. libgcc/ChangeLog: * config/msp430/slli.S (__gnu_mspabi_sllp): New. * config/msp430/srai.S (__gnu_mspabi_srap): New. * config/msp430/srli.S (__gnu_mspabi_srlp): New. gcc/testsuite/ChangeLog: * gcc.target/msp430/emulate-srli.c: Fix expected assembler text. * gcc.target/msp430/max-inline-shift-430-no-opt.c: New test. * gcc.target/msp430/max-inline-shift-430.c: New test. * gcc.target/msp430/max-inline-shift-430x.c: New test. --- libgcc/config/msp430/slli.S | 15 +++++++++++++++ libgcc/config/msp430/srai.S | 15 +++++++++++++++ libgcc/config/msp430/srli.S | 16 ++++++++++++++++ 3 files changed, 46 insertions(+) (limited to 'libgcc') diff --git a/libgcc/config/msp430/slli.S b/libgcc/config/msp430/slli.S index c31e2d5..b22622e 100644 --- a/libgcc/config/msp430/slli.S +++ b/libgcc/config/msp430/slli.S @@ -65,6 +65,21 @@ __mspabi_slli: RET #endif +#ifdef __MSP430X__ + .section .text.__gnu_mspabi_sllp +1: ADDA #-1,R13 + ADDA R12,R12 + .global __gnu_mspabi_sllp +__gnu_mspabi_sllp: + CMP #0,R13 + JNZ 1b +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif /* __MSP430X_LARGE__ */ +#endif /* __MSP430X__ */ + /* Logical Left Shift - R12:R13 -> R12:R13. */ .section .text.__mspabi_slll_n diff --git a/libgcc/config/msp430/srai.S b/libgcc/config/msp430/srai.S index d4a47fa..0100a36 100644 --- a/libgcc/config/msp430/srai.S +++ b/libgcc/config/msp430/srai.S @@ -64,6 +64,21 @@ __mspabi_srai: RET #endif +#ifdef __MSP430X__ + .section .text.__gnu_mspabi_srap +1: ADDA #-1,R13 + RRAX.A R12,R12 + .global __gnu_mspabi_srap +__gnu_mspabi_srap: + CMP #0,R13 + JNZ 1b +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif /* __MSP430X_LARGE__ */ +#endif /* __MSP430X__ */ + /* Arithmetic Right Shift - R12:R13 -> R12:R13. */ .section .text.__mspabi_sral_n diff --git a/libgcc/config/msp430/srli.S b/libgcc/config/msp430/srli.S index 838c4bc..50db47c 100644 --- a/libgcc/config/msp430/srli.S +++ b/libgcc/config/msp430/srli.S @@ -66,6 +66,22 @@ __mspabi_srli: RET #endif +#ifdef __MSP430X__ + .section .text.__gnu_mspabi_srlp +1: ADDA #-1,R13 + CLRC + RRCX.A R12,R12 + .global __gnu_mspabi_srlp +__gnu_mspabi_srlp: + CMP #0,R13 + JNZ 1b +#ifdef __MSP430X_LARGE__ + RETA +#else + RET +#endif /* __MSP430X_LARGE__ */ +#endif /* __MSP430X__ */ + /* Logical Right Shift - R12:R13 -> R12:R13. */ .section .text.__mspabi_srll_n -- cgit v1.1 From 57ea089421a3cfce936f91f3c0c92bf95ac71da1 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Thu, 27 Aug 2020 00:16:27 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 588b6f4..ccfd6f6 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,9 @@ +2020-08-26 Jozef Lawrynowicz + + * config/msp430/slli.S (__gnu_mspabi_sllp): New. + * config/msp430/srai.S (__gnu_mspabi_srap): New. + * config/msp430/srli.S (__gnu_mspabi_srlp): New. + 2020-08-13 Kwok Cheung Yeung * config/nvptx/atomic.c: New. -- cgit v1.1 From 7b9c26519e6aa07a0709c5c6fcc2b9a6ba050e7a Mon Sep 17 00:00:00 2001 From: Tom de Vries Date: Wed, 9 Sep 2020 18:43:13 +0200 Subject: [nvptx, libgcc] Fix Wbuiltin-declaration-mismatch in atomic.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When building for target nvptx, we get this and similar warnings for libgcc: ... src/libgcc/config/nvptx/atomic.c:39:1: warning: conflicting types for \ built-in function ‘__sync_val_compare_and_swap_1’; expected \ ‘unsigned char(volatile void *, unsigned char, unsigned char)’ \ [-Wbuiltin-declaration-mismatch] ... Fix this by making sure in atomic.c that the pointers used are of type 'volatile void *'. Tested by rebuilding atomic.c. libgcc/ChangeLog: * config/nvptx/atomic.c (__SYNC_SUBWORD_COMPARE_AND_SWAP): Fix Wbuiltin-declaration-mismatch. --- libgcc/config/nvptx/atomic.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'libgcc') diff --git a/libgcc/config/nvptx/atomic.c b/libgcc/config/nvptx/atomic.c index e1ea078..60f21f3 100644 --- a/libgcc/config/nvptx/atomic.c +++ b/libgcc/config/nvptx/atomic.c @@ -36,10 +36,13 @@ #define __SYNC_SUBWORD_COMPARE_AND_SWAP(TYPE, SIZE) \ \ TYPE \ -__sync_val_compare_and_swap_##SIZE (TYPE *ptr, TYPE oldval, TYPE newval) \ +__sync_val_compare_and_swap_##SIZE (volatile void *vptr, TYPE oldval, \ + TYPE newval) \ { \ - unsigned int *wordptr = (unsigned int *)((__UINTPTR_TYPE__ ) ptr & ~3UL); \ - int shift = ((__UINTPTR_TYPE__ ) ptr & 3UL) * 8; \ + volatile TYPE *ptr = vptr; \ + volatile unsigned int *wordptr \ + = (volatile unsigned int *)((__UINTPTR_TYPE__) ptr & ~3UL); \ + int shift = ((__UINTPTR_TYPE__) ptr & 3UL) * 8; \ unsigned int valmask = (1 << (SIZE * 8)) - 1; \ unsigned int wordmask = ~(valmask << shift); \ unsigned int oldword = *wordptr; \ @@ -64,7 +67,8 @@ __sync_val_compare_and_swap_##SIZE (TYPE *ptr, TYPE oldval, TYPE newval) \ } \ \ bool \ -__sync_bool_compare_and_swap_##SIZE (TYPE *ptr, TYPE oldval, TYPE newval) \ +__sync_bool_compare_and_swap_##SIZE (volatile void *ptr, TYPE oldval, \ + TYPE newval) \ { \ return __sync_val_compare_and_swap_##SIZE (ptr, oldval, newval) == oldval; \ } -- cgit v1.1 From 80f86e78ac0b8a54e2ad208782a583d53f397aa3 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Thu, 10 Sep 2020 00:16:28 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index ccfd6f6..cc66cc4b 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,8 @@ +2020-09-09 Tom de Vries + + * config/nvptx/atomic.c (__SYNC_SUBWORD_COMPARE_AND_SWAP): Fix + Wbuiltin-declaration-mismatch. + 2020-08-26 Jozef Lawrynowicz * config/msp430/slli.S (__gnu_mspabi_sllp): New. -- cgit v1.1 From 03380ecc3824f3f2fb7df86c21cf37f791904356 Mon Sep 17 00:00:00 2001 From: Jojo R Date: Wed, 16 Sep 2020 18:34:41 +0800 Subject: C-SKY: Enable crtbegin/crtend.o of libgcc for elf target libgcc/ChangeLog: * config.host (C-SKY): Enable crtbegin/crtend.o of libgcc for elf target. --- libgcc/config.host | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'libgcc') diff --git a/libgcc/config.host b/libgcc/config.host index 7a3e29d..dbb378f 100644 --- a/libgcc/config.host +++ b/libgcc/config.host @@ -579,7 +579,7 @@ cris-*-elf) ;; csky-*-elf*) tmake_file="csky/t-csky t-fdpbit" - extra_parts="$extra_parts crti.o crtn.o" + extra_parts="crtbegin.o crtend.o crti.o crtn.o" ;; csky-*-linux*) tmake_file="$tmake_file csky/t-csky t-slibgcc-libgcc t-fdpbit csky/t-linux-csky" -- cgit v1.1 From ecde1b0a467127714872785b9935fe7c580778f0 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Thu, 17 Sep 2020 00:16:31 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index cc66cc4b..42585c8 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,7 @@ +2020-09-16 Jojo R + + * config.host (C-SKY): Enable crtbegin/crtend.o of libgcc for elf target. + 2020-09-09 Tom de Vries * config/nvptx/atomic.c (__SYNC_SUBWORD_COMPARE_AND_SWAP): Fix -- cgit v1.1 From ec7ef3042106fd5981bfaa86dc32965a508d05f3 Mon Sep 17 00:00:00 2001 From: Wei Wentao Date: Thu, 17 Sep 2020 10:40:23 +0100 Subject: aarch64: Fixed unused variable warning in aarch64-unwind.h libgcc/ * config/aarch64/aarch64-unwind.h (aarch64_demangle_return_addr): Fix unused variable warning. --- libgcc/config/aarch64/aarch64-unwind.h | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'libgcc') diff --git a/libgcc/config/aarch64/aarch64-unwind.h b/libgcc/config/aarch64/aarch64-unwind.h index 3c5f85b..719b58c 100644 --- a/libgcc/config/aarch64/aarch64-unwind.h +++ b/libgcc/config/aarch64/aarch64-unwind.h @@ -55,7 +55,8 @@ aarch64_cie_signed_with_b_key (struct _Unwind_Context *context) static inline void * aarch64_demangle_return_addr (struct _Unwind_Context *context, - _Unwind_FrameState *fs, _Unwind_Word addr_word) + _Unwind_FrameState *fs ATTRIBUTE_UNUSED, + _Unwind_Word addr_word) { void *addr = (void *)addr_word; if (context->flags & RA_SIGNED_BIT) -- cgit v1.1 From 9fcedcc39153cb3cfa08ebab20aef6cdfb9ed609 Mon Sep 17 00:00:00 2001 From: Christophe Lyon Date: Fri, 11 Sep 2020 11:43:56 +0000 Subject: libgcc/config/arm/fp16.c: Make _internal functions static inline MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch makes the *_internal functions 'static inline' to avoid these warnings during the build: /libgcc/config/arm/fp16.c:169:1: warning: no previous prototype for '__gnu_h2f_internal' [-Wmissing-prototypes] /libgcc/config/arm/fp16.c:194:1: warning: no previous prototype for '__gnu_f2h_ieee' [-Wmissing-prototypes] /libgcc/config/arm/fp16.c:200:1: warning: no previous prototype for '__gnu_h2f_ieee' [-Wmissing-prototypes] /libgcc/config/arm/fp16.c:206:1: warning: no previous prototype for '__gnu_f2h_alternative' [-Wmissing-prototypes] /libgcc/config/arm/fp16.c:212:1: warning: no previous prototype for '__gnu_h2f_alternative' [-Wmissing-prototypes] /libgcc/config/arm/fp16.c:218:1: warning: no previous prototype for '__gnu_d2h_ieee' [-Wmissing-prototypes] /libgcc/config/arm/fp16.c:224:1: warning: no previous prototype for '__gnu_d2h_alternative' [-Wmissing-prototypes] 2020-09-11 Torbjörn SVENSSON Christophe Lyon libgcc/ * config/arm/fp16.c (__gnu_h2f_internal): Add 'static inline' qualifier. (__gnu_f2h_ieee, __gnu_h2f_ieee, __gnu_f2h_alternative) (__gnu_h2f_alternative,__gnu_d2h_ieee, __gnu_d2h_alternative): Add missing prototypes. --- libgcc/config/arm/fp16.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'libgcc') diff --git a/libgcc/config/arm/fp16.c b/libgcc/config/arm/fp16.c index e8f7afb..3664503 100644 --- a/libgcc/config/arm/fp16.c +++ b/libgcc/config/arm/fp16.c @@ -52,6 +52,14 @@ binary64 = 52 /* significand. */ }; +/* Function prototypes. */ +unsigned short __gnu_f2h_ieee (unsigned int a); +unsigned int __gnu_h2f_ieee (unsigned short a); +unsigned short __gnu_f2h_alternative (unsigned int x); +unsigned int __gnu_h2f_alternative (unsigned short a); +unsigned short __gnu_d2h_ieee (unsigned long long a); +unsigned short __gnu_d2h_alternative (unsigned long long x); + static inline unsigned short __gnu_float2h_internal (const struct format* fmt, unsigned long long a, int ieee) @@ -165,7 +173,7 @@ __gnu_d2h_internal (unsigned long long a, int ieee) return __gnu_float2h_internal (&binary64, a, ieee); } -unsigned int +static inline unsigned int __gnu_h2f_internal(unsigned short a, int ieee) { unsigned int sign = (unsigned int)(a & 0x8000) << 16; -- cgit v1.1 From 2aad20c094b9ec47c678b4ca219a7342f4f22376 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Fri, 18 Sep 2020 00:16:24 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 42585c8..2e9392f 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,17 @@ +2020-09-17 Torbjörn SVENSSON + Christophe Lyon + + * config/arm/fp16.c (__gnu_h2f_internal): Add 'static inline' + qualifier. + (__gnu_f2h_ieee, __gnu_h2f_ieee, __gnu_f2h_alternative) + (__gnu_h2f_alternative,__gnu_d2h_ieee, __gnu_d2h_alternative): Add + missing prototypes. + +2020-09-17 Wei Wentao + + * config/aarch64/aarch64-unwind.h (aarch64_demangle_return_addr): Fix + unused variable warning. + 2020-09-16 Jojo R * config.host (C-SKY): Enable crtbegin/crtend.o of libgcc for elf target. -- cgit v1.1 From 4ecf368f4b4223fb2df4f3887429dfbb48852e38 Mon Sep 17 00:00:00 2001 From: Sergei Trofimovich Date: Sun, 6 Sep 2020 12:13:54 +0100 Subject: gcov: fix TOPN streaming from shared libraries Before the change gcc did not stream correctly TOPN counters if counters belonged to a non-local shared object. As a result zero-section optimization generated TOPN sections in a form not recognizable by '__gcov_merge_topn'. The problem happens because in a case of multiple shared objects '__gcov_merge_topn' function is present in address space multiple times (once per each object). The fix is to never rely on function address and predicate on TOPN counter types. libgcc/ChangeLog: PR gcov-profile/96913 * libgcov-driver.c (write_one_data): Avoid function pointer comparison in TOP streaming decision. --- libgcc/libgcov-driver.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'libgcc') diff --git a/libgcc/libgcov-driver.c b/libgcc/libgcov-driver.c index 5891426..e53e4dc 100644 --- a/libgcc/libgcov-driver.c +++ b/libgcc/libgcov-driver.c @@ -424,7 +424,7 @@ write_one_data (const struct gcov_info *gi_ptr, n_counts = ci_ptr->num; - if (gi_ptr->merge[t_ix] == __gcov_merge_topn) + if (t_ix == GCOV_COUNTER_V_TOPN || t_ix == GCOV_COUNTER_V_INDIR) write_top_counters (ci_ptr, t_ix, n_counts); else { -- cgit v1.1 From 521d2711409b1af89d2d802879c2bbd716200cb6 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Wed, 23 Sep 2020 00:16:27 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 2e9392f..842d814 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,9 @@ +2020-09-22 Sergei Trofimovich + + PR gcov-profile/96913 + * libgcov-driver.c (write_one_data): Avoid function pointer + comparison in TOP streaming decision. + 2020-09-17 Torbjörn SVENSSON Christophe Lyon -- cgit v1.1 From 3c11f25fb8bc3eaed35a90eece9d2f9444373513 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20Chigot?= Date: Tue, 18 Aug 2020 14:05:33 +0200 Subject: aix: Use $(AR) without -X32_64 to build FAT libraries. AIX FAT libraries should be built with the version of AR chosen by configure. The GNU Make $(AR) variable includes the AIX -X32_64 option needed by the default Makefile rules to accept both 32 bit and 64 bit object files. The -X32_64 option conflicts with ar archiving objects of the same name used to build FAT libraries. This patch changes the Makefile fragments for AIX FAT libraries to use $(AR), but strips the -X32_64 option from the Make variable. libgcc/ChangeLog: 2020-09-27 Clement Chigot * config/rs6000/t-slibgcc-aix: Use $(AR) without -X32_64. libatomic/ChangeLog: 2020-09-27 Clement Chigot * config/t-aix: Use $(AR) without -X32_64. libgomp/ChangeLog: 2020-09-27 Clement Chigot * config/t-aix: Use $(AR) without -X32_64. libstdc++-v3/ChangeLog: 2020-09-27 Clement Chigot * config/os/aix/t-aix: Use $(AR) without -X32_64. libgfortran/ChangeLog: 2020-09-27 Clement Chigot * config/t-aix: Use $(AR) without -X32_64. --- libgcc/config/rs6000/t-slibgcc-aix | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) (limited to 'libgcc') diff --git a/libgcc/config/rs6000/t-slibgcc-aix b/libgcc/config/rs6000/t-slibgcc-aix index b3bdda6..a6c5cee 100644 --- a/libgcc/config/rs6000/t-slibgcc-aix +++ b/libgcc/config/rs6000/t-slibgcc-aix @@ -92,27 +92,28 @@ AR_FLAGS_FOR_TARGET = -X32_64 ifeq ($(MULTIBUILDTOP),) BITS=$(shell if test -z "`$(CC) -x c -E /dev/null -g3 -o - | grep 64BIT`" ; then \ echo '64'; else echo '32'; fi) +ARX=$(shell echo $(AR) | sed -e 's/-X[^ ]*//g') all: all-multi ifeq ($(enable_shared),yes) - ar -X$(BITS) x ../ppc$(BITS)/libgcc/libgcc_s.a shr.o - ar -X$(BITS) rc ./libgcc_s.a shr.o + $(ARX) -X$(BITS) x ../ppc$(BITS)/libgcc/libgcc_s.a shr.o + $(ARX) -X$(BITS) rc ./libgcc_s.a shr.o rm -f shr.o - ar -X$(BITS) x ../pthread/ppc$(BITS)/libgcc/libgcc_s.a shr.o - ar -X$(BITS) rc ../pthread/libgcc/libgcc_s.a shr.o + $(ARX) -X$(BITS) x ../pthread/ppc$(BITS)/libgcc/libgcc_s.a shr.o + $(ARX) -X$(BITS) rc ../pthread/libgcc/libgcc_s.a shr.o rm -f shr.o endif - ar -X$(BITS) rc libgcc.a \ + $(ARX) -X$(BITS) rc libgcc.a \ $(addprefix ../ppc$(BITS)/libgcc/,$(libgcc-objects)) - ar -X$(BITS) rc libgcc_eh.a \ + $(ARX) -X$(BITS) rc libgcc_eh.a \ $(addprefix ../ppc$(BITS)/libgcc/,$(libgcc-eh-objects)) - ar -X$(BITS) rc ../pthread/libgcc/libgcc.a \ + $(ARX) -X$(BITS) rc ../pthread/libgcc/libgcc.a \ $(addprefix ../pthread/ppc$(BITS)/libgcc/,$(libgcc-objects)) - ar -X$(BITS) rc ../pthread/libgcc/libgcc_eh.a \ + $(ARX) -X$(BITS) rc ../pthread/libgcc/libgcc_eh.a \ $(addprefix ../pthread/ppc$(BITS)/libgcc/,$(libgcc-eh-objects)) ifeq ($(enable_gcov),yes) - ar -X$(BITS) rc libgcov.a \ + $(ARX) -X$(BITS) rc libgcov.a \ $(addprefix ../ppc$(BITS)/libgcc/,$(libgcov-objects)) - ar -X$(BITS) rc ../pthread/libgcc/libgcov.a \ + $(ARX) -X$(BITS) rc ../pthread/libgcc/libgcov.a \ $(addprefix ../pthread/ppc$(BITS)/libgcc/,$(libgcov-objects)) endif $(MAKE) install-leaf DESTDIR=$(gcc_objdir) \ -- cgit v1.1 From 4383c595ce5cc6ef6bcb45d2c9caf43002afbc4f Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Mon, 28 Sep 2020 00:16:21 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 842d814..ce78a23 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,7 @@ +2020-09-27 Clement Chigot + + * config/rs6000/t-slibgcc-aix: Use $(AR) without -X32_64. + 2020-09-22 Sergei Trofimovich PR gcov-profile/96913 -- cgit v1.1 From 1923f615f726efd02b8b1845740adabca67146d7 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Mon, 28 Sep 2020 11:26:53 +0100 Subject: aarch64: Add HF routines to libgcc_s.so The libgcc HF support routines were being linked into libgcc_s.so, but weren't being exported. libgcc/ * config/aarch64/libgcc-softfp.ver: New file. * config/aarch64/t-softfp (SHLIB_MAPFILES): Add it. --- libgcc/config/aarch64/libgcc-softfp.ver | 28 ++++++++++++++++++++++++++++ libgcc/config/aarch64/t-softfp | 1 + 2 files changed, 29 insertions(+) create mode 100644 libgcc/config/aarch64/libgcc-softfp.ver (limited to 'libgcc') diff --git a/libgcc/config/aarch64/libgcc-softfp.ver b/libgcc/config/aarch64/libgcc-softfp.ver new file mode 100644 index 0000000..b51a3de --- /dev/null +++ b/libgcc/config/aarch64/libgcc-softfp.ver @@ -0,0 +1,28 @@ +# Copyright (C) 2020 Free Software Foundation, Inc. +# +# This file is part of GCC. +# +# GCC is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3, or (at your option) +# any later version. +# +# GCC is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with GCC; see the file COPYING3. If not see +# . + +GCC_11.0 { + __divhc3 + __extendhftf2 + __fixhfti + __fixunshfti + __floattihf + __floatuntihf + __mulhc3 + __trunctfhf2 +} diff --git a/libgcc/config/aarch64/t-softfp b/libgcc/config/aarch64/t-softfp index c4ce0dc..981ced7 100644 --- a/libgcc/config/aarch64/t-softfp +++ b/libgcc/config/aarch64/t-softfp @@ -8,3 +8,4 @@ softfp_extras := fixhfti fixunshfti floattihf floatuntihf TARGET_LIBGCC2_CFLAGS += -Wno-missing-prototypes LIB2ADD += $(srcdir)/config/aarch64/sfp-exceptions.c +SHLIB_MAPFILES += $(srcdir)/config/aarch64/libgcc-softfp.ver -- cgit v1.1 From e84761c6f32fa6e9b7dccc4245231a7ff4d7da61 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Tue, 29 Sep 2020 00:16:30 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index ce78a23..afdc229 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,8 @@ +2020-09-28 Richard Sandiford + + * config/aarch64/libgcc-softfp.ver: New file. + * config/aarch64/t-softfp (SHLIB_MAPFILES): Add it. + 2020-09-27 Clement Chigot * config/rs6000/t-slibgcc-aix: Use $(AR) without -X32_64. -- cgit v1.1 From 090d3f5ab390e74caa1f93b7d9f5074c62ba9d07 Mon Sep 17 00:00:00 2001 From: "Maciej W. Rozycki" Date: Tue, 29 Sep 2020 01:20:01 +0100 Subject: RISC-V/libgcc: Use `-fasynchronous-unwind-tables' for LIB2_DIVMOD_FUNCS Use `-fasynchronous-unwind-tables' rather than `-fexceptions -fnon-call-exceptions' in LIB2_DIVMOD_FUNCS compilation flags so as to provide unwind tables for the affected functions while not pulling the unwinder proper, which is not required here. Beyond saving program space it fixes a RISC-V glibc build error due to unsatisfied `malloc' and `free' references from the unwinder causing link errors with `ld.so' where libgcc has been built at -O0. libgcc/ * config/riscv/t-elf (LIB2_DIVMOD_EXCEPTION_FLAGS): New variable. --- libgcc/config/riscv/t-elf | 2 ++ 1 file changed, 2 insertions(+) (limited to 'libgcc') diff --git a/libgcc/config/riscv/t-elf b/libgcc/config/riscv/t-elf index dbc8f85..415e1ff 100644 --- a/libgcc/config/riscv/t-elf +++ b/libgcc/config/riscv/t-elf @@ -4,3 +4,5 @@ LIB2ADD += $(srcdir)/config/riscv/save-restore.S \ $(srcdir)/config/riscv/div.S \ $(srcdir)/config/riscv/atomic.c \ +# Avoid the full unwinder being pulled along with the division libcalls. +LIB2_DIVMOD_EXCEPTION_FLAGS := -fasynchronous-unwind-tables -- cgit v1.1 From 93bca37c0a6dec354592676233e40e66741fdbe4 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Wed, 30 Sep 2020 00:16:29 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index afdc229..da89eb9 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,8 @@ +2020-09-29 Maciej W. Rozycki + + * config/riscv/t-elf (LIB2_DIVMOD_EXCEPTION_FLAGS): New + variable. + 2020-09-28 Richard Sandiford * config/aarch64/libgcc-softfp.ver: New file. -- cgit v1.1 From c6be439b37702f6ac4c2fc447c6f3ed1042b80a3 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Mon, 28 Sep 2020 16:23:01 +0930 Subject: [RS6000] -mno-minimal-toc vs. power10 pcrelative We've had this hack in the libgcc config to build libgcc with -mcmodel=small for powerpc64 for a long time. It wouldn't be a bad thing if someone who knows the multilib machinery well could arrange for -mcmodel=small to be passed just for ppc64 when building for earlier than power10. But for now, make -mno-minimal-toc do nothing when pcrel. Which will do the right thing for any project that has copied libgcc's trick. We want this if configuring using --with-cpu=power10 to build a power10 pcrel libgcc. --mcmodel=small turns off pcrel. gcc/ * config/rs6000/linux64.h (SUBSUBTARGET_OVERRIDE_OPTIONS): Don't set -mcmodel=small for -mno-minimal-toc when pcrel. libgcc/ * config/rs6000/t-linux: Document purpose of -mno-minimal-toc. --- libgcc/config/rs6000/t-linux | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) (limited to 'libgcc') diff --git a/libgcc/config/rs6000/t-linux b/libgcc/config/rs6000/t-linux index 4f6d4c4..ed82194 100644 --- a/libgcc/config/rs6000/t-linux +++ b/libgcc/config/rs6000/t-linux @@ -1,3 +1,8 @@ SHLIB_MAPFILES += $(srcdir)/config/rs6000/libgcc-glibc.ver -HOST_LIBGCC2_CFLAGS += -mlong-double-128 -mno-minimal-toc +HOST_LIBGCC2_CFLAGS += -mlong-double-128 + +# This is a way of selecting -mcmodel=small for ppc64, which gives +# smaller and faster libgcc code. Directly specifying -mcmodel=small +# would need to take into account targets for which -mcmodel is invalid. +HOST_LIBGCC2_CFLAGS += -mno-minimal-toc -- cgit v1.1 From 2dd7b93778d551b6981c8086ecb38e26f677bd2b Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Mon, 28 Sep 2020 16:42:33 +0930 Subject: [RS6000] Adjust gcc asm for power10 Generate assembly with .localentry,1 functions using @notoc calls. This patch makes libgcc.a asm look the same as power10 pcrel as far as toc/notoc is concerned. Otherwise calling between functions that advertise as using the TOC and those that don't, will require linker call stubs in statically linked code. gcc/ * config/rs6000/ppc-asm.h: Support __PCREL__ code. libgcc/ * config/rs6000/morestack.S, * config/rs6000/tramp.S: Support __PCREL__ code. libitm/ * config/powerpc/sjlj.S: Support __PCREL__ code. --- libgcc/config/rs6000/morestack.S | 30 +++++++++++++++++++++--------- libgcc/config/rs6000/tramp.S | 6 ++++++ 2 files changed, 27 insertions(+), 9 deletions(-) (limited to 'libgcc') diff --git a/libgcc/config/rs6000/morestack.S b/libgcc/config/rs6000/morestack.S index 1b8ebb5..ac33c88 100644 --- a/libgcc/config/rs6000/morestack.S +++ b/libgcc/config/rs6000/morestack.S @@ -55,11 +55,18 @@ .type name,@function; \ name##: +#ifdef __PCREL__ +#define ENTRY(name) \ + ENTRY0(name); \ + .localentry name, 1 +#define JUMP_TARGET(name) name##@notoc +#else #define ENTRY(name) \ ENTRY0(name); \ 0: addis %r2,%r12,.TOC.-0b@ha; \ addi %r2,%r2,.TOC.-0b@l; \ .localentry name, .-name +#endif #else @@ -81,6 +88,9 @@ BODY_LABEL(name)##: #define SIZE(name) .size name, .-BODY_LABEL(name) +#ifndef JUMP_TARGET +#define JUMP_TARGET(name) name +#endif .text # Just like __morestack, but with larger excess allocation @@ -156,7 +166,7 @@ ENTRY0(__morestack) stdu %r1,-MORESTACK_FRAMESIZE(%r1) # void __morestack_block_signals (void) - bl __morestack_block_signals + bl JUMP_TARGET(__morestack_block_signals) # void *__generic_morestack (size_t *pframe_size, # void *old_stack, @@ -164,7 +174,7 @@ ENTRY0(__morestack) addi %r3,%r29,NEWSTACKSIZE_SAVE mr %r4,%r29 li %r5,0 # no copying from old stack - bl __generic_morestack + bl JUMP_TARGET(__generic_morestack) # Start using new stack stdu %r29,-32(%r3) # back-chain @@ -183,7 +193,7 @@ ENTRY0(__morestack) std %r3,-0x7000-64(%r13) # tcbhead_t.__private_ss # void __morestack_unblock_signals (void) - bl __morestack_unblock_signals + bl JUMP_TARGET(__morestack_unblock_signals) # Set up for a call to the target function, located 3 # instructions after __morestack's return address. @@ -218,11 +228,11 @@ ENTRY0(__morestack) std %r10,PARAMREG_SAVE+56(%r29) #endif - bl __morestack_block_signals + bl JUMP_TARGET(__morestack_block_signals) # void *__generic_releasestack (size_t *pavailable) addi %r3,%r29,NEWSTACKSIZE_SAVE - bl __generic_releasestack + bl JUMP_TARGET(__generic_releasestack) # Reset __private_ss stack guard to value for old stack ld %r12,NEWSTACKSIZE_SAVE(%r29) @@ -231,7 +241,7 @@ ENTRY0(__morestack) .LEHE0: std %r3,-0x7000-64(%r13) # tcbhead_t.__private_ss - bl __morestack_unblock_signals + bl JUMP_TARGET(__morestack_unblock_signals) # Use old stack again. mr %r1,%r29 @@ -260,13 +270,15 @@ cleanup: std %r3,PARAMREG_SAVE(%r29) # Save exception header # size_t __generic_findstack (void *stack) mr %r3,%r29 - bl __generic_findstack + bl JUMP_TARGET(__generic_findstack) sub %r3,%r29,%r3 addi %r3,%r3,BACKOFF std %r3,-0x7000-64(%r13) # tcbhead_t.__private_ss ld %r3,PARAMREG_SAVE(%r29) - bl _Unwind_Resume + bl JUMP_TARGET(_Unwind_Resume) +#ifndef __PCREL__ nop +#endif .cfi_endproc SIZE (__morestack) @@ -310,7 +322,7 @@ ENTRY(__stack_split_initialize) # void __generic_morestack_set_initial_sp (void *sp, size_t len) mr %r3,%r1 li %r4, 0x4000 - b __generic_morestack_set_initial_sp + b JUMP_TARGET(__generic_morestack_set_initial_sp) # The lack of .cfi_endproc here is deliberate. This function and the # following ones can all use the default FDE. SIZE (__stack_split_initialize) diff --git a/libgcc/config/rs6000/tramp.S b/libgcc/config/rs6000/tramp.S index 9b8fcfe..b165faa 100644 --- a/libgcc/config/rs6000/tramp.S +++ b/libgcc/config/rs6000/tramp.S @@ -140,15 +140,21 @@ trampoline_size = .-trampoline_initial /* R5 = function address */ /* R6 = static chain */ +#ifndef __PCREL__ .pushsection ".toc","aw" .LC0: .quad trampoline_initial-8 .popsection +#endif FUNC_START(__trampoline_setup) .cfi_startproc +#ifdef __PCREL__ + pla 7,(trampoline_initial-8)@pcrel +#else addis 7,2,.LC0@toc@ha ld 7,.LC0@toc@l(7) /* trampoline address -8 */ +#endif li r8,trampoline_size /* verify that the trampoline is big enough */ cmpw cr1,r8,r4 -- cgit v1.1 From 6c2675fa2bbcfe37308af593edb18e2c1c8eabf0 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Fri, 2 Oct 2020 00:16:27 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index da89eb9..386d791 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,12 @@ +2020-10-01 Alan Modra + + * config/rs6000/morestack.S, + * config/rs6000/tramp.S: Support __PCREL__ code. + +2020-10-01 Alan Modra + + * config/rs6000/t-linux: Document purpose of -mno-minimal-toc. + 2020-09-29 Maciej W. Rozycki * config/riscv/t-elf (LIB2_DIVMOD_EXCEPTION_FLAGS): New -- cgit v1.1 From 59a95143ddeb4939fe2336e8f86cbc908bfa8e1a Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Mon, 21 Sep 2020 12:17:01 -0700 Subject: x86: Add MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit For sources which can't use any vector instructions, and cannot be included for compiler intrinsics: $ echo "#include " | gcc -S -O2 -mno-sse -mno-mmx -x c - In file included from /usr/include/stdlib.h:1013, from /usr/lib/gcc/x86_64-redhat-linux/10/include/mm_malloc.h:27, from /usr/lib/gcc/x86_64-redhat-linux/10/include/xmmintrin.h:34, from /usr/lib/gcc/x86_64-redhat-linux/10/include/immintrin.h:29, from /usr/lib/gcc/x86_64-redhat-linux/10/include/x86intrin.h:32, from :1: /usr/include/bits/stdlib-float.h: In function ‘atof’: /usr/include/bits/stdlib-float.h:26:1: error: SSE register return with SSE disabled 26 | { | ^ $ libgcc/config/i386/shadow-stack-unwind.h has a workaround: /* NB: We need _get_ssp and _inc_ssp from . But we can't include which ends up including , which includes and unconditionally. But we can't include any libc system headers unconditionally from libgcc. Avoid including here by defining _IMMINTRIN_H_INCLUDED. */ #define _IMMINTRIN_H_INCLUDED #include #undef _IMMINTRIN_H_INCLUDED Add a standalone intrinsic header file, , to provide integer only intrinsics. All integer only intrinsics are placed in . and simply include . gcc/ PR target/97148 * config.gcc (extra_headers): Add x86gprintrin.h. * config/i386/adxintrin.h: Check _X86GPRINTRIN_H_INCLUDED for . * config/i386/bmi2intrin.h: Likewise. * config/i386/bmiintrin.h: Likewise. * config/i386/cetintrin.h: Likewise. * config/i386/cldemoteintrin.h: Likewise. * config/i386/clflushoptintrin.h: Likewise. * config/i386/clwbintrin.h: Likewise. * config/i386/enqcmdintrin.h: Likewise. * config/i386/fxsrintrin.h: Likewise. * config/i386/ia32intrin.h: Likewise. * config/i386/lwpintrin.h: Likewise. * config/i386/lzcntintrin.h: Likewise. * config/i386/movdirintrin.h: Likewise. * config/i386/pconfigintrin.h: Likewise. * config/i386/pkuintrin.h: Likewise. * config/i386/rdseedintrin.h: Likewise. * config/i386/rtmintrin.h: Likewise. * config/i386/serializeintrin.h: Likewise. * config/i386/tbmintrin.h: Likewise. * config/i386/tsxldtrkintrin.h: Likewise. * config/i386/waitpkgintrin.h: Likewise. * config/i386/wbnoinvdintrin.h: Likewise. * config/i386/xsavecintrin.h: Likewise. * config/i386/xsaveintrin.h: Likewise. * config/i386/xsaveoptintrin.h: Likewise. * config/i386/xsavesintrin.h: Likewise. * config/i386/xtestintrin.h: Likewise. * config/i386/immintrin.h: Include instead of , , , , , , , , , , , , , , , , , , , , and . (_wbinvd): Moved to config/i386/x86gprintrin.h. (_rdrand16_step): Likewise. (_rdrand32_step): Likewise. (_rdpid_u32): Likewise. (_readfsbase_u32): Likewise. (_readfsbase_u64): Likewise. (_readgsbase_u32): Likewise. (_readgsbase_u64): Likewise. (_writefsbase_u32): Likewise. (_writefsbase_u64): Likewise. (_writegsbase_u32): Likewise. (_writegsbase_u64): Likewise. (_rdrand64_step): Likewise. (_ptwrite64): Likewise. (_ptwrite32): Likewise. * config/i386/x86gprintrin.h: New file. * config/i386/x86intrin.h: Include . Don't include , , , , and . gcc/testsuite/ * gcc.target/i386/avx-1.c (__builtin_ia32_lwpval32): New to support included in . (__builtin_ia32_lwpval64): Likewise. (__builtin_ia32_lwpins32): Likewise. (__builtin_ia32_lwpins64): Likewise. (__builtin_ia32_bextri_u32): New to support included in . (__builtin_ia32_bextri_u64): Likewise. * gcc.target/i386/x86gprintrin-1.c: New test. * gcc.target/i386/x86gprintrin-2.c: Likewise. * gcc.target/i386/x86gprintrin-3.c: Likewise. * gcc.target/i386/x86gprintrin-4.c: Likewise. * gcc.target/i386/x86gprintrin-4a.c: Likewise. * gcc.target/i386/x86gprintrin-5.c: Likewise. * gcc.target/i386/x86gprintrin-5a.c: Likewise. * gcc.target/i386/x86gprintrin-5b.c: Likewise. * gcc.target/i386/x86gprintrin-6.c: Likewise. libgcc/ PR target/97148 * config/i386/shadow-stack-unwind.h: Include instead of . --- libgcc/config/i386/shadow-stack-unwind.h | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) (limited to 'libgcc') diff --git a/libgcc/config/i386/shadow-stack-unwind.h b/libgcc/config/i386/shadow-stack-unwind.h index 201b2153..ff979da 100644 --- a/libgcc/config/i386/shadow-stack-unwind.h +++ b/libgcc/config/i386/shadow-stack-unwind.h @@ -22,14 +22,7 @@ a copy of the GCC Runtime Library Exception along with this program; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ -/* NB: We need _get_ssp and _inc_ssp from . But we can't - include which ends up including , which - includes and unconditionally. But we can't - include any libc system headers unconditionally from libgcc. Avoid - including here by defining _IMMINTRIN_H_INCLUDED. */ -#define _IMMINTRIN_H_INCLUDED -#include -#undef _IMMINTRIN_H_INCLUDED +#include /* Unwind the shadow stack for EH. */ #undef _Unwind_Frames_Extra -- cgit v1.1 From c74a0e82fa305f52b84e5c4cd2c9e0d0e8e4f265 Mon Sep 17 00:00:00 2001 From: GCC Administrator Date: Sat, 10 Oct 2020 00:16:26 +0000 Subject: Daily bump. --- libgcc/ChangeLog | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'libgcc') diff --git a/libgcc/ChangeLog b/libgcc/ChangeLog index 386d791..83332b7 100644 --- a/libgcc/ChangeLog +++ b/libgcc/ChangeLog @@ -1,3 +1,9 @@ +2020-10-09 H.J. Lu + + PR target/97148 + * config/i386/shadow-stack-unwind.h: Include + instead of . + 2020-10-01 Alan Modra * config/rs6000/morestack.S, -- cgit v1.1