From f1af1326d269b1d8efb696a50c9e88d0ab6ec45e Mon Sep 17 00:00:00 2001 From: Marcus Comstedt Date: Fri, 19 Mar 2021 20:49:05 +0100 Subject: RISC-V: Update soft-fp config for big-endian libgcc/ * config/riscv/sfp-machine.h (__BYTE_ORDER): Set according to __BYTE_ORDER__. --- libgcc/config/riscv/sfp-machine.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'libgcc/config') diff --git a/libgcc/config/riscv/sfp-machine.h b/libgcc/config/riscv/sfp-machine.h index db26971..8adbf4b 100644 --- a/libgcc/config/riscv/sfp-machine.h +++ b/libgcc/config/riscv/sfp-machine.h @@ -128,7 +128,11 @@ do { \ #define __LITTLE_ENDIAN 1234 #define __BIG_ENDIAN 4321 +#if defined(__BYTE_ORDER__) && (__BYTE_ORDER__ == __ORDER_BIG_ENDIAN__) +#define __BYTE_ORDER __BIG_ENDIAN +#else #define __BYTE_ORDER __LITTLE_ENDIAN +#endif /* Define ALIASNAME as a strong alias for NAME. */ -- cgit v1.1 From 645bfc161987a12395869728b63ed01084d23c00 Mon Sep 17 00:00:00 2001 From: Michael Meissner Date: Mon, 29 Mar 2021 16:43:14 -0400 Subject: Require GLIBC 2.32 for Decimal/_Float128 conversions. In the patch that I applied on March 2nd, I had code to provide support for Decimal/_Float128 conversions if the user did not use at least GLIBC 2.32. It did this by using __ibm128 as an intermediate type. The trouble is __ibm128 cannot represent all of the numbers that _Float128 can, and you lose if you do this conversion. This patch removes this support. The dfp-bit.c functions now call the the __sprintfieee128 and __strtoieee128 functions to do the conversion. If the user does not have GLIBC, they will get a linker error that these functions do not exist. The float128 support functions are only built into the static libgcc, so there isn't an issue with having references to __strtoieee128 and __sprintfieee128 with older GLIBC libraries. As an added bonus, this patch eliminates the __sprintfkf function which included stdio.h to get a definition for the sprintf library function. This allows for building cross compilers without having to have a target stdio.h available. libgcc/ 2021-03-29 Michael Meissner * config/rs6000/t-float128 (fp128_decstr_funcs): Delete. (fp128_ppc_funcs): Do not add $(fp128_decstr_funcs). (fp128_decstr_objs): Delete. * dfp-bit.h: Call __sprintfieee128 to do conversions from _Float128 to a Decimal type. Call __strtoieee128 to do conversions from a Decimal type to _Float128. * config/rs6000/_sprintfkf.c: Delete file. * config/rs6000/_sprintfkf.h: Delete file. * config/rs6000/_strtokf.c: Delete file. * config/rs6000/_strtokf.h: Delete file. --- libgcc/config/rs6000/_sprintfkf.c | 58 --------------------------------------- libgcc/config/rs6000/_sprintfkf.h | 27 ------------------ libgcc/config/rs6000/_strtokf.c | 53 ----------------------------------- libgcc/config/rs6000/_strtokf.h | 27 ------------------ libgcc/config/rs6000/t-float128 | 13 +-------- 5 files changed, 1 insertion(+), 177 deletions(-) delete mode 100644 libgcc/config/rs6000/_sprintfkf.c delete mode 100644 libgcc/config/rs6000/_sprintfkf.h delete mode 100644 libgcc/config/rs6000/_strtokf.c delete mode 100644 libgcc/config/rs6000/_strtokf.h (limited to 'libgcc/config') diff --git a/libgcc/config/rs6000/_sprintfkf.c b/libgcc/config/rs6000/_sprintfkf.c deleted file mode 100644 index 2d624f1..0000000 --- a/libgcc/config/rs6000/_sprintfkf.c +++ /dev/null @@ -1,58 +0,0 @@ -/* Copyright (C) 1989-2021 Free Software Foundation, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify it under -the terms of the GNU General Public License as published by the Free -Software Foundation; either version 3, or (at your option) any later -version. - -GCC is distributed in the hope that it will be useful, but WITHOUT ANY -WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -for more details. - -Under Section 7 of GPL version 3, you are granted additional -permissions described in the GCC Runtime Library Exception, version -3.1, as published by the Free Software Foundation. - -You should have received a copy of the GNU General Public License and -a copy of the GCC Runtime Library Exception along with this program; -see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -. */ - -/* Conversion to IEEE 128-bit floating point from string using snprintf. */ - -#include -#include -#include -#include -#include -#include <_sprintfkf.h> - -/* This function must be built with IBM 128-bit as long double, so that we can - access the strfroml function if do not have an IEEE 128-bit version, and if - that is not available, use sprintf. */ -#if !defined(__LONG_DOUBLE_128__) || !defined(__LONG_DOUBLE_IBM128__) -#error "Long double is not IBM 128-bit" -#endif - -/* If the user is using GLIBC 2.32, we can use the __snprintfieee128 function. - - If we are linked against an earlier library, we will have fake it by - converting the value to long double, and using sprintf to do the conversion. - This isn't ideal, as IEEE 128-bit has more exponent range than IBM - 128-bit. */ - -extern int __sprintfieee128 (char *restrict, const char *restrict, ...) - __attribute__ ((__weak__)); - -int __sprintfkf (char *restrict string, - const char *restrict format, - _Float128 number) -{ - if (__sprintfieee128) - return __sprintfieee128 (string, format, number); - - return sprintf (string, format, (long double) number); -} diff --git a/libgcc/config/rs6000/_sprintfkf.h b/libgcc/config/rs6000/_sprintfkf.h deleted file mode 100644 index de9d713..0000000 --- a/libgcc/config/rs6000/_sprintfkf.h +++ /dev/null @@ -1,27 +0,0 @@ -/* Copyright (C) 1989-2021 Free Software Foundation, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify it under -the terms of the GNU General Public License as published by the Free -Software Foundation; either version 3, or (at your option) any later -version. - -GCC is distributed in the hope that it will be useful, but WITHOUT ANY -WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -for more details. - -Under Section 7 of GPL version 3, you are granted additional -permissions described in the GCC Runtime Library Exception, version -3.1, as published by the Free Software Foundation. - -You should have received a copy of the GNU General Public License and -a copy of the GCC Runtime Library Exception along with this program; -see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -. */ - -/* Declaration of the conversion function to IEEE 128-bit floating point from - string using snprintf. */ - -extern int __sprintfkf (char *restrict, const char *restrict, _Float128); diff --git a/libgcc/config/rs6000/_strtokf.c b/libgcc/config/rs6000/_strtokf.c deleted file mode 100644 index dc13534..0000000 --- a/libgcc/config/rs6000/_strtokf.c +++ /dev/null @@ -1,53 +0,0 @@ -/* Copyright (C) 1989-2021 Free Software Foundation, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify it under -the terms of the GNU General Public License as published by the Free -Software Foundation; either version 3, or (at your option) any later -version. - -GCC is distributed in the hope that it will be useful, but WITHOUT ANY -WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -for more details. - -Under Section 7 of GPL version 3, you are granted additional -permissions described in the GCC Runtime Library Exception, version -3.1, as published by the Free Software Foundation. - -You should have received a copy of the GNU General Public License and -a copy of the GCC Runtime Library Exception along with this program; -see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -. */ - -/* Conversion to IEEE 128-bit floating point from string. */ - -#include -#include -#include -#include - -/* This function must be built with IBM 128-bit as long double, so that we can - access the strtold function if do not have an IEEE 128-bit version. */ -#if !defined(__LONG_DOUBLE_128__) || !defined(__LONG_DOUBLE_IBM128__) -#error "Long double is not IBM 128-bit" -#endif - -/* If the user is using GLIBC 2.32, we can use the __strtoieee128 function. - - If we are linked against an earlier library, we will have fake it by - converting the string to IBM 128-bit long double, and then converting that to - __float128. This isn't ideal, as IEEE 128-bit has more exponent range than - IBM 128-bit. */ - -extern _Float128 __strtoieee128 (const char *, char **) __attribute__ ((__weak__)); - -_Float128 -__strtokf (const char *string, char **endptr) -{ - if (__strtoieee128) - return __strtoieee128 (string, endptr); - - return strtold (string, endptr); -} diff --git a/libgcc/config/rs6000/_strtokf.h b/libgcc/config/rs6000/_strtokf.h deleted file mode 100644 index a7ca8e0..0000000 --- a/libgcc/config/rs6000/_strtokf.h +++ /dev/null @@ -1,27 +0,0 @@ -/* Copyright (C) 1989-2021 Free Software Foundation, Inc. - -This file is part of GCC. - -GCC is free software; you can redistribute it and/or modify it under -the terms of the GNU General Public License as published by the Free -Software Foundation; either version 3, or (at your option) any later -version. - -GCC is distributed in the hope that it will be useful, but WITHOUT ANY -WARRANTY; without even the implied warranty of MERCHANTABILITY or -FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License -for more details. - -Under Section 7 of GPL version 3, you are granted additional -permissions described in the GCC Runtime Library Exception, version -3.1, as published by the Free Software Foundation. - -You should have received a copy of the GNU General Public License and -a copy of the GCC Runtime Library Exception along with this program; -see the files COPYING3 and COPYING.RUNTIME respectively. If not, see -. */ - -/* Declaration of the conversion function to IEEE 128-bit floating point from - string. */ - -extern _Float128 __strtokf (const char *, char **); diff --git a/libgcc/config/rs6000/t-float128 b/libgcc/config/rs6000/t-float128 index 6fb1a3d..8b089d4 100644 --- a/libgcc/config/rs6000/t-float128 +++ b/libgcc/config/rs6000/t-float128 @@ -26,10 +26,6 @@ fp128_softfp_obj = $(fp128_softfp_static_obj) $(fp128_softfp_shared_obj) fp128_dec_funcs = _kf_to_sd _kf_to_dd _kf_to_td \ _sd_to_kf _dd_to_kf _td_to_kf -# _Float128 to/from string conversions that must be compiled with IBM 128-bit -# long double. -fp128_decstr_funcs = _strtokf _sprintfkf - # Decimal <-> __ibm128 conversions ibm128_dec_funcs = _tf_to_sd _tf_to_dd _tf_to_td \ _sd_to_tf _dd_to_tf _td_to_tf @@ -38,7 +34,7 @@ ibm128_dec_funcs = _tf_to_sd _tf_to_dd _tf_to_td \ fp128_ppc_funcs = floattikf floatuntikf fixkfti fixunskfti \ extendkftf2-sw trunctfkf2-sw \ sfp-exceptions _mulkc3 _divkc3 _powikf2 \ - $(fp128_dec_funcs) $(fp128_decstr_funcs) + $(fp128_dec_funcs) fp128_ppc_src = $(addprefix $(srcdir)/config/rs6000/,$(addsuffix \ .c,$(fp128_ppc_funcs))) @@ -88,9 +84,6 @@ $(fp128_obj) : $(srcdir)/config/rs6000/quad-float128.h fp128_dec_objs = $(addsuffix $(objext),$(fp128_dec_funcs)) \ $(addsuffix _s$(objext),$(fp128_dec_funcs)) -fp128_decstr_objs = $(addsuffix $(objext),$(fp128_decstr_funcs)) \ - $(addsuffix _s$(objext),$(fp128_decstr_funcs)) - ibm128_dec_objs = $(addsuffix $(objext),$(ibm128_dec_funcs)) \ $(addsuffix _s$(objext),$(ibm128_dec_funcs)) @@ -98,12 +91,8 @@ FP128_CFLAGS_DECIMAL = -mno-gnu-attribute -Wno-psabi -mabi=ieeelongdouble IBM128_CFLAGS_DECIMAL = -mno-gnu-attribute -Wno-psabi -mabi=ibmlongdouble $(fp128_dec_objs) : INTERNAL_CFLAGS += $(FP128_CFLAGS_DECIMAL) -$(fp128_decstr_objs) : INTERNAL_CFLAGS += $(IBM128_CFLAGS_DECIMAL) $(ibm128_dec_objs) : INTERNAL_CFLAGS += $(IBM128_CFLAGS_DECIMAL) -$(fp128_decstr_objs) : $(srcdir)/config/rs6000/_strtokf.h \ - $(srcdir)/config/rs6000/_sprintfkf.h \ - $(fp128_softfp_src) : $(srcdir)/soft-fp/$(subst -sw,,$(subst kf,tf,$@)) $(fp128_dep) @src="$(srcdir)/soft-fp/$(subst -sw,,$(subst kf,tf,$@))"; \ echo "Create $@"; \ -- cgit v1.1 From cda41ce0e8414aec59e6b9fbe645d96e6e8193e2 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Sat, 3 Apr 2021 10:05:32 +0200 Subject: rs6000: Fix up libgcc ABI when built with --with-long-double-format=ieee [PR97653] __floatunditf and __fixtfdi and a couple of other libgcc{.a,_s.so} entrypoints for backwards compatibility should mean IBM double double handling (i.e. IFmode), gcc emits such calls for that format and form IEEE long double emits *kf* instead. When gcc is configured without --with-long-double-format=ieee , everything is fine, but when it is not, we need to compile those libgcc sources with -mno-gnu-attribute -mabi=ibmlongdouble. The following snippet in libgcc/config/rs6000/t-linux was attempting to ensure that, and for some routines it works fine (e.g. for _powitf2). But, due to 4 different types of bugs it doesn't work for most of those functions, which means that in --with-long-double-format=ieee configured gcc those *tf* entrypoints instead handle the long double arguments as if they were KFmode. The bugs are: 1) the first few objs properly use $(objext) as suffix, but several other contain a typo and use $(object) instead, which is a variable that isn't set to anything, so we don't add .o etc. extensions 2) while unsigned fix are properly called _fixuns*, unsigned float are called _floatun* (without s), but the var was using there the extra s and so didn't match 3) the variable didn't cover any of the TF <-> TI conversions, only TF <-> DI conversions 4) nothing in libgcc_s.so was handled, as those object files are called *_s.o rather than *.o and IBM128_SHARED_OBJS used wrong syntax of the GNU make substitution reference, which should be $(var:a=b) standing for $(patsubst a,b,$(var)) but it used $(var:a:b) instead 2021-04-03 Jakub Jelinek PR target/97653 * config/rs6000/t-linux (IBM128_STATIC_OBJS): Fix spelling, use $(objext) instead of $(object). Use _floatunditf instead of _floatunsditf. Add tf <-> ti conversion objects. (IBM128_SHARED_OBJS): Use proper substitution reference syntax. --- libgcc/config/rs6000/t-linux | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/rs6000/t-linux b/libgcc/config/rs6000/t-linux index 72e9c27..500210d 100644 --- a/libgcc/config/rs6000/t-linux +++ b/libgcc/config/rs6000/t-linux @@ -11,10 +11,12 @@ HOST_LIBGCC2_CFLAGS += -mno-minimal-toc # the IBM extended double format. Also turn off gnu attributes on the static # modules. IBM128_STATIC_OBJS = ibm-ldouble$(objext) _powitf2$(objext) \ - ppc64-fp$(objext) _divtc3$(object) _multc3$(object) \ - _fixtfdi$(object) _fixunstfdi$(object) \ - _floatditf$(objext) _floatunsditf$(objext) -IBM128_SHARED_OBJS = $(IBM128_STATIC_OBJS:$(objext):_s$(objext)) + ppc64-fp$(objext) _divtc3$(objext) _multc3$(objext) \ + _fixtfdi$(objext) _fixunstfdi$(objext) \ + _floatditf$(objext) _floatunditf$(objext) \ + _fixtfti$(objext) _fixunstfti$(objext) \ + _floattitf$(objext) _floatuntitf$(objext) +IBM128_SHARED_OBJS = $(IBM128_STATIC_OBJS:$(objext)=_s$(objext)) IBM128_OBJS = $(IBM128_STATIC_OBJS) $(IBM128_SHARED_OBJS) IBM128_CFLAGS = -Wno-psabi -mabi=ibmlongdouble -mno-gnu-attribute -- cgit v1.1 From f1d012911bd103e9701ed378f32928a3cbcf028a Mon Sep 17 00:00:00 2001 From: Michael Meissner Date: Mon, 5 Apr 2021 13:30:40 -0400 Subject: Honor --disable-decimal-float on PowerPC Decimal/Float128 conversions This patch fixes the problem that the Decimal <-> Float128 conversions were built even if the user configured GCC with --disable-decimal-float. libgcc/ 2021-04-05 Florian Weimer * config/rs6000/t-float128 (fp128_ppc_funcs): Add decimal floating point functions for $(decimal_float) only. Co-Authored-By: Michael Meissner --- libgcc/config/rs6000/t-float128 | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/rs6000/t-float128 b/libgcc/config/rs6000/t-float128 index 8b089d4..d745f0d 100644 --- a/libgcc/config/rs6000/t-float128 +++ b/libgcc/config/rs6000/t-float128 @@ -33,8 +33,11 @@ ibm128_dec_funcs = _tf_to_sd _tf_to_dd _tf_to_td \ # New functions for software emulation fp128_ppc_funcs = floattikf floatuntikf fixkfti fixunskfti \ extendkftf2-sw trunctfkf2-sw \ - sfp-exceptions _mulkc3 _divkc3 _powikf2 \ - $(fp128_dec_funcs) + sfp-exceptions _mulkc3 _divkc3 _powikf2 + +ifeq ($(decimal_float),yes) +fp128_ppc_funcs += $(fp128_dec_funcs) +endif fp128_ppc_src = $(addprefix $(srcdir)/config/rs6000/,$(addsuffix \ .c,$(fp128_ppc_funcs))) -- cgit v1.1 From 9a30a3f06b908e4e781324c2e813cd1db87119df Mon Sep 17 00:00:00 2001 From: Michael Meissner Date: Fri, 23 Apr 2021 18:16:03 -0400 Subject: Fix logic error in 32-bit trampolines. The test in the PowerPC 32-bit trampoline support is backwards. It aborts if the trampoline size is greater than the expected size. It should abort when the trampoline size is less than the expected size. I fixed the test so the operands are reversed. I then folded the load immediate into the compare instruction. I verified this by creating a 32-bit trampoline program and manually changing the size of the trampoline to be 48 instead of 40. The program aborted with the larger size. I updated this code and ran the test again and it passed. I added a test case that runs on PowerPC 32-bit Linux systems and it calls the __trampoline_setup function with a larger buffer size than the compiler uses. The test is not run on 64-bit systems, since the function __trampoline_setup is not called. I also limited the test to just Linux systems, in case trampolines are handled differently in other systems. libgcc/ 2021-04-23 Michael Meissner PR target/98952 * config/rs6000/tramp.S (__trampoline_setup, elfv1 #ifdef): Fix trampoline size comparison in 32-bit by reversing test and combining load immediate with compare. (__trampoline_setup, elfv2 #ifdef): Fix trampoline size comparison in 32-bit by reversing test and combining load immediate with compare. gcc/testsuite/ 2021-04-23 Michael Meissner PR target/98952 * gcc.target/powerpc/pr98952.c: New test. --- libgcc/config/rs6000/tramp.S | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/rs6000/tramp.S b/libgcc/config/rs6000/tramp.S index 4236a82..68baf16 100644 --- a/libgcc/config/rs6000/tramp.S +++ b/libgcc/config/rs6000/tramp.S @@ -64,8 +64,7 @@ FUNC_START(__trampoline_setup) mflr r11 addi r7,r11,trampoline_initial-4-.LCF0 /* trampoline address -4 */ - li r8,trampoline_size /* verify that the trampoline is big enough */ - cmpw cr1,r8,r4 + cmpwi cr1,r4,trampoline_size /* verify that the trampoline is big enough */ srwi r4,r4,2 /* # words to move */ addi r9,r3,-4 /* adjust pointer for lwzu */ mtctr r4 @@ -156,8 +155,7 @@ FUNC_START(__trampoline_setup) ld 7,.LC0@toc@l(7) /* trampoline address -8 */ #endif - li r8,trampoline_size /* verify that the trampoline is big enough */ - cmpw cr1,r8,r4 + cmpwi cr1,r4,trampoline_size /* verify that the trampoline is big enough */ srwi r4,r4,3 /* # doublewords to move */ addi r9,r3,-8 /* adjust pointer for stdu */ mtctr r4 -- cgit v1.1 From 54f0224d55a1b56dde092460ddf76913670e6efc Mon Sep 17 00:00:00 2001 From: Patrick McGehearty Date: Wed, 28 Apr 2021 19:14:48 +0000 Subject: Practical improvement to libgcc complex divide Correctness and performance test programs used during development of this project may be found in the attachment to: https://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg254210.html Summary of Purpose This patch to libgcc/libgcc2.c __divdc3 provides an opportunity to gain important improvements to the quality of answers for the default complex divide routine (half, float, double, extended, long double precisions) when dealing with very large or very small exponents. The current code correctly implements Smith's method (1962) [2] further modified by c99's requirements for dealing with NaN (not a number) results. When working with input values where the exponents are greater than *_MAX_EXP/2 or less than -(*_MAX_EXP)/2, results are substantially different from the answers provided by quad precision more than 1% of the time. This error rate may be unacceptable for many applications that cannot a priori restrict their computations to the safe range. The proposed method reduces the frequency of "substantially different" answers by more than 99% for double precision at a modest cost of performance. Differences between current gcc methods and the new method will be described. Then accuracy and performance differences will be discussed. Background This project started with an investigation related to https://gcc.gnu.org/bugzilla/show_bug.cgi?id=59714. Study of Beebe[1] provided an overview of past and recent practice for computing complex divide. The current glibc implementation is based on Robert Smith's algorithm [2] from 1962. A google search found the paper by Baudin and Smith [3] (same Robert Smith) published in 2012. Elen Kalda's proposed patch [4] is based on that paper. I developed two sets of test data by randomly distributing values over a restricted range and the full range of input values. The current complex divide handled the restricted range well enough, but failed on the full range more than 1% of the time. Baudin and Smith's primary test for "ratio" equals zero reduced the cases with 16 or more error bits by a factor of 5, but still left too many flawed answers. Adding debug print out to cases with substantial errors allowed me to see the intermediate calculations for test values that failed. I noted that for many of the failures, "ratio" was a subnormal. Changing the "ratio" test from check for zero to check for subnormal reduced the 16 bit error rate by another factor of 12. This single modified test provides the greatest benefit for the least cost, but the percentage of cases with greater than 16 bit errors (double precision data) is still greater than 0.027% (2.7 in 10,000). Continued examination of remaining errors and their intermediate computations led to the various tests of input value tests and scaling to avoid under/overflow. The current patch does not handle some of the rare and most extreme combinations of input values, but the random test data is only showing 1 case in 10 million that has an error of greater than 12 bits. That case has 18 bits of error and is due to subtraction cancellation. These results are significantly better than the results reported by Baudin and Smith. Support for half, float, double, extended, and long double precision is included as all are handled with suitable preprocessor symbols in a single source routine. Since half precision is computed with float precision as per current libgcc practice, the enhanced algorithm provides no benefit for half precision and would cost performance. Further investigation showed changing the half precision algorithm to use the simple formula (real=a*c+b*d imag=b*c-a*d) caused no loss of precision and modest improvement in performance. The existing constants for each precision: float: FLT_MAX, FLT_MIN; double: DBL_MAX, DBL_MIN; extended and/or long double: LDBL_MAX, LDBL_MIN are used for avoiding the more common overflow/underflow cases. This use is made generic by defining appropriate __LIBGCC2_* macros in c-cppbuiltin.c. Tests are added for when both parts of the denominator have exponents small enough to allow shifting any subnormal values to normal values all input values could be scaled up without risking overflow. That gained a clear improvement in accuracy. Similarly, when either numerator was subnormal and the other numerator and both denominator values were not too large, scaling could be used to reduce risk of computing with subnormals. The test and scaling values used all fit within the allowed exponent range for each precision required by the C standard. Float precision has more difficulty with getting correct answers than double precision. When hardware for double precision floating point operations is available, float precision is now handled in double precision intermediate calculations with the simple algorithm the same as the half-precision method of using float precision for intermediate calculations. Using the higher precision yields exact results for all tested input values (64-bit double, 32-bit float) with the only performance cost being the requirement to convert the four input values from float to double. If double precision hardware is not available, then float complex divide will use the same improved algorithm as the other precisions with similar change in performance. Further Improvement The most common remaining substantial errors are due to accuracy loss when subtracting nearly equal values. This patch makes no attempt to improve that situation. NOTATION For all of the following, the notation is: Input complex values: a+bi (a= real part, b= imaginary part) c+di Output complex value: e+fi = (a+bi)/(c+di) For the result tables: current = current method (SMITH) b1div = method proposed by Elen Kalda b2div = alternate method considered by Elen Kalda new = new method proposed by this patch DESCRIPTIONS of different complex divide methods: NAIVE COMPUTATION (-fcx-limited-range): e = (a*c + b*d)/(c*c + d*d) f = (b*c - a*d)/(c*c + d*d) Note that c*c and d*d will overflow or underflow if either c or d is outside the range 2^-538 to 2^512. This method is available in gcc when the switch -fcx-limited-range is used. That switch is also enabled by -ffast-math. Only one who has a clear understanding of the maximum range of all intermediate values generated by an application should consider using this switch. SMITH's METHOD (current libgcc): if(fabs(c) RBIG) || (FABS (a) > RBIG) || (FABS (b) > RBIG) ) { a = a * 0.5; b = b * 0.5; c = c * 0.5; d = d * 0.5; } /* minimize overflow/underflow issues when c and d are small */ else if (FABS (d) < RMIN2) { a = a * RMINSCAL; b = b * RMINSCAL; c = c * RMINSCAL; d = d * RMINSCAL; } else { if(((FABS (a) < RMIN) && (FABS (b) < RMAX2) && (FABS (d) < RMAX2)) || ((FABS (b) < RMIN) && (FABS (a) < RMAX2) && (FABS (d) < RMAX2))) { a = a * RMINSCAL; b = b * RMINSCAL; c = c * RMINSCAL; d = d * RMINSCAL; } } r = c/d; denom = (c*r) + d; if( r > RMIN ) { e = (a*r + b) / denom ; f = (b*r - a) / denom } else { e = (c * (a/d) + b) / denom; f = (c * (b/d) - a) / denom; } } [ only presenting the fabs(c) < fabs(d) case here, full code in patch. ] Before any computation of the answer, the code checks for any input values near maximum to allow down scaling to avoid overflow. These scalings almost never harm the accuracy since they are by 2. Values that are over RBIG are relatively rare but it is easy to test for them and allow aviodance of overflows. Testing for RMIN2 reveals when both c and d are less than [FLT|DBL]_EPSILON. By scaling all values by 1/EPSILON, the code converts subnormals to normals, avoids loss of accuracy and underflows in intermediate computations that otherwise might occur. If scaling a and b by 1/EPSILON causes either to overflow, then the computation will overflow whatever method is used. Finally, we test for either a or b being subnormal (RMIN) and if so, for the other three values being small enough to allow scaling. We only need to test a single denominator value since we have already determined which of c and d is larger. Next, r (the ratio of c to d) is checked for being near zero. Baudin and Smith checked r for zero. This code improves that approach by checking for values less than DBL_MIN (subnormal) covers roughly 12 times as many cases and substantially improves overall accuracy. If r is too small, then when it is used in a multiplication, there is a high chance that the result will underflow to zero, losing significant accuracy. That underflow is avoided by reordering the computation. When r is subnormal, the code replaces a*r (= a*(c/d)) with ((a/d)*c) which is mathematically the same but avoids the unnecessary underflow. TEST Data Two sets of data are presented to test these methods. Both sets contain 10 million pairs of complex values. The exponents and mantissas are generated using multiple calls to random() and then combining the results. Only values which give results to complex divide that are representable in the appropriate precision after being computed in quad precision are used. The first data set is labeled "moderate exponents". The exponent range is limited to -DBL_MAX_EXP/2 to DBL_MAX_EXP/2 for Double Precision (use FLT_MAX_EXP or LDBL_MAX_EXP for the appropriate precisions. The second data set is labeled "full exponents". The exponent range for these cases is the full exponent range including subnormals for a given precision. ACCURACY Test results: Note: The following accuracy tests are based on IEEE-754 arithmetic. Note: All results reporteed are based on use of fused multiply-add. If fused multiply-add is not used, the error rate increases, giving more 1 and 2 bit errors for both current and new complex divide. Differences between using fused multiply and not using it that are greater than 2 bits are less than 1 in a million. The complex divide methods are evaluated by determining the percentage of values that exceed differences in low order bits. If a "2 bit" test results show 1%, that would mean that 1% of 10,000,000 values (100,000) have either a real or imaginary part that differs from the quad precision result by more than the last 2 bits. Results are reported for differences greater than or equal to 1 bit, 2 bits, 8 bits, 16 bits, 24 bits, and 52 bits for double precision. Even when the patch avoids overflows and underflows, some input values are expected to have errors due to the potential for catastrophic roundoff from floating point subtraction. For example, when b*c and a*d are nearly equal, the result of subtraction may lose several places of accuracy. This patch does not attempt to detect or minimize this type of error, but neither does it increase them. I only show the results for Elen Kalda's method (with both 1 and 2 divides) and the new method for only 1 divide in the double precision table. In the following charts, lower values are better. current - current complex divide in libgcc b1div - Elen Kalda's method from Baudin & Smith with one divide b2div - Elen Kalda's method from Baudin & Smith with two divides new - This patch which uses 2 divides =================================================== Errors Moderate Dataset gtr eq current b1div b2div new ====== ======== ======== ======== ======== 1 bit 0.24707% 0.92986% 0.24707% 0.24707% 2 bits 0.01762% 0.01770% 0.01762% 0.01762% 8 bits 0.00026% 0.00026% 0.00026% 0.00026% 16 bits 0.00000% 0.00000% 0.00000% 0.00000% 24 bits 0% 0% 0% 0% 52 bits 0% 0% 0% 0% =================================================== Table 1: Errors with Moderate Dataset (Double Precision) Note in Table 1 that both the old and new methods give identical error rates for data with moderate exponents. Errors exceeding 16 bits are exceedingly rare. There are substantial increases in the 1 bit error rates for b1div (the 1 divide/2 multiplys method) as compared to b2div (the 2 divides method). These differences are minimal for 2 bits and larger error measurements. =================================================== Errors Full Dataset gtr eq current b1div b2div new ====== ======== ======== ======== ======== 1 bit 2.05% 1.23842% 0.67130% 0.16664% 2 bits 1.88% 0.51615% 0.50354% 0.00900% 8 bits 1.77% 0.42856% 0.42168% 0.00011% 16 bits 1.63% 0.33840% 0.32879% 0.00001% 24 bits 1.51% 0.25583% 0.24405% 0.00000% 52 bits 1.13% 0.01886% 0.00350% 0.00000% =================================================== Table 2: Errors with Full Dataset (Double Precision) Table 2 shows significant differences in error rates. First, the difference between b1div and b2div show a significantly higher error rate for the b1div method both for single bit errros and well beyond. Even for 52 bits, we see the b1div method gets completely wrong answers more than 5 times as often as b2div. To retain comparable accuracy with current complex divide results for small exponents and due to the increase in errors for large exponents, I choose to use the more accurate method of two divides. The current method has more 1.6% of cases where it is getting results where the low 24 bits of the mantissa differ from the correct answer. More than 1.1% of cases where the answer is completely wrong. The new method shows less than one case in 10,000 with greater than two bits of error and only one case in 10 million with greater than 16 bits of errors. The new patch reduces 8 bit errors by a factor of 16,000 and virtually eliminates completely wrong answers. As noted above, for architectures with double precision hardware, the new method uses that hardware for the intermediate calculations before returning the result in float precision. Testing of the new patch has shown zero errors found as seen in Tables 3 and 4. Correctness for float ============================= Errors Moderate Dataset gtr eq current new ====== ======== ======== 1 bit 28.68070% 0% 2 bits 0.64386% 0% 8 bits 0.00401% 0% 16 bits 0.00001% 0% 24 bits 0% 0% ============================= Table 3: Errors with Moderate Dataset (float) ============================= Errors Full Dataset gtr eq current new ====== ======== ======== 1 bit 19.98% 0% 2 bits 3.20% 0% 8 bits 1.97% 0% 16 bits 1.08% 0% 24 bits 0.55% 0% ============================= Table 4: Errors with Full Dataset (float) As before, the current method shows an troubling rate of extreme errors. There very minor changes in accuracy for half-precision since the code changes from Smith's method to the simple method. 5 out of 1 million test cases show correct answers instead of 1 or 2 bit errors. libgcc computes half-precision functions in float precision allowing the existing methods to avoid overflow/underflow issues for the allowed range of exponents for half-precision. Extended precision (using x87 80-bit format on x86) and Long double (using IEEE-754 128-bit on x86 and aarch64) both have 15-bit exponents as compared to 11-bit exponents in double precision. We note that the C standard also allows Long Double to be implemented in the equivalent range of Double. The RMIN2 and RMINSCAL constants are selected to work within the Double range as well as with extended and 128-bit ranges. We will limit our performance and accurancy discussions to the 80-bit and 128-bit formats as seen on x86 here. The extended and long double precision investigations were more limited. Aarch64 does not support extended precision but does support the software implementation of 128-bit long double precision. For x86, long double defaults to the 80-bit precision but using the -mlong-double-128 flag switches to using the software implementation of 128-bit precision. Both 80-bit and 128-bit precisions have the same exponent range, with the 128-bit precision has extended mantissas. Since this change is only aimed at avoiding underflow/overflow for extreme exponents, I studied the extended precision results on x86 for 100,000 values. The limited exponent dataset showed no differences. For the dataset with full exponent range, the current and new values showed major differences (greater than 32 bits) in 567 cases out of 100,000 (0.56%). In every one of these cases, the ratio of c/d or d/c (as appropriate) was zero or subnormal, indicating the advantage of the new method and its continued correctness where needed. PERFORMANCE Test results In order for a library change to be practical, it is necessary to show the slowdown is tolerable. The slowdowns observed are much less than would be seen by (for example) switching from hardware double precison to a software quad precision, which on the tested machines causes a slowdown of around 100x). The actual slowdown depends on the machine architecture. It also depends on the nature of the input data. If underflow/overflow is rare, then implementations that have strong branch prediction will only slowdown by a few cycles. If underflow/overflow is common, then the branch predictors will be less accurate and the cost will be higher. Results from two machines are presented as examples of the overhead for the new method. The one labeled x86 is a 5 year old Intel x86 processor and the one labeled aarch64 is a 3 year old arm64 processor. In the following chart, the times are averaged over a one million value data set. All values are scaled to set the time of the current method to be 1.0. Lower values are better. A value of less than 1.0 would be faster than the current method and a value greater than 1.0 would be slower than the current method. ================================================ Moderate set full set x86 aarch64 x86 aarch64 ======== =============== =============== float 0.59 0.79 0.45 0.81 double 1.04 1.24 1.38 1.56 long double 1.13 1.24 1.29 1.25 ================================================ Table 5: Performance Comparisons (ratio new/current) The above tables omit the timing for the 1 divide and 2 multiply comparison with the 2 divide approach. The float results show clear performance improvement due to using the simple method with double precision for intermediate calculations. The double results with the newer method show less overhead for the moderate dataset than for the full dataset. That's because the moderate dataset does not ever take the new branches which protect from under/overflow. The better the branch predictor, the lower the cost for these untaken branches. Both platforms are somewhat dated, with the x86 having a better branch predictor which reduces the cost of the additional branches in the new code. Of course, the relative slowdown may be greater for some architectures, especially those with limited branch prediction combined with a high cost of misprediction. The long double results are fairly consistent in showing the moderate additional cost of the extra branches and calculations for all cases. The observed cost for all precisions is claimed to be tolerable on the grounds that: (a) the cost is worthwhile considering the accuracy improvement shown. (b) most applications will only spend a small fraction of their time calculating complex divide. (c) it is much less than the cost of extended precision (d) users are not forced to use it (as described below) Those users who find this degree of slowdown unsatisfactory may use the gcc switch -fcx-fortran-rules which does not use the library routine, instead inlining Smith's method without the C99 requirement for dealing with NaN results. The proposed patch for libgcc complex divide does not affect the code generated by -fcx-fortran-rules. SUMMARY When input data to complex divide has exponents whose absolute value is less than half of *_MAX_EXP, this patch makes no changes in accuracy and has only a modest effect on performance. When input data contains values outside those ranges, the patch eliminates more than 99.9% of major errors with a tolerable cost in performance. In comparison to Elen Kalda's method, this patch introduces more performance overhead but reduces major errors by a factor of greater than 4000. REFERENCES [1] Nelson H.F. Beebe, "The Mathematical-Function Computation Handbook. Springer International Publishing AG, 2017. [2] Robert L. Smith. Algorithm 116: Complex division. Commun. ACM, 5(8):435, 1962. [3] Michael Baudin and Robert L. Smith. "A robust complex division in Scilab," October 2012, available at http://arxiv.org/abs/1210.4539. [4] Elen Kalda: Complex division improvements in libgcc https://gcc.gnu.org/legacy-ml/gcc-patches/2019-08/msg01629.html 2020-12-08 Patrick McGehearty gcc/c-family/ * c-cppbuiltin.c (c_cpp_builtins): Add supporting macros for new complex divide libgcc/ * libgcc2.c (XMTYPE, XCTYPE, RBIG, RMIN, RMIN2, RMINSCAL, RMAX2): Define. (__divsc3, __divdc3, __divxc3, __divtc3): Improve complex divide. * config/rs6000/_divkc3.c (RBIG, RMIN, RMIN2, RMINSCAL, RMAX2): Define. (__divkc3): Improve complex divide. gcc/testsuite/ * gcc.c-torture/execute/ieee/cdivchkd.c: New test. * gcc.c-torture/execute/ieee/cdivchkf.c: Likewise. * gcc.c-torture/execute/ieee/cdivchkld.c: Likewise. --- libgcc/config/rs6000/_divkc3.c | 109 ++++++++++++++++++++++++++++++++++++++--- 1 file changed, 101 insertions(+), 8 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/rs6000/_divkc3.c b/libgcc/config/rs6000/_divkc3.c index d261f40..a1d29d2 100644 --- a/libgcc/config/rs6000/_divkc3.c +++ b/libgcc/config/rs6000/_divkc3.c @@ -37,29 +37,122 @@ see the files COPYING3 and COPYING.RUNTIME respectively. If not, see #define __divkc3 __divkc3_sw #endif +#ifndef __LONG_DOUBLE_IEEE128__ +#define RBIG (__LIBGCC_KF_MAX__ / 2) +#define RMIN (__LIBGCC_KF_MIN__) +#define RMIN2 (__LIBGCC_KF_EPSILON__) +#define RMINSCAL (1 / __LIBGCC_KF_EPSILON__) +#define RMAX2 (RBIG * RMIN2) +#else +#define RBIG (__LIBGCC_TF_MAX__ / 2) +#define RMIN (__LIBGCC_TF_MIN__) +#define RMIN2 (__LIBGCC_TF_EPSILON__) +#define RMINSCAL (1 / __LIBGCC_TF_EPSILON__) +#define RMAX2 (RBIG * RMIN2) +#endif + TCtype __divkc3 (TFtype a, TFtype b, TFtype c, TFtype d) { TFtype denom, ratio, x, y; TCtype res; - /* ??? We can get better behavior from logarithmic scaling instead of - the division. But that would mean starting to link libgcc against - libm. We could implement something akin to ldexp/frexp as gcc builtins - fairly easily... */ + /* long double has significant potential underflow/overflow errors that + can be greatly reduced with a limited number of tests and adjustments. + */ + + /* Scale by max(c,d) to reduce chances of denominator overflowing. */ if (FABS (c) < FABS (d)) { + /* Prevent underflow when denominator is near max representable. */ + if (FABS (d) >= RBIG) + { + a = a / 2; + b = b / 2; + c = c / 2; + d = d / 2; + } + /* Avoid overflow/underflow issues when c and d are small. + Scaling up helps avoid some underflows. + No new overflow possible since c&d < RMIN2. */ + if (FABS (d) < RMIN2) + { + a = a * RMINSCAL; + b = b * RMINSCAL; + c = c * RMINSCAL; + d = d * RMINSCAL; + } + else + { + if (((FABS (a) < RMIN) && (FABS (b) < RMAX2) && (FABS (d) < RMAX2)) + || ((FABS (b) < RMIN) && (FABS (a) < RMAX2) + && (FABS (d) < RMAX2))) + { + a = a * RMINSCAL; + b = b * RMINSCAL; + c = c * RMINSCAL; + d = d * RMINSCAL; + } + } ratio = c / d; denom = (c * ratio) + d; - x = ((a * ratio) + b) / denom; - y = ((b * ratio) - a) / denom; + /* Choose alternate order of computation if ratio is subnormal. */ + if (FABS (ratio) > RMIN) + { + x = ((a * ratio) + b) / denom; + y = ((b * ratio) - a) / denom; + } + else + { + x = ((c * (a / d)) + b) / denom; + y = ((c * (b / d)) - a) / denom; + } } else { + /* Prevent underflow when denominator is near max representable. */ + if (FABS (c) >= RBIG) + { + a = a / 2; + b = b / 2; + c = c / 2; + d = d / 2; + } + /* Avoid overflow/underflow issues when both c and d are small. + Scaling up helps avoid some underflows. + No new overflow possible since both c&d are less than RMIN2. */ + if (FABS (c) < RMIN2) + { + a = a * RMINSCAL; + b = b * RMINSCAL; + c = c * RMINSCAL; + d = d * RMINSCAL; + } + else + { + if (((FABS (a) < RMIN) && (FABS (b) < RMAX2) && (FABS (c) < RMAX2)) + || ((FABS (b) < RMIN) && (FABS (a) < RMAX2) + && (FABS (c) < RMAX2))) + { + a = a * RMINSCAL; + b = b * RMINSCAL; + c = c * RMINSCAL; + d = d * RMINSCAL; + } + } ratio = d / c; denom = (d * ratio) + c; - x = ((b * ratio) + a) / denom; - y = (b - (a * ratio)) / denom; + /* Choose alternate order of computation if ratio is subnormal. */ + if (FABS (ratio) > RMIN) + { + x = ((b * ratio) + a) / denom; + y = (b - (a * ratio)) / denom; + } + else + { + x = (a + (d * (b / c))) / denom; + y = (b - (d * (a / c))) / denom; + } } /* Recover infinities and zeros that computed as NaN+iNaN; the only cases -- cgit v1.1 From 8aa8a2af8fdc2e0939c0d803bd45b45d251e1a3f Mon Sep 17 00:00:00 2001 From: Dimitar Dimitrov Date: Sun, 21 Mar 2021 16:38:51 +0200 Subject: libgcc: pru: Place mpyll into its own section This should help LD's --gc-sections feature to reduce final ELF size. libgcc/ChangeLog: * config/pru/mpyll.S (__pruabi_mpyll): Place into own section. Signed-off-by: Dimitar Dimitrov --- libgcc/config/pru/mpyll.S | 2 ++ 1 file changed, 2 insertions(+) (limited to 'libgcc/config') diff --git a/libgcc/config/pru/mpyll.S b/libgcc/config/pru/mpyll.S index 1aa12a6..cd093bb 100644 --- a/libgcc/config/pru/mpyll.S +++ b/libgcc/config/pru/mpyll.S @@ -29,6 +29,8 @@ #include "pru-asm.h" + .section .text.__pruabi_mpyll, "ax" + .global SYM(__pruabi_mpyll) FUNC(__pruabi_mpyll) SYM(__pruabi_mpyll): -- cgit v1.1 From 9090f4807161876033f6bf0e1133364b38d91865 Mon Sep 17 00:00:00 2001 From: Carl Love Date: Wed, 21 Apr 2021 18:07:39 -0400 Subject: Conversions between 128-bit integer and floating point values. The files fixkfti-sw.c and fixunskfti-sw.c are renamed versions of fixkfti.c and fixunskfti.c respectively to do the conversions in software. The function names in the files were updated with the rename as well as some white spaces fixes. The file float128-p10.c contains the functions for using the ISA 3.1 hardware instructions to perform the conversions. 2021-06-08 Carl Love gcc/ChangeLog * config/rs6000/rs6000.c (__fixkfti, __fixunskfti, __floattikf, __floatuntikf): Names changed to __fixkfti_sw, __fixunskfti_sw, __floattikf_sw, __floatuntikf_sw respectively. * config/rs6000/rs6000.md (floatti2, floatunsti2, fix_truncti2, fixuns_truncti2): Add define_insn for mode IEEE 128. gcc/testsuite/ChangeLog * gcc.target/powerpc/fp128_conversions.c: New file. * gcc.target/powerpc/int_128bit-runnable.c(vextsd2q, vcmpuq, vcmpsq, vcmpequq, vcmpequq., vcmpgtsq, vcmpgtsq. vcmpgtuq, vcmpgtuq.): Update scan-assembler-times. (ppc_native_128bit): Remove dg-require-effective-target. libgcc/ChangeLog * config.host: Add if test and set for libgcc_cv_powerpc_3_1_float128_hw. * config/rs6000/fixkfti.c: Renamed to fixkfti-sw.c. Change calls of __fixkfti to __fixkfti_sw. * config/rs6000/fixunskfti.c: Renamed to fixunskfti-sw.c. Change calls of __fixunskfti to __fixunskfti_sw. * config/rs6000/float128-p10.c (__floattikf_hw, __floatuntikf_hw, __fixkfti_hw, __fixunskfti_hw): New file. * config/rs6000/float128-ifunc.c (SW_OR_HW_ISA3_1): New macro. (__floattikf_resolve, __floatuntikf_resolve, __fixkfti_resolve, __fixunskfti_resolve): Add resolve functions. (__floattikf, __floatuntikf, __fixkfti, __fixunskfti): New functions. * config/rs6000/float128-sed (floattitf, __floatuntitf, __fixtfti, __fixunstfti): Add editor commands to change names. * config/rs6000/float128-sed-hw (__floattitf, __floatuntitf, __fixtfti, __fixunstfti): Add editor commands to change names. * config/rs6000/floattikf.c: Renamed to floattikf-sw.c. * config/rs6000/floatuntikf.c: Renamed to floatuntikf-sw.c. * config/rs6000/quad-float128.h (__floattikf_sw, __floatuntikf_sw, __fixkfti_sw, __fixunskfti_sw, __floattikf_hw, __floatuntikf_hw, __fixkfti_hw, __fixunskfti_hw, __floattikf, __floatuntikf, __fixkfti, __fixunskfti): New extern declarations. * config/rs6000/t-float128 (floattikf, floatuntikf, fixkfti, fixunskfti): Remove file names from fp128_ppc_funcs. (floattikf-sw, floatuntikf-sw, fixkfti-sw, fixunskfti-sw): Add file names to fp128_ppc_funcs. * config/rs6000/t-float128-hw(fp128_3_1_hw_funcs, fp128_3_1_hw_src, fp128_3_1_hw_static_obj, fp128_3_1_hw_shared_obj, fp128_3_1_hw_obj): Add variables for ISA 3.1 support. * config/rs6000/t-float128-p10-hw: New file. * configure: Update script for isa 3.1 128-bit float support. * configure.ac: Add check for 128-bit float hardware support. --- libgcc/config/rs6000/fixkfti-sw.c | 51 ++++++++++++++++++++++++ libgcc/config/rs6000/fixkfti.c | 51 ------------------------ libgcc/config/rs6000/fixunskfti-sw.c | 51 ++++++++++++++++++++++++ libgcc/config/rs6000/fixunskfti.c | 51 ------------------------ libgcc/config/rs6000/float128-ifunc.c | 44 ++++++++++++++++++--- libgcc/config/rs6000/float128-p10.c | 71 ++++++++++++++++++++++++++++++++++ libgcc/config/rs6000/float128-sed | 4 ++ libgcc/config/rs6000/float128-sed-hw | 4 ++ libgcc/config/rs6000/floattikf-sw.c | 51 ++++++++++++++++++++++++ libgcc/config/rs6000/floattikf.c | 51 ------------------------ libgcc/config/rs6000/floatuntikf-sw.c | 51 ++++++++++++++++++++++++ libgcc/config/rs6000/floatuntikf.c | 51 ------------------------ libgcc/config/rs6000/quad-float128.h | 17 +++++--- libgcc/config/rs6000/t-float128 | 12 ++++-- libgcc/config/rs6000/t-float128-hw | 16 ++++++++ libgcc/config/rs6000/t-float128-p10-hw | 24 ++++++++++++ 16 files changed, 381 insertions(+), 219 deletions(-) create mode 100644 libgcc/config/rs6000/fixkfti-sw.c delete mode 100644 libgcc/config/rs6000/fixkfti.c create mode 100644 libgcc/config/rs6000/fixunskfti-sw.c delete mode 100644 libgcc/config/rs6000/fixunskfti.c create mode 100644 libgcc/config/rs6000/float128-p10.c create mode 100644 libgcc/config/rs6000/floattikf-sw.c delete mode 100644 libgcc/config/rs6000/floattikf.c create mode 100644 libgcc/config/rs6000/floatuntikf-sw.c delete mode 100644 libgcc/config/rs6000/floatuntikf.c create mode 100644 libgcc/config/rs6000/t-float128-p10-hw (limited to 'libgcc/config') diff --git a/libgcc/config/rs6000/fixkfti-sw.c b/libgcc/config/rs6000/fixkfti-sw.c new file mode 100644 index 0000000..cc000fc --- /dev/null +++ b/libgcc/config/rs6000/fixkfti-sw.c @@ -0,0 +1,51 @@ +/* Software floating-point emulation, convert IEEE quad to 128bit signed + integer. + + Copyright (C) 2016-2021 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Steven Munroe (munroesj@linux.vnet.ibm.com) + Code is based on the main soft-fp library written by: + Uros Bizjak (ubizjak@gmail.com). + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifdef _ARCH_PPC64 +#include "soft-fp.h" +#include "quad-float128.h" + +TItype +__fixkfti_sw (TFtype a) +{ + FP_DECL_EX; + FP_DECL_Q (A); + UTItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_Q (A, a); + FP_TO_INT_Q (r, A, TI_BITS, 1); + FP_HANDLE_EXCEPTIONS; + + return r; +} +#endif diff --git a/libgcc/config/rs6000/fixkfti.c b/libgcc/config/rs6000/fixkfti.c deleted file mode 100644 index 0d965bc..0000000 --- a/libgcc/config/rs6000/fixkfti.c +++ /dev/null @@ -1,51 +0,0 @@ -/* Software floating-point emulation, convert IEEE quad to 128bit signed - integer. - - Copyright (C) 2016-2021 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by Steven Munroe (munroesj@linux.vnet.ibm.com) - Code is based on the main soft-fp library written by: - Uros Bizjak (ubizjak@gmail.com). - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - In addition to the permissions in the GNU Lesser General Public - License, the Free Software Foundation gives you unlimited - permission to link the compiled version of this file into - combinations with other programs, and to distribute those - combinations without any restriction coming from the use of this - file. (The Lesser General Public License restrictions do apply in - other respects; for example, they cover modification of the file, - and distribution when not linked into a combine executable.) - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#ifdef _ARCH_PPC64 -#include "soft-fp.h" -#include "quad-float128.h" - -TItype -__fixkfti (TFtype a) -{ - FP_DECL_EX; - FP_DECL_Q (A); - UTItype r; - - FP_INIT_EXCEPTIONS; - FP_UNPACK_RAW_Q (A, a); - FP_TO_INT_Q (r, A, TI_BITS, 1); - FP_HANDLE_EXCEPTIONS; - - return r; -} -#endif diff --git a/libgcc/config/rs6000/fixunskfti-sw.c b/libgcc/config/rs6000/fixunskfti-sw.c new file mode 100644 index 0000000..7a04d1a --- /dev/null +++ b/libgcc/config/rs6000/fixunskfti-sw.c @@ -0,0 +1,51 @@ +/* Software floating-point emulation, convert IEEE quad to 128bit unsigned + integer. + + Copyright (C) 2016-2021 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Steven Munroe (munroesj@linux.vnet.ibm.com) + Code is based on the main soft-fp library written by: + Uros Bizjak (ubizjak@gmail.com). + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifdef _ARCH_PPC64 +#include "soft-fp.h" +#include "quad-float128.h" + +UTItype +__fixunskfti_sw (TFtype a) +{ + FP_DECL_EX; + FP_DECL_Q (A); + UTItype r; + + FP_INIT_EXCEPTIONS; + FP_UNPACK_RAW_Q (A, a); + FP_TO_INT_Q (r, A, TI_BITS, 0); + FP_HANDLE_EXCEPTIONS; + + return r; +} +#endif diff --git a/libgcc/config/rs6000/fixunskfti.c b/libgcc/config/rs6000/fixunskfti.c deleted file mode 100644 index f285b4e..0000000 --- a/libgcc/config/rs6000/fixunskfti.c +++ /dev/null @@ -1,51 +0,0 @@ -/* Software floating-point emulation, convert IEEE quad to 128bit unsigned - integer. - - Copyright (C) 2016-2021 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by Steven Munroe (munroesj@linux.vnet.ibm.com) - Code is based on the main soft-fp library written by: - Uros Bizjak (ubizjak@gmail.com). - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - In addition to the permissions in the GNU Lesser General Public - License, the Free Software Foundation gives you unlimited - permission to link the compiled version of this file into - combinations with other programs, and to distribute those - combinations without any restriction coming from the use of this - file. (The Lesser General Public License restrictions do apply in - other respects; for example, they cover modification of the file, - and distribution when not linked into a combine executable.) - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#ifdef _ARCH_PPC64 -#include "soft-fp.h" -#include "quad-float128.h" - -UTItype -__fixunskfti (TFtype a) -{ - FP_DECL_EX; - FP_DECL_Q (A); - UTItype r; - - FP_INIT_EXCEPTIONS; - FP_UNPACK_RAW_Q (A, a); - FP_TO_INT_Q (r, A, TI_BITS, 0); - FP_HANDLE_EXCEPTIONS; - - return r; -} -#endif diff --git a/libgcc/config/rs6000/float128-ifunc.c b/libgcc/config/rs6000/float128-ifunc.c index 8538047..57545dd 100644 --- a/libgcc/config/rs6000/float128-ifunc.c +++ b/libgcc/config/rs6000/float128-ifunc.c @@ -46,14 +46,9 @@ #endif #define SW_OR_HW(SW, HW) (__builtin_cpu_supports ("ieee128") ? HW : SW) +#define SW_OR_HW_ISA3_1(SW, HW) (__builtin_cpu_supports ("arch_3_1") ? HW : SW) /* Resolvers. */ - -/* We do not provide ifunc resolvers for __fixkfti, __fixunskfti, __floattikf, - and __floatuntikf. There is no ISA 3.0 instruction that converts between - 128-bit integer types and 128-bit IEEE floating point, or vice versa. So - use the emulator functions for these conversions. */ - static __typeof__ (__addkf3_sw) * __addkf3_resolve (void) { @@ -102,6 +97,18 @@ __floatdikf_resolve (void) return SW_OR_HW (__floatdikf_sw, __floatdikf_hw); } +static __typeof__ (__floattikf_sw) * +__floattikf_resolve (void) +{ + return SW_OR_HW_ISA3_1 (__floattikf_sw, __floattikf_hw); +} + +static __typeof__ (__floatuntikf_sw) * +__floatuntikf_resolve (void) +{ + return SW_OR_HW_ISA3_1 (__floatuntikf_sw, __floatuntikf_hw); +} + static __typeof__ (__floatunsikf_sw) * __floatunsikf_resolve (void) { @@ -114,6 +121,19 @@ __floatundikf_resolve (void) return SW_OR_HW (__floatundikf_sw, __floatundikf_hw); } + +static __typeof__ (__fixkfti_sw) * +__fixkfti_resolve (void) +{ + return SW_OR_HW_ISA3_1 (__fixkfti_sw, __fixkfti_hw); +} + +static __typeof__ (__fixunskfti_sw) * +__fixunskfti_resolve (void) +{ + return SW_OR_HW_ISA3_1 (__fixunskfti_sw, __fixunskfti_hw); +} + static __typeof__ (__fixkfsi_sw) * __fixkfsi_resolve (void) { @@ -303,6 +323,18 @@ TFtype __floatsikf (SItype_ppc) TFtype __floatdikf (DItype_ppc) __attribute__ ((__ifunc__ ("__floatdikf_resolve"))); +TFtype __floattikf (TItype_ppc) + __attribute__ ((__ifunc__ ("__floattikf_resolve"))); + +TFtype __floatuntikf (UTItype_ppc) + __attribute__ ((__ifunc__ ("__floatuntikf_resolve"))); + +TItype_ppc __fixkfti (TFtype) + __attribute__ ((__ifunc__ ("__fixkfti_resolve"))); + +UTItype_ppc __fixunskfti (TFtype) + __attribute__ ((__ifunc__ ("__fixunskfti_resolve"))); + TFtype __floatunsikf (USItype_ppc) __attribute__ ((__ifunc__ ("__floatunsikf_resolve"))); diff --git a/libgcc/config/rs6000/float128-p10.c b/libgcc/config/rs6000/float128-p10.c new file mode 100644 index 0000000..7f5d317 --- /dev/null +++ b/libgcc/config/rs6000/float128-p10.c @@ -0,0 +1,71 @@ +/* Automatic switching between software and hardware IEEE 128-bit + ISA 3.1 floating-point emulation for PowerPC. + + Copyright (C) 2016-2020 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Carl Love (cel@us.ibm.com) + Code is based on the main soft-fp library written by: + Richard Henderson (rth@cygnus.com) and + Jakub Jelinek (jj@ultra.linux.cz). + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +/* Note, the hardware conversion instructions for 128-bit integers are + supported for ISA 3.1 and later. Only compile this file with -mcpu=power10 + or newer support. */ + +#include +#include + +#ifndef __FLOAT128_HARDWARE__ +#error "This module must be compiled with IEEE 128-bit hardware support" +#endif + +#ifndef _ARCH_PWR10 +#error "This module must be compiled for Power 10 support" +#endif + +TFtype +__floattikf_hw (TItype_ppc a) +{ + return (TFtype) a; +} + +TFtype +__floatuntikf_hw (UTItype_ppc a) +{ + return (TFtype) a; +} + +TItype_ppc +__fixkfti_hw (TFtype a) +{ + return (TItype_ppc) a; +} + +UTItype_ppc +__fixunskfti_hw (TFtype a) +{ + return (UTItype_ppc) a; +} diff --git a/libgcc/config/rs6000/float128-sed b/libgcc/config/rs6000/float128-sed index d9a089f..c0fcddb 100644 --- a/libgcc/config/rs6000/float128-sed +++ b/libgcc/config/rs6000/float128-sed @@ -8,6 +8,10 @@ s/__fixtfsi/__fixkfsi/g s/__fixunstfdi/__fixunskfdi/g s/__fixunstfsi/__fixunskfsi/g s/__floatditf/__floatdikf/g +s/__floattitf/__floattikf/g +s/__floatuntitf/__floatuntikf/g +s/__fixtfti/__fixkfti/g +s/__fixunstfti/__fixunskfti/g s/__floatsitf/__floatsikf/g s/__floatunditf/__floatundikf/g s/__floatunsitf/__floatunsikf/g diff --git a/libgcc/config/rs6000/float128-sed-hw b/libgcc/config/rs6000/float128-sed-hw index acf36b0..3d2bf55 100644 --- a/libgcc/config/rs6000/float128-sed-hw +++ b/libgcc/config/rs6000/float128-sed-hw @@ -8,6 +8,10 @@ s/__fixtfsi/__fixkfsi_sw/g s/__fixunstfdi/__fixunskfdi_sw/g s/__fixunstfsi/__fixunskfsi_sw/g s/__floatditf/__floatdikf_sw/g +s/__floattitf/__floattikf_sw/g +s/__floatuntitf/__floatuntikf_sw/g +s/__fixtfti/__fixkfti_sw/g +s/__fixunstfti/__fixunskfti_sw/g s/__floatsitf/__floatsikf_sw/g s/__floatunditf/__floatundikf_sw/g s/__floatunsitf/__floatunsikf_sw/g diff --git a/libgcc/config/rs6000/floattikf-sw.c b/libgcc/config/rs6000/floattikf-sw.c new file mode 100644 index 0000000..4e1786c --- /dev/null +++ b/libgcc/config/rs6000/floattikf-sw.c @@ -0,0 +1,51 @@ +/* Software floating-point emulation, convert a 128bit signed integer to IEEE + quad. + + Copyright (C) 2016-2021 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Steven Munroe (munroesj@linux.vnet.ibm.com) + Code is based on the main soft-fp library written by: + Uros Bizjak (ubizjak@gmail.com). + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifdef _ARCH_PPC64 +#include "soft-fp.h" +#include "quad-float128.h" + +TFtype +__floattikf_sw (TItype i) +{ + FP_DECL_EX; + FP_DECL_Q (A); + TFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_Q (A, i, TI_BITS, UTItype); + FP_PACK_RAW_Q (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} +#endif diff --git a/libgcc/config/rs6000/floattikf.c b/libgcc/config/rs6000/floattikf.c deleted file mode 100644 index cc5c7ca..0000000 --- a/libgcc/config/rs6000/floattikf.c +++ /dev/null @@ -1,51 +0,0 @@ -/* Software floating-point emulation, convert a 128bit signed integer to IEEE - quad. - - Copyright (C) 2016-2021 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by Steven Munroe (munroesj@linux.vnet.ibm.com) - Code is based on the main soft-fp library written by: - Uros Bizjak (ubizjak@gmail.com). - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - In addition to the permissions in the GNU Lesser General Public - License, the Free Software Foundation gives you unlimited - permission to link the compiled version of this file into - combinations with other programs, and to distribute those - combinations without any restriction coming from the use of this - file. (The Lesser General Public License restrictions do apply in - other respects; for example, they cover modification of the file, - and distribution when not linked into a combine executable.) - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#ifdef _ARCH_PPC64 -#include "soft-fp.h" -#include "quad-float128.h" - -TFtype -__floattikf (TItype i) -{ - FP_DECL_EX; - FP_DECL_Q (A); - TFtype a; - - FP_INIT_ROUNDMODE; - FP_FROM_INT_Q (A, i, TI_BITS, UTItype); - FP_PACK_RAW_Q (a, A); - FP_HANDLE_EXCEPTIONS; - - return a; -} -#endif diff --git a/libgcc/config/rs6000/floatuntikf-sw.c b/libgcc/config/rs6000/floatuntikf-sw.c new file mode 100644 index 0000000..c4b814d --- /dev/null +++ b/libgcc/config/rs6000/floatuntikf-sw.c @@ -0,0 +1,51 @@ +/* Software floating-point emulation, convert a 128bit unsigned integer to IEEE + quad. + + Copyright (C) 2016-2021 Free Software Foundation, Inc. + This file is part of the GNU C Library. + Contributed by Steven Munroe (munroesj@linux.vnet.ibm.com) + Code is based on the main soft-fp library written by: + Uros Bizjak (ubizjak@gmail.com). + + The GNU C Library is free software; you can redistribute it and/or + modify it under the terms of the GNU Lesser General Public + License as published by the Free Software Foundation; either + version 2.1 of the License, or (at your option) any later version. + + In addition to the permissions in the GNU Lesser General Public + License, the Free Software Foundation gives you unlimited + permission to link the compiled version of this file into + combinations with other programs, and to distribute those + combinations without any restriction coming from the use of this + file. (The Lesser General Public License restrictions do apply in + other respects; for example, they cover modification of the file, + and distribution when not linked into a combine executable.) + + The GNU C Library is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + Lesser General Public License for more details. + + You should have received a copy of the GNU Lesser General Public + License along with the GNU C Library; if not, see + . */ + +#ifdef _ARCH_PPC64 +#include "soft-fp.h" +#include "quad-float128.h" + +TFtype +__floatuntikf_sw (UTItype i) +{ + FP_DECL_EX; + FP_DECL_Q (A); + TFtype a; + + FP_INIT_ROUNDMODE; + FP_FROM_INT_Q (A, i, TI_BITS, UTItype); + FP_PACK_RAW_Q (a, A); + FP_HANDLE_EXCEPTIONS; + + return a; +} +#endif diff --git a/libgcc/config/rs6000/floatuntikf.c b/libgcc/config/rs6000/floatuntikf.c deleted file mode 100644 index 96f2d3b..0000000 --- a/libgcc/config/rs6000/floatuntikf.c +++ /dev/null @@ -1,51 +0,0 @@ -/* Software floating-point emulation, convert a 128bit unsigned integer to IEEE - quad. - - Copyright (C) 2016-2021 Free Software Foundation, Inc. - This file is part of the GNU C Library. - Contributed by Steven Munroe (munroesj@linux.vnet.ibm.com) - Code is based on the main soft-fp library written by: - Uros Bizjak (ubizjak@gmail.com). - - The GNU C Library is free software; you can redistribute it and/or - modify it under the terms of the GNU Lesser General Public - License as published by the Free Software Foundation; either - version 2.1 of the License, or (at your option) any later version. - - In addition to the permissions in the GNU Lesser General Public - License, the Free Software Foundation gives you unlimited - permission to link the compiled version of this file into - combinations with other programs, and to distribute those - combinations without any restriction coming from the use of this - file. (The Lesser General Public License restrictions do apply in - other respects; for example, they cover modification of the file, - and distribution when not linked into a combine executable.) - - The GNU C Library is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU - Lesser General Public License for more details. - - You should have received a copy of the GNU Lesser General Public - License along with the GNU C Library; if not, see - . */ - -#ifdef _ARCH_PPC64 -#include "soft-fp.h" -#include "quad-float128.h" - -TFtype -__floatuntikf (UTItype i) -{ - FP_DECL_EX; - FP_DECL_Q (A); - TFtype a; - - FP_INIT_ROUNDMODE; - FP_FROM_INT_Q (A, i, TI_BITS, UTItype); - FP_PACK_RAW_Q (a, A); - FP_HANDLE_EXCEPTIONS; - - return a; -} -#endif diff --git a/libgcc/config/rs6000/quad-float128.h b/libgcc/config/rs6000/quad-float128.h index 5beb153..c4d775b 100644 --- a/libgcc/config/rs6000/quad-float128.h +++ b/libgcc/config/rs6000/quad-float128.h @@ -88,19 +88,18 @@ extern USItype_ppc __fixunskfsi_sw (TFtype); extern UDItype_ppc __fixunskfdi_sw (TFtype); extern TFtype __floatsikf_sw (SItype_ppc); extern TFtype __floatdikf_sw (DItype_ppc); +extern TFtype __floattikf_sw (TItype_ppc); extern TFtype __floatunsikf_sw (USItype_ppc); extern TFtype __floatundikf_sw (UDItype_ppc); +extern TFtype __floatuntikf_sw (UTItype_ppc); +extern TItype_ppc __fixkfti_sw (TFtype); +extern UTItype_ppc __fixunskfti_sw (TFtype); extern IBM128_TYPE __extendkftf2_sw (TFtype); extern TFtype __trunctfkf2_sw (IBM128_TYPE); extern TCtype __mulkc3_sw (TFtype, TFtype, TFtype, TFtype); extern TCtype __divkc3_sw (TFtype, TFtype, TFtype, TFtype); #ifdef _ARCH_PPC64 -/* We do not provide ifunc resolvers for __fixkfti, __fixunskfti, __floattikf, - and __floatuntikf. There is no ISA 3.0 instruction that converts between - 128-bit integer types and 128-bit IEEE floating point, or vice versa. So - use the emulator functions for these conversions. */ - extern TItype_ppc __fixkfti (TFtype); extern UTItype_ppc __fixunskfti (TFtype); extern TFtype __floattikf (TItype_ppc); @@ -131,8 +130,12 @@ extern USItype_ppc __fixunskfsi_hw (TFtype); extern UDItype_ppc __fixunskfdi_hw (TFtype); extern TFtype __floatsikf_hw (SItype_ppc); extern TFtype __floatdikf_hw (DItype_ppc); +extern TFtype __floattikf_hw (TItype_ppc); extern TFtype __floatunsikf_hw (USItype_ppc); extern TFtype __floatundikf_hw (UDItype_ppc); +extern TFtype __floatuntikf_hw (UTItype_ppc); +extern TItype_ppc __fixkfti_hw (TFtype); +extern UTItype_ppc __fixunskfti_hw (TFtype); extern IBM128_TYPE __extendkftf2_hw (TFtype); extern TFtype __trunctfkf2_hw (IBM128_TYPE); extern TCtype __mulkc3_hw (TFtype, TFtype, TFtype, TFtype); @@ -163,8 +166,12 @@ extern USItype_ppc __fixunskfsi (TFtype); extern UDItype_ppc __fixunskfdi (TFtype); extern TFtype __floatsikf (SItype_ppc); extern TFtype __floatdikf (DItype_ppc); +extern TFtype __floattikf (TItype_ppc); extern TFtype __floatunsikf (USItype_ppc); extern TFtype __floatundikf (UDItype_ppc); +extern TFtype __floatuntikf (UTItype_ppc); +extern TItype_ppc __fixkfti (TFtype); +extern UTItype_ppc __fixunskfti (TFtype); extern IBM128_TYPE __extendkftf2 (TFtype); extern TFtype __trunctfkf2 (IBM128_TYPE); diff --git a/libgcc/config/rs6000/t-float128 b/libgcc/config/rs6000/t-float128 index d745f0d..b09b566 100644 --- a/libgcc/config/rs6000/t-float128 +++ b/libgcc/config/rs6000/t-float128 @@ -31,7 +31,8 @@ ibm128_dec_funcs = _tf_to_sd _tf_to_dd _tf_to_td \ _sd_to_tf _dd_to_tf _td_to_tf # New functions for software emulation -fp128_ppc_funcs = floattikf floatuntikf fixkfti fixunskfti \ +fp128_ppc_funcs = floattikf-sw floatuntikf-sw \ + fixkfti-sw fixunskfti-sw \ extendkftf2-sw trunctfkf2-sw \ sfp-exceptions _mulkc3 _divkc3 _powikf2 @@ -47,13 +48,16 @@ fp128_ppc_obj = $(fp128_ppc_static_obj) $(fp128_ppc_shared_obj) # All functions fp128_funcs = $(fp128_softfp_funcs) $(fp128_ppc_funcs) \ - $(fp128_hw_funcs) $(fp128_ifunc_funcs) + $(fp128_hw_funcs) $(fp128_ifunc_funcs) \ + $(fp128_3_1_hw_funcs) fp128_src = $(fp128_softfp_src) $(fp128_ppc_src) \ - $(fp128_hw_src) $(fp128_ifunc_src) + $(fp128_hw_src) $(fp128_ifunc_src) \ + $(fp128_3_1_hw_src) fp128_obj = $(fp128_softfp_obj) $(fp128_ppc_obj) \ - $(fp128_hw_obj) $(fp128_ifunc_obj) + $(fp128_hw_obj) $(fp128_ifunc_obj) \ + $(fp128_3_1_hw_obj) fp128_sed = $(srcdir)/config/rs6000/float128-sed$(fp128_sed_hw) fp128_dep = $(fp128_sed) $(srcdir)/config/rs6000/t-float128 diff --git a/libgcc/config/rs6000/t-float128-hw b/libgcc/config/rs6000/t-float128-hw index d64ca4d..c082736 100644 --- a/libgcc/config/rs6000/t-float128-hw +++ b/libgcc/config/rs6000/t-float128-hw @@ -13,6 +13,13 @@ fp128_hw_static_obj = $(addsuffix $(objext),$(fp128_hw_funcs)) fp128_hw_shared_obj = $(addsuffix _s$(objext),$(fp128_hw_funcs)) fp128_hw_obj = $(fp128_hw_static_obj) $(fp128_hw_shared_obj) +# New functions for ISA 3.1 hardware support +fp128_3_1_hw_funcs = float128-p10 +fp128_3_1_hw_src = $(srcdir)/config/rs6000/float128-p10.c +fp128_3_1_hw_static_obj = $(addsuffix $(objext),$(fp128_3_1_hw_funcs)) +fp128_3_1_hw_shared_obj = $(addsuffix _s$(objext),$(fp128_3_1_hw_funcs)) +fp128_3_1_hw_obj = $(fp128_3_1_hw_static_obj) $(fp128_3_1_hw_shared_obj) + fp128_ifunc_funcs = float128-ifunc fp128_ifunc_src = $(srcdir)/config/rs6000/float128-ifunc.c fp128_ifunc_static_obj = float128-ifunc$(objext) @@ -30,9 +37,18 @@ FP128_CFLAGS_HW = -Wno-type-limits -mvsx -mfloat128 \ -I$(srcdir)/config/rs6000 \ $(FLOAT128_HW_INSNS) +FP128_3_1_CFLAGS_HW = -Wno-type-limits -mvsx -mcpu=power10 \ + -mfloat128-hardware -mno-gnu-attribute \ + -I$(srcdir)/soft-fp \ + -I$(srcdir)/config/rs6000 \ + $(FLOAT128_HW_INSNS) + $(fp128_hw_obj) : INTERNAL_CFLAGS += $(FP128_CFLAGS_HW) $(fp128_hw_obj) : $(srcdir)/config/rs6000/t-float128-hw +$(fp128_3_1_hw_obj) : INTERNAL_CFLAGS += $(FP128_3_1_CFLAGS_HW) +$(fp128_3_1_hw_obj) : $(srcdir)/config/rs6000/t-float128-p10-hw + $(fp128_ifunc_obj) : INTERNAL_CFLAGS += $(FP128_CFLAGS_SW) $(fp128_ifunc_obj) : $(srcdir)/config/rs6000/t-float128-hw diff --git a/libgcc/config/rs6000/t-float128-p10-hw b/libgcc/config/rs6000/t-float128-p10-hw new file mode 100644 index 0000000..de36227 --- /dev/null +++ b/libgcc/config/rs6000/t-float128-p10-hw @@ -0,0 +1,24 @@ +# Support for adding __float128 hardware support to the powerpc. +# Tell the float128 functions that the ISA 3.1 hardware support can +# be compiled it to be selected via IFUNC functions. + +FLOAT128_HW_INSNS = -DFLOAT128_HW_INSNS + +# New functions for hardware support + +fp128_3_1_hw_funcs = float128-p10 +fp128_3_1_hw_src = $(srcdir)/config/rs6000/float128-p10.c +fp128_3_1_hw_static_obj = $(addsuffix $(objext),$(fp128_3_1_hw_funcs)) +fp128_3_1_hw_shared_obj = $(addsuffix _s$(objext),$(fp128_3_1_hw_funcs)) +fp128_3_1_hw_obj = $(fp128_3_1_hw_static_obj) $(fp128_3_1_hw_shared_obj) + +# Build the hardware support functions with appropriate hardware support +FP128_3_1_CFLAGS_HW = -Wno-type-limits -mvsx -mfloat128 \ + -mpower10 \ + -mfloat128-hardware -mno-gnu-attribute \ + -I$(srcdir)/soft-fp \ + -I$(srcdir)/config/rs6000 \ + $(FLOAT128_HW_INSNS) + +$(fp128_3_1_hw_obj) : INTERNAL_CFLAGS += $(FP128_3_1_CFLAGS_HW) +$(fp128_3_1_hw_obj) : $(srcdir)/config/rs6000/t-float128-p10-hw -- cgit v1.1 From 7a895955095b6f4d9fcf3b6686dc1113591da28d Mon Sep 17 00:00:00 2001 From: Segher Boessenkool Date: Thu, 10 Jun 2021 15:14:49 +0000 Subject: rs6000: Fix *TItype_ppc The *TItype_ppc definitions are guarded by _ARCH_PPC64, so all declarations using it should do so as well. 2021-06-10 Segher Boessenkool libgcc/ * config/rs6000/quad-float128.h: Guard all uses of [U]TItype_ppc by _ARCH_PPC64 . --- libgcc/config/rs6000/quad-float128.h | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'libgcc/config') diff --git a/libgcc/config/rs6000/quad-float128.h b/libgcc/config/rs6000/quad-float128.h index c4d775b..c7f2b77 100644 --- a/libgcc/config/rs6000/quad-float128.h +++ b/libgcc/config/rs6000/quad-float128.h @@ -88,12 +88,16 @@ extern USItype_ppc __fixunskfsi_sw (TFtype); extern UDItype_ppc __fixunskfdi_sw (TFtype); extern TFtype __floatsikf_sw (SItype_ppc); extern TFtype __floatdikf_sw (DItype_ppc); +#ifdef _ARCH_PPC64 extern TFtype __floattikf_sw (TItype_ppc); +#endif extern TFtype __floatunsikf_sw (USItype_ppc); extern TFtype __floatundikf_sw (UDItype_ppc); +#ifdef _ARCH_PPC64 extern TFtype __floatuntikf_sw (UTItype_ppc); extern TItype_ppc __fixkfti_sw (TFtype); extern UTItype_ppc __fixunskfti_sw (TFtype); +#endif extern IBM128_TYPE __extendkftf2_sw (TFtype); extern TFtype __trunctfkf2_sw (IBM128_TYPE); extern TCtype __mulkc3_sw (TFtype, TFtype, TFtype, TFtype); @@ -130,12 +134,16 @@ extern USItype_ppc __fixunskfsi_hw (TFtype); extern UDItype_ppc __fixunskfdi_hw (TFtype); extern TFtype __floatsikf_hw (SItype_ppc); extern TFtype __floatdikf_hw (DItype_ppc); +#ifdef _ARCH_PPC64 extern TFtype __floattikf_hw (TItype_ppc); +#endif extern TFtype __floatunsikf_hw (USItype_ppc); extern TFtype __floatundikf_hw (UDItype_ppc); +#ifdef _ARCH_PPC64 extern TFtype __floatuntikf_hw (UTItype_ppc); extern TItype_ppc __fixkfti_hw (TFtype); extern UTItype_ppc __fixunskfti_hw (TFtype); +#endif extern IBM128_TYPE __extendkftf2_hw (TFtype); extern TFtype __trunctfkf2_hw (IBM128_TYPE); extern TCtype __mulkc3_hw (TFtype, TFtype, TFtype, TFtype); @@ -166,12 +174,16 @@ extern USItype_ppc __fixunskfsi (TFtype); extern UDItype_ppc __fixunskfdi (TFtype); extern TFtype __floatsikf (SItype_ppc); extern TFtype __floatdikf (DItype_ppc); +#ifdef _ARCH_PPC64 extern TFtype __floattikf (TItype_ppc); +#endif extern TFtype __floatunsikf (USItype_ppc); extern TFtype __floatundikf (UDItype_ppc); +#ifdef _ARCH_PPC64 extern TFtype __floatuntikf (UTItype_ppc); extern TItype_ppc __fixkfti (TFtype); extern UTItype_ppc __fixunskfti (TFtype); +#endif extern IBM128_TYPE __extendkftf2 (TFtype); extern TFtype __trunctfkf2 (IBM128_TYPE); -- cgit v1.1 From c5ed0148347beea1bd34795de146adddd2454c36 Mon Sep 17 00:00:00 2001 From: Srinath Parvathaneni Date: Fri, 11 Jun 2021 15:56:37 +0100 Subject: arm: Fix the mve multilib for the broken cmse support (pr99939). The current CMSE support in the multilib build for "-march=armv8.1-m.main+mve -mfloat-abi=hard -mfpu=auto" is broken as specified in PR99939 and this patch fixes the issue. gcc/testsuite/ChangeLog: 2021-06-11 Srinath Parvathaneni PR target/99939 * gcc.target/arm/cmse/cmse-18.c: Add separate scan-assembler directives check for target is v8.1-m.main+mve or not before comparing the assembly output. * gcc.target/arm/cmse/cmse-20.c: New test. libgcc/ChangeLog: 2021-06-11 Srinath Parvathaneni PR target/99939 * config/arm/cmse_nonsecure_call.S: Add __ARM_FEATURE_MVE macro. * config/arm/t-arm: To link cmse.o and cmse_nonsecure_call.o on passing -mcmse option. --- libgcc/config/arm/cmse_nonsecure_call.S | 4 ++-- libgcc/config/arm/t-arm | 5 ++--- 2 files changed, 4 insertions(+), 5 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/arm/cmse_nonsecure_call.S b/libgcc/config/arm/cmse_nonsecure_call.S index 146f3ed..00830ad 100644 --- a/libgcc/config/arm/cmse_nonsecure_call.S +++ b/libgcc/config/arm/cmse_nonsecure_call.S @@ -25,7 +25,7 @@ .syntax unified #ifdef __ARM_PCS_VFP -# if __ARM_FP & 0x8 +# if (__ARM_FP & 0x8) || (__ARM_FEATURE_MVE & 1) .fpu fpv5-d16 # else .fpu fpv4-sp-d16 @@ -59,7 +59,7 @@ vmov s24, s25, r5, r5 vmov s26, s27, r5, r5 vmov s28, s29, r5, r5 vmov s30, s31, r5, r5 -#elif __ARM_FP & 0x08 +#elif (__ARM_FP & 0x8) || (__ARM_FEATURE_MVE & 1) vmov.f64 d9, d8 vmov.f64 d10, d8 vmov.f64 d11, d8 diff --git a/libgcc/config/arm/t-arm b/libgcc/config/arm/t-arm index 3625a25..c1553d4 100644 --- a/libgcc/config/arm/t-arm +++ b/libgcc/config/arm/t-arm @@ -3,18 +3,17 @@ LIB1ASMFUNCS = _thumb1_case_sqi _thumb1_case_uqi _thumb1_case_shi \ _thumb1_case_uhi _thumb1_case_si _speculation_barrier HAVE_CMSE:=$(findstring __ARM_FEATURE_CMSE,$(shell $(gcc_compile_bare) -dM -E - /dev/null 2>/dev/null; echo $$?),0) CMSE_OPTS:=-mcmse endif ifdef HAVE_CMSE -ifndef HAVE_V81M + libgcc-objects += cmse.o cmse_nonsecure_call.o cmse.o: $(srcdir)/config/arm/cmse.c $(gcc_compile) -c $(CMSE_OPTS) $< + cmse_nonsecure_call.o: $(srcdir)/config/arm/cmse_nonsecure_call.S $(gcc_compile) -c $< endif -endif -- cgit v1.1 From 47749c43acb460ac8f410ee599616d1860ee5a35 Mon Sep 17 00:00:00 2001 From: Kewen Lin Date: Tue, 22 Jun 2021 23:09:30 -0500 Subject: rs6000: Fix typos in float128 ISA3.1 support The recent float128 ISA3.1 support (r12-1340) has some typos, it makes the libgcc build fail if it's with one binutils (assembler) which doesn't support Power10 insns. The error looks like: Error: invalid switch -mpower10 Error: unrecognized option -mpower10 ... [...libgcc/shared-object.mk:14: float128-p10.o] Error 1 What this patch does are: - fix test target typo libgcc_cv_powerpc_3_1_float128_hw (written wrongly as libgcc_cv_powerpc_float128_hw, so it's going to build ISA3.1 stuffs just when detecting ISA3.0). - fix test used for libgcc_cv_powerpc_3_1_float128_hw check. - fix test option used for libgcc_cv_powerpc_3_1_float128_hw check. - remove the ISA3.1 related contents from t-float128-hw. - add new macro FLOAT128_HW_INSNS_ISA3_1 to differentiate ISA3.1 content from ISA3.0 part in ifunc support. Bootstrapped/regtested on: - powerpc64le-linux-gnu P10 - powerpc64le-linux-gnu P9 (w/i and w/o p10 supported as) - powerpc64-linux-gnu P8 (w/i and w/o p10 supported as) libgcc/ChangeLog: * configure: Regenerate. * configure.ac (test for libgcc_cv_powerpc_3_1_float128_hw): Fix typos among the name, CFLAGS and the test. * config/rs6000/t-float128-hw (fp128_3_1_hw_funcs, fp128_3_1_hw_src, fp128_3_1_hw_static_obj, fp128_3_1_hw_shared_obj, fp128_3_1_hw_obj): Remove. * config/rs6000/t-float128-p10-hw (FLOAT128_HW_INSNS): Append macro FLOAT128_HW_INSNS_ISA3_1. (FP128_3_1_CFLAGS_HW): Fix option typo. * config/rs6000/float128-ifunc.c (SW_OR_HW_ISA3_1): Guard this with FLOAT128_HW_INSNS_ISA3_1. (__floattikf_resolve): Likewise. (__floatuntikf_resolve): Likewise. (__fixkfti_resolve): Likewise. (__fixunskfti_resolve): Likewise. (__floattikf): Likewise. (__floatuntikf): Likewise. (__fixkfti): Likewise. (__fixunskfti): Likewise. --- libgcc/config/rs6000/float128-ifunc.c | 9 ++++++++- libgcc/config/rs6000/t-float128-hw | 16 ---------------- libgcc/config/rs6000/t-float128-p10-hw | 4 ++-- 3 files changed, 10 insertions(+), 19 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/rs6000/float128-ifunc.c b/libgcc/config/rs6000/float128-ifunc.c index 57545dd..ef7f731 100644 --- a/libgcc/config/rs6000/float128-ifunc.c +++ b/libgcc/config/rs6000/float128-ifunc.c @@ -46,7 +46,9 @@ #endif #define SW_OR_HW(SW, HW) (__builtin_cpu_supports ("ieee128") ? HW : SW) +#ifdef FLOAT128_HW_INSNS_ISA3_1 #define SW_OR_HW_ISA3_1(SW, HW) (__builtin_cpu_supports ("arch_3_1") ? HW : SW) +#endif /* Resolvers. */ static __typeof__ (__addkf3_sw) * @@ -97,6 +99,7 @@ __floatdikf_resolve (void) return SW_OR_HW (__floatdikf_sw, __floatdikf_hw); } +#ifdef FLOAT128_HW_INSNS_ISA3_1 static __typeof__ (__floattikf_sw) * __floattikf_resolve (void) { @@ -108,6 +111,7 @@ __floatuntikf_resolve (void) { return SW_OR_HW_ISA3_1 (__floatuntikf_sw, __floatuntikf_hw); } +#endif static __typeof__ (__floatunsikf_sw) * __floatunsikf_resolve (void) @@ -121,7 +125,7 @@ __floatundikf_resolve (void) return SW_OR_HW (__floatundikf_sw, __floatundikf_hw); } - +#ifdef FLOAT128_HW_INSNS_ISA3_1 static __typeof__ (__fixkfti_sw) * __fixkfti_resolve (void) { @@ -133,6 +137,7 @@ __fixunskfti_resolve (void) { return SW_OR_HW_ISA3_1 (__fixunskfti_sw, __fixunskfti_hw); } +#endif static __typeof__ (__fixkfsi_sw) * __fixkfsi_resolve (void) @@ -323,6 +328,7 @@ TFtype __floatsikf (SItype_ppc) TFtype __floatdikf (DItype_ppc) __attribute__ ((__ifunc__ ("__floatdikf_resolve"))); +#ifdef FLOAT128_HW_INSNS_ISA3_1 TFtype __floattikf (TItype_ppc) __attribute__ ((__ifunc__ ("__floattikf_resolve"))); @@ -334,6 +340,7 @@ TItype_ppc __fixkfti (TFtype) UTItype_ppc __fixunskfti (TFtype) __attribute__ ((__ifunc__ ("__fixunskfti_resolve"))); +#endif TFtype __floatunsikf (USItype_ppc) __attribute__ ((__ifunc__ ("__floatunsikf_resolve"))); diff --git a/libgcc/config/rs6000/t-float128-hw b/libgcc/config/rs6000/t-float128-hw index c082736..d64ca4d 100644 --- a/libgcc/config/rs6000/t-float128-hw +++ b/libgcc/config/rs6000/t-float128-hw @@ -13,13 +13,6 @@ fp128_hw_static_obj = $(addsuffix $(objext),$(fp128_hw_funcs)) fp128_hw_shared_obj = $(addsuffix _s$(objext),$(fp128_hw_funcs)) fp128_hw_obj = $(fp128_hw_static_obj) $(fp128_hw_shared_obj) -# New functions for ISA 3.1 hardware support -fp128_3_1_hw_funcs = float128-p10 -fp128_3_1_hw_src = $(srcdir)/config/rs6000/float128-p10.c -fp128_3_1_hw_static_obj = $(addsuffix $(objext),$(fp128_3_1_hw_funcs)) -fp128_3_1_hw_shared_obj = $(addsuffix _s$(objext),$(fp128_3_1_hw_funcs)) -fp128_3_1_hw_obj = $(fp128_3_1_hw_static_obj) $(fp128_3_1_hw_shared_obj) - fp128_ifunc_funcs = float128-ifunc fp128_ifunc_src = $(srcdir)/config/rs6000/float128-ifunc.c fp128_ifunc_static_obj = float128-ifunc$(objext) @@ -37,18 +30,9 @@ FP128_CFLAGS_HW = -Wno-type-limits -mvsx -mfloat128 \ -I$(srcdir)/config/rs6000 \ $(FLOAT128_HW_INSNS) -FP128_3_1_CFLAGS_HW = -Wno-type-limits -mvsx -mcpu=power10 \ - -mfloat128-hardware -mno-gnu-attribute \ - -I$(srcdir)/soft-fp \ - -I$(srcdir)/config/rs6000 \ - $(FLOAT128_HW_INSNS) - $(fp128_hw_obj) : INTERNAL_CFLAGS += $(FP128_CFLAGS_HW) $(fp128_hw_obj) : $(srcdir)/config/rs6000/t-float128-hw -$(fp128_3_1_hw_obj) : INTERNAL_CFLAGS += $(FP128_3_1_CFLAGS_HW) -$(fp128_3_1_hw_obj) : $(srcdir)/config/rs6000/t-float128-p10-hw - $(fp128_ifunc_obj) : INTERNAL_CFLAGS += $(FP128_CFLAGS_SW) $(fp128_ifunc_obj) : $(srcdir)/config/rs6000/t-float128-hw diff --git a/libgcc/config/rs6000/t-float128-p10-hw b/libgcc/config/rs6000/t-float128-p10-hw index de36227..edaaee0 100644 --- a/libgcc/config/rs6000/t-float128-p10-hw +++ b/libgcc/config/rs6000/t-float128-p10-hw @@ -2,7 +2,7 @@ # Tell the float128 functions that the ISA 3.1 hardware support can # be compiled it to be selected via IFUNC functions. -FLOAT128_HW_INSNS = -DFLOAT128_HW_INSNS +FLOAT128_HW_INSNS += -DFLOAT128_HW_INSNS_ISA3_1 # New functions for hardware support @@ -14,7 +14,7 @@ fp128_3_1_hw_obj = $(fp128_3_1_hw_static_obj) $(fp128_3_1_hw_shared_obj) # Build the hardware support functions with appropriate hardware support FP128_3_1_CFLAGS_HW = -Wno-type-limits -mvsx -mfloat128 \ - -mpower10 \ + -mcpu=power10 \ -mfloat128-hardware -mno-gnu-attribute \ -I$(srcdir)/soft-fp \ -I$(srcdir)/config/rs6000 \ -- cgit v1.1 From 7a973fc03a52b5f39bf60dc0ef2fdf4a2e2ec7c8 Mon Sep 17 00:00:00 2001 From: Julian Brown Date: Thu, 17 Jun 2021 10:55:48 -0700 Subject: amdgcn: Use unsigned types for udivsi3/umodsi3 libgcc helper args/return This patch changes the argument and return types for the libgcc __udivsi3 and __umodsi3 helper functions for GCN to USItype instead of SItype. This is probably just cosmetic in practice. 2021-06-18 Julian Brown libgcc/ * config/gcn/lib2-divmod.c (__udivsi3, __umodsi3): Change argument and return types to USItype. * config/gcn/lib2-gcn.h (__udivsi3, __umodsi3): Update prototypes. --- libgcc/config/gcn/lib2-divmod.c | 8 ++++---- libgcc/config/gcn/lib2-gcn.h | 4 ++-- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/gcn/lib2-divmod.c b/libgcc/config/gcn/lib2-divmod.c index 0d6ca44..7c72e24 100644 --- a/libgcc/config/gcn/lib2-divmod.c +++ b/libgcc/config/gcn/lib2-divmod.c @@ -102,15 +102,15 @@ __modsi3 (SItype a, SItype b) } -SItype -__udivsi3 (SItype a, SItype b) +USItype +__udivsi3 (USItype a, USItype b) { return udivmodsi4 (a, b, 0); } -SItype -__umodsi3 (SItype a, SItype b) +USItype +__umodsi3 (USItype a, USItype b) { return udivmodsi4 (a, b, 1); } diff --git a/libgcc/config/gcn/lib2-gcn.h b/libgcc/config/gcn/lib2-gcn.h index 11476c4..9223d73 100644 --- a/libgcc/config/gcn/lib2-gcn.h +++ b/libgcc/config/gcn/lib2-gcn.h @@ -38,8 +38,8 @@ typedef int word_type __attribute__ ((mode (__word__))); /* Exported functions. */ extern SItype __divsi3 (SItype, SItype); extern SItype __modsi3 (SItype, SItype); -extern SItype __udivsi3 (SItype, SItype); -extern SItype __umodsi3 (SItype, SItype); +extern USItype __udivsi3 (USItype, USItype); +extern USItype __umodsi3 (USItype, USItype); extern HItype __divhi3 (HItype, HItype); extern HItype __modhi3 (HItype, HItype); extern UHItype __udivhi3 (UHItype, UHItype); -- cgit v1.1 From a8a730cd99184e62c4d026b8c775b96589a9c262 Mon Sep 17 00:00:00 2001 From: Julian Brown Date: Wed, 9 Jun 2021 06:18:23 -0700 Subject: amdgcn: Enable support for TImode for AMD GCN This patch enables support for TImode for AMD GCN, the lack of which is currently causing a number of test failures for the target and which is also needed to support "omp_depend_kind" for OpenMP 5.0, since that is implemented as a 128-bit integer. Several libgcc support routines are built by default for the "word size" of a machine, and also for "2 * word size" of the machine. The libgcc build for AMD GCN is changed so that it builds for a "word size" of 64 bits, in order to better match the (64-bit) host compiler. However it isn't really true that we have 64-bit words -- GCN has 32-bit registers, so changing UNITS_PER_WORD unconditionally would be the wrong thing to do. Changing this setting for libgcc (only) means that support routines are built for "single word" operations that are DImode (64 bits), and those for "double word" operations are built for TImode (128 bits). That leaves some gaps regarding previous operations that were built for a "single word" size of 32 bits and a "double word" size of 64 bits (generic code doesn't cover both alternatives for all operations that might be needed). Those gaps are filled in by this patch, or by the preceding patches in the series. 2021-06-18 Julian Brown gcc/ * config/gcn/gcn.c (gcn_init_libfuncs): New function. (TARGET_INIT_LIBFUNCS): Define target hook using above function. * config/gcn/gcn.h (UNITS_PER_WORD): Define to 8 for IN_LIBGCC2, 4 otherwise. (LIBGCC2_UNITS_PER_WORD, BITS_PER_WORD): Remove definitions. (MAX_FIXED_MODE_SIZE): Change to 128. libgcc/ * config/gcn/lib2-bswapti2.c: New file. * config/gcn/lib2-divmod-di.c: New file. * config/gcn/lib2-gcn.h (DItype, UDItype, TItype, UTItype): Add typedefs. (__divdi3, __moddi3, __udivdi3, __umoddi3): Add prototypes. * config/gcn/t-amdgcn (LIB2ADD): Add lib2-divmod-di.c and lib2-bswapti2.c. --- libgcc/config/gcn/lib2-bswapti2.c | 47 ++++++++++++++++++++++++++++++++++++++ libgcc/config/gcn/lib2-divmod-di.c | 35 ++++++++++++++++++++++++++++ libgcc/config/gcn/lib2-gcn.h | 8 +++++++ libgcc/config/gcn/t-amdgcn | 2 ++ 4 files changed, 92 insertions(+) create mode 100644 libgcc/config/gcn/lib2-bswapti2.c create mode 100644 libgcc/config/gcn/lib2-divmod-di.c (limited to 'libgcc/config') diff --git a/libgcc/config/gcn/lib2-bswapti2.c b/libgcc/config/gcn/lib2-bswapti2.c new file mode 100644 index 0000000..c19b70b --- /dev/null +++ b/libgcc/config/gcn/lib2-bswapti2.c @@ -0,0 +1,47 @@ +/* Copyright (C) 2021 Free Software Foundation, Inc. + +This file is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This file is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +. */ + +#include "lib2-gcn.h" + +UTItype +__bswapti2 (UTItype x) +{ + UDItype lo, hi, outlo, outhi; + lo = (UDItype) x; + hi = (UDItype) (x >> 64); + outhi = (lo >> 56) & 0xff; + outhi |= ((lo >> 48) & 0xff) << 8; + outhi |= ((lo >> 40) & 0xff) << 16; + outhi |= ((lo >> 32) & 0xff) << 24; + outhi |= ((lo >> 24) & 0xff) << 32; + outhi |= ((lo >> 16) & 0xff) << 40; + outhi |= ((lo >> 8) & 0xff) << 48; + outhi |= (lo & 0xff) << 56; + outlo = (hi >> 56) & 0xff; + outlo |= ((hi >> 48) & 0xff) << 8; + outlo |= ((hi >> 40) & 0xff) << 16; + outlo |= ((hi >> 32) & 0xff) << 24; + outlo |= ((hi >> 24) & 0xff) << 32; + outlo |= ((hi >> 16) & 0xff) << 40; + outlo |= ((hi >> 8) & 0xff) << 48; + outlo |= (hi & 0xff) << 56; + return ((UTItype) outhi << 64) | outlo; +} diff --git a/libgcc/config/gcn/lib2-divmod-di.c b/libgcc/config/gcn/lib2-divmod-di.c new file mode 100644 index 0000000..ceb3962 --- /dev/null +++ b/libgcc/config/gcn/lib2-divmod-di.c @@ -0,0 +1,35 @@ +/* Copyright (C) 2021 Free Software Foundation, Inc. + Contributed by Mentor Graphics, Inc. + +This file is free software; you can redistribute it and/or modify it +under the terms of the GNU General Public License as published by the +Free Software Foundation; either version 3, or (at your option) any +later version. + +This file is distributed in the hope that it will be useful, but +WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU +General Public License for more details. + +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see +. */ + +#include "lib2-gcn.h" + +/* We really want DImode here: override LIBGCC2_UNITS_PER_WORD. */ +#define LIBGCC2_UNITS_PER_WORD 4 +#define TARGET_HAS_NO_HW_DIVIDE + +#define L_divmoddi4 +#define L_divdi3 +#define L_moddi3 +#define L_udivdi3 +#define L_umoddi3 + +#include "libgcc2.c" diff --git a/libgcc/config/gcn/lib2-gcn.h b/libgcc/config/gcn/lib2-gcn.h index 9223d73..155cf7c 100644 --- a/libgcc/config/gcn/lib2-gcn.h +++ b/libgcc/config/gcn/lib2-gcn.h @@ -33,9 +33,17 @@ typedef short HItype __attribute__ ((mode (HI))); typedef unsigned short UHItype __attribute__ ((mode (HI))); typedef int SItype __attribute__ ((mode (SI))); typedef unsigned int USItype __attribute__ ((mode (SI))); +typedef int DItype __attribute__ ((mode (DI))); +typedef unsigned int UDItype __attribute__ ((mode (DI))); +typedef int TItype __attribute__ ((mode (TI))); +typedef unsigned int UTItype __attribute__ ((mode (TI))); typedef int word_type __attribute__ ((mode (__word__))); /* Exported functions. */ +extern DItype __divdi3 (DItype, DItype); +extern DItype __moddi3 (DItype, DItype); +extern UDItype __udivdi3 (UDItype, UDItype); +extern UDItype __umoddi3 (UDItype, UDItype); extern SItype __divsi3 (SItype, SItype); extern SItype __modsi3 (SItype, SItype); extern USItype __udivsi3 (USItype, USItype); diff --git a/libgcc/config/gcn/t-amdgcn b/libgcc/config/gcn/t-amdgcn index fe7b5fa..38bde54 100644 --- a/libgcc/config/gcn/t-amdgcn +++ b/libgcc/config/gcn/t-amdgcn @@ -1,6 +1,8 @@ LIB2ADD += $(srcdir)/config/gcn/atomic.c \ $(srcdir)/config/gcn/lib2-divmod.c \ $(srcdir)/config/gcn/lib2-divmod-hi.c \ + $(srcdir)/config/gcn/lib2-divmod-di.c \ + $(srcdir)/config/gcn/lib2-bswapti2.c \ $(srcdir)/config/gcn/unwind-gcn.c LIB2ADDEH= -- cgit v1.1 From cd6ca96f5d530e4ee07b65ac8b075119ba5bb035 Mon Sep 17 00:00:00 2001 From: Alan Modra Date: Tue, 29 Jun 2021 13:31:45 +0930 Subject: [POWER10] __morestack calls from pcrel code Compiling gcc/testsuite/gcc.dg/split-*.c and others with -mcpu=power10 and linking with a non-pcrel libgcc results in crashes due to the power10 pcrel code not having r2 set for the generic-morestack.c functions called from __morestack. There is also a problem when non-pcrel code calls a pcrel libgcc. See the patch comments. A similar situation theoretically occurs with ELFv1 multi-toc executables, when __morestack might be located in a different toc group to its caller. This patch makes no attempt to fix that, since the gold linker does not support multi-toc (gold is needed for proper support of -fsplit-stack code) nor does gcc emit __morestack calls that support multi-toc. * config/rs6000/morestack.S (R2_SAVE): Define. (__morestack): Save and restore r2. Set up r2 for called functions. --- libgcc/config/rs6000/morestack.S | 41 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) (limited to 'libgcc/config') diff --git a/libgcc/config/rs6000/morestack.S b/libgcc/config/rs6000/morestack.S index 4a07de9..a2e255e 100644 --- a/libgcc/config/rs6000/morestack.S +++ b/libgcc/config/rs6000/morestack.S @@ -31,6 +31,7 @@ #define PARAMS 48 #endif #define MORESTACK_FRAMESIZE (PARAMS+96) +#define R2_SAVE -MORESTACK_FRAMESIZE+PARAMS-8 #define PARAMREG_SAVE -MORESTACK_FRAMESIZE+PARAMS+0 #define STATIC_CHAIN_SAVE -MORESTACK_FRAMESIZE+PARAMS+64 #define R29_SAVE -MORESTACK_FRAMESIZE+PARAMS+72 @@ -143,6 +144,17 @@ ENTRY0(__morestack_non_split) # cr7 must also be preserved. ENTRY0(__morestack) + +#if _CALL_ELF == 2 +# Functions with localentry bits of zero cannot make calls if those +# calls might change r2. This is true generally, and also true for +# __morestack with its special calling convention. When __morestack's +# caller is non-pcrel but libgcc is pcrel, the functions called here +# might modify r2. r2 must be preserved on exit, and also restored +# for the call back to our caller. + std %r2,R2_SAVE(%r1) +#endif + # Save parameter passing registers, our arguments, lr, r29 # and use r29 as a frame pointer. std %r3,PARAMREG_SAVE+0(%r1) @@ -161,10 +173,24 @@ ENTRY0(__morestack) std %r12,LINKREG_SAVE(%r1) std %r3,NEWSTACKSIZE_SAVE(%r1) # new stack size mr %r29,%r1 +#if _CALL_ELF == 2 + .cfi_offset %r2,R2_SAVE +#endif .cfi_offset %r29,R29_SAVE .cfi_def_cfa_register %r29 stdu %r1,-MORESTACK_FRAMESIZE(%r1) +#if _CALL_ELF == 2 && !defined __PCREL__ +# If this isn't a pcrel libgcc then the functions we call here will +# require r2 to be valid. If __morestack is called from pcrel code r2 +# won't be valid. Set it up. + bcl 20,31,1f +1: + mflr %r12 + addis %r2,%r12,.TOC.-1b@ha + addi %r2,%r2,.TOC.-1b@l +#endif + # void __morestack_block_signals (void) bl JUMP_TARGET(__morestack_block_signals) @@ -199,6 +225,9 @@ ENTRY0(__morestack) # instructions after __morestack's return address. # ld %r12,LINKREG_SAVE(%r29) +#if _CALL_ELF == 2 + ld %r2,R2_SAVE(%r29) +#endif ld %r3,PARAMREG_SAVE+0(%r29) # restore arg regs ld %r4,PARAMREG_SAVE+8(%r29) ld %r5,PARAMREG_SAVE+16(%r29) @@ -228,6 +257,15 @@ ENTRY0(__morestack) std %r10,PARAMREG_SAVE+56(%r29) #endif +#if _CALL_ELF == 2 && !defined __PCREL__ +# r2 was restored for calling back into our caller. Set it up again. + bcl 20,31,1f +1: + mflr %r12 + addis %r2,%r12,.TOC.-1b@ha + addi %r2,%r2,.TOC.-1b@l +#endif + bl JUMP_TARGET(__morestack_block_signals) # void *__generic_releasestack (size_t *pavailable) @@ -249,6 +287,9 @@ ENTRY0(__morestack) # Restore return value regs, and return. ld %r0,LINKREG_SAVE(%r29) mtlr %r0 +#if _CALL_ELF == 2 + ld %r2,R2_SAVE(%r29) +#endif ld %r3,PARAMREG_SAVE+0(%r29) ld %r4,PARAMREG_SAVE+8(%r29) ld %r5,PARAMREG_SAVE+16(%r29) -- cgit v1.1 From 7195fa03e7b8dfaff85d122da3b75f0a30ce95f8 Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 4 Aug 2021 11:40:52 +0200 Subject: libgcc: Fix duplicated content of config/t-slibgcc-fuchsia The file has two identical halves, seems like twice applied patch. 2021-08-04 Jakub Jelinek * config/t-slibgcc-fuchsia: Undo doubly applied patch. --- libgcc/config/t-slibgcc-fuchsia | 22 ---------------------- 1 file changed, 22 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/t-slibgcc-fuchsia b/libgcc/config/t-slibgcc-fuchsia index ed56473..35b0017 100644 --- a/libgcc/config/t-slibgcc-fuchsia +++ b/libgcc/config/t-slibgcc-fuchsia @@ -20,25 +20,3 @@ SHLIB_LDFLAGS = -Wl,--soname=$(SHLIB_SONAME) \ $(LDFLAGS) -# Copyright (C) 2017-2021 Free Software Foundation, Inc. -# -# This file is part of GCC. -# -# GCC is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GCC is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GCC; see the file COPYING3. If not see -# . - -# Fuchsia-specific shared library overrides. - -SHLIB_LDFLAGS = -Wl,--soname=$(SHLIB_SONAME) \ - $(LDFLAGS) -- cgit v1.1 From 02e5ffd5db0e27f4113d25ab28afa27e4e32c79e Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Thu, 5 Aug 2021 17:32:06 +0200 Subject: libgcc: Honor LDFLAGS_FOR_TARGET when linking libgcc_s When building gcc with some specific LDFLAGS_FOR_TARGET, e.g. LDFLAGS_FOR_TARGET=-Wl,-z,relro,-z,now those flags propagate info linking of target shared libraries, e.g. lib{ubsan,tsan,stdc++,quadmath,objc,lsan,itm,gphobos,gdruntime,gomp,go,gfortran,atomic,asan}.so.* but there is one important exception, libgcc_s.so.* linking ignores it. The following patch fixes that. Bootstrapped/regtested on x86_64-linux with LDFLAGS_FOR_TARGET=-Wl,-z,relro,-z,now and verified that libgcc_s.so.* is BIND_NOW when it previously wasn't, and without any LDFLAGS_FOR_TARGET on x86_64-linux and i686-linux. There on x86_64-linux I've verified that the libgcc_s.so.1 linking command line for -m64 is identical except for whitespace to one without the patch, and for -m32 multilib $(LDFLAGS) actually do supply there an extra -m32 that also repeats later in the @multilib_flags@, which should be harmless. 2021-08-04 Jakub Jelinek * config/t-slibgcc (SHLIB_LINK): Add $(LDFLAGS). * config/t-slibgcc-darwin (SHLIB_LINK): Likewise. * config/t-slibgcc-vms (SHLIB_LINK): Likewise. * config/t-slibgcc-fuchsia (SHLIB_LDFLAGS): Remove $(LDFLAGS). --- libgcc/config/t-slibgcc | 2 +- libgcc/config/t-slibgcc-darwin | 2 +- libgcc/config/t-slibgcc-fuchsia | 3 +-- libgcc/config/t-slibgcc-vms | 2 +- 4 files changed, 4 insertions(+), 5 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/t-slibgcc b/libgcc/config/t-slibgcc index c59b43b..50f13c2 100644 --- a/libgcc/config/t-slibgcc +++ b/libgcc/config/t-slibgcc @@ -32,7 +32,7 @@ SHLIB_INSTALL_SOLINK = $(LN_S) $(SHLIB_SONAME) \ $(DESTDIR)$(slibdir)$(SHLIB_SLIBDIR_QUAL)/$(SHLIB_SOLINK) SHLIB_LINK = $(CC) $(LIBGCC2_CFLAGS) -shared -nodefaultlibs \ - $(SHLIB_LDFLAGS) \ + $(SHLIB_LDFLAGS) $(LDFLAGS) \ -o $(SHLIB_DIR)/$(SHLIB_SONAME).tmp @multilib_flags@ \ $(SHLIB_OBJS) $(SHLIB_LC) && \ rm -f $(SHLIB_DIR)/$(SHLIB_SOLINK) && \ diff --git a/libgcc/config/t-slibgcc-darwin b/libgcc/config/t-slibgcc-darwin index 9970d00..a6ada45 100644 --- a/libgcc/config/t-slibgcc-darwin +++ b/libgcc/config/t-slibgcc-darwin @@ -15,7 +15,7 @@ SHLIB_LC = -lc # Note that this version is used for the loader, not the linker; the linker # uses the stub versions named by the versioned members of $(INSTALL_FILES). -SHLIB_LINK = $(CC) $(LIBGCC2_CFLAGS) -dynamiclib -nodefaultlibs \ +SHLIB_LINK = $(CC) $(LIBGCC2_CFLAGS) $(LDFLAGS) -dynamiclib -nodefaultlibs \ -install_name @shlib_slibdir@/$(SHLIB_INSTALL_NAME) \ -single_module -o $(SHLIB_DIR)/$(SHLIB_SONAME) \ -Wl,-exported_symbols_list,$(SHLIB_MAP) \ diff --git a/libgcc/config/t-slibgcc-fuchsia b/libgcc/config/t-slibgcc-fuchsia index 35b0017..97f1803 100644 --- a/libgcc/config/t-slibgcc-fuchsia +++ b/libgcc/config/t-slibgcc-fuchsia @@ -18,5 +18,4 @@ # Fuchsia-specific shared library overrides. -SHLIB_LDFLAGS = -Wl,--soname=$(SHLIB_SONAME) \ - $(LDFLAGS) +SHLIB_LDFLAGS = -Wl,--soname=$(SHLIB_SONAME) diff --git a/libgcc/config/t-slibgcc-vms b/libgcc/config/t-slibgcc-vms index d01c343..c305975 100644 --- a/libgcc/config/t-slibgcc-vms +++ b/libgcc/config/t-slibgcc-vms @@ -22,7 +22,7 @@ SHLIB_LINK = \ objdump --syms $(SHLIB_OBJS) | \ $(SHLIB_SYMVEC) >> SYMVEC_$$$$.opt ; \ echo "case_sensitive=NO" >> SYMVEC_$$$$.opt; \ - $(CC) $(LIBGCC2_CFLAGS) -nodefaultlibs \ + $(CC) $(LIBGCC2_CFLAGS) $(LDFLAGS) -nodefaultlibs \ -shared --for-linker=/noinform -o $(SHLIB_NAME) $(SHLIB_OBJS) \ --for-linker=SYMVEC_$$$$.opt \ --for-linker=gsmatch=equal,$(shlib_version) -- cgit v1.1 From da8a9d695b3c4b9397b5d9a27660bfa48af8d707 Mon Sep 17 00:00:00 2001 From: Stafford Horne Date: Wed, 21 Apr 2021 05:33:15 +0900 Subject: or1k: Use cmodel=large when building crtstuff When linking gcc runtime objects into large binaries the link may fail with the below errors. This will happen even if we are building with -mcmodel=large. /home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `deregister_tm_clones': crtstuff.c:(.text+0x3c): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_deregisterTMCloneTable' /home/shorne/work/openrisc/output/host/lib/gcc/or1k-buildroot-linux-uclibc/10.3.0/crtbeginS.o: in function `register_tm_clones': crtstuff.c:(.text+0xc0): relocation truncated to fit: R_OR1K_GOT16 against undefined symbol `_ITM_registerTMCloneTable' This patch builds the gcc crtstuff binaries always with the -mcmodel=large option to ensure they can be linked into large binaries. libgcc/ChangeLog: PR target/99783 * config.host (or1k-*, tmake_file): Add or1k/t-crtstuff. * config/or1k/t-crtstuff: New file. --- libgcc/config/or1k/t-crtstuff | 2 ++ 1 file changed, 2 insertions(+) create mode 100644 libgcc/config/or1k/t-crtstuff (limited to 'libgcc/config') diff --git a/libgcc/config/or1k/t-crtstuff b/libgcc/config/or1k/t-crtstuff new file mode 100644 index 0000000..dcae7f3 --- /dev/null +++ b/libgcc/config/or1k/t-crtstuff @@ -0,0 +1,2 @@ +# Compile crtbeginS.o and crtendS.o with -mcmodel=large +CRTSTUFF_T_CFLAGS_S += -mcmodel=large -- cgit v1.1 From 574e7950bd6b34e9e2cacce18c802b45505d1d0a Mon Sep 17 00:00:00 2001 From: Richard Earnshaw Date: Fri, 18 Jun 2021 17:16:25 +0100 Subject: arm: add erratum mitigation to __gnu_cmse_nonsecure_call [PR102035] Add the recommended erratum mitigation sequence to __gnu_cmse_nonsecure_call for use on Armv8-m.main devices. Since this is in the library code we cannot know in advance whether the core we are running on will be affected by this, so always enable it. libgcc: PR target/102035 * config/arm/cmse_nonsecure_call.S (__gnu_cmse_nonsecure_call): Add vlldm erratum work-around. --- libgcc/config/arm/cmse_nonsecure_call.S | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'libgcc/config') diff --git a/libgcc/config/arm/cmse_nonsecure_call.S b/libgcc/config/arm/cmse_nonsecure_call.S index 00830ad..c8e0fbb 100644 --- a/libgcc/config/arm/cmse_nonsecure_call.S +++ b/libgcc/config/arm/cmse_nonsecure_call.S @@ -102,6 +102,11 @@ blxns r4 #ifdef __ARM_PCS_VFP vpop.f64 {d8-d15} #else +/* VLLDM erratum mitigation sequence. */ +mrs r5, control +tst r5, #8 /* CONTROL_S.SFPA */ +it ne +.inst.w 0xeeb00a40 /* vmovne s0, s0 */ vlldm sp /* Lazy restore of d0-d16 and FPSCR. */ add sp, sp, #0x88 /* Free space used to save floating point registers. */ #endif /* __ARM_PCS_VFP */ -- cgit v1.1 From 0012f921b6756d37e507f88c38aabc911d2e6831 Mon Sep 17 00:00:00 2001 From: Jonathan Yong <10walls@gmail.com> Date: Wed, 25 Aug 2021 16:33:36 +0000 Subject: cygming-crtend.c: fix build warnings libgcc/Changelog: * config/i386/cygming-crtend.c: Fix register_frame_ctor and register_frame_dtor warnings. Signed-off-by: Jonathan Yong <10walls@gmail.com> --- libgcc/config/i386/cygming-crtend.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'libgcc/config') diff --git a/libgcc/config/i386/cygming-crtend.c b/libgcc/config/i386/cygming-crtend.c index c7ba109..4ab6342 100644 --- a/libgcc/config/i386/cygming-crtend.c +++ b/libgcc/config/i386/cygming-crtend.c @@ -56,7 +56,10 @@ static EH_FRAME_SECTION_CONST int __FRAME_END__[] extern void __gcc_register_frame (void); extern void __gcc_deregister_frame (void); +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wprio-ctor-dtor" static void register_frame_ctor (void) __attribute__ ((constructor (0))); +#pragma GCC diagnostic pop static void register_frame_ctor (void) @@ -65,7 +68,10 @@ register_frame_ctor (void) } #if !DEFAULT_USE_CXA_ATEXIT +#pragma GCC diagnostic push +#pragma GCC diagnostic ignored "-Wprio-ctor-dtor" static void deregister_frame_dtor (void) __attribute__ ((destructor (0))); +#pragma GCC diagnostic pop static void deregister_frame_dtor (void) -- cgit v1.1 From 5889e842ae4df48ac471c47d6ed72e05041a1db8 Mon Sep 17 00:00:00 2001 From: David Edelsohn Date: Wed, 25 Aug 2021 17:41:50 -0400 Subject: rs6000: inline ldouble __gcc_qsub While performing some tests of IEEE 128 float for PPC64LE, Michael Meissner noticed that __gcc_qsub is substantially slower than __gcc_qadd. __gcc_qsub calls __gcc_add with the second operand negated. Because the functions normally are invoked through libgcc shared object, the extra PLT overhead has a large impact on the overall time of the function. This patch converts __gcc_qadd to a static inline function invoked by __gcc_qadd and __gcc_qsub. libgcc/ChangeLog: * config/rs6000/ibm-ldouble.c (ldouble_qadd_internal): Rename from __gcc_qadd. (__gcc_qadd): Call ldouble_qadd_internal. (__gcc_qsub): Call ldouble_qadd_internal with second long double argument negated. --- libgcc/config/rs6000/ibm-ldouble.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/rs6000/ibm-ldouble.c b/libgcc/config/rs6000/ibm-ldouble.c index 4c13453..0b385aa 100644 --- a/libgcc/config/rs6000/ibm-ldouble.c +++ b/libgcc/config/rs6000/ibm-ldouble.c @@ -118,8 +118,8 @@ pack_ldouble (double dh, double dl) } /* Add two 'IBM128_TYPE' values and return the result. */ -IBM128_TYPE -__gcc_qadd (double a, double aa, double c, double cc) +static inline IBM128_TYPE +ldouble_qadd_internal (double a, double aa, double c, double cc) { double xh, xl, z, q, zz; @@ -158,9 +158,15 @@ __gcc_qadd (double a, double aa, double c, double cc) } IBM128_TYPE -__gcc_qsub (double a, double b, double c, double d) +__gcc_qadd (double a, double aa, double c, double cc) +{ + return ldouble_qadd_internal (a, aa, c, cc); +} + +IBM128_TYPE +__gcc_qsub (double a, double aa, double c, double cc) { - return __gcc_qadd (a, b, -c, -d); + return ldouble_qadd_internal (a, aa, -c, -cc); } #ifdef __NO_FPRS__ -- cgit v1.1 From de7a795c321e76826d123c92b99e73e144666b60 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Tue, 31 Aug 2021 10:56:34 +0100 Subject: libgcc: Add missing runtime exception notices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Quoting from https://gcc.gnu.org/pipermail/gcc/2021-July/236716.html: -------------------------------------------------------------------- It was pointed out to me off-list that config/aarch64/value-unwind.h is missing the runtime exception. It looks like a few other files are too; a fuller list is: libgcc/config/aarch64/value-unwind.h libgcc/config/frv/frv-abi.h libgcc/config/i386/value-unwind.h libgcc/config/pa/pa64-hpux-lib.h Certainly for the aarch64 file this was simply a mistake; it seems to have been copied from the i386 version, both of which reference the runtime exception but don't actually include it. -------------------------------------------------------------------- Similarly, frv-abi.h referenced the exception but didn't include it. pa64-hpux-lib.h was missing any reference to the exception. The decision was that this was simply a mistake [https://gcc.gnu.org/pipermail/gcc/2021-July/236717.html]: -------------------------------------------------------------------- […] It generally is considered a textual omission. The runtime library components of GCC are intended to be licensed under the runtime exception, which was granted and approved at the time of introduction. -------------------------------------------------------------------- and that we should simply change all of the files above [https://gcc.gnu.org/pipermail/gcc/2021-July/236719.html]: -------------------------------------------------------------------- Please correct the text in the files. The files in libgcc used in the GCC runtime are intended to be licensed with the runtime exception and GCC previously was granted approval for that licensing and purpose. […] The runtime exception explicitly was intended for this purpose and usage at the time that GCC received approval to apply the exception. -------------------------------------------------------------------- libgcc/ * config/aarch64/value-unwind.h: Add missing runtime exception paragraph. * config/frv/frv-abi.h: Likewise. * config/i386/value-unwind.h: Likewise. * config/pa/pa64-hpux-lib.h: Likewise. --- libgcc/config/aarch64/value-unwind.h | 4 ++++ libgcc/config/frv/frv-abi.h | 4 ++++ libgcc/config/i386/value-unwind.h | 4 ++++ libgcc/config/pa/pa64-hpux-lib.h | 9 +++++++-- 4 files changed, 19 insertions(+), 2 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/aarch64/value-unwind.h b/libgcc/config/aarch64/value-unwind.h index 1f50a47..041ca13 100644 --- a/libgcc/config/aarch64/value-unwind.h +++ b/libgcc/config/aarch64/value-unwind.h @@ -13,6 +13,10 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + You should have received a copy of the GNU General Public License and a copy of the GCC Runtime Library Exception along with this program; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see diff --git a/libgcc/config/frv/frv-abi.h b/libgcc/config/frv/frv-abi.h index 9af4ea4..0f7ed83 100644 --- a/libgcc/config/frv/frv-abi.h +++ b/libgcc/config/frv/frv-abi.h @@ -14,6 +14,10 @@ FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + You should have received a copy of the GNU General Public License and a copy of the GCC Runtime Library Exception along with this program; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see diff --git a/libgcc/config/i386/value-unwind.h b/libgcc/config/i386/value-unwind.h index 66f76bb..80267ee 100644 --- a/libgcc/config/i386/value-unwind.h +++ b/libgcc/config/i386/value-unwind.h @@ -13,6 +13,10 @@ or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. + Under Section 7 of GPL version 3, you are granted additional + permissions described in the GCC Runtime Library Exception, version + 3.1, as published by the Free Software Foundation. + You should have received a copy of the GNU General Public License and a copy of the GCC Runtime Library Exception along with this program; see the files COPYING3 and COPYING.RUNTIME respectively. If not, see diff --git a/libgcc/config/pa/pa64-hpux-lib.h b/libgcc/config/pa/pa64-hpux-lib.h index 85d5826..eeab98f 100644 --- a/libgcc/config/pa/pa64-hpux-lib.h +++ b/libgcc/config/pa/pa64-hpux-lib.h @@ -14,8 +14,13 @@ but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. -You should have received a copy of the GNU General Public License -along with GCC; see the file COPYING3. If not see +Under Section 7 of GPL version 3, you are granted additional +permissions described in the GCC Runtime Library Exception, version +3.1, as published by the Free Software Foundation. + +You should have received a copy of the GNU General Public License and +a copy of the GCC Runtime Library Exception along with this program; +see the files COPYING3 and COPYING.RUNTIME respectively. If not, see . */ /* We use DTOR_LIST_BEGIN to carry a bunch of hacks to allow us to use -- cgit v1.1 From b387e664cfa4e9dd010a3f64d446308d6d84a5d2 Mon Sep 17 00:00:00 2001 From: liuhongt Date: Mon, 5 Jul 2021 17:31:46 +0800 Subject: libgcc: Enable hfmode soft-sf/df/xf/tf extensions and truncations. libgcc/ChangeLog: * config/i386/32/sfp-machine.h (_FP_NANFRAC_H): New macro. * config/i386/64/sfp-machine.h (_FP_NANFRAC_H): Ditto. * config/i386/sfp-machine.h (_FP_NANSIGN_H): Ditto. * config/i386/t-softfp: Add hf soft-fp. * config.host: Add i386/64/t-softfp. * config/i386/64/t-softfp: New file. --- libgcc/config/i386/32/sfp-machine.h | 1 + libgcc/config/i386/64/sfp-machine.h | 1 + libgcc/config/i386/64/t-softfp | 1 + libgcc/config/i386/sfp-machine.h | 1 + libgcc/config/i386/t-softfp | 5 +++++ 5 files changed, 9 insertions(+) create mode 100644 libgcc/config/i386/64/t-softfp (limited to 'libgcc/config') diff --git a/libgcc/config/i386/32/sfp-machine.h b/libgcc/config/i386/32/sfp-machine.h index 1fa282d..e24cbc8 100644 --- a/libgcc/config/i386/32/sfp-machine.h +++ b/libgcc/config/i386/32/sfp-machine.h @@ -86,6 +86,7 @@ #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) +#define _FP_NANFRAC_H _FP_QNANBIT_H #define _FP_NANFRAC_S _FP_QNANBIT_S #define _FP_NANFRAC_D _FP_QNANBIT_D, 0 /* Even if XFmode is 12byte, we have to pad it to diff --git a/libgcc/config/i386/64/sfp-machine.h b/libgcc/config/i386/64/sfp-machine.h index 1ff94c2..e1c6166 100644 --- a/libgcc/config/i386/64/sfp-machine.h +++ b/libgcc/config/i386/64/sfp-machine.h @@ -13,6 +13,7 @@ typedef unsigned int UTItype __attribute__ ((mode (TI))); #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_2_udiv(Q,R,X,Y) +#define _FP_NANFRAC_H _FP_QNANBIT_H #define _FP_NANFRAC_S _FP_QNANBIT_S #define _FP_NANFRAC_D _FP_QNANBIT_D #define _FP_NANFRAC_E _FP_QNANBIT_E, 0 diff --git a/libgcc/config/i386/64/t-softfp b/libgcc/config/i386/64/t-softfp new file mode 100644 index 0000000..f9d8b3a --- /dev/null +++ b/libgcc/config/i386/64/t-softfp @@ -0,0 +1 @@ +softfp_extras := fixhfti fixunshfti floattihf floatuntihf diff --git a/libgcc/config/i386/sfp-machine.h b/libgcc/config/i386/sfp-machine.h index 8319f05..f15d29d 100644 --- a/libgcc/config/i386/sfp-machine.h +++ b/libgcc/config/i386/sfp-machine.h @@ -17,6 +17,7 @@ typedef int __gcc_CMPtype __attribute__ ((mode (__libgcc_cmp_return__))); #define _FP_KEEPNANFRACP 1 #define _FP_QNANNEGATEDP 0 +#define _FP_NANSIGN_H 1 #define _FP_NANSIGN_S 1 #define _FP_NANSIGN_D 1 #define _FP_NANSIGN_E 1 diff --git a/libgcc/config/i386/t-softfp b/libgcc/config/i386/t-softfp index 685d9cf..4ac214e 100644 --- a/libgcc/config/i386/t-softfp +++ b/libgcc/config/i386/t-softfp @@ -1 +1,6 @@ LIB2ADD += $(srcdir)/config/i386/sfp-exceptions.c + +softfp_extensions := hfsf hfdf hftf hfxf sfdf sftf dftf xftf +softfp_truncations := tfhf xfhf dfhf sfhf tfsf dfsf tfdf tfxf + +softfp_extras += eqhf2 \ No newline at end of file -- cgit v1.1 From 3ccb523bdd78e6ba3c133064be90cdf19dcbf896 Mon Sep 17 00:00:00 2001 From: Iain Sandoe Date: Fri, 3 Sep 2021 08:41:06 +0100 Subject: libgcc, soft-float: Fix strong_alias macro use for Darwin. Darwin does not support strong symbol aliases and a work- around is provided in sfp-machine.h where a second function is created that simply calls the original. However this needs the arguments to the synthesized function to track the mode of the original function. So the fix here is to match known floating point modes from the incoming function and apply the one found to the new function args. The matching is highly specific to the current set of modes and will need adjusting should more cases be added. Signed-off-by: Iain Sandoe libgcc/ChangeLog: * config/i386/sfp-machine.h (alias_HFtype, alias_SFtype alias_DFtype, alias_TFtype): New. (ALIAS_SELECTOR): New. (strong_alias): Use __typeof and a _Generic selector to provide the type to the synthesized function. --- libgcc/config/i386/sfp-machine.h | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/i386/sfp-machine.h b/libgcc/config/i386/sfp-machine.h index f15d29d..172ebc7 100644 --- a/libgcc/config/i386/sfp-machine.h +++ b/libgcc/config/i386/sfp-machine.h @@ -75,10 +75,24 @@ void __sfp_handle_exceptions (int); /* Define ALIASNAME as a strong alias for NAME. */ #if defined __MACH__ -/* Mach-O doesn't support aliasing. If these functions ever return - anything but CMPtype we need to revisit this... */ +/* Mach-O doesn't support aliasing, so we build a secondary function for + the alias - we need to do a bit of a dance to find out what the type of + the arguments is and then apply that to the secondary function. + If these functions ever return anything but CMPtype we need to revisit + this... */ +typedef float alias_HFtype __attribute__ ((mode (HF))); +typedef float alias_SFtype __attribute__ ((mode (SF))); +typedef float alias_DFtype __attribute__ ((mode (DF))); +typedef float alias_TFtype __attribute__ ((mode (TF))); +#define ALIAS_SELECTOR \ + CMPtype (*) (alias_HFtype, alias_HFtype): (alias_HFtype) 0, \ + CMPtype (*) (alias_SFtype, alias_SFtype): (alias_SFtype) 0, \ + CMPtype (*) (alias_DFtype, alias_DFtype): (alias_DFtype) 0, \ + CMPtype (*) (alias_TFtype, alias_TFtype): (alias_TFtype) 0 #define strong_alias(name, aliasname) \ - CMPtype aliasname (TFtype a, TFtype b) { return name(a, b); } + CMPtype aliasname (__typeof (_Generic (name, ALIAS_SELECTOR)) a, \ + __typeof (_Generic (name, ALIAS_SELECTOR)) b) \ + { return name (a, b); } #else # define strong_alias(name, aliasname) _strong_alias(name, aliasname) # define _strong_alias(name, aliasname) \ -- cgit v1.1 From 637dfcf43cfd2f01f4757abfd84d376d4011b0b2 Mon Sep 17 00:00:00 2001 From: liuhongt Date: Fri, 3 Sep 2021 13:06:57 +0800 Subject: Explicitly add -msse2 to compile HF related libgcc source file. For 32-bit libgcc configure w/o sse2, there's would be an error since GCC only support _Float16 under sse2. Explicitly add -msse2 for those HF related libgcc functions, so users can still link them w/ the upper configuration. libgcc/ChangeLog: * Makefile.in: Adjust to support specific CFLAGS for each libgcc source file. * config/i386/64/t-softfp: Explicitly add -msse2 for HF related libgcc source files. * config/i386/t-softfp: Ditto. * config/i386/_divhc3.c: New file. * config/i386/_mulhc3.c: New file. --- libgcc/config/i386/64/t-softfp | 5 +++++ libgcc/config/i386/_divhc3.c | 4 ++++ libgcc/config/i386/_mulhc3.c | 4 ++++ libgcc/config/i386/t-softfp | 22 +++++++++++++++++++++- 4 files changed, 34 insertions(+), 1 deletion(-) create mode 100644 libgcc/config/i386/_divhc3.c create mode 100644 libgcc/config/i386/_mulhc3.c (limited to 'libgcc/config') diff --git a/libgcc/config/i386/64/t-softfp b/libgcc/config/i386/64/t-softfp index f9d8b3a..3bec464 100644 --- a/libgcc/config/i386/64/t-softfp +++ b/libgcc/config/i386/64/t-softfp @@ -1 +1,6 @@ softfp_extras := fixhfti fixunshfti floattihf floatuntihf + +CFLAGS-fixhfti.c += -msse2 +CFLAGS-fixunshfti.c += -msse2 +CFLAGS-floattihf.c += -msse2 +CFLAGS-floatunstihf.c += -msse2 diff --git a/libgcc/config/i386/_divhc3.c b/libgcc/config/i386/_divhc3.c new file mode 100644 index 0000000..4cf92aa --- /dev/null +++ b/libgcc/config/i386/_divhc3.c @@ -0,0 +1,4 @@ +#ifdef __SSE2__ +#define L_divhc3 +#include "libgcc2.c" +#endif diff --git a/libgcc/config/i386/_mulhc3.c b/libgcc/config/i386/_mulhc3.c new file mode 100644 index 0000000..85a8a2f --- /dev/null +++ b/libgcc/config/i386/_mulhc3.c @@ -0,0 +1,4 @@ +#ifdef __SSE2__ +#define L_mulhc3 +#include "libgcc2.c" +#endif diff --git a/libgcc/config/i386/t-softfp b/libgcc/config/i386/t-softfp index 4ac214e..2363ea1 100644 --- a/libgcc/config/i386/t-softfp +++ b/libgcc/config/i386/t-softfp @@ -1,6 +1,26 @@ LIB2ADD += $(srcdir)/config/i386/sfp-exceptions.c +# Replace _divhc3 and _mulhc3. +libgcc2-hf-functions = _divhc3 _mulhc3 +LIB2FUNCS_EXCLUDE += $(libgcc2-hf-functions) +libgcc2-hf-extras = $(addsuffix .c, $(libgcc2-hf-functions)) +LIB2ADD_ST += $(addprefix $(srcdir)/config/i386/, $(libgcc2-hf-extras)) + softfp_extensions := hfsf hfdf hftf hfxf sfdf sftf dftf xftf softfp_truncations := tfhf xfhf dfhf sfhf tfsf dfsf tfdf tfxf -softfp_extras += eqhf2 \ No newline at end of file +softfp_extras += eqhf2 + +CFLAGS-extendhfsf2.c += -msse2 +CFLAGS-extendhfdf2.c += -msse2 +CFLAGS-extendhftf2.c += -msse2 +CFLAGS-extendhfxf2.c += -msse2 + +CFLAGS-truncsfhf2.c += -msse2 +CFLAGS-truncdfhf2.c += -msse2 +CFLAGS-truncxfhf2.c += -msse2 +CFLAGS-trunctfhf2.c += -msse2 + +CFLAGS-eqhf2.c += -msse2 +CFLAGS-_divhc3.c += -msse2 +CFLAGS-_mulhc3.c += -msse2 -- cgit v1.1 From 87d55da7d78f64bfce5e8217379d46bdc9ab287b Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Wed, 8 Sep 2021 11:34:45 +0200 Subject: libgcc, i386: Export *hf* and *hc* from libgcc_s.so.1 The following patch exports it for Linux from config/i386/*.ver where it IMNSHO belongs, aarch64 already exports some of those at GCC_11* and other targets might add them at completely different gcc versions. 2021-09-08 Jakub Jelinek Iain Sandoe * config/i386/libgcc-glibc.ver: Add %inherit GCC_12.0.0 GCC_7.0.0 and export *hf* and *hc* functions at GCC_12.0.0. --- libgcc/config/i386/libgcc-glibc.ver | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'libgcc/config') diff --git a/libgcc/config/i386/libgcc-glibc.ver b/libgcc/config/i386/libgcc-glibc.ver index 06e5d37..5bed104 100644 --- a/libgcc/config/i386/libgcc-glibc.ver +++ b/libgcc/config/i386/libgcc-glibc.ver @@ -194,3 +194,23 @@ GCC_4.8.0 { __cpu_indicator_init } %endif + +%inherit GCC_12.0.0 GCC_7.0.0 +GCC_12.0.0 { + __divhc3 + __mulhc3 + __eqhf2 + __nehf2 + __extendhfdf2 + __extendhfsf2 + __extendhftf2 + __extendhfxf2 + __fixhfti + __fixunshfti + __floattihf + __floatuntihf + __truncdfhf2 + __truncsfhf2 + __trunctfhf2 + __truncxfhf2 +} -- cgit v1.1 From 6576ad5add7e1891c379783316b85b88346963aa Mon Sep 17 00:00:00 2001 From: liuhongt Date: Wed, 8 Sep 2021 09:49:54 +0800 Subject: Compile __{mul,div}hc3 into libgcc_s.so.1. libgcc/ChangeLog: * config/i386/t-softfp: Compile __{mul,div}hc3 into libgcc_s.so.1. --- libgcc/config/i386/t-softfp | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'libgcc/config') diff --git a/libgcc/config/i386/t-softfp b/libgcc/config/i386/t-softfp index 2363ea1..7620cc0 100644 --- a/libgcc/config/i386/t-softfp +++ b/libgcc/config/i386/t-softfp @@ -2,9 +2,8 @@ LIB2ADD += $(srcdir)/config/i386/sfp-exceptions.c # Replace _divhc3 and _mulhc3. libgcc2-hf-functions = _divhc3 _mulhc3 -LIB2FUNCS_EXCLUDE += $(libgcc2-hf-functions) libgcc2-hf-extras = $(addsuffix .c, $(libgcc2-hf-functions)) -LIB2ADD_ST += $(addprefix $(srcdir)/config/i386/, $(libgcc2-hf-extras)) +LIB2ADD += $(addprefix $(srcdir)/config/i386/, $(libgcc2-hf-extras)) softfp_extensions := hfsf hfdf hftf hfxf sfdf sftf dftf xftf softfp_truncations := tfhf xfhf dfhf sfhf tfsf dfsf tfdf tfxf -- cgit v1.1 From 20f3c168205cc7b0a97ecd54ffc54bed7637be74 Mon Sep 17 00:00:00 2001 From: Andrew Pinski Date: Mon, 13 Sep 2021 06:56:57 +0000 Subject: Remove m32r{,le}-*-linux* support from GCC m32r support never made it to glibc and the support for the Linux kernel was removed with 4.18. It does not remove much but no reason to keep around a port which never worked or one which the support in other projects is gone. OK? Checked to make sure m32r-linux and m32rle-linux were rejected when building. contrib/ChangeLog: * config-list.mk: Remove m32r-linux and m32rle-linux from the list. gcc/ChangeLog: * config.gcc: Add m32r-*-linux* and m32rle-*-linux* to the Unsupported targets list. Remove support for m32r-*-linux* and m32rle-*-linux*. * config/m32r/linux.h: Removed. * config/m32r/t-linux: Removed. libgcc/ChangeLog: * config.host: Remove m32r-*-linux* and m32rle-*-linux*. * config/m32r/libgcc-glibc.ver: Removed. * config/m32r/t-linux: Removed. --- libgcc/config/m32r/libgcc-glibc.ver | 48 ------------------------------------- libgcc/config/m32r/t-linux | 5 ---- 2 files changed, 53 deletions(-) delete mode 100644 libgcc/config/m32r/libgcc-glibc.ver delete mode 100644 libgcc/config/m32r/t-linux (limited to 'libgcc/config') diff --git a/libgcc/config/m32r/libgcc-glibc.ver b/libgcc/config/m32r/libgcc-glibc.ver deleted file mode 100644 index cb52aa1..0000000 --- a/libgcc/config/m32r/libgcc-glibc.ver +++ /dev/null @@ -1,48 +0,0 @@ -# Copyright (C) 2004-2021 Free Software Foundation, Inc. -# -# This file is part of GCC. -# -# GCC is free software; you can redistribute it and/or modify -# it under the terms of the GNU General Public License as published by -# the Free Software Foundation; either version 3, or (at your option) -# any later version. -# -# GCC is distributed in the hope that it will be useful, -# but WITHOUT ANY WARRANTY; without even the implied warranty of -# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -# GNU General Public License for more details. -# -# You should have received a copy of the GNU General Public License -# along with GCC; see the file COPYING3. If not see -# . - -# In order to work around the very problems that force us to now generally -# create a libgcc.so, glibc reexported a number of routines from libgcc.a. -# By now choosing the same version tags for these specific routines, we -# maintain enough binary compatibility to allow future versions of glibc -# to defer implementation of these routines to libgcc.so via DT_AUXILIARY. - -# Note that we cannot use the default libgcc-glibc.ver file on sh, -# because GLIBC_2.0 does not exist on this architecture, as the first -# ever glibc release on the platform was GLIBC_2.3. - -%exclude { - __register_frame - __register_frame_table - __deregister_frame - __register_frame_info - __deregister_frame_info - __frame_state_for - __register_frame_info_table -} - -%inherit GCC_3.0 GLIBC_2.3 -GLIBC_2.3 { - __register_frame - __register_frame_table - __deregister_frame - __register_frame_info - __deregister_frame_info - __frame_state_for - __register_frame_info_table -} diff --git a/libgcc/config/m32r/t-linux b/libgcc/config/m32r/t-linux deleted file mode 100644 index 5223b73..0000000 --- a/libgcc/config/m32r/t-linux +++ /dev/null @@ -1,5 +0,0 @@ -# Turn off the SDA while compiling libgcc2. There are no headers for it -# and we want maximal upward compatibility here. -HOST_LIBGCC2_CFLAGS += -G 0 - -SHLIB_MAPFILES = libgcc-std.ver $(srcdir)/config/m32r/libgcc-glibc.ver -- cgit v1.1