From fa1c2ec1bb5e6363839dce55421cdc6c3dd19726 Mon Sep 17 00:00:00 2001 From: Pan Li Date: Tue, 16 May 2023 14:42:18 +0800 Subject: RISC-V: Adjust stdint.h to stdint-gcc.h for rvv tests This patch would like to align the stdint.h to the stdint-gcc.h for all the RVV test files. Aka: stdint.h => stdint-gcc.h Signed-off-by: Pan Li gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h: Replace stdint.h with stdint-gcc.h. * gcc.target/riscv/rvv/autovec/binop/shift-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vadd-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vand-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vdiv-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vmax-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vmin-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vmul-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vor-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vrem-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vsub-template.h: Ditto. * gcc.target/riscv/rvv/autovec/binop/vxor-template.h: Ditto. * gcc.target/riscv/rvv/autovec/series-1.c: Ditto. * gcc.target/riscv/rvv/autovec/vmv-imm-run.c: Ditto. * gcc.target/riscv/rvv/autovec/vmv-imm-template.h: Ditto. --- .../gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c | 2 +- gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h | 2 +- 15 files changed, 15 insertions(+), 15 deletions(-) (limited to 'gcc') diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h index a0ddc00..8d1cefd 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-scalar-template.h @@ -2,7 +2,7 @@ /* { dg-do run } */ /* { dg-additional-options "-std=c99 --param=riscv-autovec-preference=scalable -fno-vect-cost-model --save-temps" } */ -#include +#include #include #define SHIFTL(TYPE,VAL) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h index 64e0a38..16ae48c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/shift-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST1_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h index 5ed7932..cd945d4 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vadd-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h index 7d02c83..5cabe07 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vand-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h index 7fbba7b..12a1de3 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vdiv-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h index df0f9f2..fc6a07e 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmax-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h index 459f58d..06f6b95 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmin-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h index b029c06..37f7797 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vmul-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h index 859ae67..e60146c 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vor-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h index 71eebc8..d5ef406 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vrem-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h index 0566f3d..8c0a9c9 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vsub-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h index 954a247..370b242 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/binop/vxor-template.h @@ -1,4 +1,4 @@ -#include +#include #define TEST_TYPE(TYPE) \ __attribute__((noipa)) \ diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c index a01f6ce..1c69722 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/series-1.c @@ -1,7 +1,7 @@ /* { dg-do compile } */ /* { dg-options "-march=rv32gcv -mabi=ilp32d --param riscv-autovec-preference=fixed-vlmax --param riscv-autovec-lmul=m4" } */ -#include +#include #define NUM_ELEMS(TYPE) (64 / sizeof (TYPE)) diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c index 309a296b..6764110 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-run.c @@ -3,7 +3,7 @@ #include "vmv-imm-template.h" -#include +#include #include #define SZ 512 diff --git a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h index 93ba520..855343d 100644 --- a/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h +++ b/gcc/testsuite/gcc.target/riscv/rvv/autovec/vmv-imm-template.h @@ -1,4 +1,4 @@ -#include +#include #include #define VMV_POS(TYPE,VAL) \ -- cgit v1.1