From f6a1e4301a7a2038e52cae4a2f4d2e2b94dfa5fc Mon Sep 17 00:00:00 2001 From: Adam Nemet Date: Mon, 18 May 2009 18:43:25 +0000 Subject: * config/mips/mips.md (*zero_extend_trunc, *zero_extendhi_truncqi): Move after the zero_extend patterns. (*extenddi_truncate, *extendsi_truncate): Move after the extend patterns. From-SVN: r147673 --- gcc/ChangeLog | 7 +++ gcc/config/mips/mips.md | 124 ++++++++++++++++++++++++------------------------ 2 files changed, 69 insertions(+), 62 deletions(-) (limited to 'gcc') diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8260f92..9735882 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2009-05-18 Adam Nemet + + * config/mips/mips.md (*zero_extend_trunc, + *zero_extendhi_truncqi): Move after the zero_extend patterns. + (*extenddi_truncate, *extendsi_truncate): Move after the + extend patterns. + 2009-05-18 H.J. Lu PR target/39942 diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 4ae724a..06c78da 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -2736,68 +2736,6 @@ "exts\t%0,%1,%2,31" [(set_attr "type" "arith") (set_attr "mode" "")]) - -;; Combiner patterns for truncate/sign_extend combinations. The SI versions -;; use the shift/truncate patterns above. - -(define_insn_and_split "*extenddi_truncate" - [(set (match_operand:DI 0 "register_operand" "=d") - (sign_extend:DI - (truncate:SHORT (match_operand:DI 1 "register_operand" "d"))))] - "TARGET_64BIT && !TARGET_MIPS16" - "#" - "&& reload_completed" - [(set (match_dup 2) - (ashift:DI (match_dup 1) - (match_dup 3))) - (set (match_dup 0) - (ashiftrt:DI (match_dup 2) - (match_dup 3)))] -{ - operands[2] = gen_lowpart (DImode, operands[0]); - operands[3] = GEN_INT (BITS_PER_WORD - GET_MODE_BITSIZE (mode)); -}) - -(define_insn_and_split "*extendsi_truncate" - [(set (match_operand:SI 0 "register_operand" "=d") - (sign_extend:SI - (truncate:SHORT (match_operand:DI 1 "register_operand" "d"))))] - "TARGET_64BIT && !TARGET_MIPS16" - "#" - "&& reload_completed" - [(set (match_dup 2) - (ashift:DI (match_dup 1) - (match_dup 3))) - (set (match_dup 0) - (truncate:SI (ashiftrt:DI (match_dup 2) - (match_dup 3))))] -{ - operands[2] = gen_lowpart (DImode, operands[0]); - operands[3] = GEN_INT (BITS_PER_WORD - GET_MODE_BITSIZE (mode)); -}) - -;; Combiner patterns to optimize truncate/zero_extend combinations. - -(define_insn "*zero_extend_trunc" - [(set (match_operand:GPR 0 "register_operand" "=d") - (zero_extend:GPR - (truncate:SHORT (match_operand:DI 1 "register_operand" "d"))))] - "TARGET_64BIT && !TARGET_MIPS16" -{ - operands[2] = GEN_INT (GET_MODE_MASK (mode)); - return "andi\t%0,%1,%x2"; -} - [(set_attr "type" "logical") - (set_attr "mode" "")]) - -(define_insn "*zero_extendhi_truncqi" - [(set (match_operand:HI 0 "register_operand" "=d") - (zero_extend:HI - (truncate:QI (match_operand:DI 1 "register_operand" "d"))))] - "TARGET_64BIT && !TARGET_MIPS16" - "andi\t%0,%1,0xff" - [(set_attr "type" "logical") - (set_attr "mode" "HI")]) ;; ;; .................... @@ -2922,6 +2860,29 @@ "lbu\t%0,%1" [(set_attr "move_type" "load") (set_attr "mode" "HI")]) + +;; Combiner patterns to optimize truncate/zero_extend combinations. + +(define_insn "*zero_extend_trunc" + [(set (match_operand:GPR 0 "register_operand" "=d") + (zero_extend:GPR + (truncate:SHORT (match_operand:DI 1 "register_operand" "d"))))] + "TARGET_64BIT && !TARGET_MIPS16" +{ + operands[2] = GEN_INT (GET_MODE_MASK (mode)); + return "andi\t%0,%1,%x2"; +} + [(set_attr "type" "logical") + (set_attr "mode" "")]) + +(define_insn "*zero_extendhi_truncqi" + [(set (match_operand:HI 0 "register_operand" "=d") + (zero_extend:HI + (truncate:QI (match_operand:DI 1 "register_operand" "d"))))] + "TARGET_64BIT && !TARGET_MIPS16" + "andi\t%0,%1,0xff" + [(set_attr "type" "logical") + (set_attr "mode" "HI")]) ;; ;; .................... @@ -3048,6 +3009,45 @@ [(set_attr "move_type" "signext,load") (set_attr "mode" "SI")]) +;; Combiner patterns for truncate/sign_extend combinations. The SI versions +;; use the shift/truncate patterns. + +(define_insn_and_split "*extenddi_truncate" + [(set (match_operand:DI 0 "register_operand" "=d") + (sign_extend:DI + (truncate:SHORT (match_operand:DI 1 "register_operand" "d"))))] + "TARGET_64BIT && !TARGET_MIPS16" + "#" + "&& reload_completed" + [(set (match_dup 2) + (ashift:DI (match_dup 1) + (match_dup 3))) + (set (match_dup 0) + (ashiftrt:DI (match_dup 2) + (match_dup 3)))] +{ + operands[2] = gen_lowpart (DImode, operands[0]); + operands[3] = GEN_INT (BITS_PER_WORD - GET_MODE_BITSIZE (mode)); +}) + +(define_insn_and_split "*extendsi_truncate" + [(set (match_operand:SI 0 "register_operand" "=d") + (sign_extend:SI + (truncate:SHORT (match_operand:DI 1 "register_operand" "d"))))] + "TARGET_64BIT && !TARGET_MIPS16" + "#" + "&& reload_completed" + [(set (match_dup 2) + (ashift:DI (match_dup 1) + (match_dup 3))) + (set (match_dup 0) + (truncate:SI (ashiftrt:DI (match_dup 2) + (match_dup 3))))] +{ + operands[2] = gen_lowpart (DImode, operands[0]); + operands[3] = GEN_INT (BITS_PER_WORD - GET_MODE_BITSIZE (mode)); +}) + (define_insn "extendsfdf2" [(set (match_operand:DF 0 "register_operand" "=f") (float_extend:DF (match_operand:SF 1 "register_operand" "f")))] -- cgit v1.1